diff options
| author | Govindraj.R <govindraj.raja@ti.com> | 2012-08-14 16:44:39 +0200 |
|---|---|---|
| committer | Andy Green <andy.green@linaro.org> | 2012-09-07 13:06:10 +0800 |
| commit | a8fecc1ba4f482e27ce182ebf71bd4011e626b08 (patch) | |
| tree | 35a01e06357675fef9852ba7e9a9cb6358a1b4a8 /drivers | |
| parent | 9269be1a3f86a7ffc9df5113cb2f7d8ad438cced (diff) | |
OMAP4: Serial: Set TX_FIFO_THRESHOLD if uart in dma mode for es2.0
From OMAP4430 ES2.0 onwards if uart is configured in dma mode we need to set
uart tx threshold value using the new register UART_TX_DMA_THRESHOLD, this
register can used if UART_MDR3 bit(2) is set. We have to ensure
tx_threshold + tx_trigger <= 63 from es2.0 onwards. By default we are using
tx_trigger of 1 so we can set threshold to 62 to satisfy above criteria.
Without the threshold setting we hit dma_sync lost errors on tx channel
leading to data loss on rx side
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Sebastien Jan <s-jan@ti.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/tty/serial/omap-serial.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index 04a9edddf58b..1815e2569b20 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -829,6 +829,10 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, if (up->use_dma) { serial_out(up, UART_TI752_TLR, 0); up->scr |= UART_FCR_TRIGGER_4; + if (up->errata & OMAP4_UART_ERRATA_i659_TX_THR) { + serial_out(up, UART_MDR3, SET_DMA_TX_THRESHOLD); + serial_out(up, UART_TX_DMA_THRESHOLD, TX_FIFO_THR_LVL); + } } else { /* Set receive FIFO threshold to 1 byte */ up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; @@ -1573,6 +1577,17 @@ static void serial_omap_restore_context(struct uart_omap_port *up) else serial_out(up, UART_OMAP_MDR1, up->mdr1); serial_out(up, UART_OMAP_WER, up->wer); + + if (up->use_dma) { + if (up->errata & OMAP4_UART_ERRATA_i659_TX_THR) { + serial_out(up, UART_MDR3, SET_DMA_TX_THRESHOLD); + serial_out(up, UART_TX_DMA_THRESHOLD, TX_FIFO_THR_LVL); + } + + serial_out(up, UART_TI752_TLR, 0); + serial_out(up, UART_OMAP_SCR, + (UART_FCR_TRIGGER_4 | OMAP_UART_SCR_RX_TRIG_GRANU1_MASK)); + } } static int serial_omap_runtime_suspend(struct device *dev) |