diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2008-04-28 17:14:26 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2008-04-28 17:14:26 +0100 |
| commit | 39b8d5254246ac56342b72f812255c8f7a74dca9 (patch) | |
| tree | a9ec6bfb5d09a8367c34cc2067328d1b49bb46c1 /include/asm-mips/mips-boards/malta.h | |
| parent | 308402445e005a039a72b315cd9b5ceeaea0063c (diff) | |
[MIPS] Add support for MIPS CMP platform.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/mips-boards/malta.h')
| -rw-r--r-- | include/asm-mips/mips-boards/malta.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/include/asm-mips/mips-boards/malta.h b/include/asm-mips/mips-boards/malta.h index 93bf4e51b8a4..c1891578fa65 100644 --- a/include/asm-mips/mips-boards/malta.h +++ b/include/asm-mips/mips-boards/malta.h @@ -52,6 +52,29 @@ static inline unsigned long get_msc_port_base(unsigned long reg) } /* + * GCMP Specific definitions + */ +#define GCMP_BASE_ADDR 0x1fbf8000 +#define GCMP_ADDRSPACE_SZ (256 * 1024) + +/* + * GIC Specific definitions + */ +#define GIC_BASE_ADDR 0x1bdc0000 +#define GIC_ADDRSPACE_SZ (128 * 1024) + +/* + * MSC01 BIU Specific definitions + * FIXME : These should be elsewhere ? + */ +#define MSC01_BIU_REG_BASE 0x1bc80000 +#define MSC01_BIU_ADDRSPACE_SZ (256 * 1024) +#define MSC01_SC_CFG_OFS 0x0110 +#define MSC01_SC_CFG_GICPRES_MSK 0x00000004 +#define MSC01_SC_CFG_GICPRES_SHF 2 +#define MSC01_SC_CFG_GICENA_SHF 3 + +/* * Malta RTC-device indirect register access. */ #define MALTA_RTC_ADR_REG 0x70 |