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authorSean Wang <sean.wang@mediatek.com>2017-05-05 23:26:10 +0800
committerStephen Boyd <sboyd@codeaurora.org>2017-06-19 19:02:44 -0700
commit43ed50ee5a181fcfbdeb7566f5e8122bad182889 (patch)
tree6af469e8a6dd0a6c4b46611cca7853f28377a4f7 /include/dt-bindings
parent1e17de9049da5ef482ec8f6a875a83bec96bed3e (diff)
clk: mediatek: export cpu multiplexer clock for MT2701/MT7623 SoCs
The patch enables CPU multiplexer clock on MT2701/MT7623 SoC which fixes up cpufreq driver fails at acquiring intermediate clock source when driver probe is called. Signed-off-by: Pi-Cheng Chen <pi-cheng.chen@linaro.org> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/mt2701-clk.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/mt2701-clk.h b/include/dt-bindings/clock/mt2701-clk.h
index 2062c67e2e51..551f7600ab58 100644
--- a/include/dt-bindings/clock/mt2701-clk.h
+++ b/include/dt-bindings/clock/mt2701-clk.h
@@ -221,7 +221,8 @@
#define CLK_INFRA_PMICWRAP 17
#define CLK_INFRA_DDCCI 18
#define CLK_INFRA_CLK_13M 19
-#define CLK_INFRA_NR 20
+#define CLK_INFRA_CPUSEL 20
+#define CLK_INFRA_NR 21
/* PERICFG */