diff options
author | Stephen Boyd <sboyd@kernel.org> | 2018-03-14 15:40:30 -0700 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2018-03-14 15:40:30 -0700 |
commit | 000996ab55238bea6be7c09340a184a137304365 (patch) | |
tree | 6015bdc42c9af9e422de4173d95d510ac6a71ef5 /include/dt-bindings | |
parent | 1cbe3106e80c1b595c2db1181f8c24cb994b6957 (diff) | |
parent | ed0df3ce9e7591b91927879f5808d055d41dfcc8 (diff) |
Merge branch 'clk-rockchip' into clk-next
* clk-rockchip:
clk: rockchip: Add 1.6GHz PLL rate for rk3399
clk: rockchip: Restore the clock phase after the rate was changed
clk: rockchip: Prevent calculating mmc phase if clock rate is zero
clk: rockchip: Free the memory on the error path
clk: rockchip: document hdmi_phy external input for rk3328
clk: rockchip: add flags for rk3328 dclk_lcdc
clk: rockchip: remove ignore_unused flag from rk3328 vio_h2p clocks
clk: rockchip: protect all remaining rk3328 interconnect clocks
clk: rockchip: export sclk_hdmi_sfc on rk3328
clk: rockchip: remove HCLK_VIO from rk3328 dt header
clk: rockchip: fix hclk_vio_niu on rk3328
Diffstat (limited to 'include/dt-bindings')
-rw-r--r-- | include/dt-bindings/clock/rk3328-cru.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/rk3328-cru.h b/include/dt-bindings/clock/rk3328-cru.h index d2b26a4b43eb..a82a0109faff 100644 --- a/include/dt-bindings/clock/rk3328-cru.h +++ b/include/dt-bindings/clock/rk3328-cru.h @@ -193,7 +193,6 @@ #define HCLK_VPU_PRE 324 #define HCLK_VIO_PRE 325 #define HCLK_VPU 326 -#define HCLK_VIO 327 #define HCLK_BUS_PRE 328 #define HCLK_PERI_PRE 329 #define HCLK_H264 330 |