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authorArnd Bergmann <arnd@arndb.de>2013-06-20 22:27:52 +0200
committerArnd Bergmann <arnd@arndb.de>2013-06-20 22:27:52 +0200
commit0c6abd1f25caef85268eb04d09c988615d68d565 (patch)
tree6ce9b128e9f66636c8a2cbf949716211278e5a50 /include/dt-bindings
parentefe20b421f48c59ff0cda24ab5ef920093afe645 (diff)
parent79d743c177f99d6854e152d9e7fac5bbbeb7c25e (diff)
Merge tag 'common-clk-audio' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers
From Kukjin Kim: based on exynos-dt-2 and s3c24xx-dt-2 - use #include for all Samsung DT - add clk for exynos audio subsystem (audss) and i2s - support audss and i2s for exynos5250 * tag 'common-clk-audio' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: clk: exynos5250: Add enum entries for divider clock of i2s1 and i2s2 ARM: dts: Update Samsung I2S documentation ARM: dts: add clock provider information for i2s controllers in Exynos5250 ARM: dts: add Exynos audio subsystem clock controller node clk: samsung: register audio subsystem clocks using common clock framework ARM: dts: use #include for all device trees for Samsung Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clk/exynos-audss-clk.h25
1 files changed, 25 insertions, 0 deletions
diff --git a/include/dt-bindings/clk/exynos-audss-clk.h b/include/dt-bindings/clk/exynos-audss-clk.h
new file mode 100644
index 000000000000..8279f427c60f
--- /dev/null
+++ b/include/dt-bindings/clk/exynos-audss-clk.h
@@ -0,0 +1,25 @@
+/*
+ * This header provides constants for Samsung audio subsystem
+ * clock controller.
+ *
+ * The constants defined in this header are being used in dts
+ * and exynos audss driver.
+ */
+
+#ifndef _DT_BINDINGS_CLK_EXYNOS_AUDSS_H
+#define _DT_BINDINGS_CLK_EXYNOS_AUDSS_H
+
+#define EXYNOS_MOUT_AUDSS 0
+#define EXYNOS_MOUT_I2S 1
+#define EXYNOS_DOUT_SRP 2
+#define EXYNOS_DOUT_AUD_BUS 3
+#define EXYNOS_DOUT_I2S 4
+#define EXYNOS_SRP_CLK 5
+#define EXYNOS_I2S_BUS 6
+#define EXYNOS_SCLK_I2S 7
+#define EXYNOS_PCM_BUS 8
+#define EXYNOS_SCLK_PCM 9
+
+#define EXYNOS_AUDSS_MAX_CLKS 10
+
+#endif