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authorAapo Vienamo <avienamo@nvidia.com>2018-08-10 21:08:07 +0300
committerThierry Reding <treding@nvidia.com>2018-08-27 12:25:17 +0200
commit13136a47a061c01c91df78b37f7708dd5ce7035f (patch)
tree231b0f8fefa0be14b109b2502011adea6c77bd87 /include/soc/tegra
parent1dc6bd5e39a29453bdcc17348dd2a89f1aa4004e (diff)
soc/tegra: pmc: Fix pad voltage configuration for Tegra186
Implement support for the PMC_IMPL_E_33V_PWR register which replaces PMC_PWR_DET register interface of the SoC generations preceding Tegra186. Also add the voltage bit offsets to the tegra186_io_pads[] table and the AO_HV pad. Signed-off-by: Aapo Vienamo <avienamo@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/soc/tegra')
-rw-r--r--include/soc/tegra/pmc.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/soc/tegra/pmc.h b/include/soc/tegra/pmc.h
index c32bf91c23e6..445aa66514e9 100644
--- a/include/soc/tegra/pmc.h
+++ b/include/soc/tegra/pmc.h
@@ -134,6 +134,7 @@ enum tegra_io_pad {
TEGRA_IO_PAD_USB2,
TEGRA_IO_PAD_USB3,
TEGRA_IO_PAD_USB_BIAS,
+ TEGRA_IO_PAD_AO_HV,
};
/* deprecated, use TEGRA_IO_PAD_{HDMI,LVDS} instead */