diff options
| author | Mark Brown <broonie@kernel.org> | 2020-08-27 14:43:26 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2020-08-27 14:43:26 +0100 |
| commit | 4b15c49719452311cfc52921948324b5453508bf (patch) | |
| tree | c45c6fe841a682ac7a80671b36bf19bf3f22d29a /include/sound | |
| parent | c1c277b2c425f69b9b4f4258d9db18562d9be041 (diff) | |
| parent | 01d42d5a0a70bdcece7228232590f177e7114368 (diff) | |
Merge series "SOF fixes and updates for FW boot" from Ranjani Sridharan <ranjani.sridharan@linux.intel.com>:
This series includes fixes and updates for the FW boot sequence for
Intel platforms.
Ranjani Sridharan (7):
ALSA: hda: fix VS_LTRC register name
ASoC: SOF: Intel: hda: Add helper function to program ICCMAX stream
ASoC: SOF: Intel: hda: modify the signature of get_stream_with_tag()
ASoC: SOF: Intel: hda: define macro for code loader stream format
ASoC: SOF: Intel: hda: Define FW boot sequence with ICCMAX
ASoC: SOF: Intel: hda: Add sof_tgl_ops for TGL platforms
ASoC: SOF: Intel: hda: Simplify error handling during FW boot
Yong Zhi (1):
ASoC: SOF: Intel: hda: Remove unused parameters in cl_dsp_init()
include/sound/hda_register.h | 2 +-
sound/soc/sof/intel/Makefile | 2 +-
sound/soc/sof/intel/cnl.c | 23 +----
sound/soc/sof/intel/hda-ipc.h | 4 +
sound/soc/sof/intel/hda-loader.c | 145 ++++++++++++++++++-------------
sound/soc/sof/intel/hda-stream.c | 69 +++++++++++++++
sound/soc/sof/intel/hda.h | 6 ++
sound/soc/sof/intel/tgl.c | 137 +++++++++++++++++++++++++++++
sound/soc/sof/sof-pci-dev.c | 2 +-
9 files changed, 306 insertions(+), 84 deletions(-)
create mode 100644 sound/soc/sof/intel/tgl.c
--
2.25.1
Diffstat (limited to 'include/sound')
| -rw-r--r-- | include/sound/hda_register.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/sound/hda_register.h b/include/sound/hda_register.h index 057d2a2d0bd0..4f987b1f32f7 100644 --- a/include/sound/hda_register.h +++ b/include/sound/hda_register.h @@ -119,7 +119,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; #define AZX_REG_VS_EM3U 0x103C #define AZX_REG_VS_EM4L 0x1040 #define AZX_REG_VS_EM4U 0x1044 -#define AZX_REG_VS_LTRC 0x1048 +#define AZX_REG_VS_LTRP 0x1048 #define AZX_REG_VS_D0I3C 0x104A #define AZX_REG_VS_PCE 0x104B #define AZX_REG_VS_L2MAGC 0x1050 |