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authorAsutosh Das <quic_asutoshd@quicinc.com>2023-01-13 12:48:42 -0800
committerMartin K. Petersen <martin.petersen@oracle.com>2023-01-13 21:03:36 -0500
commitc263b4ef737e622e2a908c58ca4bb68a89376387 (patch)
treefba8594dd0551d190ebbd86e9e5bd9f068c5fa65 /include/ufs
parent57b1c0ef89ac9d9e7475df7843aeb7672ebcd197 (diff)
scsi: ufs: core: mcq: Configure resource regions
Define the MCQ resources and add support to ioremap the resource regions. Co-developed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'include/ufs')
-rw-r--r--include/ufs/ufshcd.h30
1 files changed, 30 insertions, 0 deletions
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index 91ca724c0294..81c7494cecad 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -300,6 +300,7 @@ struct ufs_pwr_mode_info {
* @program_key: program or evict an inline encryption key
* @event_notify: called to notify important events
* @reinit_notify: called to notify reinit of UFSHCD during max gear switch
+ * @mcq_config_resource: called to configure MCQ platform resources
*/
struct ufs_hba_variant_ops {
const char *name;
@@ -339,6 +340,7 @@ struct ufs_hba_variant_ops {
void (*event_notify)(struct ufs_hba *hba,
enum ufs_event_type evt, void *data);
void (*reinit_notify)(struct ufs_hba *);
+ int (*mcq_config_resource)(struct ufs_hba *hba);
};
/* clock gating state */
@@ -734,6 +736,30 @@ struct ufs_hba_monitor {
};
/**
+ * struct ufshcd_res_info_t - MCQ related resource regions
+ *
+ * @name: resource name
+ * @resource: pointer to resource region
+ * @base: register base address
+ */
+struct ufshcd_res_info {
+ const char *name;
+ struct resource *resource;
+ void __iomem *base;
+};
+
+enum ufshcd_res {
+ RES_UFS,
+ RES_MCQ,
+ RES_MCQ_SQD,
+ RES_MCQ_SQIS,
+ RES_MCQ_CQD,
+ RES_MCQ_CQIS,
+ RES_MCQ_VS,
+ RES_MAX,
+};
+
+/**
* struct ufs_hba - per adapter private structure
* @mmio_base: UFSHCI base register address
* @ucdl_base_addr: UFS Command Descriptor base address
@@ -846,6 +872,8 @@ struct ufs_hba_monitor {
* ufshcd_resume_complete()
* @ext_iid_sup: is EXT_IID is supported by UFSHC
* @mcq_sup: is mcq supported by UFSHC
+ * @res: array of resource info of MCQ registers
+ * @mcq_base: Multi circular queue registers base address
*/
struct ufs_hba {
void __iomem *mmio_base;
@@ -1002,6 +1030,8 @@ struct ufs_hba {
bool ext_iid_sup;
bool scsi_host_added;
bool mcq_sup;
+ struct ufshcd_res_info res[RES_MAX];
+ void __iomem *mcq_base;
};
#ifdef CONFIG_SCSI_UFS_VARIABLE_SG_ENTRY_SIZE