diff options
| author | Dan Williams <dan.j.williams@intel.com> | 2011-02-14 03:36:51 -0800 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2011-02-14 03:36:51 -0800 |
| commit | 0670e7157f75ec6d2231fbc6f67b075d6b6d486f (patch) | |
| tree | 64591858de42da54afc979338ee083d1e6d672a0 /include | |
| parent | 80cc07af0f6692a7d8fdc5087594d1988a701266 (diff) | |
| parent | 4aa5f366431fef0afca0df348ca9782c63ac9911 (diff) | |
Merge branch 'dw_dmac' into dmaengine
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/dw_dmac.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/dw_dmac.h b/include/linux/dw_dmac.h index c8aad713a046..deec66b37180 100644 --- a/include/linux/dw_dmac.h +++ b/include/linux/dw_dmac.h @@ -16,9 +16,12 @@ /** * struct dw_dma_platform_data - Controller configuration parameters * @nr_channels: Number of channels supported by hardware (max 8) + * @is_private: The device channels should be marked as private and not for + * by the general purpose DMA channel allocator. */ struct dw_dma_platform_data { unsigned int nr_channels; + bool is_private; }; /** @@ -52,6 +55,8 @@ struct dw_dma_slave { enum dw_dma_slave_width reg_width; u32 cfg_hi; u32 cfg_lo; + int src_master; + int dst_master; }; /* Platform-configurable bits in CFG_HI */ |