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author | Stephen Rothwell <sfr@canb.auug.org.au> | 2011-02-28 13:24:36 +1100 |
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committer | Stephen Rothwell <sfr@canb.auug.org.au> | 2011-02-28 13:24:36 +1100 |
commit | cd4100e7c3c2a8f7cfc2070dbf1e023e4836ec62 (patch) | |
tree | bcbec8c0cd89a7c2956763b7d25fd7d5fe391d7d /include | |
parent | 24577dad83b424861dc6aabad66be58914431cbe (diff) | |
parent | 0670e7157f75ec6d2231fbc6f67b075d6b6d486f (diff) |
Merge remote-tracking branch 'async_tx/next'
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/dw_dmac.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/dw_dmac.h b/include/linux/dw_dmac.h index c8aad713a046..deec66b37180 100644 --- a/include/linux/dw_dmac.h +++ b/include/linux/dw_dmac.h @@ -16,9 +16,12 @@ /** * struct dw_dma_platform_data - Controller configuration parameters * @nr_channels: Number of channels supported by hardware (max 8) + * @is_private: The device channels should be marked as private and not for + * by the general purpose DMA channel allocator. */ struct dw_dma_platform_data { unsigned int nr_channels; + bool is_private; }; /** @@ -52,6 +55,8 @@ struct dw_dma_slave { enum dw_dma_slave_width reg_width; u32 cfg_hi; u32 cfg_lo; + int src_master; + int dst_master; }; /* Platform-configurable bits in CFG_HI */ |