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| author | Stephen Rothwell <sfr@canb.auug.org.au> | 2008-06-13 09:48:29 +1000 |
|---|---|---|
| committer | Stephen Rothwell <sfr@canb.auug.org.au> | 2008-06-13 09:48:29 +1000 |
| commit | 0c790dfce82fdae52b6077df23ee72360adb5d60 (patch) | |
| tree | 90422fde12828c0a27d98a524c3742e043c09516 /include | |
| parent | 5bcef204b19ed2659856acbc1a4dfe4c8da3b679 (diff) | |
| parent | 3692fd0aaef489b063518b5999c702bada5b6e22 (diff) | |
Merge commit 'arm-current/master'
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-arm/arch-pxa/regs-lcd.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/asm-arm/arch-pxa/regs-lcd.h b/include/asm-arm/arch-pxa/regs-lcd.h index f762493f5141..3ba464c913a5 100644 --- a/include/asm-arm/arch-pxa/regs-lcd.h +++ b/include/asm-arm/arch-pxa/regs-lcd.h @@ -1,5 +1,8 @@ #ifndef __ASM_ARCH_REGS_LCD_H #define __ASM_ARCH_REGS_LCD_H + +#include <asm/arch/bitfield.h> + /* * LCD Controller Registers and Bits Definitions */ @@ -69,7 +72,7 @@ #define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ #define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ #define LCCR0_PDD_S 12 -#define LCCR0_BM (1 << 20) /* Branch mask */ +#define LCCR0_BM (1 << 20) /* Branch mask */ #define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ #define LCCR0_LCDT (1 << 22) /* LCD panel type */ #define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */ |