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authorCon Kolivas <kernel@kolivas.org>2016-10-22 09:43:58 +1100
committerCon Kolivas <kernel@kolivas.org>2016-10-22 09:55:06 +1100
commit5674b1518fcfce5317f28319c0f919ab18681751 (patch)
tree6ea481dfa911a4a96f9238515e6a331a5d9fb98e /kernel
parent7f9672079f5db72ba078f0e7cd1772b795ac0312 (diff)
Make the cpu_idle_map cacheline aligned.
Diffstat (limited to 'kernel')
-rw-r--r--kernel/sched/MuQSS.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/kernel/sched/MuQSS.c b/kernel/sched/MuQSS.c
index a921794a6088..b71b2378c2a8 100644
--- a/kernel/sched/MuQSS.c
+++ b/kernel/sched/MuQSS.c
@@ -162,8 +162,6 @@ int sched_iso_cpu __read_mostly = 70;
*/
static int prio_ratios[NICE_WIDTH] __read_mostly;
-static cpumask_t cpu_idle_map;
-
/*
* The quota handed out to tasks of all priority levels when refilling their
* time_slice.
@@ -174,6 +172,8 @@ static inline int timeslice(void)
}
#ifdef CONFIG_SMP
+static cpumask_t cpu_idle_map ____cacheline_aligned_in_smp;
+
/*
* We add the notion of a root-domain which will be used to define per-domain
* variables. Each exclusive cpuset essentially defines an island domain by