diff options
| author | Michał Mirosław <mirq-linux@rere.qmqm.pl> | 2020-01-15 10:54:35 +0100 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2020-01-20 10:36:27 +0100 |
| commit | 2a187d03352086e300daa2044051db00044cd171 (patch) | |
| tree | 3d5f4c540dc15f5db24d3b2473c2b9a2f93cd30a /lib | |
| parent | f571389c0b015e76f91c697c4c1700aba860d34f (diff) | |
mmc: sdhci: fix minimum clock rate for v3 controller
For SDHCIv3+ with programmable clock mode, minimal clock frequency is
still base clock / max(divider). Minimal programmable clock frequency is
always greater than minimal divided clock frequency. Without this patch,
SDHCI uses out-of-spec initial frequency when multiplier is big enough:
mmc1: mmc_rescan_try_freq: trying to init card at 468750 Hz
[for 480 MHz source clock divided by 1024]
The code in sdhci_calc_clk() already chooses a correct SDCLK clock mode.
Fixes: c3ed3877625f ("mmc: sdhci: add support for programmable clock mode")
Cc: <stable@vger.kernel.org> # 4f6aa3264af4: mmc: tegra: Only advertise UHS modes if IO regulator is present
Cc: <stable@vger.kernel.org>
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/ffb489519a446caffe7a0a05c4b9372bd52397bb.1579082031.git.mirq-linux@rere.qmqm.pl
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'lib')
0 files changed, 0 insertions, 0 deletions