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authorPaul Cercueil <paul@crapouillou.net>2020-03-06 23:29:27 +0100
committerMark Brown <broonie@kernel.org>2020-03-09 14:03:35 +0000
commit9401d5aa328e64617d87abd59af1c91cace4c3e4 (patch)
tree3bb7e5d95a8920131c49f2412b9bf6c027c18376 /sound/soc/jz4740
parentd902e7856d2a3b5da7acab90e5faec22e395e57a (diff)
ASoC: jz4740-i2s: Fix divider written at incorrect offset in register
The 4-bit divider value was written at offset 8, while the jz4740 programming manual locates it at offset 0. Fixes: 26b0aad80a86 ("ASoC: jz4740: Add dynamic sampling rate support to jz4740-i2s") Signed-off-by: Paul Cercueil <paul@crapouillou.net> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20200306222931.39664-2-paul@crapouillou.net Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/jz4740')
-rw-r--r--sound/soc/jz4740/jz4740-i2s.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c
index 9d5405881209..434737b2b2b2 100644
--- a/sound/soc/jz4740/jz4740-i2s.c
+++ b/sound/soc/jz4740/jz4740-i2s.c
@@ -83,7 +83,7 @@
#define JZ_AIC_I2S_STATUS_BUSY BIT(2)
#define JZ_AIC_CLK_DIV_MASK 0xf
-#define I2SDIV_DV_SHIFT 8
+#define I2SDIV_DV_SHIFT 0
#define I2SDIV_DV_MASK (0xf << I2SDIV_DV_SHIFT)
#define I2SDIV_IDV_SHIFT 8
#define I2SDIV_IDV_MASK (0xf << I2SDIV_IDV_SHIFT)