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authorCezary Rojewski <cezary.rojewski@intel.com>2020-10-12 12:32:21 +0200
committerMark Brown <broonie@kernel.org>2020-10-14 20:29:56 +0100
commit3d53c6df4299134525ad9e197f480e89bc8b06af (patch)
tree77b3ad40f63771ba188ac6ceb71f1d743e52d039 /sound
parent1d159edf19542793851a04202e5b0dd548a9415c (diff)
ASoC: Intel: catpt: Relax clock selection conditions
Stress tests show that DSP may occasionally be late with signaling WAIT state when all pins are made use of simultaneously plus start/stop (pause) gets involved. While this isn't tied to standard audio scenarios where only System Pin (playback and capture) is involved, ensure user is not hindered when playing with more advanced scenarios. >From DSP perspective, clock acts as a resource: low clock equals less resources, high clock more resources. Relax clock selection procedure so only low -> high switch is allowed when awaiting WAIT signal times out. Once active stream count decreases, DSP will have more time internally to adjust thus low clock selection becomes possible again. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20201012103221.30759-2-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/intel/catpt/dsp.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/sound/soc/intel/catpt/dsp.c b/sound/soc/intel/catpt/dsp.c
index 7d2968571951..9e807b941732 100644
--- a/sound/soc/intel/catpt/dsp.c
+++ b/sound/soc/intel/catpt/dsp.c
@@ -267,9 +267,12 @@ static int catpt_dsp_select_lpclock(struct catpt_dev *cdev, bool lp, bool waiti)
reg, (reg & CATPT_ISD_DCPWM),
500, 10000);
if (ret) {
- dev_err(cdev->dev, "await WAITI timeout\n");
- mutex_unlock(&cdev->clk_mutex);
- return ret;
+ dev_warn(cdev->dev, "await WAITI timeout\n");
+ /* no signal - only high clock selection allowed */
+ if (lp) {
+ mutex_unlock(&cdev->clk_mutex);
+ return 0;
+ }
}
}