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authorZeng Heng <zengheng4@huawei.com>2023-08-15 12:09:12 +0800
committerWill Deacon <will@kernel.org>2023-08-16 15:24:01 +0100
commit7eb4ee66739ea187d3855f6dbf2ab48a512b4ae0 (patch)
treecf1f8b738f9802f10017fa140e29391b43675d96 /tools/testing/selftests/arm64
parente08302ee46c9a5101e3902350ba5e27fcb18894b (diff)
kselftest/arm64: add SHA1 and related features to hwcap test
Add the SHA1 and related features check in the set of hwcap tests. Signed-off-by: Zeng Heng <zengheng4@huawei.com> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230815040915.3966955-2-zengheng4@huawei.com Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'tools/testing/selftests/arm64')
-rw-r--r--tools/testing/selftests/arm64/abi/hwcap.c39
1 files changed, 39 insertions, 0 deletions
diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c
index 112b6a219382..83d3b6dcc0d8 100644
--- a/tools/testing/selftests/arm64/abi/hwcap.c
+++ b/tools/testing/selftests/arm64/abi/hwcap.c
@@ -87,6 +87,24 @@ static void rng_sigill(void)
asm volatile("mrs x0, S3_3_C2_C4_0" : : : "x0");
}
+static void sha1_sigill(void)
+{
+ /* SHA1H S0, S0 */
+ asm volatile(".inst 0x5e280800" : : : );
+}
+
+static void sha2_sigill(void)
+{
+ /* SHA256H Q0, Q0, V0.4S */
+ asm volatile(".inst 0x5e004000" : : : );
+}
+
+static void sha512_sigill(void)
+{
+ /* SHA512H Q0, Q0, V0.2D */
+ asm volatile(".inst 0xce608000" : : : );
+}
+
static void sme_sigill(void)
{
/* RDSVL x0, #0 */
@@ -328,6 +346,27 @@ static const struct hwcap_data {
.cpuinfo = "rprfm",
},
{
+ .name = "SHA1",
+ .at_hwcap = AT_HWCAP,
+ .hwcap_bit = HWCAP_SHA1,
+ .cpuinfo = "sha1",
+ .sigill_fn = sha1_sigill,
+ },
+ {
+ .name = "SHA2",
+ .at_hwcap = AT_HWCAP,
+ .hwcap_bit = HWCAP_SHA2,
+ .cpuinfo = "sha2",
+ .sigill_fn = sha2_sigill,
+ },
+ {
+ .name = "SHA512",
+ .at_hwcap = AT_HWCAP,
+ .hwcap_bit = HWCAP_SHA512,
+ .cpuinfo = "sha512",
+ .sigill_fn = sha512_sigill,
+ },
+ {
.name = "SME",
.at_hwcap = AT_HWCAP2,
.hwcap_bit = HWCAP2_SME,