summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--TI_OMAP4_Kernel_Release_Notes_L24.x.txt507
-rw-r--r--arch/arm/configs/omap4_pm_defconfig1
-rw-r--r--arch/arm/configs/omap_4430sdp_defconfig7
-rw-r--r--arch/arm/mach-omap2/Kconfig13
-rw-r--r--[-rwxr-xr-x]arch/arm/mach-omap2/board-4430sdp-wifi.c0
-rwxr-xr-xarch/arm/mach-omap2/board-4430sdp.c4
-rw-r--r--arch/arm/mach-omap2/mcbsp.c16
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c4
-rw-r--r--arch/arm/mach-omap2/serial.c8
-rw-r--r--arch/arm/mach-omap2/timer-gp.c39
-rwxr-xr-xarch/arm/plat-omap/hdmi_lib.c4
-rw-r--r--arch/arm/plat-omap/include/plat/irqs.h2
-rw-r--r--[-rwxr-xr-x]arch/arm/plat-omap/include/plat/wifi_tiwlan.h0
-rw-r--r--arch/arm/plat-omap/mcbsp.c36
-rw-r--r--arch/arm/plat-omap/omap_device.c4
-rw-r--r--drivers/dsp/syslink/multicore_ipc/listmp_sharedmemory.c5
-rw-r--r--drivers/dsp/syslink/procmgr/proc4430/ducatienabler.c4
-rw-r--r--drivers/media/video/tiler/tiler_pack.c2
-rw-r--r--drivers/serial/omap-serial.c19
-rw-r--r--drivers/video/omap2/dss/dispc.c4
-rw-r--r--drivers/video/omap2/dss/dsi.c137
-rw-r--r--drivers/video/omap2/dss/dss.h3
22 files changed, 758 insertions, 61 deletions
diff --git a/TI_OMAP4_Kernel_Release_Notes_L24.x.txt b/TI_OMAP4_Kernel_Release_Notes_L24.x.txt
new file mode 100644
index 000000000000..b3b506f7bd41
--- /dev/null
+++ b/TI_OMAP4_Kernel_Release_Notes_L24.x.txt
@@ -0,0 +1,507 @@
+13 May 2010
+
+
+1. Introduction
+----------------
+This document accompanies OMAP(TM) Software Release L24.6 for Linux 2.6.33.2
+on OMAP4430 SDP. The document specifies:
+ - Instructions for unpacking the release
+ - New features and features the release supports
+ - Planned future features
+ - Postponed features
+
+
+2. Release Summary
+------------------
+This is a release of the Linux Baseport for OMAP4430. It supports the
+OMAP4 Wakeup SDP board. The kernel is based on Linux-omap version 2.6.33.2
+from open source. U-boot is based on open-source version 1.1.4.
+
+The u-boot source can be obtained via GIT from:
+ http://dev.omapzoom.org/?p=bootloader/u-boot.git;a=shortlog;h=refs/heads/omap4_dev
+
+The x-loader source can be obtained via GIT from:
+ http://dev.omapzoom.org/?p=bootloader/x-loader.git;a=shortlog;h=refs/heads/omap4_dev
+
+The kernel source can be obtained via GIT from:
+ http://dev.omapzoom.org/?p=integration/kernel-omap4.git;a=shortlog;h=refs/heads/L24.6
+
+Components that are supported in the release:
+ X-loader, U-Boot, OS Kernel (SMP), Phoenix power IC, UART, GP Timer, GPIO, Watchdog,
+ Neon, I2C, MMC/SD/eMMC (with ADMA support), Ethernet, RTC,
+ SDMA (including descriptor loading), Keypad, Touch screen, McSPI, McBSP, Mentor USB,
+ Phoenix General Purpose ADC, Battery Charging, Power Management Frameworks,
+ Sensors (Proximity and Accelerometer)
+ Audio (Phoenix Audio IC, ABE, AESS),
+ Display driver (TAAL based), Basic display (DSS2 migration, FB dev), Tiler memory manager.
+ WLAN support
+
+
+3. Instructions
+----------------
+
+3.1 Board setup
+
+Please refer to the OMAP4430 SDP guide for instructions on setting up the OMAP4
+board.
+
+3.2 Compiling Images
+
+3.2.1 Compiling U-boot
+
+Set the environment variable PATH such that cross compile binaries point to the
+needed tool chain. Refer to section 5 for tool chain information.
+
+To select the default configuration for U-Boot type:
+ # make CROSS_COMPILE=arm-none-linux-gnueabi- omap4430sdp_config
+
+To build the U-Boot image type:
+ # make CROSS_COMPILE=arm-none-linux-gnueabi-
+
+Add mkimage path to the PATH variable (for uImage building).
+
+3.2.2 Compiling X-loader (for booting from external/removable MMC)
+
+Set the environment variable PATH such that cross compile binaries point to the
+needed tool chain. Refer to section 5 for tool chain information.
+
+U-boot needs to be placed in a directory parallel to x-loader and compiled first.
+E.g.:
+ [DIR] omap4
+ +-- u-boot
+ +-- x-loader
+
+To select the default configuration for X-loader type:
+ # make CROSS_COMPILE=arm-none-linux-gnueabi- omap4430sdp_config
+
+To build the X-loader image type:
+ # make CROSS_COMPILE=arm-none-linux-gnueabi-
+ # make ift CROSS_COMPILE=arm-none-linux-gnueabi-
+
+The above step will create a MLO image, which can be copied into the
+MMC card for booting via MMC.
+
+3.2.3 Compiling X-loader (for booting from eMMC)
+
+Follow same steps as above to create an MLO image. A configuration header needs
+to be added at the begining of this MLO to create an image 'x-load.ch.bin' that
+can be written to the eMMC for eMMC-booting. Please contact your TI
+representative for obtaining the configuration header.
+
+3.2.4 Compiling the Kernel
+
+Set the environment variable PATH such that cross-compile binaries point to the
+needed tool chain. Refer to section 5 for tool chain information.
+
+The default configuration file for OMAP 4430 is present at
+arch/arm/configs/omap_4430sdp_defconfig.
+
+Prerequisite: See section 3.2.1, and ensure this:
+Add mkimage path to the PATH variable (for uImage building).
+
+To work with the default configuration file, run following commands:
+ # make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabi-
+ omap_4430sdp_defconfig
+
+Build kernel with:
+ # make ARCH=arm CROSS_COMPILE=arm-none-linux-gnueabi- uImage
+
+NOTE: The above steps will create arch/arm/boot/uImage in the kernel directory
+ which is the binary used for booting.
+
+3.3 Flashing and Booting
+
+3.3.1 Booting from removable MMC
+
+Use the MLO (ref: section 3.2.2) and u-boot.bin (ref: section 3.2.1) binaries
+and follow the instructions at http://elinux.org/BeagleBoard#MMC.2FSD_boot
+to boot the board from removable MMC.
+
+Set the board switch settings as follows to boot the board from removable MMC:
+ S9 - 1-off, 2-on, 3-on, 4-on
+ S8 - 1-off, 2-on, 3-off, 4-on, 5-on, 6-on, 7-on, 8-on
+
+3.3.2 Flashing and booting from eMMC
+
+Follow the instructions below to save x-loader and u-boot binaries to eMMC and
+subsequently boot from eMMC.
+
+Get the x-loader and u-boot binaries (that you want to flash to eMMC) into RAM
+using one of the following options.
+
+Option 1:
+Use a debugger or OMAPFlasher tool to download x-loader (with configuration
+header, e.g. x-load.ch.bin) as well as u-boot.bin into
+SDRAM and run u-boot from SDRAM.
+
+Option 2:
+Boot via a removable MMC card following the instructions in section 3.3.1, but
+additionally keep the x-load.ch.bin that you want to flash to eMMC in the same
+removable MMC card. After booting from removable MMC, copy the x-load.ch.bin
+and u-boot.bin from the MMC to RAM using the following commands:
+OMAP44XX SDP # mmcinit 0
+OMAP44XX SDP # fatload mmc 0 [Ram Address X] x-load.ch.bin
+OMAP44XX SDP # fatload mmc 0 [Ram Address Y] u-boot.bin
+
+Once the x-loader and u-boot binaries are in RAM, use the following commands
+to copy them to eMMC.
+
+1) Erase all EMMC contents
+OMAP44XX SDP # mmcinit 1
+OMAP44XX SDP # mmc 1 erase 0x0 0x800000
+2) Flash x-loader
+OMAP44XX SDP # mmc 1 erase 0x100 [size of x-loader in hex]
+OMAP44XX SDP # mmc 1 write [Ram Address X] 0x100 [size of x-loader in hex]
+Note: Ram address X is address where x-loader is downloaded in RAM using either the
+debugger, OMAPFlasher or removable MMC.
+3) Flash u-boot.bin
+OMAP44XX SDP # mmc 1 erase 0x400 [size]
+OMAP44XX SDP # mmc 1 write [Ram Address Y] 0x400 [size]
+Note: Ram address Y is address where u-boot is downloaded in RAM using either the
+debugger, OMAPFlasher or removable MMC.
+
+Set the board switch settings as follows to boot the board from eMMC:
+ S9 - 1-off, 2-on, 3-on, 4-on
+ S8 - 1-on, 2-on, 3-on, 4-on, 5-on, 6-off, 7-on, 8-on
+
+3.3.3 Using Filesystem from eMMC
+
+Use fdisk to create an ext2 partition (/dev/mmcblk0p2) in eMMC leaving 2MB of space
+at the top.
+
+Use the following commands to flash the filesystem to eMMC partition
+1) Bootup with a known good kernel and filesystem from RAM
+2) Use a filesystem which has USB Gadget filestorage module g_filestorage.ko
+3) Connect the usb cable from the board to the PC
+4) Load the USB filestorage gadget module as:
+insmod g_filestorage.ko file=/dev/mmcblk0p2 stall=0 removable=1
+5) When the USB drive enumerates on the Linux PC, mount the drive
+6) Add ext2 filesystem to the mounted drive
+7) sync and then mount the drive.
+8) Add the following in bootargs "root=/dev/mmcblk0p2 rw rootdelay=1" to be able
+to use the eMMC based FS as rootfs.
+
+3.3.4 Bootargs
+
+Since UART3 is used as the console on OMAP4 Wakeup board, you need to set
+'console=ttyO2,115200n8' in the bootargs
+
+While using a filesystem from MMC or eMMC, you may use params such as:
+'root=/dev/mmcblk1p2 rw rootdelay=1'. The rootdelay is required because
+removable cards may take a few seconds to be detected.
+
+Also note that 'root=/dev/mmcblkXp2' where "x" means 1 or 2 depending if you
+use MMC as default this should be 1 or eMMC should be 0.
+
+While using a filesystem via NFS, you may use params such as:
+'root=/dev/nfs rw nfsroot=<serverip>:<mount-partition>,nolock'
+
+Refer to section 3.4.2 for display related bootargs options
+
+For detailed list and explaination of the various boot parameters, please refer
+http://www.kernel.org/pub/linux/kernel/people/gregkh/lkn/lkn_pdf/ch09.pdf
+
+
+3.4 Using FB and V4L2 Display driver
+
+3.4.1 To enable secondary display
+
+Please use following set of commands after kernel bootup for setting
+secondary display ON.
+
+1) Enable secondary display (display1)
+ echo "1" > /sys/devices/platform/omapdss/display1/enabled
+2) Disable overlay1
+ echo "0" > /sys/devices/platform/omapdss/overlay1/enabled
+3) Attach secondary display as a manager for overlay1
+ echo "2lcd" > /sys/devices/platform/omapdss/overlay1/manager
+4) Enable overlay1
+ echo "1" > /sys/devices/platform/omapdss/overlay1/enabled
+
+3.4.2 Display specific bootargs options
+
+3.4.2.1 Using 1 FB and 3 V4L2 devices
+Add the following in bootargs "omapfb.numfb=1"
+
+3.4.2.2 Using 2 FB and 2 V4L2 devices (default option in L24.2 onwards)
+Add the following in bootargs "omapfb.numfb=2"
+
+3.4.2.3 Enabling DSS DEBUG prints
+Add the following in bootargs "omapdss.debug=1"
+
+3.4.3 Pico DLP support
+
+OMAP4 device supports a pico DLP and secondary LCD output on the secondary
+LCD manager (with the name of '2lcd'). The configuration of the display
+happens in a non-conventional way.
+
+3.4.3.1 After bootup:
+
+To configure output to either pico DLP or secondary LCD, set the overlay's
+manager to the secondary LCD manager:
+
+echo "0" > /sys/devices/platform/omapdss/overlay0/enabled
+echo "2lcd" > /sys/devices/platform/omapdss/overlay0/manager
+echo "1" > /sys/devices/platform/omapdss/overlay0/enabled
+
+3.4.3.2 Then enable the correct display to chose pico DLP or secondary LCD (default
+is secondary LCD). Assuming display1 is secondary LCD, and display3 is
+pico DLP:
+
+echo "0" > /sys/devices/platform/omapdss/display1/enabled
+# set the secondary manager to pico DLP
+echo "pico_DLP" > /sys/devices/platform/omapdss/manager2/display -- This will set secondary manager to pico.
+echo "1" > /sys/devices/platform/omapdss/display3/enabled
+
+3.4.3.3 Now to switch back to secondary
+echo "0" > /sys/devices/platform/omapdss/display3/enabled
+echo "2lcd" > /sys/devices/platform/omapdss/manager2/display
+echo "1" > /sys/devices/platform/omapdss/display1/enabled
+
+3.5 Enabling Power Management Features
+
+All PM features are disabled in the default OMAP4 kernel configuration
+(omap_4430sdp_defconfig).
+All clocks are still kept enabled on bootloader.
+
+To test PM features please use omap4_pm_defconfig. Note that PM features
+on OMAP4430 ES1.0 can only be verified on a EMU device. The EMU device needs
+the x-loader signed with the right PPA release.
+
+omap4_pm_defconfig does not enable Tick suppression. To do so enable these
+options manually.
+
+Enable the following options in menuconfig
+ Kernel Features ---> Use local timer interrupts
+ Kernel Features ---> Tickless System
+ Kernel Features ---> High Resolution Timer support
+
+omap4_pm_defconfig has VFP support disabled due to a know issue with enabling
+FPU on ES1. Please do not enable VFP support.
+
+3.5.1 CPU Hotplug
+
+To hotplug out CPU1 use the following command
+
+echo 0 > /sys/devices/system/cpu/cpu1/online
+
+To bring back CPU1 online use the following command
+
+echo 1 > /sys/devices/system/cpu/cpu1/online
+
+Note that CPU0 cannot be offlined due to hardware limitation.
+Currenlty CPU1 transitions to CSWR state when offlined. This can
+only be verified using OBS signals.
+
+3.5.2 CPUIdle
+
+To test cpuidle, it's necessary that CPU1 is hotplugged out.
+Use the below command to hotplug out CPU1
+echo 0 > /sys/devices/system/cpu/cpu1/online
+
+Once CPU1 is hotplugged out, OBS signals can be used to
+verify MPU/CPU0/CPU1 transtitions.
+
+Currently only sleep state of MPU CSWR is supported.
+
+3.5.3 System Suspend
+
+To test system suspend, use the following command
+
+echo mem > /sys/power/state
+
+Use OBS signals to verify MPU/CPU0/CPU1 transitions.
+
+Currently only sleep state of MPU CSWR is supported.
+
+Please use a ramdisk inorder to test system suspend feature
+
+3.6 Using Audio Driver
+
+Include the asound.conf file in /etc directory in your FS. It maps the different
+audio devices
+
+Usage:
+aplay -D mm file.wav
+aplay -D tones file.wav
+aplay -D vx file.wav
+aplay -D hd_audio file.wav
+
+
+
+4. Features
+-----------
+
+4.1 New Features
+
+- Bootloader
+
+ - Ability to save environment parameters is now added to u-boot
+
+ Adding feature for saving environment Vairables which stores them
+ permanently to persistent storage device which is currently eMMC on
+ OMAP4430SDP and doesn't save on removable MMC.
+
+ The environment variables are stored on RAW partition of size 1MB on eMMC
+ starting from sector 0x700 to sector 0x7FF.
+
+ Currently "saveenv" is replaced with "emmcsaveenv" and has been modified so
+ as to make the user aware of the fact that the environment will be written to eMMC.
+ Also If the eMMC is already formatted and if any of the partition falls within sectors allocted
+ for "env" and using the "emmcsaveenv" command will result in over writing the partition.
+
+- Power Management Frameworks
+ - Clock framework
+ - Clockdomain framework
+ - Powerdomain framework
+ - Regulator framework
+ - CPUidle with support upto MPU CSWR
+ - System wide suspend with support upto MPU CSWR
+ - CPU1 hotplug with support upto CPU1 CSWR
+NOTE:
+ - All PM features are disabled in the default OMAP4 kernel configuration.
+ - All clocks are still kept enabled on bootloader.
+ - These features can only be validated on EMU devices with omap4_pm_defconfig
+
+- Sensors
+ - Proximity sensor
+ - Accelerometer sensor
+
+- Audio
+ - Audio Playback to Phoenix Earphone
+ - Audio Playback using Tones port
+ - ALSA controls for ABE mixers
+ - Add McPDM power management support
+
+4.2 Supported Features
+
+- Boot-loader:
+ X-loader with MMC/eMMC/SD support
+ U-boot with USB, MMC/eMMC/SD and Ethernet support
+
+- OS Kernel
+ OS Kernel (SMP)
+ Phoenix power IC,
+ UART,
+ GP Timer,
+ GPIO,
+ Watchdog,
+ NEON,
+ I2C,
+ MMC/SD/eMMC (with ADMA support),
+ Ethernet,
+ RTC,
+ SDMA (including descriptor loading),
+ Keypad,
+ Touch screen,
+ McSPI,
+ McBSP,
+ Mentor USB,
+ Phoenix General Purpose ADC,
+ Battery Charging.
+ Sensors (Proximity and Accelerometer)
+
+- Audio
+ Audio playback to Phoenix Hand-free, Head set output devices.
+ HDMI audio playback
+ Audio record through Phoenix analog MIC input.
+ Simultaneous audio playback and capture.
+
+- Video
+ Display driver
+ - FBdev and V4L2 API support
+ - Primary and Secondary DSI and HDMI displays
+ - Simultaneous rendering on all 3 displays
+ Tiler memory manager.
+
+- WLAN
+
+4.3 Postponed Features
+
+None
+
+4.4 Future Planned Features
+
+Refer to Program schedule.
+
+4.5 Defects Fixed in This Release
+
+OMAPS00217886 UART console hangs and system freezes if one uses omap-serial driver instead of 8250 driver
+OMAPS00216357 Packet loss in multiple ICMP transfers
+OMAPS00211463 NFS speed is too slow in L24x
+OMAPS00214519 After boot SATO image and Calibrate Touchscreen if the screen is touched X-server crashes.
+OMAPS00216449 Problems are seen with NFS when 'tcp' option is not specified in bootargs.
+OMAPS00213823 Keypad driver doesn't work as module if clock changes are added
+OMAPS00216309 IRQ Affinitty not available for driver
+OMAPS00216312 Touchscreen irq cannot be handled in processor 2
+OMAPS00216899 Non Working Touchscreen Interface in Poky UI
+OMAPS00213925 TestSuites: SMP: Process Priority: sched entry missing
+
+Known Issues:
+
+OMAPS00216391 With tearing effect patch , frame drops from 60fps to 30fps
+OMAPS00216592 There is no way available for dynamically setting/resetting dithering bit
+OMAPS00213907 With omapfb.numfb=1 in bootargs , the rest of pipelines are not given to v4l2
+OMAPS00214116 Visible tearing during the execution of a 3D app with flipping enabled.
+OMAPS00215432 CONFIG_PANEL_4430SDP_TAAL lacks config dependency on DSS_DSI
+OMAPS00216002 DSS function default_wait_vsync doesn't distinguish between primary and secondary LCD panels
+OMAPS00216444 Provide KConfig options for DSI2, Sec Taal panel, and all DSI specific knobs
+OMAPS00216589 VGA Rotation on LCD does not work
+OMAPS00216585 V4L2 Rotation ioctls rotate 90 degrees when set to 270 degress and vice versa
+OMAPS00216582 streaming test case gives issue when multiple buffers are used in the videobuf queu
+
+4.6 Open Defects
+
+OMAPS00214519 After boot SATO image and Calibrate Touchscreen, if the screen is touched X-server crashes.
+OMAPS00215651 MUSB driver in host mode has problems with unaligned DMA
+OMAPS00215668 MUSB driver in device mode has problems with unaligned DMA.
+OMAPS00216037 L24x: CPUx comes out of low power mode when there is an enevt om CPUy
+OMAPS00216039 L24x: Tick suppression won't work because of the LOCAL A9 timer aren't wakeup capable
+OMAPS00216393 DMA testcases should declare set_test_passed(1) only during rmmod
+OMAPS00217332 USB does not work if SYSBOOT settings are such that USB is never attempted during bootup
+OMAPS00218005 MUSB Host does not work reliably when PIO mode is used.
+OMAPS00213836 OMAP4 u-boot: i2c TimeOuts at speed 400Khz, 2100Khz
+OMAPS00218007 OMAP4 RTC: Unable to set IRQ affinity to cpu0/1
+OMAPS00216470 Linux Test Projects, Miscellaneous Failures Opened
+
+
+4.7 Open Change Requests
+
+None
+
+4.8 Rejected Defects
+
+None
+
+4.9 Postponed Defects
+
+OMAPS00213825 Kernel crash when many processes have been scheduled
+ Postponed, Cannot reproduce a second time
+OMAPS00214020 ethernet doesn't get configured with L24.4 kernel Postponed
+ Postponed, Cannot reproduce in current release
+
+
+4.10 Limitations
+
+
+
+5. Tool Chain
+-------------
+The toolchain used to build the code can be obtained from CodeSourcery at the
+following URL:
+ http://www.codesourcery.com/sgpp/lite/arm/portal/release858
+
+The tool chain version is Sourcery G++ Lite 2009q1-203 for ARM GNU/Linux.
+
+The tool chain requires glibc 2.3.0 or higher to compile the source code on
+the host machine.
+
+
+--------------------------------------------------------------------------------
+
+OMAP(TM) is a Trademark of Texas Instruments Incorporated
+Innovator(TM) is a Trademark of Texas Instruments Incorporated
+Code Composer Studio(TM) is a Trademark of Texas Instruments Incorporated
+DSP/BIOS(TM) is a Trademark of Texas Instruments Incorporated
+
+All other trademarks are the property of the respective owner.
diff --git a/arch/arm/configs/omap4_pm_defconfig b/arch/arm/configs/omap4_pm_defconfig
index cf262477ab6d..a09b77f88abc 100644
--- a/arch/arm/configs/omap4_pm_defconfig
+++ b/arch/arm/configs/omap4_pm_defconfig
@@ -828,6 +828,7 @@ CONFIG_REGULATOR_TWL4030=y
# CONFIG_VGASTATE is not set
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
# CONFIG_FB is not set
+# CONFIG_OMAP2_DSS is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
diff --git a/arch/arm/configs/omap_4430sdp_defconfig b/arch/arm/configs/omap_4430sdp_defconfig
index ceba18dfc7ed..8054111e0b12 100644
--- a/arch/arm/configs/omap_4430sdp_defconfig
+++ b/arch/arm/configs/omap_4430sdp_defconfig
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.33.2
-# Fri Apr 30 21:52:23 2010
+# Thu May 13 12:54:40 2010
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -257,7 +257,10 @@ CONFIG_OMAP_PM_NOOP=y
#
# OMAP Board Type
#
+# CONFIG_WIFI_CONTROL_FUNC is not set
+# CONFIG_TIWLAN_SDIO is not set
CONFIG_MACH_OMAP_4430SDP=y
+CONFIG_ERRATA_OMAP4_AXI2OCP=y
#
# Processor Type
@@ -822,7 +825,7 @@ CONFIG_POWER_SUPPLY=y
# CONFIG_PDA_POWER is not set
# CONFIG_BATTERY_DS2760 is not set
# CONFIG_BATTERY_DS2782 is not set
-CONFIG_TWL6030_BCI_BATTERY=y
+CONFIG_TWL6030_BCI_BATTERY=m
# CONFIG_BATTERY_BQ27x00 is not set
# CONFIG_BATTERY_MAX17040 is not set
# CONFIG_HWMON is not set
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 6f077e31341d..e416733c1c64 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -179,6 +179,19 @@ config MACH_OMAP_4430SDP
bool "OMAP 4430 SDP board"
depends on ARCH_OMAP4
+config ERRATA_OMAP4_AXI2OCP
+ bool "OMAP 4430 axi2ocp errata workaround"
+ depends on ARCH_OMAP4
+ help
+ Pending response counter logic is incorrectly implemented
+ It decrements by only 1 even when there are 2+ responses in the
+ same cycle. If 2 MCMDs send out bridge at the same time counter
+ increments by.1 but when it decrement for 2 responses counter does
+ not go beyond 0.
+ Work-around:
+ Any new request before timer max out resets the timer. With this hang
+ issue will not happen.
+
config OMAP3_EMU
bool "OMAP3 debugging peripherals"
depends on ARCH_OMAP3
diff --git a/arch/arm/mach-omap2/board-4430sdp-wifi.c b/arch/arm/mach-omap2/board-4430sdp-wifi.c
index b13e9fc3767a..b13e9fc3767a 100755..100644
--- a/arch/arm/mach-omap2/board-4430sdp-wifi.c
+++ b/arch/arm/mach-omap2/board-4430sdp-wifi.c
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 50f2a849994d..f2efbb80ce24 100755
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -51,8 +51,6 @@
#include <plat/omap_device.h>
#include <plat/omap_hwmod.h>
-static int ts_gpio;
-
#define OMAP4_CMA3000ACCL_GPIO 186
static int sdp4430_keymap[] = {
@@ -366,7 +364,7 @@ static int sdp4430_panel_disable_hdmi(struct omap_dss_device *dssdev)
return 0;
}
-static void __init sdp4430_hdmi_init(void)
+static __attribute__ ((unused)) void __init sdp4430_hdmi_init(void)
{
return;
}
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index bb9d9ae732b3..b49d57769af0 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -194,32 +194,32 @@ static struct omap_mcbsp_platform_data omap44xx_mcbsp_pdata[] = {
.phys_base = OMAP44XX_MCBSP1_BASE,
.dma_rx_sync = OMAP44XX_DMA_MCBSP1_RX,
.dma_tx_sync = OMAP44XX_DMA_MCBSP1_TX,
- .rx_irq = INT_24XX_MCBSP1_IRQ_RX,
- .tx_irq = INT_24XX_MCBSP1_IRQ_TX,
+ .rx_irq = INT_44XX_MCBSP1_IRQ,
+ .tx_irq = INT_44XX_MCBSP1_IRQ,
.ops = &omap2_mcbsp_ops,
},
{
.phys_base = OMAP44XX_MCBSP2_BASE,
.dma_rx_sync = OMAP44XX_DMA_MCBSP2_RX,
.dma_tx_sync = OMAP44XX_DMA_MCBSP2_TX,
- .rx_irq = INT_24XX_MCBSP2_IRQ_RX,
- .tx_irq = INT_24XX_MCBSP2_IRQ_TX,
+ .rx_irq = INT_44XX_MCBSP2_IRQ,
+ .tx_irq = INT_44XX_MCBSP2_IRQ,
.ops = &omap2_mcbsp_ops,
},
{
.phys_base = OMAP44XX_MCBSP3_BASE,
.dma_rx_sync = OMAP44XX_DMA_MCBSP3_RX,
.dma_tx_sync = OMAP44XX_DMA_MCBSP3_TX,
- .rx_irq = INT_24XX_MCBSP3_IRQ_RX,
- .tx_irq = INT_24XX_MCBSP3_IRQ_TX,
+ .rx_irq = INT_44XX_MCBSP3_IRQ,
+ .tx_irq = INT_44XX_MCBSP3_IRQ,
.ops = &omap2_mcbsp_ops,
},
{
.phys_base = OMAP44XX_MCBSP4_BASE,
.dma_rx_sync = OMAP44XX_DMA_MCBSP4_RX,
.dma_tx_sync = OMAP44XX_DMA_MCBSP4_TX,
- .rx_irq = INT_24XX_MCBSP4_IRQ_RX,
- .tx_irq = INT_24XX_MCBSP4_IRQ_TX,
+ .rx_irq = INT_44XX_MCBSP4_IRQ,
+ .tx_irq = INT_44XX_MCBSP4_IRQ,
.ops = &omap2_mcbsp_ops,
},
};
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 2d0a778f05b6..b0f26b1378a9 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -495,8 +495,6 @@ static int _enable_clocks(struct omap_hwmod *oh)
struct omap_hwmod_ocp_if *os;
int i;
- pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
-
if (oh->_clk && !IS_ERR(oh->_clk)) {
#ifdef CONFIG_PM
if (!strcmp(oh->_clk->name, "uart3_fck"))
@@ -531,8 +529,6 @@ static int _disable_clocks(struct omap_hwmod *oh)
struct omap_hwmod_ocp_if *os;
int i;
- pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
-
if (oh->_clk && !IS_ERR(oh->_clk)) {
#ifdef CONFIG_PM
if (!strcmp(oh->_clk->name, "emif1_ick") ||
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 66591e516772..3946d4792747 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -45,13 +45,7 @@
#define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52
#define UART_OMAP_WER 0x17 /* Wake-up enable register */
-/*
- * NOTE: By default the serial timeout is disabled as it causes lost characters
- * over the serial ports. This means that the UART clocks will stay on until
- * disabled via sysfs. This also causes that any deeper omap sleep states are
- * blocked.
- */
-#define DEFAULT_TIMEOUT 0
+#define DEFAULT_TIMEOUT (5 * HZ)
#define MAX_UART_HWMOD_NAME_LEN 16
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index d5f2ba7f56e6..66c635aa4c36 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -66,6 +66,21 @@ static struct irqaction omap2_gp_timer_irq = {
.handler = omap2_gp_timer_interrupt,
};
+#ifdef CONFIG_ERRATA_OMAP4_AXI2OCP
+static struct omap_dm_timer *gptimer2;
+static irqreturn_t gpt2_timer_interrupt(int irq, void *dev_id)
+{
+ omap_dm_timer_write_status(gptimer2, OMAP_TIMER_INT_OVERFLOW);
+ return IRQ_HANDLED;
+}
+
+static struct irqaction gpt2_timer_irq = {
+ .name = "gpt2 timer",
+ .flags = IRQF_DISABLED,
+ .handler = gpt2_timer_interrupt,
+};
+#endif
+
static int omap2_gp_timer_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
{
@@ -166,8 +181,32 @@ static void __init omap2_gp_clockevent_init(void)
clockevent_gpt.cpumask = cpumask_of(0);
clockevents_register_device(&clockevent_gpt);
+
}
+#ifdef CONFIG_ERRATA_OMAP4_AXI2OCP
+static int __init omap4_setup_gpt2(void)
+{
+ /* Set up GPT2 for the WA */
+ gptimer2 = omap_dm_timer_request_specific(2);
+ BUG_ON(gptimer2 == NULL);
+
+ printk(KERN_INFO " Enabling AXI2OCP errata Fix \n");
+ omap_dm_timer_set_source(gptimer2, OMAP_TIMER_SRC_32_KHZ);
+ gpt2_timer_irq.dev_id = (void *)gptimer2;
+ setup_irq(omap_dm_timer_get_irq(gptimer2), &gpt2_timer_irq);
+ omap_dm_timer_set_int_enable(gptimer2, OMAP_TIMER_INT_OVERFLOW);
+ /*
+ * Timer reload value is used based on mpu @ 600 MHz
+ * And hence bridge is at 300 MHz. 65K cycle = 216 uS
+ * 6 * 1/32 kHz => ~187 us
+ */
+ omap_dm_timer_set_load_start(gptimer2, 1, 0xffffff06);
+
+ return 0;
+}
+late_initcall(omap4_setup_gpt2);
+#endif
/* Clocksource code */
#ifdef CONFIG_OMAP_32K_TIMER
diff --git a/arch/arm/plat-omap/hdmi_lib.c b/arch/arm/plat-omap/hdmi_lib.c
index 9c4d49cdd65b..ee2374f3494e 100755
--- a/arch/arm/plat-omap/hdmi_lib.c
+++ b/arch/arm/plat-omap/hdmi_lib.c
@@ -530,7 +530,7 @@ static void hdmi_core_powerdown_disable(void)
}
/* todo: power off the core */
-static void hdmi_core_powerdown_enable(void)
+static __attribute__ ((unused)) void hdmi_core_powerdown_enable(void)
{
REG_FLD_MOD(HDMI_CORE_SYS, HDMI_CORE_CTRL1, 0x1, 0, 0);
}
@@ -1084,7 +1084,7 @@ static void hdmi_w1_audio_enable(void)
REG_FLD_MOD(HDMI_WP, HDMI_WP_AUDIO_CTRL, 1, 31, 31);
}
-static void hdmi_w1_audio_disable(void)
+static __attribute__ ((unused))__attribute__ ((unused)) void hdmi_w1_audio_disable(void)
{
REG_FLD_MOD(HDMI_WP, HDMI_WP_AUDIO_CTRL, 0, 31, 31);
}
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 77c0bf79f43f..4c29a5ec409b 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -404,7 +404,7 @@
#define INT_44XX_SPI5_IRQ (69 + IRQ_GIC_START)
#define INT_44XX_MCBSP5_IRQ (16 + IRQ_GIC_START)
-#define INT_44xX_MCBSP1_IRQ (17 + IRQ_GIC_START)
+#define INT_44XX_MCBSP1_IRQ (17 + IRQ_GIC_START)
#define INT_44XX_MCBSP2_IRQ (22 + IRQ_GIC_START)
#define INT_44XX_MCBSP3_IRQ (23 + IRQ_GIC_START)
#define INT_44XX_MCBSP4_IRQ (27 + IRQ_GIC_START)
diff --git a/arch/arm/plat-omap/include/plat/wifi_tiwlan.h b/arch/arm/plat-omap/include/plat/wifi_tiwlan.h
index b0332b04ddc9..b0332b04ddc9 100755..100644
--- a/arch/arm/plat-omap/include/plat/wifi_tiwlan.h
+++ b/arch/arm/plat-omap/include/plat/wifi_tiwlan.h
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 30682b8278fd..d263b70491cc 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -211,7 +211,7 @@ void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
struct omap_mcbsp *mcbsp;
void __iomem *io_base;
- if (!cpu_is_omap34xx())
+ if (!cpu_is_omap34xx() && !cpu_is_omap44xx())
return;
if (!omap_mcbsp_check_valid_id(id)) {
@@ -235,7 +235,7 @@ void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
struct omap_mcbsp *mcbsp;
void __iomem *io_base;
- if (!cpu_is_omap34xx())
+ if (!cpu_is_omap34xx() && !cpu_is_omap44xx())
return;
if (!omap_mcbsp_check_valid_id(id)) {
@@ -312,7 +312,7 @@ static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
* Enable wakup behavior, smart idle and all wakeups
* REVISIT: some wakeups may be unnecessary
*/
- if (cpu_is_omap34xx()) {
+ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
u16 syscon;
syscon = OMAP_MCBSP_READ(mcbsp->io_base, SYSCON);
@@ -336,7 +336,7 @@ static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp)
/*
* Disable wakup behavior, smart idle and all wakeups
*/
- if (cpu_is_omap34xx()) {
+ if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
u16 syscon;
syscon = OMAP_MCBSP_READ(mcbsp->io_base, SYSCON);
@@ -440,15 +440,16 @@ int omap_mcbsp_request(unsigned int id)
mcbsp->id);
goto error;
}
-
- init_completion(&mcbsp->rx_irq_completion);
- err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler,
- 0, "McBSP", (void *)mcbsp);
- if (err != 0) {
- dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
- "for McBSP%d\n", mcbsp->rx_irq,
- mcbsp->id);
- goto tx_irq;
+ if (!cpu_is_omap44xx()) {
+ init_completion(&mcbsp->rx_irq_completion);
+ err = request_irq(mcbsp->rx_irq,
+ omap_mcbsp_rx_irq_handler, 0, "McBSP", (void *)mcbsp);
+ if (err != 0) {
+ dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
+ "for McBSP%d\n", mcbsp->rx_irq,
+ mcbsp->id);
+ goto tx_irq;
+ }
}
}
@@ -492,7 +493,8 @@ void omap_mcbsp_free(unsigned int id)
if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
/* Free IRQs */
- free_irq(mcbsp->rx_irq, (void *)mcbsp);
+ if (!cpu_is_omap44xx())
+ free_irq(mcbsp->rx_irq, (void *)mcbsp);
free_irq(mcbsp->tx_irq, (void *)mcbsp);
}
@@ -563,7 +565,7 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx)
OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 7));
}
- if (cpu_is_omap2430() || cpu_is_omap34xx()) {
+ if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
/* Release the transmitter and receiver */
w = OMAP_MCBSP_READ(io_base, XCCR);
w &= ~(tx ? XDISABLE : 0);
@@ -595,7 +597,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
/* Reset transmitter */
tx &= 1;
- if (cpu_is_omap2430() || cpu_is_omap34xx()) {
+ if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
w = OMAP_MCBSP_READ(io_base, XCCR);
w |= (tx ? XDISABLE : 0);
OMAP_MCBSP_WRITE(io_base, XCCR, w);
@@ -605,7 +607,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
/* Reset receiver */
rx &= 1;
- if (cpu_is_omap2430() || cpu_is_omap34xx()) {
+ if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
w = OMAP_MCBSP_READ(io_base, RCCR);
w |= (rx ? RDISABLE : 0);
OMAP_MCBSP_WRITE(io_base, RCCR, w);
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index 590435894848..5f32a92cd4a4 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -144,12 +144,12 @@ static int _omap_device_activate(struct omap_device *od, u8 ignore_lat)
odpl->activate_lat_worst = act_lat;
if (odpl->flags & OMAP_DEVICE_LATENCY_AUTO_ADJUST) {
odpl->activate_lat = act_lat;
- pr_warning("omap_device: %s.%d: new worst case "
+ pr_debug("omap_device: %s.%d: new worst case "
"activate latency %d: %llu\n",
od->pdev.name, od->pdev.id,
od->pm_lat_level, act_lat);
} else
- pr_warning("omap_device: %s.%d: activate "
+ pr_debug("omap_device: %s.%d: activate "
"latency %d higher than exptected. "
"(%llu > %d)\n",
od->pdev.name, od->pdev.id,
diff --git a/drivers/dsp/syslink/multicore_ipc/listmp_sharedmemory.c b/drivers/dsp/syslink/multicore_ipc/listmp_sharedmemory.c
index 1e49d832c91d..eb44bc29fede 100644
--- a/drivers/dsp/syslink/multicore_ipc/listmp_sharedmemory.c
+++ b/drivers/dsp/syslink/multicore_ipc/listmp_sharedmemory.c
@@ -486,6 +486,11 @@ int listmp_sharedmemory_delete(listmp_sharedmemory_handle *listmp_handleptr)
handle = (listmp_sharedmemory_object *) (*listmp_handleptr);
obj = (struct listmp_sharedmemory_obj *) handle->obj;
+ if (WARN_ON(obj == NULL)) {
+ status = -EINVAL;
+ goto exit;
+ }
+
params = (listmp_sharedmemory_params *) &obj->params;
if (obj->owner->proc_id != multiproc_get_id(NULL)) {
diff --git a/drivers/dsp/syslink/procmgr/proc4430/ducatienabler.c b/drivers/dsp/syslink/procmgr/proc4430/ducatienabler.c
index 6f6814ff232e..e35299003634 100644
--- a/drivers/dsp/syslink/procmgr/proc4430/ducatienabler.c
+++ b/drivers/dsp/syslink/procmgr/proc4430/ducatienabler.c
@@ -400,6 +400,10 @@ int ducati_mem_map(u32 mpu_addr, u32 ul_virt_addr,
DPRINTK("WMD_BRD_MemMap: MMU element size is zero\n");
return -EINVAL;
}
+ } else {
+ /* If mixedSize set to 1, no conversion is
+ * required. for element size */
+ hw_attrs.element_size = HW_ELEM_SIZE_64BIT;
}
/*
* Do OS-specific user-va to pa translation.
diff --git a/drivers/media/video/tiler/tiler_pack.c b/drivers/media/video/tiler/tiler_pack.c
index 7c3c6d95ca0f..0b7ff9200b41 100644
--- a/drivers/media/video/tiler/tiler_pack.c
+++ b/drivers/media/video/tiler/tiler_pack.c
@@ -66,7 +66,7 @@ void tiler_alloc_packed(s32 *count, enum tiler_fmt fmt, u32 width, u32 height,
n_alloc = MIN(*count - i, m_per_a * n_per_m);
m_alloc = DIVIDE_UP(n_alloc, n_per_m);
tiles = ((m_alloc - 1) * map_width +
- buf_width * (n_alloc - (m_alloc - 1) * m_per_a));
+ buf_width * (n_alloc - (m_alloc - 1) * n_per_m));
res = tiler_alloc(fmt, til_width * tiles, height,
(u32 *)sysptr + i);
diff --git a/drivers/serial/omap-serial.c b/drivers/serial/omap-serial.c
index 288a3591db61..b08a7e6e67f9 100644
--- a/drivers/serial/omap-serial.c
+++ b/drivers/serial/omap-serial.c
@@ -255,7 +255,7 @@ static void serial_omap_start_tx(struct uart_port *port)
unsigned int start;
int ret = 0;
- if (!up->use_dma || up->port.x_char) {
+ if (!up->use_dma) {
serial_omap_enable_ier_thri(up);
return;
}
@@ -346,21 +346,24 @@ static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
unsigned int iir, lsr;
unsigned long flags;
- spin_lock_irqsave(&up->port.lock, flags);
iir = serial_in(up, UART_IIR);
if (iir & UART_IIR_NO_INT)
return IRQ_NONE;
+ spin_lock_irqsave(&up->port.lock, flags);
lsr = serial_in(up, UART_LSR);
if (iir & UART_IER_RLSI) {
- if (up->use_dma)
- up->ier &= ~UART_IER_RDI;
- serial_out(up, UART_IER, up->ier);
- if (!up->use_dma ||
- serial_omap_start_rxdma(up) != 0)
+ if (!up->use_dma) {
if (lsr & UART_LSR_DR)
receive_chars(up, &lsr);
+ } else {
+ up->ier &= ~UART_IER_RDI;
+ serial_out(up, UART_IER, up->ier);
+ if (serial_omap_start_rxdma(up) != 0)
+ if (lsr & UART_LSR_DR)
+ receive_chars(up, &lsr);
}
+ }
check_modem_status(up);
if ((lsr & UART_LSR_THRE) && (iir & UART_IIR_THRI))
@@ -810,8 +813,8 @@ serial_omap_pm(struct uart_port *port, unsigned int state,
unsigned char efr;
dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->pdev->id);
- efr = serial_in(up, UART_EFR);
serial_out(up, UART_LCR, OMAP_UART_LCR_CONF_MDB);
+ efr = serial_in(up, UART_EFR);
serial_out(up, UART_EFR, efr | UART_EFR_ECB);
serial_out(up, UART_LCR, 0);
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 4ed39b31cf23..ebbd14741b5c 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -3764,9 +3764,9 @@ void dispc_dump_irqs(struct seq_file *s)
PIS(SYNC_LOST_DIGIT);
PIS(WAKEUP);
#undef PIS
-}
+}EXPORT_SYMBOL(dispc_dump_irqs);
#else
-void dispc_dump_irqs(struct seq_file *s) { }
+void dispc_dump_irqs(struct seq_file *s) { } EXPORT_SYMBOL(dispc_dump_irqs);
#endif
void dispc_dump_regs(struct seq_file *s)
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index e05f40b60bba..5506e61fa5e9 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -244,6 +244,13 @@ struct dsi_update_region {
struct omap_dss_device *device;
};
+struct dsi_irq_stats {
+ unsigned long last_reset;
+ unsigned irq_count;
+ unsigned dsi_irqs[32];
+ unsigned vc_irqs[4][32];
+ unsigned cio_irqs[32];
+};
static struct dsi_struct
{
void __iomem *base;
@@ -298,6 +305,10 @@ static struct dsi_struct
#endif
int debug_read;
int debug_write;
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+ spinlock_t irq_stats_lock;
+ struct dsi_irq_stats irq_stats;
+#endif
} dsi_1, dsi_2;
#ifdef DEBUG
@@ -305,6 +316,10 @@ static unsigned int dsi_perf;
module_param_named(dsi_perf, dsi_perf, bool, 0644);
#endif
+static bool dsi_te_sync = 1;
+module_param_named(dsi_te_sync, dsi_te_sync, bool, 0644);
+MODULE_PARM_DESC(dsi_te_sync, "enable/disable tearing");
+
static inline void dsi_write_reg(enum dsi lcd_ix,
const struct dsi_reg idx, u32 val)
@@ -598,6 +613,13 @@ static irqreturn_t dsi_irq_handler(int irq, void *arg)
print_irq_status(irqstatus);
}
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+ spin_lock(&dsi.irq_stats_lock);
+ dsi.irq_stats.irq_count++;
+ dss_collect_irq_stats(irqstatus, dsi.irq_stats.dsi_irqs);
+ spin_unlock(&dsi.irq_stats_lock);
+#endif
+
#ifdef DSI_CATCH_MISSING_TE
if (irqstatus & DSI_IRQ_TE_TRIGGER)
del_timer(&(p_dsi->te_timer));
@@ -608,6 +630,10 @@ static irqreturn_t dsi_irq_handler(int irq, void *arg)
continue;
vcstatus = dsi_read_reg(lcd_ix, DSI_VC_IRQSTATUS(i));
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+
+ dss_collect_irq_stats(vcstatus, dsi.irq_stats.vc_irqs[i]);
+#endif
if (vcstatus & DSI_VC_IRQ_BTA)
complete(&(p_dsi->bta_completion));
@@ -663,6 +689,9 @@ static irqreturn_t dsi2_irq_handler(int irq, void *arg)
print_irq_status(irqstatus);
}
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+ dss_collect_irq_stats(ciostatus, dsi.irq_stats.cio_irqs);
+#endif
#ifdef DSI_CATCH_MISSING_TE
if (irqstatus & DSI_IRQ_TE_TRIGGER)
del_timer(&(p_dsi->te_timer));
@@ -705,6 +734,9 @@ static irqreturn_t dsi2_irq_handler(int irq, void *arg)
/* flush posted write */
dsi_read_reg(lcd_ix, DSI_IRQSTATUS);
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+ spin_unlock(&dsi.irq_stats_lock);
+#endif
return IRQ_HANDLED;
}
@@ -1428,6 +1460,96 @@ void dsi_dump_clocks(enum dsi lcd_ix, struct seq_file *s)
enable_clocks(0);
}
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+void dsi_dump_irqs(struct seq_file *s)
+{
+ unsigned long flags;
+ struct dsi_irq_stats stats;
+
+ spin_lock_irqsave(&dsi.irq_stats_lock, flags);
+
+ stats = dsi.irq_stats;
+ memset(&dsi.irq_stats, 0, sizeof(dsi.irq_stats));
+ dsi.irq_stats.last_reset = jiffies;
+
+ spin_unlock_irqrestore(&dsi.irq_stats_lock, flags);
+
+ seq_printf(s, "period %u ms\n",
+ jiffies_to_msecs(jiffies - stats.last_reset));
+
+ seq_printf(s, "irqs %d\n", stats.irq_count);
+#define PIS(x) \
+ seq_printf(s, "%-20s %10d\n", #x, stats.dsi_irqs[ffs(DSI_IRQ_##x)-1]);
+
+ seq_printf(s, "-- DSI interrupts --\n");
+ PIS(VC0);
+ PIS(VC1);
+ PIS(VC2);
+ PIS(VC3);
+ PIS(WAKEUP);
+ PIS(RESYNC);
+ PIS(PLL_LOCK);
+ PIS(PLL_UNLOCK);
+ PIS(PLL_RECALL);
+ PIS(COMPLEXIO_ERR);
+ PIS(HS_TX_TIMEOUT);
+ PIS(LP_RX_TIMEOUT);
+ PIS(TE_TRIGGER);
+ PIS(ACK_TRIGGER);
+ PIS(SYNC_LOST);
+ PIS(LDO_POWER_GOOD);
+ PIS(TA_TIMEOUT);
+#undef PIS
+
+#define PIS(x) \
+ seq_printf(s, "%-20s %10d %10d %10d %10d\n", #x, \
+ stats.vc_irqs[0][ffs(DSI_VC_IRQ_##x)-1], \
+ stats.vc_irqs[1][ffs(DSI_VC_IRQ_##x)-1], \
+ stats.vc_irqs[2][ffs(DSI_VC_IRQ_##x)-1], \
+ stats.vc_irqs[3][ffs(DSI_VC_IRQ_##x)-1]);
+
+ seq_printf(s, "-- VC interrupts --\n");
+ PIS(CS);
+ PIS(ECC_CORR);
+ PIS(PACKET_SENT);
+ PIS(FIFO_TX_OVF);
+ PIS(FIFO_RX_OVF);
+ PIS(BTA);
+ PIS(ECC_NO_CORR);
+ PIS(FIFO_TX_UDF);
+ PIS(PP_BUSY_CHANGE);
+#undef PIS
+
+#define PIS(x) \
+ seq_printf(s, "%-20s %10d\n", #x, \
+ stats.cio_irqs[ffs(DSI_CIO_IRQ_##x)-1]);
+
+ seq_printf(s, "-- CIO interrupts --\n");
+ PIS(ERRSYNCESC1);
+ PIS(ERRSYNCESC2);
+ PIS(ERRSYNCESC3);
+ PIS(ERRESC1);
+ PIS(ERRESC2);
+ PIS(ERRESC3);
+ PIS(ERRCONTROL1);
+ PIS(ERRCONTROL2);
+ PIS(ERRCONTROL3);
+ PIS(STATEULPS1);
+ PIS(STATEULPS2);
+ PIS(STATEULPS3);
+ PIS(ERRCONTENTIONLP0_1);
+ PIS(ERRCONTENTIONLP1_1);
+ PIS(ERRCONTENTIONLP0_2);
+ PIS(ERRCONTENTIONLP1_2);
+ PIS(ERRCONTENTIONLP0_3);
+ PIS(ERRCONTENTIONLP1_3);
+ PIS(ULPSACTIVENOT_ALL0);
+ PIS(ULPSACTIVENOT_ALL1);
+#undef PIS
+}EXPORT_SYMBOL(dsi_dump_irqs);
+#else
+void dsi_dump_irqs(struct seq_file *s) { } EXPORT_SYMBOL(dsi_dump_irqs);
+#endif
void dsi_dump_regs(enum dsi lcd_ix, struct seq_file *s)
{
#define DUMPREG(n, r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(n, r))
@@ -3046,6 +3168,8 @@ static void dsi_framedone_irq_callback(void *data, u32 mask)
/* SIDLEMODE back to smart-idle */
dispc_enable_sidle();
dsi_1.framedone_received = true;
+ if (!dsi_te_sync)
+ udelay(100);
wake_up(&dsi_1.waitqueue);
}
@@ -3058,6 +3182,8 @@ static void dsi2_framedone_irq_callback(void *data, u32 mask)
/* SIDLEMODE back to smart-idle */
dispc_enable_sidle();
dsi_2.framedone_received = true;
+ if (!dsi_te_sync)
+ udelay(100);
wake_up(&dsi_2.waitqueue);
}
@@ -3257,7 +3383,8 @@ static int dsi_update_thread(void *data)
if (cpu_is_omap34xx())
dsi_vc_config_vp(lcd_ix, 0);
- if (dsi_1.te_enabled && dsi_1.use_ext_te)
+ if (dsi_te_sync && dsi_1.te_enabled
+ && dsi_1.use_ext_te)
device->driver->wait_for_te(device);
dsi_1.framedone_received = false;
@@ -3392,7 +3519,8 @@ static int dsi2_update_thread(void *data)
if (cpu_is_omap34xx())
dsi_vc_config_vp(lcd_ix, 0);
- if (dsi_2.te_enabled && dsi_2.use_ext_te)
+ if (dsi_te_sync && dsi_2.te_enabled
+ && dsi_2.use_ext_te)
device->driver->wait_for_te(device);
dsi_2.framedone_received = false;
@@ -4264,7 +4392,10 @@ int dsi_init(struct platform_device *pdev)
spin_lock_init(&dsi_1.errors_lock);
dsi_1.errors = 0;
- /* XXX fail properly */
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+ spin_lock_init(&dsi.irq_stats_lock);
+ dsi.irq_stats.last_reset = jiffies;
+#endif
init_completion(&dsi_1.bta_completion);
init_completion(&dsi_1.update_completion);
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index b7860dbd538f..2165156342ca 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -272,6 +272,7 @@ int dsi_calc_clock_rates(struct dsi_clock_info *cinfo);
/* DSI2 */
int dsi2_init(struct platform_device *pdev);
void dsi2_exit(void);
+void dsi_dump_irqs(struct seq_file *s);
/* DPI */
int dpi_init(void);
@@ -382,7 +383,7 @@ int dispc_calc_clock_rates(unsigned long dispc_fclk_rate,
int dispc_set_clock_div(enum omap_channel channel,
struct dispc_clock_info *cinfo);
int dispc_get_clock_div(struct dispc_clock_info *cinfo);
-
+void dispc_dump_irqs(struct seq_file *s);
/* VENC */
int venc_init(struct platform_device *pdev);