diff options
47 files changed, 518 insertions, 623 deletions
diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S new file mode 100644 index 000000000000..74ebc803904d --- /dev/null +++ b/arch/arm/include/asm/hardware/entry-macro-gic.S @@ -0,0 +1,60 @@ +/* + * arch/arm/include/asm/hardware/entry-macro-gic.S + * + * Low-level IRQ helper macros for GIC + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <asm/hardware/gic.h> + +#ifndef HAVE_GET_IRQNR_PREAMBLE + .macro get_irqnr_preamble, base, tmp + ldr \base, =gic_cpu_base_addr + ldr \base, [\base] + .endm +#endif + +/* + * The interrupt numbering scheme is defined in the + * interrupt controller spec. To wit: + * + * Interrupts 0-15 are IPI + * 16-31 are local. We allow 30 to be used for the watchdog. + * 32-1020 are global + * 1021-1022 are reserved + * 1023 is "spurious" (no interrupt) + * + * A simple read from the controller will tell us the number of the highest + * priority enabled interrupt. We then just need to check whether it is in the + * valid range for an IRQ (30-1020 inclusive). + */ + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + + ldr \irqstat, [\base, #GIC_CPU_INTACK] + /* bits 12-10 = src CPU, 9-0 = int # */ + + ldr \tmp, =1021 + bic \irqnr, \irqstat, #0x1c00 + cmp \irqnr, #15 + cmpcc \irqnr, \irqnr + cmpne \irqnr, \tmp + cmpcs \irqnr, \irqnr + .endm + +/* We assume that irqstat (the raw value of the IRQ acknowledge + * register) is preserved from the macro above. + * If there is an IPI, we immediately signal end of interrupt on the + * controller, since this requires the original irqstat value which + * we won't easily be able to recreate later. + */ + + .macro test_for_ipi, irqnr, irqstat, base, tmp + bic \irqnr, \irqstat, #0x1c00 + cmp \irqnr, #16 + strcc \irqstat, [\base, #GIC_CPU_EOI] + cmpcs \irqnr, \irqnr + .endm diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h index 013a6a8454e7..4b1ce6cd477f 100644 --- a/arch/arm/include/asm/hardware/gic.h +++ b/arch/arm/include/asm/hardware/gic.h @@ -52,19 +52,6 @@ static inline void gic_init(unsigned int nr, int start, gic_init_bases(nr, start, dist, cpu, 0, NULL); } -struct gic_chip_data { - unsigned int irq_offset; - void __iomem *dist_base; - void __iomem *cpu_base; -#ifdef CONFIG_CPU_PM - u32 saved_spi_enable[DIV_ROUND_UP(1020, 32)]; - u32 saved_spi_conf[DIV_ROUND_UP(1020, 16)]; - u32 saved_spi_target[DIV_ROUND_UP(1020, 4)]; - u32 __percpu *saved_ppi_enable; - u32 __percpu *saved_ppi_conf; -#endif - unsigned int gic_irqs; -}; #endif #endif diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 56a3ff01d84b..1824d9431821 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -478,6 +478,9 @@ static void __cpuinit percpu_timer_setup(void) if (!lt_ops || lt_ops->setup(evt)) broadcast_timer_setup(evt); + + if (local_timer_setup(evt)) + broadcast_timer_setup(); } #ifdef CONFIG_HOTPLUG_CPU diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 7f3b366e3a1c..3f2664c0acc9 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -69,6 +69,7 @@ config ARCH_OMAP5 select MISC_DEVICES if !MACH_OMAP_5430ZEBU select EMIF if !MACH_OMAP_5430ZEBU select USB_ARCH_HAS_EHCI if USB_SUPPORT + select LOCAL_TIMERS if SMP comment "OMAP Core Type" depends on ARCH_OMAP2 @@ -359,7 +360,7 @@ config MACH_OMAP4_PANDA select REGULATOR_FIXED_VOLTAGE if REGULATOR select OMAP_TPS6236X -config MACH_OMAP_5430EVM +config MACH_OMAP5_SEVM bool "OMAP5 EVM board" depends on ARCH_OMAP5 diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index a718cf4c21e4..d1b71190e13b 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -64,6 +64,8 @@ obj-$(CONFIG_ARCH_OMAP3) += opp3xxx_data.o obj-$(CONFIG_ARCH_OMAP4) += opp4xxx_data.o endif +obj-$(CONFIG_ARCH_OMAP5) += opp4xxx_data.o + # Power Management ifeq ($(CONFIG_PM),y) obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o @@ -113,7 +115,6 @@ obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common) \ voltagedomains44xx_data.o obj-$(CONFIG_ARCH_OMAP5) += $(voltagedomain-common) \ voltagedomains44xx_data.o -endif # OMAP powerdomain framework powerdomain-common += powerdomain.o powerdomain-common.o diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c index 1aa457507c69..69bc20298c77 100644 --- a/arch/arm/mach-omap2/board-omap4panda.c +++ b/arch/arm/mach-omap2/board-omap4panda.c @@ -621,7 +621,7 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board") /* Maintainer: David Anders - Texas Instruments Inc */ .atag_offset = 0x100, .reserve = omap_reserve, - .map_io = omap4_map_io, + .map_io = omap4_panda_map_io, .init_early = omap4430_init_early, .init_irq = gic_init_irq, .handle_irq = gic_handle_irq, diff --git a/arch/arm/mach-omap2/board-omap5evm.c b/arch/arm/mach-omap2/board-omap5evm.c index cfae26957e7e..e7357affad2b 100644 --- a/arch/arm/mach-omap2/board-omap5evm.c +++ b/arch/arm/mach-omap2/board-omap5evm.c @@ -32,7 +32,7 @@ #include <asm/hardware/gic.h> #include <mach/hardware.h> -#include <mach/omap4-common.h> +#include "common.h" #include <plat/common.h> #include <plat/usb.h> #include <plat/mmc.h> @@ -271,12 +271,6 @@ static struct smsc_keypad_data omap5_kp_data = { .rep = 1, }; -static void __init omap_5430evm_init_early(void) -{ - omap2_init_common_infrastructure(); - omap2_init_common_devices(NULL, NULL); -} - #ifndef CONFIG_MACH_OMAP_5430ZEBU static struct __devinitdata emif_custom_configs custom_configs = { .mask = EMIF_CUSTOM_CONFIG_LPMODE, @@ -1140,12 +1134,12 @@ static void __init omap_5430evm_map_io(void) omap54xx_map_common_io(); } -MACHINE_START(OMAP_5430EVM, "OMAP5430 evm board") +MACHINE_START(OMAP5_SEVM, "OMAP5430 evm board") /* Maintainer: Santosh Shilimkar - Texas Instruments Inc */ - .boot_params = 0x80000100, + .atag_offset = 0x100, .map_io = omap_5430evm_map_io, .reserve = omap_reserve, - .init_early = omap_5430evm_init_early, + .init_early = omap54xx_init_early, .init_irq = gic_init_irq, .handle_irq = gic_handle_irq, .init_machine = omap_5430evm_init, diff --git a/arch/arm/mach-omap2/clockdomains54xx_data.c b/arch/arm/mach-omap2/clockdomains54xx_data.c index e382be5d21f6..b45820321d5f 100644 --- a/arch/arm/mach-omap2/clockdomains54xx_data.c +++ b/arch/arm/mach-omap2/clockdomains54xx_data.c @@ -36,35 +36,27 @@ static struct clkdm_dep c2c_wkup_sleep_deps[] = { { .clkdm_name = "abe_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "iva_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3init_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3main1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3main2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4cfg_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { NULL }, }; @@ -72,15 +64,12 @@ static struct clkdm_dep c2c_wkup_sleep_deps[] = { static struct clkdm_dep cam_wkup_sleep_deps[] = { { .clkdm_name = "emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "iva_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3main1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { NULL }, }; @@ -88,47 +77,36 @@ static struct clkdm_dep cam_wkup_sleep_deps[] = { static struct clkdm_dep dma_wkup_sleep_deps[] = { { .clkdm_name = "abe_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "dss_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "ipu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "iva_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3init_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3main1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4cfg_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4sec_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "wkupaon_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { NULL }, }; @@ -136,39 +114,30 @@ static struct clkdm_dep dma_wkup_sleep_deps[] = { static struct clkdm_dep dsp_wkup_sleep_deps[] = { { .clkdm_name = "abe_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "iva_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3init_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3main1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3main2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4cfg_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "wkupaon_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { NULL }, }; @@ -176,15 +145,12 @@ static struct clkdm_dep dsp_wkup_sleep_deps[] = { static struct clkdm_dep dss_wkup_sleep_deps[] = { { .clkdm_name = "emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "iva_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3main2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { NULL }, }; @@ -192,15 +158,12 @@ static struct clkdm_dep dss_wkup_sleep_deps[] = { static struct clkdm_dep gpu_wkup_sleep_deps[] = { { .clkdm_name = "emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "iva_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3main1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { NULL }, }; @@ -208,55 +171,42 @@ static struct clkdm_dep gpu_wkup_sleep_deps[] = { static struct clkdm_dep ipu_wkup_sleep_deps[] = { { .clkdm_name = "abe_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "dsp_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "dss_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "gpu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "iva_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3init_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3main1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3main2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4cfg_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4sec_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "wkupaon_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { NULL }, }; @@ -264,11 +214,9 @@ static struct clkdm_dep ipu_wkup_sleep_deps[] = { static struct clkdm_dep iva_wkup_sleep_deps[] = { { .clkdm_name = "emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3main1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { NULL }, }; @@ -276,31 +224,24 @@ static struct clkdm_dep iva_wkup_sleep_deps[] = { static struct clkdm_dep l3init_wkup_sleep_deps[] = { { .clkdm_name = "abe_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "iva_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4cfg_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4sec_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "wkupaon_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { NULL }, }; @@ -308,15 +249,12 @@ static struct clkdm_dep l3init_wkup_sleep_deps[] = { static struct clkdm_dep l4sec_wkup_sleep_deps[] = { { .clkdm_name = "emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3main1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { NULL }, }; @@ -324,35 +262,27 @@ static struct clkdm_dep l4sec_wkup_sleep_deps[] = { static struct clkdm_dep mipiext_wkup_sleep_deps[] = { { .clkdm_name = "abe_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "iva_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3init_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3main1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3main2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4cfg_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { NULL }, }; @@ -360,59 +290,45 @@ static struct clkdm_dep mipiext_wkup_sleep_deps[] = { static struct clkdm_dep mpu_wkup_sleep_deps[] = { { .clkdm_name = "abe_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "dsp_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "dss_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "emif_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "gpu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "ipu_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "iva_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3init_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3main1_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l3main2_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4cfg_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4per_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "l4sec_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { .clkdm_name = "wkupaon_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }, { NULL }, }; @@ -427,7 +343,6 @@ static struct clockdomain l4sec_54xx_clkdm = { .wkdep_srcs = l4sec_wkup_sleep_deps, .sleepdep_srcs = l4sec_wkup_sleep_deps, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain iva_54xx_clkdm = { @@ -440,7 +355,6 @@ static struct clockdomain iva_54xx_clkdm = { .wkdep_srcs = iva_wkup_sleep_deps, .sleepdep_srcs = iva_wkup_sleep_deps, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain mipiext_54xx_clkdm = { @@ -452,7 +366,6 @@ static struct clockdomain mipiext_54xx_clkdm = { .wkdep_srcs = mipiext_wkup_sleep_deps, .sleepdep_srcs = mipiext_wkup_sleep_deps, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain l3main2_54xx_clkdm = { @@ -463,7 +376,6 @@ static struct clockdomain l3main2_54xx_clkdm = { .clkdm_offs = OMAP54XX_CM_CORE_CORE_L3MAIN2_CDOFFS, .dep_bit = OMAP54XX_L3MAIN2_STATDEP_SHIFT, .flags = CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain l3main1_54xx_clkdm = { @@ -474,7 +386,6 @@ static struct clockdomain l3main1_54xx_clkdm = { .clkdm_offs = OMAP54XX_CM_CORE_CORE_L3MAIN1_CDOFFS, .dep_bit = OMAP54XX_L3MAIN1_STATDEP_SHIFT, .flags = CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain custefuse_54xx_clkdm = { @@ -484,7 +395,6 @@ static struct clockdomain custefuse_54xx_clkdm = { .cm_inst = OMAP54XX_CM_CORE_CUSTEFUSE_INST, .clkdm_offs = OMAP54XX_CM_CORE_CUSTEFUSE_CUSTEFUSE_CDOFFS, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain ipu_54xx_clkdm = { @@ -497,7 +407,6 @@ static struct clockdomain ipu_54xx_clkdm = { .wkdep_srcs = ipu_wkup_sleep_deps, .sleepdep_srcs = ipu_wkup_sleep_deps, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain l4cfg_54xx_clkdm = { @@ -508,7 +417,6 @@ static struct clockdomain l4cfg_54xx_clkdm = { .clkdm_offs = OMAP54XX_CM_CORE_CORE_L4CFG_CDOFFS, .dep_bit = OMAP54XX_L4CFG_STATDEP_SHIFT, .flags = CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain abe_54xx_clkdm = { @@ -519,7 +427,6 @@ static struct clockdomain abe_54xx_clkdm = { .clkdm_offs = OMAP54XX_CM_CORE_AON_ABE_ABE_CDOFFS, .dep_bit = OMAP54XX_ABE_STATDEP_SHIFT, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain dss_54xx_clkdm = { @@ -532,7 +439,6 @@ static struct clockdomain dss_54xx_clkdm = { .wkdep_srcs = dss_wkup_sleep_deps, .sleepdep_srcs = dss_wkup_sleep_deps, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain dsp_54xx_clkdm = { @@ -545,7 +451,6 @@ static struct clockdomain dsp_54xx_clkdm = { .wkdep_srcs = dsp_wkup_sleep_deps, .sleepdep_srcs = dsp_wkup_sleep_deps, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain c2c_54xx_clkdm = { @@ -557,7 +462,6 @@ static struct clockdomain c2c_54xx_clkdm = { .wkdep_srcs = c2c_wkup_sleep_deps, .sleepdep_srcs = c2c_wkup_sleep_deps, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain l4per_54xx_clkdm = { @@ -568,7 +472,6 @@ static struct clockdomain l4per_54xx_clkdm = { .clkdm_offs = OMAP54XX_CM_CORE_L4PER_L4PER_CDOFFS, .dep_bit = OMAP54XX_L4PER_STATDEP_SHIFT, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain gpu_54xx_clkdm = { @@ -581,7 +484,6 @@ static struct clockdomain gpu_54xx_clkdm = { .wkdep_srcs = gpu_wkup_sleep_deps, .sleepdep_srcs = gpu_wkup_sleep_deps, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain wkupaon_54xx_clkdm = { @@ -592,7 +494,6 @@ static struct clockdomain wkupaon_54xx_clkdm = { .clkdm_offs = OMAP54XX_PRM_WKUPAON_CM_WKUPAON_CDOFFS, .dep_bit = OMAP54XX_WKUPAON_STATDEP_SHIFT, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain mpu0_54xx_clkdm = { @@ -602,7 +503,6 @@ static struct clockdomain mpu0_54xx_clkdm = { .cm_inst = OMAP54XX_PRCM_MPU_CM_C0_INST, .clkdm_offs = OMAP54XX_PRCM_MPU_CM_C0_CPU0_CDOFFS, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain mpu1_54xx_clkdm = { @@ -612,7 +512,6 @@ static struct clockdomain mpu1_54xx_clkdm = { .cm_inst = OMAP54XX_PRCM_MPU_CM_C1_INST, .clkdm_offs = OMAP54XX_PRCM_MPU_CM_C1_CPU1_CDOFFS, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain coreaon_54xx_clkdm = { @@ -622,7 +521,6 @@ static struct clockdomain coreaon_54xx_clkdm = { .cm_inst = OMAP54XX_CM_CORE_COREAON_INST, .clkdm_offs = OMAP54XX_CM_CORE_COREAON_COREAON_CDOFFS, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain mpu_54xx_clkdm = { @@ -634,7 +532,6 @@ static struct clockdomain mpu_54xx_clkdm = { .wkdep_srcs = mpu_wkup_sleep_deps, .sleepdep_srcs = mpu_wkup_sleep_deps, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain l3init_54xx_clkdm = { @@ -647,7 +544,6 @@ static struct clockdomain l3init_54xx_clkdm = { .wkdep_srcs = l3init_wkup_sleep_deps, .sleepdep_srcs = l3init_wkup_sleep_deps, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain dma_54xx_clkdm = { @@ -659,7 +555,6 @@ static struct clockdomain dma_54xx_clkdm = { .wkdep_srcs = dma_wkup_sleep_deps, .sleepdep_srcs = dma_wkup_sleep_deps, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain l3instr_54xx_clkdm = { @@ -668,7 +563,6 @@ static struct clockdomain l3instr_54xx_clkdm = { .prcm_partition = OMAP54XX_CM_CORE_PARTITION, .cm_inst = OMAP54XX_CM_CORE_CORE_INST, .clkdm_offs = OMAP54XX_CM_CORE_CORE_L3INSTR_CDOFFS, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain emif_54xx_clkdm = { @@ -679,7 +573,6 @@ static struct clockdomain emif_54xx_clkdm = { .clkdm_offs = OMAP54XX_CM_CORE_CORE_EMIF_CDOFFS, .dep_bit = OMAP54XX_EMIF_STATDEP_SHIFT, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain emu_54xx_clkdm = { @@ -689,7 +582,6 @@ static struct clockdomain emu_54xx_clkdm = { .cm_inst = OMAP54XX_PRM_EMU_CM_INST, .clkdm_offs = OMAP54XX_PRM_EMU_CM_EMU_CDOFFS, .flags = CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static struct clockdomain cam_54xx_clkdm = { @@ -701,7 +593,6 @@ static struct clockdomain cam_54xx_clkdm = { .wkdep_srcs = cam_wkup_sleep_deps, .sleepdep_srcs = cam_wkup_sleep_deps, .flags = CLKDM_CAN_HWSUP_SWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* As clockdomains are added or removed above, this list must also be changed */ @@ -736,5 +627,7 @@ static struct clockdomain *clockdomains_omap54xx[] __initdata = { void __init omap54xx_clockdomains_init(void) { - clkdm_init(clockdomains_omap54xx, NULL, &omap4_clkdm_operations); + clkdm_register_platform_funcs(&omap4_clkdm_operations); + clkdm_register_clkdms(clockdomains_omap54xx); + clkdm_complete_init(); } diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 5c84656b7f9c..ab991d54589e 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -29,6 +29,14 @@ #include <linux/delay.h> #include <plat/common.h> #include <asm/proc-fns.h> +#include <linux/emif.h> + +extern void __init omap_emif_set_device_details(u32 emif_nr, + struct ddr_device_info *device_info, + struct lpddr2_timings *timings, + u32 timings_arr_size, + struct ddr_min_tck *min_tck, + struct emif_custom_configs *custom_configs); #ifdef CONFIG_SOC_OMAP2420 extern void omap242x_map_common_io(void); @@ -94,6 +102,7 @@ void omap3_init_early(void); /* Do not use this one */ void am35xx_init_early(void); void ti81xx_init_early(void); void omap4430_init_early(void); +void omap54xx_init_early(void); void omap_prcm_restart(char, const char *); /* @@ -111,6 +120,7 @@ struct omap_globals { void __iomem *prm; /* Power and Reset Management */ void __iomem *cm; /* Clock Management */ void __iomem *cm2; + void __iomem *prcm_mpu; }; void omap2_set_globals_242x(void); diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index cea349bb9784..e612ac3ec006 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -254,39 +254,6 @@ static inline void omap_init_camera(void) #endif } -#if defined(CONFIG_SND_OMAP_SOC_DMIC) || \ - defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE) - -static struct omap_device_pm_latency omap_dmic_latency[] = { - { - .deactivate_func = omap_device_idle_hwmods, - .activate_func = omap_device_enable_hwmods, - .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, - }, -}; - -static void omap_init_dmic(void) -{ - struct omap_hwmod *oh; - struct omap_device *od; - - oh = omap_hwmod_lookup("dmic"); - if (!oh) { - printk(KERN_ERR "Could not look up dmic hw_mod\n"); - return; - } - - od = omap_device_build("omap-dmic-dai", -1, oh, NULL, 0, - omap_dmic_latency, - ARRAY_SIZE(omap_dmic_latency), 0); - if (IS_ERR(od)) - printk(KERN_ERR "Could not build omap_device for omap-dmic-dai\n"); -} -#else -static inline void omap_init_dmic(void) {} -#endif - - struct omap_device_pm_latency omap_keyboard_latency[] = { { .deactivate_func = omap_device_idle_hwmods, @@ -458,6 +425,7 @@ static void __init omap_init_dmic(void) } #else static inline void omap_init_dmic(void) {} +#endif #if defined(CONFIG_SND_OMAP_SOC_ABE_DSP) || \ defined(CONFIG_SND_OMAP_SOC_ABE_DSP_MODULE) diff --git a/arch/arm/mach-omap2/dpll44xx_54xx.c b/arch/arm/mach-omap2/dpll44xx_54xx.c index 89bcd2da26bc..3cbd949f9775 100644 --- a/arch/arm/mach-omap2/dpll44xx_54xx.c +++ b/arch/arm/mach-omap2/dpll44xx_54xx.c @@ -14,6 +14,7 @@ #include <linux/clk.h> #include <linux/io.h> #include <linux/bitops.h> +#include <linux/emif.h> #include <plat/cpu.h> #include <plat/clock.h> @@ -22,7 +23,7 @@ #include "clock.h" #include "clock44xx.h" #include "cm-regbits-44xx.h" -#include <mach/omap4-common.h> +#include "common.h" #include "cm.h" #include "clock44xx.h" #include "clock54xx.h" @@ -285,30 +286,6 @@ unsigned long omap4_dpll_regm4xen_recalc(struct clk *clk) return rate; } -long omap4_dpll_regm4xen_round_rate(struct clk *clk, unsigned long target_rate) -{ - u32 v; - struct dpll_data *dd; - - if (!clk || !clk->dpll_data) - return -EINVAL; - - dd = clk->dpll_data; - - /* regm4xen adds a multiplier of 4 to DPLL calculations */ - v = __raw_readl(dd->control_reg) & OMAP4430_DPLL_REGM4XEN_MASK; - - if (v) - target_rate = target_rate / OMAP4430_REGM4XEN_MULT; - - omap2_dpll_round_rate(clk, target_rate); - - if (v) - clk->dpll_data->last_rounded_rate *= OMAP4430_REGM4XEN_MULT; - - return clk->dpll_data->last_rounded_rate; -} - /* Supported only on OMAP4 */ int omap4_dpllmx_gatectrl_read(struct clk *clk) { @@ -370,35 +347,6 @@ const struct clkops clkops_omap4_dpllmx_ops = { .deny_idle = omap4_dpllmx_deny_gatectrl, }; -/** - * omap4_dpll_regm4xen_recalc - compute DPLL rate, considering REGM4XEN bit - * @clk: struct clk * of the DPLL to compute the rate for - * - * Compute the output rate for the OMAP4 DPLL represented by @clk. - * Takes the REGM4XEN bit into consideration, which is needed for the - * OMAP4 ABE DPLL. Returns the DPLL's output rate (before M-dividers) - * upon success, or 0 upon error. - */ -unsigned long omap4_dpll_regm4xen_recalc(struct clk *clk) -{ - u32 v; - unsigned long rate; - struct dpll_data *dd; - - if (!clk || !clk->dpll_data) - return 0; - - dd = clk->dpll_data; - - rate = omap2_get_dpll_rate(clk); - - /* regm4xen adds a multiplier of 4 to DPLL calculations */ - v = __raw_readl(dd->control_reg); - if (v & OMAP4430_DPLL_REGM4XEN_MASK) - rate *= OMAP4430_REGM4XEN_MULT; - - return rate; -} /** * omap4_dpll_regm4xen_round_rate - round DPLL rate, considering REGM4XEN bit diff --git a/arch/arm/mach-omap2/emif_omap.c b/arch/arm/mach-omap2/emif_omap.c index 4d13b7e78c82..4c59e61bd706 100644 --- a/arch/arm/mach-omap2/emif_omap.c +++ b/arch/arm/mach-omap2/emif_omap.c @@ -16,7 +16,7 @@ #include <linux/emif.h> #include <plat/omap_hwmod.h> #include <plat/omap_device.h> -#include <mach/omap4-common.h> +#include "common.h" static struct omap_device_pm_latency omap_emif_latency[] = { [0] = { @@ -56,7 +56,7 @@ void __init omap_emif_set_device_details(u32 emif_nr, struct ddr_min_tck *min_tck, struct emif_custom_configs *custom_configs) { - struct omap_device *od; + struct platform_device *pd; struct omap_hwmod *oh; char oh_name[10]; @@ -91,12 +91,12 @@ void __init omap_emif_set_device_details(u32 emif_nr, if (!oh) goto error; - od = omap_device_build("emif", emif_nr, oh, + pd = omap_device_build("emif", emif_nr, oh, &omap_emif_platform_data, sizeof(omap_emif_platform_data), omap_emif_latency, ARRAY_SIZE(omap_emif_latency), false); - if (!od) + if (!pd) goto error; return; diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 8263fb169142..a02a37b1bc0e 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -520,17 +520,14 @@ static void __init omap5_check_revision(void) switch (rev) { case 0: omap_revision = OMAP5430_REV_ES1_0; - omap_chip.oc |= CHIP_IS_OMAP5430ES1; break; default: omap_revision = OMAP5430_REV_ES1_0; - omap_chip.oc |= CHIP_IS_OMAP5430ES1; } break; default: /* Unknown default to latest silicon rev as default*/ omap_revision = OMAP5430_REV_ES1_0; - omap_chip.oc |= CHIP_IS_OMAP5430ES1; } pr_info("OMAP%04x ES%d.0\n", diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 93c41d0cde08..961e9d854354 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -33,7 +33,6 @@ #include "clock3xxx.h" #include "clock44xx.h" #include "clock54xx.h" -#include "io.h" #include <plat/omap-pm.h> #include <plat/omap_hwmod.h> @@ -438,76 +437,22 @@ static void __init omap_common_init_early(void) static void __init omap_hwmod_init_postsetup(void) { - u8 postsetup_state; - - if (cpu_is_omap242x()) { - omap2xxx_powerdomains_init(); - omap2xxx_clockdomains_init(); - omap2420_hwmod_init(); - } else if (cpu_is_omap243x()) { - omap2xxx_powerdomains_init(); - omap2xxx_clockdomains_init(); - omap2430_hwmod_init(); - } else if (cpu_is_omap34xx()) { - omap3xxx_powerdomains_init(); - omap3xxx_clockdomains_init(); - omap3xxx_hwmod_init(); - } else if (cpu_is_omap44xx()) { - omap44xx_powerdomains_init(); - omap44xx_clockdomains_init(); - omap44xx_hwmod_init(); - } else if (cpu_is_omap54xx()) { - omap54xx_powerdomains_init(); - omap54xx_clockdomains_init(); - omap54xx_hwmod_init(); - } else { - pr_err("Could not init hwmod data - unknown SoC\n"); - } - - /* Set the default postsetup state for all hwmods */ + u8 postsetup_state; + + /* Set the default postsetup state for all hwmods */ #ifdef CONFIG_PM_RUNTIME - postsetup_state = _HWMOD_STATE_IDLE; + postsetup_state = _HWMOD_STATE_IDLE; #else - postsetup_state = _HWMOD_STATE_ENABLED; + postsetup_state = _HWMOD_STATE_ENABLED; #endif - omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state); - - /* - * Set the default postsetup state for unusual modules (like - * MPU WDT). - * - * The postsetup_state is not actually used until - * omap_hwmod_late_init(), so boards that desire full watchdog - * coverage of kernel initialization can reprogram the - * postsetup_state between the calls to - * omap2_init_common_infra() and omap_sdrc_init(). - * - * XXX ideally we could detect whether the MPU WDT was currently - * enabled here and make this conditional - */ - postsetup_state = _HWMOD_STATE_DISABLED; - omap_hwmod_for_each_by_class("wd_timer", - _set_hwmod_postsetup_state, - &postsetup_state); - - if (cpu_is_omap54xx()) - pr_err("FIXME: omap5 opp layer init\n"); - else - omap_pm_if_early_init(); - - if (cpu_is_omap2420()) - omap2420_clk_init(); - else if (cpu_is_omap2430()) - omap2430_clk_init(); - else if (cpu_is_omap34xx()) - omap3xxx_clk_init(); - else if (cpu_is_omap44xx()) - omap4xxx_clk_init(); - else if (cpu_is_omap54xx()) - omap5xxx_clk_init(); - else - pr_err("Could not init clock framework - unknown SoC\n"); + omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state); + + postsetup_state = _HWMOD_STATE_DISABLED; + omap_hwmod_for_each_by_class("wd_timer", + _set_hwmod_postsetup_state, + &postsetup_state); + omap_pm_if_early_init(); } #ifdef CONFIG_SOC_OMAP2420 @@ -610,6 +555,23 @@ void __init omap4430_init_early(void) } #endif +#ifdef CONFIG_ARCH_OMAP5 +void __init omap54xx_init_early(void) +{ +// set_globals was called by omap_5430evm_map_io already +// omap2_set_globals_543x(); + omap_common_init_early(); + omap44xx_voltagedomains_init(); +// omap54xx_voltagedomains_init(); + omap54xx_powerdomains_init(); + omap54xx_clockdomains_init(); + omap54xx_hwmod_init(); + omap_hwmod_init_postsetup(); + pr_err("FIXME: omap5 opp layer init\n"); + omap5xxx_clk_init(); +} +#endif + void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1) { diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 5d7e19131e83..319faae00919 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -170,11 +170,11 @@ void __init smp_init_cpus(void) unsigned int i, ncores = 1; /* Static mapping, never released */ - if (cpu_is_omap44xx()) + if (cpu_is_omap44xx()) { scu_base = ioremap(OMAP44XX_SCU_BASE, SZ_256); BUG_ON(!scu_base); ncores = scu_get_core_count(scu_base); - else if (cpu_is_omap54xx()) + } else if (cpu_is_omap54xx()) ncores = get_a15_core_count(); /* sanity check */ diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index dda5580560bc..2965a77bd8e2 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1513,8 +1513,8 @@ static int _enable(struct omap_hwmod *oh) * Now that someone is really trying to enable them, * just ensure that the hwmod mux is set. */ - if (oh->_int_flags & _HWMOD_SKIP_ENABLE) || - (oh->_state == _HWMOD_STATE_ENABLED_AT_INIT) { + if ((oh->_int_flags & _HWMOD_SKIP_ENABLE) || + (oh->_state == _HWMOD_STATE_ENABLED_AT_INIT)) { /* * If the caller has mux data populated, do the mux'ing * which wouldn't have been done as part of the _enable() @@ -2001,11 +2001,8 @@ int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data), if (!fn) return -EINVAL; - list_for_each_entry(temp_oh, &omap_hwmod_list, node) { - ret = (*fn)(temp_oh, data); - if (ret) - break; - } + list_for_each_entry(temp_oh, &omap_hwmod_list, node) + (*fn)(temp_oh, data); return ret; } diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index f1115bc70b29..09a1e6d24c13 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -938,7 +938,6 @@ static struct omap_hwmod omap44xx_ctrl_module_core_hwmod = { .slaves_cnt = ARRAY_SIZE(omap44xx_ctrl_module_core_slaves), .dev_attr = &scm_dev_attr, .clkdm_name = "l4_wkup_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* @@ -5828,7 +5827,6 @@ static struct omap_hwmod omap44xx_emif1_hwmod = { }, .slaves = omap44xx_emif1_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_emif1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; /* emif2 */ @@ -5877,7 +5875,6 @@ static struct omap_hwmod omap44xx_emif2_hwmod = { }, .slaves = omap44xx_emif2_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_emif2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; static __initdata struct omap_hwmod *omap44xx_hwmods[] = { diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c index cb74152cb2b9..985d69fa45ae 100644 --- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c @@ -129,7 +129,6 @@ static struct omap_hwmod omap54xx_dmm_hwmod = { }, .slaves = omap54xx_dmm_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_dmm_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -185,7 +184,6 @@ static struct omap_hwmod omap54xx_emif_ocp_fw_hwmod = { }, .slaves = omap54xx_emif_ocp_fw_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_emif_ocp_fw_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -232,7 +230,6 @@ static struct omap_hwmod omap54xx_l3_instr_hwmod = { }, .slaves = omap54xx_l3_instr_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_l3_instr_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* l3_main_1 */ @@ -333,7 +330,6 @@ static struct omap_hwmod omap54xx_l3_main_1_hwmod = { }, .slaves = omap54xx_l3_main_1_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_l3_main_1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* l3_main_2 */ @@ -462,7 +458,6 @@ static struct omap_hwmod omap54xx_l3_main_2_hwmod = { }, .slaves = omap54xx_l3_main_2_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_l3_main_2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* l3_main_3 */ @@ -520,7 +515,6 @@ static struct omap_hwmod omap54xx_l3_main_3_hwmod = { }, .slaves = omap54xx_l3_main_3_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_l3_main_3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -614,7 +608,6 @@ static struct omap_hwmod omap54xx_l4_abe_hwmod = { }, .slaves = omap54xx_l4_abe_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_l4_abe_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* l4_cfg */ @@ -643,7 +636,6 @@ static struct omap_hwmod omap54xx_l4_cfg_hwmod = { }, .slaves = omap54xx_l4_cfg_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_l4_cfg_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* l4_per */ @@ -672,7 +664,6 @@ static struct omap_hwmod omap54xx_l4_per_hwmod = { }, .slaves = omap54xx_l4_per_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_l4_per_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* l4_wkup */ @@ -701,7 +692,6 @@ static struct omap_hwmod omap54xx_l4_wkup_hwmod = { }, .slaves = omap54xx_l4_wkup_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_l4_wkup_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -732,7 +722,6 @@ static struct omap_hwmod omap54xx_mpu_private_hwmod = { .clkdm_name = "mpu_clkdm", .slaves = omap54xx_mpu_private_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_mpu_private_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -918,7 +907,6 @@ static struct omap_hwmod omap54xx_aess_hwmod = { .slaves_cnt = ARRAY_SIZE(omap54xx_aess_slaves), .masters = omap54xx_aess_masters, .masters_cnt = ARRAY_SIZE(omap54xx_aess_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -984,7 +972,6 @@ static struct omap_hwmod omap54xx_ctrl_module_core_hwmod = { .slaves_cnt = ARRAY_SIZE(omap54xx_ctrl_module_core_slaves), .dev_attr = &scm_dev_attr, .clkdm_name = "l4cfg_clkdm", - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -1044,7 +1031,6 @@ static struct omap_hwmod omap54xx_counter_32k_hwmod = { }, .slaves = omap54xx_counter_32k_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_counter_32k_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -1132,7 +1118,6 @@ static struct omap_hwmod omap54xx_dma_system_hwmod = { .slaves_cnt = ARRAY_SIZE(omap54xx_dma_system_slaves), .masters = omap54xx_dma_system_masters, .masters_cnt = ARRAY_SIZE(omap54xx_dma_system_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -1225,7 +1210,6 @@ static struct omap_hwmod omap54xx_dmic_hwmod = { }, .slaves = omap54xx_dmic_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_dmic_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -1296,7 +1280,6 @@ static struct omap_hwmod omap54xx_dsp_hwmod = { .slaves_cnt = ARRAY_SIZE(omap54xx_dsp_slaves), .masters = omap54xx_dsp_masters, .masters_cnt = ARRAY_SIZE(omap54xx_dsp_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -1381,7 +1364,6 @@ static struct omap_hwmod omap54xx_dss_hwmod = { .slaves_cnt = ARRAY_SIZE(omap54xx_dss_slaves), .masters = omap54xx_dss_masters, .masters_cnt = ARRAY_SIZE(omap54xx_dss_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -1482,7 +1464,6 @@ static struct omap_hwmod omap54xx_dss_dispc_hwmod = { .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks), .slaves = omap54xx_dss_dispc_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_dss_dispc_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -1574,7 +1555,6 @@ static struct omap_hwmod omap54xx_dss_dsi1_a_hwmod = { }, .slaves = omap54xx_dss_dsi1_a_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_dss_dsi1_a_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* dss_dsi1_b */ @@ -1633,7 +1613,6 @@ static struct omap_hwmod omap54xx_dss_dsi1_b_hwmod = { }, .slaves = omap54xx_dss_dsi1_b_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_dss_dsi1_b_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* dss_dsi1_c */ @@ -1704,7 +1683,6 @@ static struct omap_hwmod omap54xx_dss_dsi1_c_hwmod = { }, .slaves = omap54xx_dss_dsi1_c_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_dss_dsi1_c_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -1802,7 +1780,6 @@ static struct omap_hwmod omap54xx_dss_hdmi_hwmod = { .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks), .slaves = omap54xx_dss_hdmi_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_dss_hdmi_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -1893,7 +1870,6 @@ static struct omap_hwmod omap54xx_dss_rfbi_hwmod = { .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), .slaves = omap54xx_dss_rfbi_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_dss_rfbi_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -1960,7 +1936,6 @@ static struct omap_hwmod omap54xx_emif1_hwmod = { }, .slaves = omap54xx_emif1_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_emif1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }; /* emif2 */ @@ -2018,7 +1993,6 @@ static struct omap_hwmod omap54xx_emif2_hwmod = { }, .slaves = omap54xx_emif2_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_emif2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX) }; /* @@ -2101,7 +2075,6 @@ static struct omap_hwmod omap54xx_gpio1_hwmod = { .dev_attr = &gpio_dev_attr, .slaves = omap54xx_gpio1_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_gpio1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* gpio2 */ @@ -2156,7 +2129,6 @@ static struct omap_hwmod omap54xx_gpio2_hwmod = { .dev_attr = &gpio_dev_attr, .slaves = omap54xx_gpio2_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_gpio2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* gpio3 */ @@ -2211,7 +2183,6 @@ static struct omap_hwmod omap54xx_gpio3_hwmod = { .dev_attr = &gpio_dev_attr, .slaves = omap54xx_gpio3_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_gpio3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* gpio4 */ @@ -2266,7 +2237,6 @@ static struct omap_hwmod omap54xx_gpio4_hwmod = { .dev_attr = &gpio_dev_attr, .slaves = omap54xx_gpio4_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_gpio4_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* gpio5 */ @@ -2321,7 +2291,6 @@ static struct omap_hwmod omap54xx_gpio5_hwmod = { .dev_attr = &gpio_dev_attr, .slaves = omap54xx_gpio5_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_gpio5_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* gpio6 */ @@ -2376,7 +2345,6 @@ static struct omap_hwmod omap54xx_gpio6_hwmod = { .dev_attr = &gpio_dev_attr, .slaves = omap54xx_gpio6_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_gpio6_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* gpio7 */ @@ -2431,7 +2399,6 @@ static struct omap_hwmod omap54xx_gpio7_hwmod = { .dev_attr = &gpio_dev_attr, .slaves = omap54xx_gpio7_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_gpio7_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* gpio8 */ @@ -2486,7 +2453,6 @@ static struct omap_hwmod omap54xx_gpio8_hwmod = { .dev_attr = &gpio_dev_attr, .slaves = omap54xx_gpio8_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_gpio8_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -2560,7 +2526,6 @@ static struct omap_hwmod omap54xx_gpmc_hwmod = { }, .slaves = omap54xx_gpmc_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_gpmc_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -2634,7 +2599,6 @@ static struct omap_hwmod omap54xx_gpu_hwmod = { .slaves_cnt = ARRAY_SIZE(omap54xx_gpu_slaves), .masters = omap54xx_gpu_masters, .masters_cnt = ARRAY_SIZE(omap54xx_gpu_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -2714,7 +2678,6 @@ static struct omap_hwmod omap54xx_hsi_hwmod = { .slaves_cnt = ARRAY_SIZE(omap54xx_hsi_slaves), .masters = omap54xx_hsi_masters, .masters_cnt = ARRAY_SIZE(omap54xx_hsi_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -2784,7 +2747,7 @@ static struct omap_hwmod omap54xx_i2c1_hwmod = { .name = "i2c1", .class = &omap54xx_i2c_hwmod_class, .clkdm_name = "l4per_clkdm", - .flags = HWMOD_16BIT_REG, + .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT, .mpu_irqs = omap54xx_i2c1_irqs, .sdma_reqs = omap54xx_i2c1_sdma_reqs, .main_clk = "func_96m_fclk", @@ -2797,7 +2760,7 @@ static struct omap_hwmod omap54xx_i2c1_hwmod = { }, .slaves = omap54xx_i2c1_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_i2c1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), + .dev_attr = &i2c_dev_attr, }; /* i2c2 */ @@ -2840,7 +2803,7 @@ static struct omap_hwmod omap54xx_i2c2_hwmod = { .name = "i2c2", .class = &omap54xx_i2c_hwmod_class, .clkdm_name = "l4per_clkdm", - .flags = HWMOD_16BIT_REG, + .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT, .mpu_irqs = omap54xx_i2c2_irqs, .sdma_reqs = omap54xx_i2c2_sdma_reqs, .main_clk = "func_96m_fclk", @@ -2853,7 +2816,7 @@ static struct omap_hwmod omap54xx_i2c2_hwmod = { }, .slaves = omap54xx_i2c2_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_i2c2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), + .dev_attr = &i2c_dev_attr, }; /* i2c3 */ @@ -2896,7 +2859,7 @@ static struct omap_hwmod omap54xx_i2c3_hwmod = { .name = "i2c3", .class = &omap54xx_i2c_hwmod_class, .clkdm_name = "l4per_clkdm", - .flags = HWMOD_16BIT_REG, + .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT, .mpu_irqs = omap54xx_i2c3_irqs, .sdma_reqs = omap54xx_i2c3_sdma_reqs, .main_clk = "func_96m_fclk", @@ -2909,7 +2872,7 @@ static struct omap_hwmod omap54xx_i2c3_hwmod = { }, .slaves = omap54xx_i2c3_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_i2c3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), + .dev_attr = &i2c_dev_attr, }; /* i2c4 */ @@ -2952,7 +2915,7 @@ static struct omap_hwmod omap54xx_i2c4_hwmod = { .name = "i2c4", .class = &omap54xx_i2c_hwmod_class, .clkdm_name = "l4per_clkdm", - .flags = HWMOD_16BIT_REG, + .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT, .mpu_irqs = omap54xx_i2c4_irqs, .sdma_reqs = omap54xx_i2c4_sdma_reqs, .main_clk = "func_96m_fclk", @@ -2965,7 +2928,7 @@ static struct omap_hwmod omap54xx_i2c4_hwmod = { }, .slaves = omap54xx_i2c4_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_i2c4_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), + .dev_attr = &i2c_dev_attr, }; /* i2c5 */ @@ -3002,7 +2965,7 @@ static struct omap_hwmod omap54xx_i2c5_hwmod = { .name = "i2c5", .class = &omap54xx_i2c_hwmod_class, .clkdm_name = "l4per_clkdm", - .flags = HWMOD_16BIT_REG, + .flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT, .mpu_irqs = omap54xx_i2c5_irqs, .main_clk = "func_96m_fclk", .prcm = { @@ -3014,7 +2977,7 @@ static struct omap_hwmod omap54xx_i2c5_hwmod = { }, .slaves = omap54xx_i2c5_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_i2c5_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), + .dev_attr = &i2c_dev_attr, }; /* @@ -3086,7 +3049,6 @@ static struct omap_hwmod omap54xx_ipu_hwmod = { .slaves_cnt = ARRAY_SIZE(omap54xx_ipu_slaves), .masters = omap54xx_ipu_masters, .masters_cnt = ARRAY_SIZE(omap54xx_ipu_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -3180,7 +3142,6 @@ static struct omap_hwmod omap54xx_iss_hwmod = { .slaves_cnt = ARRAY_SIZE(omap54xx_iss_slaves), .masters = omap54xx_iss_masters, .masters_cnt = ARRAY_SIZE(omap54xx_iss_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -3266,7 +3227,6 @@ static struct omap_hwmod omap54xx_iva_hwmod = { .slaves_cnt = ARRAY_SIZE(omap54xx_iva_slaves), .masters = omap54xx_iva_masters, .masters_cnt = ARRAY_SIZE(omap54xx_iva_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -3333,7 +3293,6 @@ static struct omap_hwmod omap54xx_kbd_hwmod = { }, .slaves = omap54xx_kbd_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_kbd_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -3399,7 +3358,6 @@ static struct omap_hwmod omap54xx_mailbox_hwmod = { }, .slaves = omap54xx_mailbox_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_mailbox_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -3494,7 +3452,6 @@ static struct omap_hwmod omap54xx_mcbsp1_hwmod = { }, .slaves = omap54xx_mcbsp1_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_mcbsp1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* mcbsp2 */ @@ -3570,7 +3527,6 @@ static struct omap_hwmod omap54xx_mcbsp2_hwmod = { }, .slaves = omap54xx_mcbsp2_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_mcbsp2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* mcbsp3 */ @@ -3646,7 +3602,6 @@ static struct omap_hwmod omap54xx_mcbsp3_hwmod = { }, .slaves = omap54xx_mcbsp3_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_mcbsp3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -3741,7 +3696,6 @@ static struct omap_hwmod omap54xx_mcpdm_hwmod = { }, .slaves = omap54xx_mcpdm_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_mcpdm_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -3830,7 +3784,6 @@ static struct omap_hwmod omap54xx_mcspi1_hwmod = { .dev_attr = &mcspi1_dev_attr, .slaves = omap54xx_mcspi1_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_mcspi1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* mcspi2 */ @@ -3893,7 +3846,6 @@ static struct omap_hwmod omap54xx_mcspi2_hwmod = { .dev_attr = &mcspi2_dev_attr, .slaves = omap54xx_mcspi2_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_mcspi2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* mcspi3 */ @@ -3956,7 +3908,6 @@ static struct omap_hwmod omap54xx_mcspi3_hwmod = { .dev_attr = &mcspi3_dev_attr, .slaves = omap54xx_mcspi3_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_mcspi3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* mcspi4 */ @@ -4017,7 +3968,6 @@ static struct omap_hwmod omap54xx_mcspi4_hwmod = { .dev_attr = &mcspi4_dev_attr, .slaves = omap54xx_mcspi4_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_mcspi4_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -4106,7 +4056,6 @@ static struct omap_hwmod omap54xx_mmc1_hwmod = { .slaves_cnt = ARRAY_SIZE(omap54xx_mmc1_slaves), .masters = omap54xx_mmc1_masters, .masters_cnt = ARRAY_SIZE(omap54xx_mmc1_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* mmc2 */ @@ -4167,7 +4116,6 @@ static struct omap_hwmod omap54xx_mmc2_hwmod = { .slaves_cnt = ARRAY_SIZE(omap54xx_mmc2_slaves), .masters = omap54xx_mmc2_masters, .masters_cnt = ARRAY_SIZE(omap54xx_mmc2_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* mmc3 */ @@ -4222,7 +4170,6 @@ static struct omap_hwmod omap54xx_mmc3_hwmod = { }, .slaves = omap54xx_mmc3_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_mmc3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* mmc4 */ @@ -4277,7 +4224,6 @@ static struct omap_hwmod omap54xx_mmc4_hwmod = { }, .slaves = omap54xx_mmc4_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_mmc4_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* mmc5 */ @@ -4332,7 +4278,6 @@ static struct omap_hwmod omap54xx_mmc5_hwmod = { }, .slaves = omap54xx_mmc5_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_mmc5_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -4399,7 +4344,6 @@ static struct omap_hwmod omap54xx_mpu_hwmod = { .slaves_cnt = ARRAY_SIZE(omap54xx_mpu_slaves), .masters = omap54xx_mpu_masters, .masters_cnt = ARRAY_SIZE(omap54xx_mpu_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -4461,7 +4405,6 @@ static struct omap_hwmod omap54xx_ocp2scp3_hwmod = { }, .slaves = omap54xx_ocp2scp3_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_ocp2scp3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -4575,7 +4518,6 @@ static struct omap_hwmod omap54xx_sata_hwmod = { .masters = omap54xx_sata_masters, .masters_cnt = ARRAY_SIZE(omap54xx_sata_masters), .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -4650,7 +4592,6 @@ static struct omap_hwmod omap54xx_smartreflex_core_hwmod = { }, .slaves = omap54xx_smartreflex_core_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_smartreflex_core_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* smartreflex_mm */ @@ -4699,7 +4640,6 @@ static struct omap_hwmod omap54xx_smartreflex_mm_hwmod = { }, .slaves = omap54xx_smartreflex_mm_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_smartreflex_mm_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* smartreflex_mpu */ @@ -4748,7 +4688,6 @@ static struct omap_hwmod omap54xx_smartreflex_mpu_hwmod = { }, .slaves = omap54xx_smartreflex_mpu_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_smartreflex_mpu_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -4811,7 +4750,6 @@ static struct omap_hwmod omap54xx_spinlock_hwmod = { }, .slaves = omap54xx_spinlock_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_spinlock_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -4895,7 +4833,6 @@ static struct omap_hwmod omap54xx_timer1_hwmod = { }, .slaves = omap54xx_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_timer1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* timer2 */ @@ -4943,7 +4880,6 @@ static struct omap_hwmod omap54xx_timer2_hwmod = { }, .slaves = omap54xx_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_timer2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* timer3 */ @@ -4991,7 +4927,6 @@ static struct omap_hwmod omap54xx_timer3_hwmod = { }, .slaves = omap54xx_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_timer3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* timer4 */ @@ -5039,7 +4974,6 @@ static struct omap_hwmod omap54xx_timer4_hwmod = { }, .slaves = omap54xx_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_timer4_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* timer5 */ @@ -5106,7 +5040,6 @@ static struct omap_hwmod omap54xx_timer5_hwmod = { }, .slaves = omap54xx_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_timer5_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* timer6 */ @@ -5173,7 +5106,6 @@ static struct omap_hwmod omap54xx_timer6_hwmod = { }, .slaves = omap54xx_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_timer6_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* timer7 */ @@ -5240,7 +5172,6 @@ static struct omap_hwmod omap54xx_timer7_hwmod = { }, .slaves = omap54xx_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_timer7_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* timer8 */ @@ -5307,7 +5238,6 @@ static struct omap_hwmod omap54xx_timer8_hwmod = { }, .slaves = omap54xx_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_timer8_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* timer9 */ @@ -5355,7 +5285,6 @@ static struct omap_hwmod omap54xx_timer9_hwmod = { }, .slaves = omap54xx_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_timer9_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* timer10 */ @@ -5403,7 +5332,6 @@ static struct omap_hwmod omap54xx_timer10_hwmod = { }, .slaves = omap54xx_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_timer10_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* timer11 */ @@ -5451,7 +5379,6 @@ static struct omap_hwmod omap54xx_timer11_hwmod = { }, .slaves = omap54xx_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_timer11_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -5527,7 +5454,6 @@ static struct omap_hwmod omap54xx_uart1_hwmod = { }, .slaves = omap54xx_uart1_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_uart1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* uart2 */ @@ -5582,7 +5508,6 @@ static struct omap_hwmod omap54xx_uart2_hwmod = { }, .slaves = omap54xx_uart2_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_uart2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* uart3 */ @@ -5638,7 +5563,6 @@ static struct omap_hwmod omap54xx_uart3_hwmod = { }, .slaves = omap54xx_uart3_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_uart3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* uart4 */ @@ -5693,7 +5617,6 @@ static struct omap_hwmod omap54xx_uart4_hwmod = { }, .slaves = omap54xx_uart4_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_uart4_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* uart5 */ @@ -5748,7 +5671,6 @@ static struct omap_hwmod omap54xx_uart5_hwmod = { }, .slaves = omap54xx_uart5_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_uart5_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* uart6 */ @@ -5803,7 +5725,6 @@ static struct omap_hwmod omap54xx_uart6_hwmod = { }, .slaves = omap54xx_uart6_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_uart6_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -5889,7 +5810,6 @@ static struct omap_hwmod omap54xx_usb_otg_ss_hwmod = { .slaves_cnt = ARRAY_SIZE(omap54xx_usb_otg_ss_slaves), .masters = omap54xx_usb_otg_ss_masters, .masters_cnt = ARRAY_SIZE(omap54xx_usb_otg_ss_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -6038,7 +5958,6 @@ static struct omap_hwmod omap54xx_usb_host_hs_hwmod = { */ .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY | HWMOD_INIT_NO_RESET, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; @@ -6115,7 +6034,6 @@ static struct omap_hwmod omap54xx_usb_tll_hs_hwmod = { .opt_clks_cnt = ARRAY_SIZE(usb_tll_hs_opt_clks), .slaves = omap54xx_usb_tll_hs_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_usb_tll_hs_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* @@ -6186,7 +6104,6 @@ static struct omap_hwmod omap54xx_wd_timer2_hwmod = { }, .slaves = omap54xx_wd_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_wd_timer2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; /* wd_timer3 */ @@ -6253,7 +6170,6 @@ static struct omap_hwmod omap54xx_wd_timer3_hwmod = { }, .slaves = omap54xx_wd_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap54xx_wd_timer3_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), }; static __initdata struct omap_hwmod *omap54xx_hwmods[] = { diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c index 2293ba27101b..d562a4527d90 100644 --- a/arch/arm/mach-omap2/opp4xxx_data.c +++ b/arch/arm/mach-omap2/opp4xxx_data.c @@ -64,6 +64,7 @@ struct omap_volt_data omap44xx_vdd_core_volt_data[] = { VOLT_DATA_DEFINE(0, 0, 0, 0), }; +#ifdef CONFIG_PM_OPP static struct omap_opp_def __initdata omap44xx_opp_def_list[] = { /* MPU OPP1 - OPP50 */ @@ -103,3 +104,4 @@ int __init omap4_opp_init(void) return r; } device_initcall(omap4_opp_init); +#endif diff --git a/arch/arm/mach-omap2/powerdomains54xx_data.c b/arch/arm/mach-omap2/powerdomains54xx_data.c index 335937d89b01..2576e55d1ba2 100644 --- a/arch/arm/mach-omap2/powerdomains54xx_data.c +++ b/arch/arm/mach-omap2/powerdomains54xx_data.c @@ -33,9 +33,9 @@ /* core_54xx_pwrdm: CORE power domain */ static struct powerdomain core_54xx_pwrdm = { .name = "core_pwrdm", + .voltdm = { .name = "core" }, .prcm_offs = OMAP54XX_PRM_CORE_INST, .prcm_partition = OMAP54XX_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), .pwrsts = PWRSTS_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 5, @@ -59,9 +59,9 @@ static struct powerdomain core_54xx_pwrdm = { /* abe_54xx_pwrdm: Audio back end power domain */ static struct powerdomain abe_54xx_pwrdm = { .name = "abe_pwrdm", + .voltdm = { .name = "iva" }, .prcm_offs = OMAP54XX_PRM_ABE_INST, .prcm_partition = OMAP54XX_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF, .banks = 2, @@ -79,18 +79,18 @@ static struct powerdomain abe_54xx_pwrdm = { /* coreaon_54xx_pwrdm: Always ON logic that sits in VDD_CORE voltage domain */ static struct powerdomain coreaon_54xx_pwrdm = { .name = "coreaon_pwrdm", + .voltdm = { .name = "core" }, .prcm_offs = OMAP54XX_PRM_COREAON_INST, .prcm_partition = OMAP54XX_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), .pwrsts = PWRSTS_ON, }; /* dss_54xx_pwrdm: Display subsystem power domain */ static struct powerdomain dss_54xx_pwrdm = { .name = "dss_pwrdm", + .voltdm = { .name = "core" }, .prcm_offs = OMAP54XX_PRM_DSS_INST, .prcm_partition = OMAP54XX_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF, .banks = 1, @@ -106,9 +106,9 @@ static struct powerdomain dss_54xx_pwrdm = { /* cpu0_54xx_pwrdm: MPU0 processor and Neon coprocessor power domain */ static struct powerdomain cpu0_54xx_pwrdm = { .name = "cpu0_pwrdm", + .voltdm = { .name = "mpu" }, .prcm_offs = OMAP54XX_PRCM_MPU_PRM_C0_INST, .prcm_partition = OMAP54XX_PRCM_MPU_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 1, @@ -123,9 +123,9 @@ static struct powerdomain cpu0_54xx_pwrdm = { /* cpu1_54xx_pwrdm: MPU1 processor and Neon coprocessor power domain */ static struct powerdomain cpu1_54xx_pwrdm = { .name = "cpu1_pwrdm", + .voltdm = { .name = "mpu" }, .prcm_offs = OMAP54XX_PRCM_MPU_PRM_C1_INST, .prcm_partition = OMAP54XX_PRCM_MPU_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 1, @@ -141,9 +141,9 @@ static struct powerdomain cpu1_54xx_pwrdm = { /* emu_54xx_pwrdm: Emulation power domain */ static struct powerdomain emu_54xx_pwrdm = { .name = "emu_pwrdm", + .voltdm = { .name = "wakeup" }, .prcm_offs = OMAP54XX_PRM_EMU_INST, .prcm_partition = OMAP54XX_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), .pwrsts = PWRSTS_OFF_ON, .banks = 1, .pwrsts_mem_ret = { @@ -157,9 +157,9 @@ static struct powerdomain emu_54xx_pwrdm = { /* mpu_54xx_pwrdm: Modena processor and the Neon coprocessor power domain */ static struct powerdomain mpu_54xx_pwrdm = { .name = "mpu_pwrdm", + .voltdm = { .name = "mpu" }, .prcm_offs = OMAP54XX_PRM_MPU_INST, .prcm_partition = OMAP54XX_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), .pwrsts = PWRSTS_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 2, @@ -176,9 +176,9 @@ static struct powerdomain mpu_54xx_pwrdm = { /* custefuse_54xx_pwrdm: Customer efuse controller power domain */ static struct powerdomain custefuse_54xx_pwrdm = { .name = "custefuse_pwrdm", + .voltdm = { .name = "core" }, .prcm_offs = OMAP54XX_PRM_CUSTEFUSE_INST, .prcm_partition = OMAP54XX_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), .pwrsts = PWRSTS_OFF_ON, .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, }; @@ -186,9 +186,9 @@ static struct powerdomain custefuse_54xx_pwrdm = { /* dsp_54xx_pwrdm: Tesla processor power domain */ static struct powerdomain dsp_54xx_pwrdm = { .name = "dsp_pwrdm", + .voltdm = { .name = "iva" }, .prcm_offs = OMAP54XX_PRM_DSP_INST, .prcm_partition = OMAP54XX_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 3, @@ -208,9 +208,9 @@ static struct powerdomain dsp_54xx_pwrdm = { /* cam_54xx_pwrdm: Camera subsystem power domain */ static struct powerdomain cam_54xx_pwrdm = { .name = "cam_pwrdm", + .voltdm = { .name = "iva" }, .prcm_offs = OMAP54XX_PRM_CAM_INST, .prcm_partition = OMAP54XX_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), .pwrsts = PWRSTS_OFF_ON, .banks = 1, .pwrsts_mem_ret = { @@ -225,9 +225,9 @@ static struct powerdomain cam_54xx_pwrdm = { /* l3init_54xx_pwrdm: L3 initators pheripherals power domain */ static struct powerdomain l3init_54xx_pwrdm = { .name = "l3init_pwrdm", + .voltdm = { .name = "core" }, .prcm_offs = OMAP54XX_PRM_L3INIT_INST, .prcm_partition = OMAP54XX_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), .pwrsts = PWRSTS_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 2, @@ -245,9 +245,9 @@ static struct powerdomain l3init_54xx_pwrdm = { /* l4per_54xx_pwrdm: Target peripherals power domain */ static struct powerdomain l4per_54xx_pwrdm = { .name = "l4per_pwrdm", + .voltdm = { .name = "core" }, .prcm_offs = OMAP54XX_PRM_L4PER_INST, .prcm_partition = OMAP54XX_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), .pwrsts = PWRSTS_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF_RET, .banks = 2, @@ -265,9 +265,9 @@ static struct powerdomain l4per_54xx_pwrdm = { /* gpu_54xx_pwrdm: 3D accelerator power domain */ static struct powerdomain gpu_54xx_pwrdm = { .name = "gpu_pwrdm", + .voltdm = { .name = "core" }, .prcm_offs = OMAP54XX_PRM_GPU_INST, .prcm_partition = OMAP54XX_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), .pwrsts = PWRSTS_OFF_ON, .banks = 1, .pwrsts_mem_ret = { @@ -282,9 +282,9 @@ static struct powerdomain gpu_54xx_pwrdm = { /* wkupaon_54xx_pwrdm: Wake-up power domain */ static struct powerdomain wkupaon_54xx_pwrdm = { .name = "wkupaon_pwrdm", + .voltdm = { .name = "wakeup" }, .prcm_offs = OMAP54XX_PRM_WKUPAON_INST, .prcm_partition = OMAP54XX_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), .pwrsts = PWRSTS_ON, .banks = 1, .pwrsts_mem_ret = { @@ -297,9 +297,9 @@ static struct powerdomain wkupaon_54xx_pwrdm = { /* iva_54xx_pwrdm: IVA-HD power domain */ static struct powerdomain iva_54xx_pwrdm = { .name = "iva_pwrdm", + .voltdm = { .name = "iva" }, .prcm_offs = OMAP54XX_PRM_IVA_INST, .prcm_partition = OMAP54XX_PRM_PARTITION, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP54XX), .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRSTS_OFF, .banks = 4, @@ -348,5 +348,7 @@ static struct powerdomain *powerdomains_omap54xx[] __initdata = { void __init omap54xx_powerdomains_init(void) { - pwrdm_init(powerdomains_omap54xx, &omap5_pwrdm_operations); + pwrdm_register_platform_funcs(&omap5_pwrdm_operations); + pwrdm_register_pwrdms(powerdomains_omap54xx); + pwrdm_complete_init(); } diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c index e848b3b0e83c..823e77a53bae 100644 --- a/arch/arm/mach-omap2/prcm.c +++ b/arch/arm/mach-omap2/prcm.c @@ -156,11 +156,15 @@ void __init omap2_set_globals_prcm(struct omap_globals *omap2_globals) cm_base = omap2_globals->cm; if (omap2_globals->cm2) cm2_base = omap2_globals->cm2; +#if 0 /* !!! ioremap needed? */ if (omap2_globals->prcm_mpu) { - prcm_mpu_base = ioremap(omap2_globals->prcm_mpu, SZ_8K); + prcm_mpu_base = ioremap((unsigned long)omap2_globals->prcm_mpu, SZ_8K); WARN_ON(!prcm_mpu_base); } +#else + prcm_mpu_base = omap2_globals->prcm_mpu; +#endif if (cpu_is_omap44xx() || cpu_is_omap54xx()) { omap4_prm_base_init(); diff --git a/arch/arm/mach-omap2/sata.c b/arch/arm/mach-omap2/sata.c index 0dc6cc368892..95046ee84f3c 100644 --- a/arch/arm/mach-omap2/sata.c +++ b/arch/arm/mach-omap2/sata.c @@ -306,7 +306,6 @@ static void omap_ahci_plat_exit(struct device *dev) void __init omap_sata_init(void) { struct omap_hwmod *hwmod[2]; - struct omap_device *od; struct platform_device *pdev; struct device *dev; int oh_cnt = 1; @@ -330,16 +329,15 @@ void __init omap_sata_init(void) else pr_err("Could not look up %s\n", OMAP_OCP2SCP3_HWMODNAME); - od = omap_device_build_ss(AHCI_PLAT_DEVNAME, -1, hwmod, oh_cnt, + pdev = omap_device_build_ss(AHCI_PLAT_DEVNAME, -1, hwmod, oh_cnt, (void *) &sata_pdata, sizeof(sata_pdata), omap_sata_latency, ARRAY_SIZE(omap_sata_latency), false); - if (IS_ERR(od)) { + if (IS_ERR(pdev)) { pr_err("Could not build hwmod device %s\n", OMAP_SATA_HWMODNAME); return; } - pdev = &od->pdev; dev = &pdev->dev; get_device(dev); dev->dma_mask = &sata_dmamask; diff --git a/arch/arm/mach-omap2/scm_device.c b/arch/arm/mach-omap2/scm_device.c index 452430d84227..5ead057ae144 100644 --- a/arch/arm/mach-omap2/scm_device.c +++ b/arch/arm/mach-omap2/scm_device.c @@ -34,7 +34,7 @@ static DEFINE_IDR(scm_device_idr); static int scm_dev_init(struct omap_hwmod *oh, void *user) { struct omap4plus_scm_pdata *scm_pdata; - struct omap_device *od; + struct platform_device *pd; struct omap4plus_scm_dev_attr *scm_dev_attr; int ret = 0; int num; @@ -42,7 +42,7 @@ static int scm_dev_init(struct omap_hwmod *oh, void *user) scm_pdata = kzalloc(sizeof(*scm_pdata), GFP_KERNEL); if (!scm_pdata) { - dev_err(&oh->od->pdev.dev, + dev_err(&oh->od->pdev->dev, "Unable to allocate memory for scm pdata\n"); return -ENOMEM; } @@ -59,13 +59,13 @@ static int scm_dev_init(struct omap_hwmod *oh, void *user) if (cpu_is_omap446x()) scm_pdata->accurate = 1; - od = omap_device_build("omap4plus_scm", num, + pd = omap_device_build("omap4plus_scm", num, oh, scm_pdata, sizeof(*scm_pdata), NULL, 0, false); - if (IS_ERR(od)) { - dev_warn(&oh->od->pdev.dev, + if (IS_ERR(pd)) { + dev_warn(&oh->od->pdev->dev, "Could not build omap_device for %s\n", oh->name); - ret = PTR_ERR(od); + ret = PTR_ERR(pd); } fail_id: diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 3a8fddebd40c..dbfdb9affd9c 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -65,6 +65,29 @@ static u8 console_uart_id = -1; static u8 no_console_suspend; static u8 uart_debug; +static int uart_idle_hwmod(struct omap_device *od) +{ + omap_hwmod_idle(od->hwmods[0]); + + return 0; +} + +static int uart_enable_hwmod(struct omap_device *od) +{ + omap_hwmod_enable(od->hwmods[0]); + + return 0; +} + + +static struct omap_device_pm_latency omap_uart_latency[] = { + { + .deactivate_func = uart_idle_hwmod, + .activate_func = uart_enable_hwmod, + .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, + }, +}; + #define DEFAULT_RXDMA_POLLRATE 1 /* RX DMA polling rate (us) */ #define DEFAULT_RXDMA_BUFSIZE 4096 /* RX DMA buffer size */ #define DEFAULT_RXDMA_TIMEOUT (3 * HZ)/* RX DMA timeout (jiffies) */ @@ -237,6 +260,9 @@ core_initcall(omap_serial_early_init); void __init omap_serial_init_port(struct omap_board_data *bdata, struct omap_uart_port_info *info) { + +#if 0 + struct omap_uart_state *uart; struct omap_hwmod *oh; struct platform_device *pdev; @@ -387,6 +413,77 @@ void __init omap_serial_init_port(struct omap_board_data *bdata, /* Enable the MDR1 errata for OMAP3 */ if (cpu_is_omap34xx() && !cpu_is_ti816x()) uart->errata |= UART_ERRATA_i202_MDR1_ACCESS; +#endif +#else + struct omap_uart_state *uart; + struct omap_hwmod *oh; + struct platform_device *pd; + void *pdata = NULL; + u32 pdata_size = 0; + char *name; + struct omap_uart_port_info omap_up; + + if (WARN_ON(!bdata)) + return; + if (WARN_ON(bdata->id < 0)) + return; + if (WARN_ON(bdata->id >= num_uarts)) + return; + + list_for_each_entry(uart, &uart_list, node) + if (bdata->id == uart->num) + break; + if (!info) + info = omap_serial_default_info; + + oh = uart->oh; + name = DRIVER_NAME; + + omap_up.dma_enabled = info->dma_enabled; + omap_up.uartclk = OMAP24XX_BASE_BAUD * 16; + omap_up.flags = UPF_BOOT_AUTOCONF; + omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count; + omap_up.set_forceidle = omap_uart_set_smartidle; + omap_up.set_noidle = omap_uart_set_noidle; + omap_up.enable_wakeup = omap_uart_enable_wakeup; + omap_up.dma_rx_buf_size = info->dma_rx_buf_size; + omap_up.dma_rx_timeout = info->dma_rx_timeout; + omap_up.dma_rx_poll_rate = info->dma_rx_poll_rate; + omap_up.autosuspend_timeout = info->autosuspend_timeout; + omap_up.wer = info->wer; + + /* Enable the MDR1 Errata i202 for OMAP2430/3xxx/44xx */ + if (!cpu_is_omap2420() && !cpu_is_ti816x()) + omap_up.errata |= UART_ERRATA_i202_MDR1_ACCESS; + + /* Enable DMA Mode Force Idle Errata i291 for omap34xx/3630 */ + if (cpu_is_omap34xx() || cpu_is_omap3630()) + omap_up.errata |= UART_ERRATA_i291_DMA_FORCEIDLE; + + pdata = &omap_up; + pdata_size = sizeof(struct omap_uart_port_info); + + if (WARN_ON(!oh)) + return; + + pd = omap_device_build(name, uart->num, oh, pdata, pdata_size, + omap_uart_latency, + ARRAY_SIZE(omap_uart_latency), false); + WARN(IS_ERR(pd), "Could not build omap_device for %s: %s.\n", + name, oh->name); + + if ((console_uart_id == bdata->id) && no_console_suspend) + omap_device_disable_idle_on_suspend(pd); + + oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); + + uart->pdev = pd; + + oh->dev_attr = uart; + if ((cpu_is_omap34xx() || cpu_is_omap44xx() || cpu_is_omap54xx()) + && bdata->pads && !uart_debug) + device_init_wakeup(&pd->dev, true); +#endif } /** diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index a35b65b27aae..5aac9716232e 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -46,7 +46,6 @@ #include <plat/omap_hwmod.h> #include <plat/omap_device.h> #include <plat/omap-pm.h> -#include <mach/omap4-common.h> #include "powerdomain.h" @@ -342,6 +341,47 @@ OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE, OMAP_SYS_TIMER(3_secure) #endif +#if 0 +#ifdef CONFIG_ARM_SMP_TWD +static struct resource omap4_twd_resources[] __initdata = { + { + .start = OMAP44XX_LOCAL_TWD_BASE, + .end = OMAP44XX_LOCAL_TWD_BASE + 0x10, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP44XX_IRQ_LOCALTIMER, + .end = OMAP44XX_IRQ_LOCALTIMER, + .flags = IORESOURCE_IRQ, + }, +}; + +static void __init omap4_twd_init(void) +{ + int err; + + /* Local timers are not supprted on OMAP4430 ES1.0 */ + if (omap_rev() == OMAP4430_REV_ES1_0) + return; + + err = twd_timer_register(omap4_twd_resources, + ARRAY_SIZE(omap4_twd_resources)); + if (err) + pr_err("twd_timer_register failed %d\n", err); +} + +#else +#define omap4_twd_init NULL +#endif + +/* main twd code wants to see this, despite it is deprecated now */ + +int __cpuinit local_timer_setup(struct clock_event_device *evt) +{ + return 0; +} +#endif + #ifdef CONFIG_ARCH_OMAP4 #ifdef CONFIG_LOCAL_TIMERS static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, @@ -535,7 +575,7 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused) pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count; #endif pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata), - NULL, 0, 0); + omap2_dmtimer_latency, ARRAY_SIZE(omap2_dmtimer_latency), 0); if (IS_ERR(pdev)) { pr_err("%s: Can't build omap_device for %s: %s.\n", diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile index 37da2cc8f618..42f54d86aa38 100644 --- a/arch/arm/mm/Makefile +++ b/arch/arm/mm/Makefile @@ -2,6 +2,8 @@ # Makefile for the linux arm-specific parts of the memory manager. # +plus_sec := $(call as-instr,.arch_extension sec,+sec) + obj-y := dma-mapping.o extable.o fault.o init.o \ iomap.o @@ -95,7 +97,7 @@ obj-$(CONFIG_CPU_V6K) += proc-v6.o obj-$(CONFIG_CPU_V7) += proc-v7.o AFLAGS_proc-v6.o :=-Wa,-march=armv6 -AFLAGS_proc-v7.o :=-Wa,-march=armv7-a +AFLAGS_proc-v7.o :=-Wa,-march=armv7-a$(plus_sec) obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S index 8de0f1dd1549..2d0f4905fabe 100644 --- a/arch/arm/mm/proc-v7-3level.S +++ b/arch/arm/mm/proc-v7-3level.S @@ -39,23 +39,70 @@ #define TTB_FLAGS_SMP (TTB_IRGN_WBWA|TTB_S|TTB_RGN_OC_WBWA) #define PMD_FLAGS_SMP (PMD_SECT_WBWA|PMD_SECT_S) -/* - * cpu_v7_switch_mm(pgd_phys, tsk) - * - * Set the translation table base pointer to be pgd_phys (physical address of - * the new TTB). + +/* + * alternate versions of these two functions came from the omap5 + * patchset...since v3.1 their definition migrated here and to -2stage + * archived them defaulting to keeping mainline versions */ -ENTRY(cpu_v7_switch_mm) -#ifdef CONFIG_MMU - ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id - and r3, r1, #0xff - mov r3, r3, lsl #(48 - 32) @ ASID - mcrr p15, 0, r0, r3, c2 @ set TTB 0 - isb -#endif - mov pc, lr + +#define MAINLINE_V7_FUNCS + +#ifdef MAINLINE_V7_FUNCS + +/* + * cpu_v7_switch_mm(pgd_phys, tsk) + * + * Set the translation table base pointer to be pgd_phys (physical address of + * the new TTB). + */ +ENTRY(cpu_v7_switch_mm) +#ifdef CONFIG_MMU + ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id + and r3, r1, #0xff + mov r3, r3, lsl #(48 - 32) @ ASID + mcrr p15, 0, r0, r3, c2 @ set TTB 0 + isb +#endif + mov pc, lr ENDPROC(cpu_v7_switch_mm) +#else + +/* + * cpu_v7_switch_mm(pgd_phys, tsk) + * + * Set the translation table base pointer to be pgd_phys + * + * - pgd_phys - physical address of new TTB + * + * It is assumed that: + * - we are not using split page tables + */ +ENTRY(cpu_v7_switch_mm) +#ifdef CONFIG_MMU + mov r2, #0 + ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id + ALT_SMP(orr r0, r0, #TTB_FLAGS_SMP) + ALT_UP(orr r0, r0, #TTB_FLAGS_UP) +#ifdef CONFIG_ARM_ERRATA_430973 + mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB +#endif + mrc p15, 0, r2, c2, c0, 1 @ load TTB 1 + mcr p15, 0, r2, c2, c0, 0 @ into TTB 0 + isb +#ifdef CONFIG_ARM_ERRATA_754322 + dsb +#endif + mcr p15, 0, r1, c13, c0, 1 @ set context ID + isb + mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 + isb +#endif + mov pc, lr +ENDPROC(cpu_v7_switch_mm) +#endif +#ifdef MAINLINE_V7_FUNCS /* * cpu_v7_set_pte_ext(ptep, pte) * @@ -74,6 +121,57 @@ ENTRY(cpu_v7_set_pte_ext) #endif mov pc, lr ENDPROC(cpu_v7_set_pte_ext) +#else + +/* + * cpu_v7_set_pte_ext(ptep, pte) + * + * Set a level 2 translation table entry. + * + * - ptep - pointer to level 2 translation table entry + * (hardware version is stored at +2048 bytes) + * - pte - PTE value to store + * - ext - value for extended PTE bits + */ +ENTRY(cpu_v7_set_pte_ext) +#ifdef CONFIG_MMU + str r1, [r0] @ linux version + + bic r3, r1, #0x000003f0 + bic r3, r3, #PTE_TYPE_MASK + orr r3, r3, r2 + orr r3, r3, #PTE_EXT_AP0 | 2 + + tst r1, #1 << 4 + orrne r3, r3, #PTE_EXT_TEX(1) + + eor r1, r1, #L_PTE_DIRTY + tst r1, #L_PTE_RDONLY | L_PTE_DIRTY + orrne r3, r3, #PTE_EXT_APX + + tst r1, #L_PTE_USER + orrne r3, r3, #PTE_EXT_AP1 +#ifdef CONFIG_CPU_USE_DOMAINS + @ allow kernel read/write access to read-only user pages + tstne r3, #PTE_EXT_APX + bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0 +#endif + + tst r1, #L_PTE_XN + orrne r3, r3, #PTE_EXT_XN + + tst r1, #L_PTE_YOUNG + tstne r1, #L_PTE_PRESENT + moveq r3, #0 + + ARM( str r3, [r0, #2048]! ) + THUMB( add r0, r0, #2048 ) + THUMB( str r3, [r0] ) + mcr p15, 0, r0, c7, c10, 1 @ flush_pte +#endif + mov pc, lr +ENDPROC(cpu_v7_set_pte_ext) +#endif /* * Memory region attributes for LPAE (defined in pgtable-3level.h): diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 9b12265cb449..7288d0995ab8 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -112,88 +112,6 @@ ENTRY(cpu_v7_dcache_clean_area) mov pc, lr ENDPROC(cpu_v7_dcache_clean_area) -/* - * cpu_v7_switch_mm(pgd_phys, tsk) - * - * Set the translation table base pointer to be pgd_phys - * - * - pgd_phys - physical address of new TTB - * - * It is assumed that: - * - we are not using split page tables - */ -ENTRY(cpu_v7_switch_mm) -#ifdef CONFIG_MMU - mov r2, #0 - ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id - ALT_SMP(orr r0, r0, #TTB_FLAGS_SMP) - ALT_UP(orr r0, r0, #TTB_FLAGS_UP) -#ifdef CONFIG_ARM_ERRATA_430973 - mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB -#endif - mrc p15, 0, r2, c2, c0, 1 @ load TTB 1 - mcr p15, 0, r2, c2, c0, 0 @ into TTB 0 - isb -#ifdef CONFIG_ARM_ERRATA_754322 - dsb -#endif - mcr p15, 0, r1, c13, c0, 1 @ set context ID - isb - mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 - isb -#endif - mov pc, lr -ENDPROC(cpu_v7_switch_mm) - -/* - * cpu_v7_set_pte_ext(ptep, pte) - * - * Set a level 2 translation table entry. - * - * - ptep - pointer to level 2 translation table entry - * (hardware version is stored at +2048 bytes) - * - pte - PTE value to store - * - ext - value for extended PTE bits - */ -ENTRY(cpu_v7_set_pte_ext) -#ifdef CONFIG_MMU - str r1, [r0] @ linux version - - bic r3, r1, #0x000003f0 - bic r3, r3, #PTE_TYPE_MASK - orr r3, r3, r2 - orr r3, r3, #PTE_EXT_AP0 | 2 - - tst r1, #1 << 4 - orrne r3, r3, #PTE_EXT_TEX(1) - - eor r1, r1, #L_PTE_DIRTY - tst r1, #L_PTE_RDONLY | L_PTE_DIRTY - orrne r3, r3, #PTE_EXT_APX - - tst r1, #L_PTE_USER - orrne r3, r3, #PTE_EXT_AP1 -#ifdef CONFIG_CPU_USE_DOMAINS - @ allow kernel read/write access to read-only user pages - tstne r3, #PTE_EXT_APX - bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0 -#endif - - tst r1, #L_PTE_XN - orrne r3, r3, #PTE_EXT_XN - - tst r1, #L_PTE_YOUNG - tstne r1, #L_PTE_PRESENT - moveq r3, #0 - - ARM( str r3, [r0, #2048]! ) - THUMB( add r0, r0, #2048 ) - THUMB( str r3, [r0] ) - mcr p15, 0, r0, c7, c10, 1 @ flush_pte -#endif - mov pc, lr -ENDPROC(cpu_v7_set_pte_ext) - string cpu_v7_name, "ARMv7 Processor" .align diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c index c3ba804d98b5..d0afd7f965bc 100644 --- a/arch/arm/plat-omap/devices.c +++ b/arch/arm/plat-omap/devices.c @@ -26,6 +26,7 @@ #include <plat/board.h> #include <plat/mmc.h> #include <plat/menelaus.h> +#include <plat/mcbsp.h> #include <plat/omap44xx.h> /*-------------------------------------------------------------------------*/ diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c index 123b2b441f76..28f7c4dcc303 100644 --- a/arch/arm/plat-omap/i2c.c +++ b/arch/arm/plat-omap/i2c.c @@ -24,6 +24,7 @@ */ #include <linux/kernel.h> +#include <linux/export.h> #include <linux/platform_device.h> #include <linux/i2c.h> #include <linux/i2c-omap.h> diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h index 268b4cbc7415..0f392ecd49c6 100644 --- a/arch/arm/plat-omap/include/plat/common.h +++ b/arch/arm/plat-omap/include/plat/common.h @@ -44,25 +44,10 @@ extern int __init omap_init_clocksource_32k(void); extern void omap_reserve(void); extern int omap_dss_reset(struct omap_hwmod *); +extern int omap4_prcm_freq_update(void); + void omap_sram_init(void); -/* - * IO bases for various OMAP processors - * Except the tap base, rest all the io bases - * listed are physical addresses. - */ -struct omap_globals { - u32 class; /* OMAP class to detect */ - void __iomem *tap; /* Control module ID code */ - unsigned long sdrc; /* SDRAM Controller */ - unsigned long sms; /* SDRAM Memory Scheduler */ - unsigned long ctrl; /* System Control Module */ - unsigned long ctrl_pad; /* PAD Control Module */ - unsigned long prm; /* Power and Reset Management */ - unsigned long cm; /* Clock Management */ - unsigned long cm2; - unsigned long prcm_mpu; -}; void omap2_set_globals_242x(void); void omap2_set_globals_243x(void); @@ -71,12 +56,6 @@ void omap2_set_globals_443x(void); void omap2_set_globals_ti816x(void); void omap2_set_globals_543x(void); -/* These get called from omap2_set_globals_xxxx(), do not call these */ -void omap2_set_globals_tap(struct omap_globals *); -void omap2_set_globals_sdrc(struct omap_globals *); -void omap2_set_globals_control(struct omap_globals *); -void omap2_set_globals_prcm(struct omap_globals *); - void omap3_map_io(void); /** @@ -103,6 +82,5 @@ extern struct device *omap2_get_mpuss_device(void); extern struct device *omap2_get_iva_device(void); extern struct device *omap2_get_l3_device(void); extern struct device *omap4_get_dsp_device(void); ->>>>>>> patched #endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h index aed5c97c1acd..aadcaba84a98 100644 --- a/arch/arm/plat-omap/include/plat/hardware.h +++ b/arch/arm/plat-omap/include/plat/hardware.h @@ -288,7 +288,7 @@ #include <plat/omap44xx.h> #include <plat/ti81xx.h> #include <plat/am33xx.h> -#include <plat/ti816x.h> +#include <plat/ti81xx.h> #include <plat/omap54xx.h> #endif /* __ASM_ARCH_OMAP_HARDWARE_H */ diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h index 227ae2657554..5bc8478cdcc1 100644 --- a/arch/arm/plat-omap/include/plat/sram.h +++ b/arch/arm/plat-omap/include/plat/sram.h @@ -102,4 +102,5 @@ static inline void omap_push_sram_idle(void) {} #define OMAP4_SRAM_PA 0x40300000 #endif #define AM33XX_SRAM_PA 0x40300000 +#define OMAP5_SRAM_PA 0x40300000 #endif diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h index 15356f80c516..42d6f72924f1 100644 --- a/arch/arm/plat-omap/include/plat/uncompress.h +++ b/arch/arm/plat-omap/include/plat/uncompress.h @@ -177,7 +177,7 @@ static inline void __arch_decomp_setup(unsigned long arch_id) DEBUG_LL_OMAP4(3, omap4_panda); /* omap5 based boards using UART3 */ - DEBUG_LL_OMAP5(3, omap_5430evm); + DEBUG_LL_OMAP5(3, omap5_sevm); /* zoom2/3 external uart */ DEBUG_LL_ZOOM(omap_zoom2); diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index ba0693d7dcaa..dbe2f4dab6b4 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c @@ -39,33 +39,12 @@ #define OMAP1_SRAM_PA 0x20000000 #define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800) #define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000) - #ifdef CONFIG_OMAP4_ERRATA_I688 #define OMAP4_SRAM_PUB_PA OMAP4_SRAM_PA #else #define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000) #endif - -#define OMAP3_SRAM_PUB_VA (OMAP3_SRAM_VA + 0x8000) - -#define OMAP4_SRAM_MAX 0xe000 /* 56K */ -#define OMAP4_SRAM_VA 0xfe400000 -#define OMAP4_HS_SRAM_SIZE 0x1000 /* 4K */ -#define OMAP4_HS_SRAM_OFFSET (OMAP4_SRAM_MAX - OMAP4_HS_SRAM_SIZE) -#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + OMAP4_HS_SRAM_OFFSET) -#define OMAP4_SRAM_PUB_VA (OMAP4_SRAM_VA + OMAP4_HS_SRAM_OFFSET) - -/* Reserve 60K bytes of SRAM for HS/EMU devices */ -#define OMAP5_SRAM_RESERVED_SIZE 0xF000 ->>>>>>> patched -#define OMAP5_SRAM_PA 0x40300000 -#define OMAP5_SRAM_VA 0xfe400000 -/* - * Allocate the upper SRAM space for the kernel, and reserve the - * lower space for HS/EMU devices. - */ -#define OMAP5_SRAM_PUB_PA (OMAP5_SRAM_PA + OMAP5_SRAM_RESERVED_SIZE) -#define OMAP5_SRAM_PUB_VA (OMAP5_SRAM_VA + OMAP5_SRAM_RESERVED_SIZE) +#define OMAP5_SRAM_PUB_PA OMAP5_SRAM_PA #if defined(CONFIG_ARCH_OMAP2PLUS) #define SRAM_BOOTLOADER_SZ 0x00 @@ -139,12 +118,10 @@ static void __init omap_detect_sram(void) } } else if (cpu_is_omap44xx()) { omap_sram_start = OMAP4_SRAM_PUB_PA; - omap_sram_size = OMAP4_HS_SRAM_SIZE; /* 4K */ + omap_sram_size = 0xa000; /* 40K */ } else if (cpu_is_omap54xx()) { - omap_sram_base = OMAP5_SRAM_PUB_VA; omap_sram_start = OMAP5_SRAM_PUB_PA; omap_sram_size = SZ_128K; /* 128KB */ - omap_sram_size -= OMAP5_SRAM_RESERVED_SIZE; } else { omap_sram_start = OMAP2_SRAM_PUB_PA; omap_sram_size = 0x800; /* 2K */ @@ -158,12 +135,10 @@ static void __init omap_detect_sram(void) omap_sram_size = 0x10000; /* 64K */ } else if (cpu_is_omap44xx()) { omap_sram_start = OMAP4_SRAM_PA; - omap_sram_size = OMAP4_HS_SRAM_SIZE; /* 4K */ + omap_sram_size = 0xe000; /* 56K */ } else if (cpu_is_omap54xx()) { - omap_sram_base = OMAP5_SRAM_VA; omap_sram_start = OMAP5_SRAM_PA; omap_sram_size = SZ_128K; /* 128KB */ - omap_sram_size -= OMAP5_SRAM_RESERVED_SIZE; } else { omap_sram_start = OMAP2_SRAM_PA; if (cpu_is_omap242x()) @@ -212,32 +187,6 @@ static void __init omap_map_sram(void) * which will cause the system to hang. */ cached = 0; - omap_sram_io_desc[0].type = MT_MEMORY_NONCACHED; - } else if (cpu_is_omap44xx()) { - /* - * Map a page of SRAM with strongly ordered attributes - * for interconnect barrier usage. - * if we have space, then use a new page, else remap - * first map - */ - if (omap_sram_size <= PAGE_SIZE) { - omap_sram_io_desc[0].type = MT_MEMORY_SO; - sram_sync = - (void __iomem *) omap_sram_io_desc[0].virtual; - } else { - omap_sram_io_desc[0].length = ROUND_DOWN(omap_sram_size - - PAGE_SIZE, PAGE_SIZE); - omap_sram_io_desc[1].virtual = - omap_sram_base + omap_sram_io_desc[0].length; - base = omap_sram_start + omap_sram_io_desc[0].length; - base = ROUND_DOWN(base, PAGE_SIZE); - omap_sram_io_desc[1].pfn = __phys_to_pfn(base); - omap_sram_io_desc[1].length = PAGE_SIZE; - omap_sram_io_desc[1].type = MT_MEMORY_SO; - nr_desc = 2; - sram_sync = - (void __iomem *) omap_sram_io_desc[1].virtual; - } } omap_sram_start = ROUND_DOWN(omap_sram_start, PAGE_SIZE); @@ -435,9 +384,8 @@ static inline int am33xx_sram_init(void) int __init omap_sram_init(void) { - if (!cpu_is_omap54xx()) - omap_detect_sram(); - omap_map_sram(); + omap_detect_sram(); + omap_map_sram(); if (!(cpu_class_is_omap2())) omap1_sram_init(); diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 94011f2975b2..ed1eacf83211 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -162,6 +162,23 @@ enum { #define I2C_OMAP_ERRATA_I207 (1 << 0) #define I2C_OMAP3_1P153 (1 << 1) +/* OCP_SYSSTATUS bit definitions */ +#define SYSS_RESETDONE_MASK (1 << 0) + +/* OCP_SYSCONFIG bit definitions */ +#define SYSC_CLOCKACTIVITY_MASK (0x3 << 8) +#define SYSC_SIDLEMODE_MASK (0x3 << 3) +#define SYSC_ENAWAKEUP_MASK (1 << 2) +#define SYSC_SOFTRESET_MASK (1 << 1) +#define SYSC_AUTOIDLE_MASK (1 << 0) + +#define SYSC_IDLEMODE_SMART 0x2 +#define SYSC_CLOCKACTIVITY_FCLK 0x2 + +/* I2C System Configuration Register (OMAP_I2C_SYSC): */ +#define OMAP_I2C_SYSC_SRST (1 << 1) /* Soft Reset */ + + struct omap_i2c_dev { struct device *dev; void __iomem *base; /* virtual */ diff --git a/drivers/input/misc/mpu6050.c b/drivers/input/misc/mpu6050.c index 81010757df68..b56f8a279148 100644 --- a/drivers/input/misc/mpu6050.c +++ b/drivers/input/misc/mpu6050.c @@ -17,6 +17,7 @@ * this program. If not, see <http://www.gnu.org/licenses/>. */ +#include <linux/module.h> #include <linux/types.h> #include <linux/interrupt.h> #include <linux/delay.h> diff --git a/drivers/input/misc/mpu6050_accel.c b/drivers/input/misc/mpu6050_accel.c index 8ff66f9d5682..7825ff0ff87f 100644 --- a/drivers/input/misc/mpu6050_accel.c +++ b/drivers/input/misc/mpu6050_accel.c @@ -17,6 +17,7 @@ * this program. If not, see <http://www.gnu.org/licenses/>. */ +#include <linux/module.h> #include <linux/types.h> #include <linux/interrupt.h> #include <linux/platform_device.h> diff --git a/drivers/input/misc/mpu6050_gyro.c b/drivers/input/misc/mpu6050_gyro.c index 0a99ef591d5c..024344b7ac73 100644 --- a/drivers/input/misc/mpu6050_gyro.c +++ b/drivers/input/misc/mpu6050_gyro.c @@ -18,6 +18,7 @@ */ #include <linux/types.h> +#include <linux/module.h> #include <linux/interrupt.h> #include <linux/delay.h> #include <linux/platform_device.h> diff --git a/drivers/input/touchscreen/qtouch_obp_ts.c b/drivers/input/touchscreen/qtouch_obp_ts.c index 7ed29f4bafe0..f3ee164ba4ac 100644 --- a/drivers/input/touchscreen/qtouch_obp_ts.c +++ b/drivers/input/touchscreen/qtouch_obp_ts.c @@ -16,6 +16,7 @@ * Derived from the Motorola OBP touch driver. * */ +#include <linux/module.h> #include <linux/delay.h> #include <linux/device.h> #include <linux/gpio.h> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index fbe876f8a4ad..fa7f1364937a 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -736,7 +736,7 @@ config MFD_CS5535 depends on PCI && X86 ---help--- This is the core driver for CS5535/CS5536 MFD functions. This is - necessary for using the board's GPIO and MFGPT functionality. + necessary for using the board s GPIO and MFGPT functionality. config MFD_TIMBERDALE tristate "Support for the Timberdale FPGA" @@ -922,7 +922,6 @@ config MFD_PALMAS_RESOURCE If you say yes here you get support for the misc RESOURCES on Palmas series of PMIC chips from Texas Instruments. -endif # MFD_SUPPORT menu "Multimedia Capabilities Port drivers" depends on ARCH_SA1100 diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c index 4b6b910128d2..8a4995c10dd4 100644 --- a/drivers/mfd/omap-usb-host.c +++ b/drivers/mfd/omap-usb-host.c @@ -59,6 +59,36 @@ #define OMAP_UHH_HOSTCONFIG_P3_CONNECT_STATUS (1 << 10) #define OMAP4_UHH_HOSTCONFIG_APP_START_CLK (1 << 31) +#define OMAP_TLL_SHARED_CONF (0x30) +#define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6) +#define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5) +#define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2) +#define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1) +#define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0) + +#define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num) +#define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24 +#define OMAP_TLL_CHANNEL_CONF_DRVVBUS (1 << 16) +#define OMAP_TLL_CHANNEL_CONF_CHRGVBUS (1 << 15) +#define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11) +#define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10) +#define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9) +#define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8) +#define OMAP_TLL_CHANNEL_CONF_CHANMODE_TRANSPARENT_UTMI (2 << 1) +#define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1) +#define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0) + +#define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x0 +#define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x1 +#define OMAP_TLL_FSLSMODE_3PIN_PHY 0x2 +#define OMAP_TLL_FSLSMODE_4PIN_PHY 0x3 +#define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x4 +#define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x5 +#define OMAP_TLL_FSLSMODE_3PIN_TLL 0x6 +#define OMAP_TLL_FSLSMODE_4PIN_TLL 0x7 +#define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA +#define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB + /* OMAP4-specific defines */ #define OMAP4_UHH_SYSCONFIG_IDLEMODE_CLEAR (3 << 2) #define OMAP4_UHH_SYSCONFIG_NOIDLE (1 << 2) @@ -74,6 +104,17 @@ #define OMAP4_P2_MODE_HSIC (3 << 18) #define OMAP5_P3_MODE_HSIC (3 << 20) +#define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num) +#define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num) +#define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num) +#define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num) +#define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num) +#define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num) +#define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num) +#define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num) +#define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num) + + #define OMAP_UHH_DEBUG_CSR (0x44) /* Values of UHH_REVISION - Note: these are not given in the TRM */ @@ -106,6 +147,7 @@ struct usbhs_hcd_omap { struct clk *usb_host_hs_hsic480m_p3_clk; void __iomem *uhh_base; + void __iomem *tll_base; struct usbhs_omap_platform_data platdata; @@ -491,9 +533,6 @@ static void omap_usbhs_deinit(struct device *dev) if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[1])) gpio_free(pdata->ehci_data->reset_gpio_port[1]); } - - usbhs_write(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg); - dev_dbg(dev, "UHH setup done, uhh_hostconfig=%x\n", reg); } /** @@ -702,6 +741,13 @@ static int __devinit usbhs_omap_probe(struct platform_device *pdev) goto err_usb_host_hs_hsic480m_p3_clk; } + omap->tll_base = ioremap(res->start, resource_size(res)); + if (!omap->tll_base) { + dev_err(dev, "TLL ioremap failed\n"); + ret = -ENOMEM; + goto err_tll; + } + platform_set_drvdata(pdev, omap); omap_usbhs_init(dev); @@ -714,7 +760,10 @@ static int __devinit usbhs_omap_probe(struct platform_device *pdev) goto end_probe; err_alloc: - iounmap(omap->uhh_base); + iounmap(omap->tll_base); + +err_tll: + iounmap(omap->uhh_base); err_usb_host_hs_hsic480m_p3_clk: clk_put(omap->usb_host_hs_hsic480m_p3_clk); diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c index 697306d00d67..a85843410d60 100644 --- a/drivers/mfd/omap-usb-tll.c +++ b/drivers/mfd/omap-usb-tll.c @@ -16,6 +16,7 @@ * You should have received a copy of the GNU General Public License * along with this program. If not, see <http://www.gnu.org/licenses/>. */ +#include <linux/module.h> #include <linux/kernel.h> #include <linux/types.h> #include <linux/slab.h> diff --git a/drivers/mfd/omap4plus_scm.c b/drivers/mfd/omap4plus_scm.c index ae2f32cefe8b..6ab9eafa716d 100644 --- a/drivers/mfd/omap4plus_scm.c +++ b/drivers/mfd/omap4plus_scm.c @@ -21,6 +21,7 @@ * */ +#include <linux/module.h> #include <linux/interrupt.h> #include <linux/clk.h> #include <linux/io.h> diff --git a/drivers/misc/emif.c b/drivers/misc/emif.c index 9a504dd84dfd..db620c21a34e 100644 --- a/drivers/misc/emif.c +++ b/drivers/misc/emif.c @@ -26,7 +26,7 @@ #include <linux/list.h> #include <linux/notifier.h> #include "emif_regs.h" -#include <mach/omap4-common.h> +#include <plat/common.h> /** struct emif_data - Per device static data for driver's use * @thermal_handling_pending: Whether thermal handling is pending or not diff --git a/drivers/regulator/palmas-regulator.c b/drivers/regulator/palmas-regulator.c index 8a274cf7b6f3..e16780379a90 100644 --- a/drivers/regulator/palmas-regulator.c +++ b/drivers/regulator/palmas-regulator.c @@ -855,7 +855,7 @@ static __devinit int palmas_probe(struct platform_device *pdev) } rdev = regulator_register(&pmic->desc[id], - &pdev->dev, reg_data, pmic); + &pdev->dev, reg_data, pmic, NULL); if (IS_ERR(rdev)) { dev_err(&pdev->dev, "failed to register %s regulator\n", @@ -888,7 +888,7 @@ static __devinit int palmas_probe(struct platform_device *pdev) pmic->desc[id].owner = THIS_MODULE; rdev = regulator_register(&pmic->desc[id], - &pdev->dev, reg_data, pmic); + &pdev->dev, reg_data, pmic, NULL); if (IS_ERR(rdev)) { dev_err(&pdev->dev, "failed to register %s regulator\n", diff --git a/scripts/dtc/dtc.c b/scripts/dtc/dtc.c index 2ef5e2e3dd38..585faefaefba 100644 --- a/scripts/dtc/dtc.c +++ b/scripts/dtc/dtc.c @@ -113,7 +113,7 @@ int main(int argc, char *argv[]) minsize = 0; padsize = 0; - while ((opt = getopt(argc, argv, "hI:O:o:V:d:R:S:p:fcqb:vH:s")) + while ((opt = getopt(argc, argv, "hI:O:o:V:d:R:S:p:fqb:vH:s")) != EOF) { switch (opt) { case 'I': |