diff options
22 files changed, 364 insertions, 29415 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index d63645a521c4..32749425d7bf 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1921,6 +1921,22 @@ struct i915_oa_reg { u32 value; }; +struct i915_oa_config { + char uuid[UUID_STRING_LEN + 1]; + int id; + + const struct i915_oa_reg *mux_regs; + u32 mux_regs_len; + const struct i915_oa_reg *b_counter_regs; + u32 b_counter_regs_len; + const struct i915_oa_reg *flex_regs; + u32 flex_regs_len; + + struct attribute_group sysfs_metric; + struct attribute *attrs[2]; + struct device_attribute sysfs_metric_id; +}; + struct i915_perf_stream; /** @@ -2033,6 +2049,11 @@ struct i915_perf_stream { * type of configured stream. */ const struct i915_perf_stream_ops *ops; + + /** + * @oa_config: The OA configuration used by the stream. + */ + struct i915_oa_config *oa_config; }; /** @@ -2057,20 +2078,13 @@ struct i915_oa_ops { void (*init_oa_buffer)(struct drm_i915_private *dev_priv); /** - * @select_metric_set: The auto generated code that checks whether a - * requested OA config is applicable to the system and if so sets up - * the mux, oa and flex eu register config pointers according to the - * current dev_priv->perf.oa.metrics_set. - */ - int (*select_metric_set)(struct drm_i915_private *dev_priv); - - /** * @enable_metric_set: Selects and applies any MUX configuration to set * up the Boolean and Custom (B/C) counters that are part of the * counter reports being sampled. May apply system constraints such as * disabling EU clock gating as required. */ - int (*enable_metric_set)(struct drm_i915_private *dev_priv); + int (*enable_metric_set)(struct drm_i915_private *dev_priv, + const struct i915_oa_config *oa_config); /** * @disable_metric_set: Remove system constraints associated with using @@ -2452,16 +2466,7 @@ struct drm_i915_private { int period_exponent; int timestamp_frequency; - int metrics_set; - - const struct i915_oa_reg *mux_regs[6]; - int mux_regs_lens[6]; - int n_mux_configs; - - const struct i915_oa_reg *b_counter_regs; - int b_counter_regs_len; - const struct i915_oa_reg *flex_regs; - int flex_regs_len; + struct i915_oa_config test_config; struct { struct i915_vma *vma; @@ -2548,7 +2553,6 @@ struct drm_i915_private { struct i915_oa_ops ops; const struct i915_oa_format *oa_formats; - int n_builtin_sets; } oa; } perf; diff --git a/drivers/gpu/drm/i915/i915_oa_bdw.c b/drivers/gpu/drm/i915/i915_oa_bdw.c index d4462c2aaaee..187067001179 100644 --- a/drivers/gpu/drm/i915/i915_oa_bdw.c +++ b/drivers/gpu/drm/i915/i915_oa_bdw.c @@ -31,3981 +31,6 @@ #include "i915_drv.h" #include "i915_oa_bdw.h" -enum metric_set_id { - METRIC_SET_ID_RENDER_BASIC = 1, - METRIC_SET_ID_COMPUTE_BASIC, - METRIC_SET_ID_RENDER_PIPE_PROFILE, - METRIC_SET_ID_MEMORY_READS, - METRIC_SET_ID_MEMORY_WRITES, - METRIC_SET_ID_COMPUTE_EXTENDED, - METRIC_SET_ID_COMPUTE_L3_CACHE, - METRIC_SET_ID_DATA_PORT_READS_COALESCING, - METRIC_SET_ID_DATA_PORT_WRITES_COALESCING, - METRIC_SET_ID_HDC_AND_SF, - METRIC_SET_ID_L3_1, - METRIC_SET_ID_L3_2, - METRIC_SET_ID_L3_3, - METRIC_SET_ID_L3_4, - METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND, - METRIC_SET_ID_SAMPLER_1, - METRIC_SET_ID_SAMPLER_2, - METRIC_SET_ID_TDL_1, - METRIC_SET_ID_TDL_2, - METRIC_SET_ID_COMPUTE_EXTRA, - METRIC_SET_ID_VME_PIPE, - METRIC_SET_ID_TEST_OA, -}; - -int i915_oa_n_builtin_metric_sets_bdw = 22; - -static const struct i915_oa_reg b_counter_config_render_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2740), 0x00000000 }, -}; - -static const struct i915_oa_reg flex_eu_config_render_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_render_basic_0_slices_0x01[] = { - { _MMIO(0x9888), 0x143f000f }, - { _MMIO(0x9888), 0x14110014 }, - { _MMIO(0x9888), 0x14310014 }, - { _MMIO(0x9888), 0x14bf000f }, - { _MMIO(0x9888), 0x118a0317 }, - { _MMIO(0x9888), 0x13837be0 }, - { _MMIO(0x9888), 0x3b800060 }, - { _MMIO(0x9888), 0x3d800005 }, - { _MMIO(0x9888), 0x005c4000 }, - { _MMIO(0x9888), 0x065c8000 }, - { _MMIO(0x9888), 0x085cc000 }, - { _MMIO(0x9888), 0x003d8000 }, - { _MMIO(0x9888), 0x183d0800 }, - { _MMIO(0x9888), 0x0a3f0023 }, - { _MMIO(0x9888), 0x103f0000 }, - { _MMIO(0x9888), 0x00584000 }, - { _MMIO(0x9888), 0x08584000 }, - { _MMIO(0x9888), 0x0a5a4000 }, - { _MMIO(0x9888), 0x005b4000 }, - { _MMIO(0x9888), 0x0e5b8000 }, - { _MMIO(0x9888), 0x185b2400 }, - { _MMIO(0x9888), 0x0a1d4000 }, - { _MMIO(0x9888), 0x0c1f0800 }, - { _MMIO(0x9888), 0x0e1faa00 }, - { _MMIO(0x9888), 0x00384000 }, - { _MMIO(0x9888), 0x0e384000 }, - { _MMIO(0x9888), 0x16384000 }, - { _MMIO(0x9888), 0x18380001 }, - { _MMIO(0x9888), 0x00392000 }, - { _MMIO(0x9888), 0x06398000 }, - { _MMIO(0x9888), 0x0839a000 }, - { _MMIO(0x9888), 0x0a391000 }, - { _MMIO(0x9888), 0x00104000 }, - { _MMIO(0x9888), 0x08104000 }, - { _MMIO(0x9888), 0x00110030 }, - { _MMIO(0x9888), 0x08110031 }, - { _MMIO(0x9888), 0x10110000 }, - { _MMIO(0x9888), 0x00134000 }, - { _MMIO(0x9888), 0x16130020 }, - { _MMIO(0x9888), 0x06308000 }, - { _MMIO(0x9888), 0x08308000 }, - { _MMIO(0x9888), 0x06311800 }, - { _MMIO(0x9888), 0x08311880 }, - { _MMIO(0x9888), 0x10310000 }, - { _MMIO(0x9888), 0x0e334000 }, - { _MMIO(0x9888), 0x16330080 }, - { _MMIO(0x9888), 0x0abf1180 }, - { _MMIO(0x9888), 0x10bf0000 }, - { _MMIO(0x9888), 0x0ada8000 }, - { _MMIO(0x9888), 0x0a9d8000 }, - { _MMIO(0x9888), 0x109f0002 }, - { _MMIO(0x9888), 0x0ab94000 }, - { _MMIO(0x9888), 0x0d888000 }, - { _MMIO(0x9888), 0x038a0380 }, - { _MMIO(0x9888), 0x058a000e }, - { _MMIO(0x9888), 0x018a8000 }, - { _MMIO(0x9888), 0x0f8a8000 }, - { _MMIO(0x9888), 0x198a8000 }, - { _MMIO(0x9888), 0x1b8a00a0 }, - { _MMIO(0x9888), 0x078a0000 }, - { _MMIO(0x9888), 0x098a0000 }, - { _MMIO(0x9888), 0x238b2820 }, - { _MMIO(0x9888), 0x258b2550 }, - { _MMIO(0x9888), 0x198c1000 }, - { _MMIO(0x9888), 0x0b8d8000 }, - { _MMIO(0x9888), 0x1f85aa80 }, - { _MMIO(0x9888), 0x2185aaa0 }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x0d831021 }, - { _MMIO(0x9888), 0x0f83572f }, - { _MMIO(0x9888), 0x01835680 }, - { _MMIO(0x9888), 0x0383002c }, - { _MMIO(0x9888), 0x11830000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830001 }, - { _MMIO(0x9888), 0x05830000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0184c000 }, - { _MMIO(0x9888), 0x07848000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x05844000 }, - { _MMIO(0x9888), 0x1b80c137 }, - { _MMIO(0x9888), 0x1d80c147 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x1180c000 }, - { _MMIO(0x9888), 0x17808000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x15804000 }, - { _MMIO(0x9888), 0x4d801110 }, - { _MMIO(0x9888), 0x4f800331 }, - { _MMIO(0x9888), 0x43800802 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45801465 }, - { _MMIO(0x9888), 0x53801111 }, - { _MMIO(0x9888), 0x478014a5 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x3f800ca5 }, - { _MMIO(0x9888), 0x41800003 }, -}; - -static const struct i915_oa_reg mux_config_render_basic_1_slices_0x02[] = { - { _MMIO(0x9888), 0x143f000f }, - { _MMIO(0x9888), 0x14bf000f }, - { _MMIO(0x9888), 0x14910014 }, - { _MMIO(0x9888), 0x14b10014 }, - { _MMIO(0x9888), 0x118a0317 }, - { _MMIO(0x9888), 0x13837be0 }, - { _MMIO(0x9888), 0x3b800060 }, - { _MMIO(0x9888), 0x3d800005 }, - { _MMIO(0x9888), 0x0a3f0023 }, - { _MMIO(0x9888), 0x103f0000 }, - { _MMIO(0x9888), 0x0a5a4000 }, - { _MMIO(0x9888), 0x0a1d4000 }, - { _MMIO(0x9888), 0x0e1f8000 }, - { _MMIO(0x9888), 0x0a391000 }, - { _MMIO(0x9888), 0x00dc4000 }, - { _MMIO(0x9888), 0x06dc8000 }, - { _MMIO(0x9888), 0x08dcc000 }, - { _MMIO(0x9888), 0x00bd8000 }, - { _MMIO(0x9888), 0x18bd0800 }, - { _MMIO(0x9888), 0x0abf1180 }, - { _MMIO(0x9888), 0x10bf0000 }, - { _MMIO(0x9888), 0x00d84000 }, - { _MMIO(0x9888), 0x08d84000 }, - { _MMIO(0x9888), 0x0ada8000 }, - { _MMIO(0x9888), 0x00db4000 }, - { _MMIO(0x9888), 0x0edb8000 }, - { _MMIO(0x9888), 0x18db2400 }, - { _MMIO(0x9888), 0x0a9d8000 }, - { _MMIO(0x9888), 0x0c9f0800 }, - { _MMIO(0x9888), 0x0e9f2a00 }, - { _MMIO(0x9888), 0x109f0002 }, - { _MMIO(0x9888), 0x00b84000 }, - { _MMIO(0x9888), 0x0eb84000 }, - { _MMIO(0x9888), 0x16b84000 }, - { _MMIO(0x9888), 0x18b80001 }, - { _MMIO(0x9888), 0x00b92000 }, - { _MMIO(0x9888), 0x06b98000 }, - { _MMIO(0x9888), 0x08b9a000 }, - { _MMIO(0x9888), 0x0ab94000 }, - { _MMIO(0x9888), 0x00904000 }, - { _MMIO(0x9888), 0x08904000 }, - { _MMIO(0x9888), 0x00910030 }, - { _MMIO(0x9888), 0x08910031 }, - { _MMIO(0x9888), 0x10910000 }, - { _MMIO(0x9888), 0x00934000 }, - { _MMIO(0x9888), 0x16930020 }, - { _MMIO(0x9888), 0x06b08000 }, - { _MMIO(0x9888), 0x08b08000 }, - { _MMIO(0x9888), 0x06b11800 }, - { _MMIO(0x9888), 0x08b11880 }, - { _MMIO(0x9888), 0x10b10000 }, - { _MMIO(0x9888), 0x0eb34000 }, - { _MMIO(0x9888), 0x16b30080 }, - { _MMIO(0x9888), 0x01888000 }, - { _MMIO(0x9888), 0x0d88b800 }, - { _MMIO(0x9888), 0x038a0380 }, - { _MMIO(0x9888), 0x058a000e }, - { _MMIO(0x9888), 0x1b8a0080 }, - { _MMIO(0x9888), 0x078a0000 }, - { _MMIO(0x9888), 0x098a0000 }, - { _MMIO(0x9888), 0x238b2840 }, - { _MMIO(0x9888), 0x258b26a0 }, - { _MMIO(0x9888), 0x018c4000 }, - { _MMIO(0x9888), 0x0f8c4000 }, - { _MMIO(0x9888), 0x178c2000 }, - { _MMIO(0x9888), 0x198c1100 }, - { _MMIO(0x9888), 0x018d2000 }, - { _MMIO(0x9888), 0x078d8000 }, - { _MMIO(0x9888), 0x098da000 }, - { _MMIO(0x9888), 0x0b8d8000 }, - { _MMIO(0x9888), 0x1f85aa80 }, - { _MMIO(0x9888), 0x2185aaa0 }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x0d831021 }, - { _MMIO(0x9888), 0x0f83572f }, - { _MMIO(0x9888), 0x01835680 }, - { _MMIO(0x9888), 0x0383002c }, - { _MMIO(0x9888), 0x11830000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830001 }, - { _MMIO(0x9888), 0x05830000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0184c000 }, - { _MMIO(0x9888), 0x07848000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x05844000 }, - { _MMIO(0x9888), 0x1b80c137 }, - { _MMIO(0x9888), 0x1d80c147 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x1180c000 }, - { _MMIO(0x9888), 0x17808000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x15804000 }, - { _MMIO(0x9888), 0x4d801550 }, - { _MMIO(0x9888), 0x4f800331 }, - { _MMIO(0x9888), 0x43800802 }, - { _MMIO(0x9888), 0x51800400 }, - { _MMIO(0x9888), 0x458004a1 }, - { _MMIO(0x9888), 0x53805555 }, - { _MMIO(0x9888), 0x47800421 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x3f801421 }, - { _MMIO(0x9888), 0x41800845 }, -}; - -static int -get_render_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 2); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 2); - - if (INTEL_INFO(dev_priv)->sseu.slice_mask & 0x01) { - regs[n] = mux_config_render_basic_0_slices_0x01; - lens[n] = ARRAY_SIZE(mux_config_render_basic_0_slices_0x01); - n++; - } - if (INTEL_INFO(dev_priv)->sseu.slice_mask & 0x02) { - regs[n] = mux_config_render_basic_1_slices_0x02; - lens[n] = ARRAY_SIZE(mux_config_render_basic_1_slices_0x02); - n++; - } - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2740), 0x00000000 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_compute_basic_0_slices_0x01[] = { - { _MMIO(0x9888), 0x105c00e0 }, - { _MMIO(0x9888), 0x105800e0 }, - { _MMIO(0x9888), 0x103800e0 }, - { _MMIO(0x9888), 0x3580001a }, - { _MMIO(0x9888), 0x3b800060 }, - { _MMIO(0x9888), 0x3d800005 }, - { _MMIO(0x9888), 0x065c2100 }, - { _MMIO(0x9888), 0x0a5c0041 }, - { _MMIO(0x9888), 0x0c5c6600 }, - { _MMIO(0x9888), 0x005c6580 }, - { _MMIO(0x9888), 0x085c8000 }, - { _MMIO(0x9888), 0x0e5c8000 }, - { _MMIO(0x9888), 0x00580042 }, - { _MMIO(0x9888), 0x08582080 }, - { _MMIO(0x9888), 0x0c58004c }, - { _MMIO(0x9888), 0x0e582580 }, - { _MMIO(0x9888), 0x005b4000 }, - { _MMIO(0x9888), 0x185b1000 }, - { _MMIO(0x9888), 0x1a5b0104 }, - { _MMIO(0x9888), 0x0c1fa800 }, - { _MMIO(0x9888), 0x0e1faa00 }, - { _MMIO(0x9888), 0x101f02aa }, - { _MMIO(0x9888), 0x08380042 }, - { _MMIO(0x9888), 0x0a382080 }, - { _MMIO(0x9888), 0x0e38404c }, - { _MMIO(0x9888), 0x0238404b }, - { _MMIO(0x9888), 0x00384000 }, - { _MMIO(0x9888), 0x16380000 }, - { _MMIO(0x9888), 0x18381145 }, - { _MMIO(0x9888), 0x04380000 }, - { _MMIO(0x9888), 0x0039a000 }, - { _MMIO(0x9888), 0x06398000 }, - { _MMIO(0x9888), 0x0839a000 }, - { _MMIO(0x9888), 0x0a39a000 }, - { _MMIO(0x9888), 0x0c39a000 }, - { _MMIO(0x9888), 0x0e39a000 }, - { _MMIO(0x9888), 0x02392000 }, - { _MMIO(0x9888), 0x018a8000 }, - { _MMIO(0x9888), 0x0f8a8000 }, - { _MMIO(0x9888), 0x198a8000 }, - { _MMIO(0x9888), 0x1b8aaaa0 }, - { _MMIO(0x9888), 0x1d8a0002 }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x238b02a0 }, - { _MMIO(0x9888), 0x258b5550 }, - { _MMIO(0x9888), 0x278b0015 }, - { _MMIO(0x9888), 0x1f850a80 }, - { _MMIO(0x9888), 0x2185aaa0 }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x01834000 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x0184c000 }, - { _MMIO(0x9888), 0x07848000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x03844000 }, - { _MMIO(0x9888), 0x17808137 }, - { _MMIO(0x9888), 0x1980c147 }, - { _MMIO(0x9888), 0x1b80c0e5 }, - { _MMIO(0x9888), 0x1d80c0e3 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x1180c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x13804000 }, - { _MMIO(0x9888), 0x15800000 }, - { _MMIO(0xd24), 0x00000000 }, - { _MMIO(0x9888), 0x4d801000 }, - { _MMIO(0x9888), 0x4f800111 }, - { _MMIO(0x9888), 0x43800062 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800062 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47800062 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x3f801062 }, - { _MMIO(0x9888), 0x41801084 }, -}; - -static const struct i915_oa_reg mux_config_compute_basic_2_slices_0x02[] = { - { _MMIO(0x9888), 0x10dc00e0 }, - { _MMIO(0x9888), 0x10d800e0 }, - { _MMIO(0x9888), 0x10b800e0 }, - { _MMIO(0x9888), 0x3580001a }, - { _MMIO(0x9888), 0x3b800060 }, - { _MMIO(0x9888), 0x3d800005 }, - { _MMIO(0x9888), 0x06dc2100 }, - { _MMIO(0x9888), 0x0adc0041 }, - { _MMIO(0x9888), 0x0cdc6600 }, - { _MMIO(0x9888), 0x00dc6580 }, - { _MMIO(0x9888), 0x08dc8000 }, - { _MMIO(0x9888), 0x0edc8000 }, - { _MMIO(0x9888), 0x00d80042 }, - { _MMIO(0x9888), 0x08d82080 }, - { _MMIO(0x9888), 0x0cd8004c }, - { _MMIO(0x9888), 0x0ed82580 }, - { _MMIO(0x9888), 0x00db4000 }, - { _MMIO(0x9888), 0x18db1000 }, - { _MMIO(0x9888), 0x1adb0104 }, - { _MMIO(0x9888), 0x0c9fa800 }, - { _MMIO(0x9888), 0x0e9faa00 }, - { _MMIO(0x9888), 0x109f02aa }, - { _MMIO(0x9888), 0x08b80042 }, - { _MMIO(0x9888), 0x0ab82080 }, - { _MMIO(0x9888), 0x0eb8404c }, - { _MMIO(0x9888), 0x02b8404b }, - { _MMIO(0x9888), 0x00b84000 }, - { _MMIO(0x9888), 0x16b80000 }, - { _MMIO(0x9888), 0x18b81145 }, - { _MMIO(0x9888), 0x04b80000 }, - { _MMIO(0x9888), 0x00b9a000 }, - { _MMIO(0x9888), 0x06b98000 }, - { _MMIO(0x9888), 0x08b9a000 }, - { _MMIO(0x9888), 0x0ab9a000 }, - { _MMIO(0x9888), 0x0cb9a000 }, - { _MMIO(0x9888), 0x0eb9a000 }, - { _MMIO(0x9888), 0x02b92000 }, - { _MMIO(0x9888), 0x01888000 }, - { _MMIO(0x9888), 0x0d88f800 }, - { _MMIO(0x9888), 0x0f88000f }, - { _MMIO(0x9888), 0x03888000 }, - { _MMIO(0x9888), 0x05888000 }, - { _MMIO(0x9888), 0x238b0540 }, - { _MMIO(0x9888), 0x258baaa0 }, - { _MMIO(0x9888), 0x278b002a }, - { _MMIO(0x9888), 0x018c4000 }, - { _MMIO(0x9888), 0x0f8c4000 }, - { _MMIO(0x9888), 0x178c2000 }, - { _MMIO(0x9888), 0x198c5500 }, - { _MMIO(0x9888), 0x1b8c0015 }, - { _MMIO(0x9888), 0x038c4000 }, - { _MMIO(0x9888), 0x058c4000 }, - { _MMIO(0x9888), 0x018da000 }, - { _MMIO(0x9888), 0x078d8000 }, - { _MMIO(0x9888), 0x098da000 }, - { _MMIO(0x9888), 0x0b8da000 }, - { _MMIO(0x9888), 0x0d8da000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x038d2000 }, - { _MMIO(0x9888), 0x1f850a80 }, - { _MMIO(0x9888), 0x2185aaa0 }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x01834000 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x0184c000 }, - { _MMIO(0x9888), 0x07848000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x03844000 }, - { _MMIO(0x9888), 0x17808137 }, - { _MMIO(0x9888), 0x1980c147 }, - { _MMIO(0x9888), 0x1b80c0e5 }, - { _MMIO(0x9888), 0x1d80c0e3 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x1180c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x13804000 }, - { _MMIO(0x9888), 0x15800000 }, - { _MMIO(0xd24), 0x00000000 }, - { _MMIO(0x9888), 0x4d805000 }, - { _MMIO(0x9888), 0x4f800555 }, - { _MMIO(0x9888), 0x43800062 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800062 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47800062 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x3f800062 }, - { _MMIO(0x9888), 0x41800000 }, -}; - -static int -get_compute_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 2); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 2); - - if (INTEL_INFO(dev_priv)->sseu.slice_mask & 0x01) { - regs[n] = mux_config_compute_basic_0_slices_0x01; - lens[n] = ARRAY_SIZE(mux_config_compute_basic_0_slices_0x01); - n++; - } - if (INTEL_INFO(dev_priv)->sseu.slice_mask & 0x02) { - regs[n] = mux_config_compute_basic_2_slices_0x02; - lens[n] = ARRAY_SIZE(mux_config_compute_basic_2_slices_0x02); - n++; - } - - return n; -} - -static const struct i915_oa_reg b_counter_config_render_pipe_profile[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007ffea }, - { _MMIO(0x2774), 0x00007ffc }, - { _MMIO(0x2778), 0x0007affa }, - { _MMIO(0x277c), 0x0000f5fd }, - { _MMIO(0x2780), 0x00079ffa }, - { _MMIO(0x2784), 0x0000f3fb }, - { _MMIO(0x2788), 0x0007bf7a }, - { _MMIO(0x278c), 0x0000f7e7 }, - { _MMIO(0x2790), 0x0007fefa }, - { _MMIO(0x2794), 0x0000f7cf }, - { _MMIO(0x2798), 0x00077ffa }, - { _MMIO(0x279c), 0x0000efdf }, - { _MMIO(0x27a0), 0x0006fffa }, - { _MMIO(0x27a4), 0x0000cfbf }, - { _MMIO(0x27a8), 0x0003fffa }, - { _MMIO(0x27ac), 0x00005f7f }, -}; - -static const struct i915_oa_reg flex_eu_config_render_pipe_profile[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_render_pipe_profile[] = { - { _MMIO(0x9888), 0x0a1e0000 }, - { _MMIO(0x9888), 0x0c1f000f }, - { _MMIO(0x9888), 0x10176800 }, - { _MMIO(0x9888), 0x1191001f }, - { _MMIO(0x9888), 0x0b880320 }, - { _MMIO(0x9888), 0x01890c40 }, - { _MMIO(0x9888), 0x118a1c00 }, - { _MMIO(0x9888), 0x118d7c00 }, - { _MMIO(0x9888), 0x118e0020 }, - { _MMIO(0x9888), 0x118f4c00 }, - { _MMIO(0x9888), 0x11900000 }, - { _MMIO(0x9888), 0x13900001 }, - { _MMIO(0x9888), 0x065c4000 }, - { _MMIO(0x9888), 0x0c3d8000 }, - { _MMIO(0x9888), 0x06584000 }, - { _MMIO(0x9888), 0x0c5b4000 }, - { _MMIO(0x9888), 0x081e0040 }, - { _MMIO(0x9888), 0x0e1e0000 }, - { _MMIO(0x9888), 0x021f5400 }, - { _MMIO(0x9888), 0x001f0000 }, - { _MMIO(0x9888), 0x101f0010 }, - { _MMIO(0x9888), 0x0e1f0080 }, - { _MMIO(0x9888), 0x0c384000 }, - { _MMIO(0x9888), 0x06392000 }, - { _MMIO(0x9888), 0x0c13c000 }, - { _MMIO(0x9888), 0x06164000 }, - { _MMIO(0x9888), 0x06170012 }, - { _MMIO(0x9888), 0x00170000 }, - { _MMIO(0x9888), 0x01910005 }, - { _MMIO(0x9888), 0x07880002 }, - { _MMIO(0x9888), 0x01880c00 }, - { _MMIO(0x9888), 0x0f880000 }, - { _MMIO(0x9888), 0x0d880000 }, - { _MMIO(0x9888), 0x05880000 }, - { _MMIO(0x9888), 0x09890032 }, - { _MMIO(0x9888), 0x078a0800 }, - { _MMIO(0x9888), 0x0f8a0a00 }, - { _MMIO(0x9888), 0x198a4000 }, - { _MMIO(0x9888), 0x1b8a2000 }, - { _MMIO(0x9888), 0x1d8a0000 }, - { _MMIO(0x9888), 0x038a4000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x0d8a8000 }, - { _MMIO(0x9888), 0x238b54c0 }, - { _MMIO(0x9888), 0x258baa55 }, - { _MMIO(0x9888), 0x278b0019 }, - { _MMIO(0x9888), 0x198c0100 }, - { _MMIO(0x9888), 0x058c4000 }, - { _MMIO(0x9888), 0x0f8d0015 }, - { _MMIO(0x9888), 0x018d1000 }, - { _MMIO(0x9888), 0x098d8000 }, - { _MMIO(0x9888), 0x0b8df000 }, - { _MMIO(0x9888), 0x0d8d3000 }, - { _MMIO(0x9888), 0x038de000 }, - { _MMIO(0x9888), 0x058d3000 }, - { _MMIO(0x9888), 0x0d8e0004 }, - { _MMIO(0x9888), 0x058e000c }, - { _MMIO(0x9888), 0x098e0000 }, - { _MMIO(0x9888), 0x078e0000 }, - { _MMIO(0x9888), 0x038e0000 }, - { _MMIO(0x9888), 0x0b8f0020 }, - { _MMIO(0x9888), 0x198f0c00 }, - { _MMIO(0x9888), 0x078f8000 }, - { _MMIO(0x9888), 0x098f4000 }, - { _MMIO(0x9888), 0x0b900980 }, - { _MMIO(0x9888), 0x03900d80 }, - { _MMIO(0x9888), 0x01900000 }, - { _MMIO(0x9888), 0x1f85aa80 }, - { _MMIO(0x9888), 0x2185aaaa }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x01834000 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0184c000 }, - { _MMIO(0x9888), 0x0784c000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x1180c000 }, - { _MMIO(0x9888), 0x1780c000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0xd24), 0x00000000 }, - { _MMIO(0x9888), 0x4d801111 }, - { _MMIO(0x9888), 0x3d800800 }, - { _MMIO(0x9888), 0x4f801011 }, - { _MMIO(0x9888), 0x43800443 }, - { _MMIO(0x9888), 0x51801111 }, - { _MMIO(0x9888), 0x45800422 }, - { _MMIO(0x9888), 0x53801111 }, - { _MMIO(0x9888), 0x47800c60 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x3f800422 }, - { _MMIO(0x9888), 0x41800021 }, -}; - -static int -get_render_pipe_profile_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_render_pipe_profile; - lens[n] = ARRAY_SIZE(mux_config_render_pipe_profile); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_reads[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x86543210 }, - { _MMIO(0x2748), 0x86543210 }, - { _MMIO(0x2744), 0x00006667 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0x86543210 }, - { _MMIO(0x2758), 0x86543210 }, - { _MMIO(0x2754), 0x00006465 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fe00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fe00 }, - { _MMIO(0x2780), 0x0007f872 }, - { _MMIO(0x2784), 0x0000fe00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fe00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fe00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fe00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fe00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fe00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_reads[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_memory_reads[] = { - { _MMIO(0x9888), 0x198b0343 }, - { _MMIO(0x9888), 0x13845800 }, - { _MMIO(0x9888), 0x15840018 }, - { _MMIO(0x9888), 0x3580001a }, - { _MMIO(0x9888), 0x038b6300 }, - { _MMIO(0x9888), 0x058b6b62 }, - { _MMIO(0x9888), 0x078b006a }, - { _MMIO(0x9888), 0x118b0000 }, - { _MMIO(0x9888), 0x238b0000 }, - { _MMIO(0x9888), 0x258b0000 }, - { _MMIO(0x9888), 0x1f85a080 }, - { _MMIO(0x9888), 0x2185aaaa }, - { _MMIO(0x9888), 0x2385000a }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x01840018 }, - { _MMIO(0x9888), 0x07844c80 }, - { _MMIO(0x9888), 0x09840d9a }, - { _MMIO(0x9888), 0x0b840e9c }, - { _MMIO(0x9888), 0x0d840f9e }, - { _MMIO(0x9888), 0x0f840010 }, - { _MMIO(0x9888), 0x11840000 }, - { _MMIO(0x9888), 0x03848000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x2f8000e5 }, - { _MMIO(0x9888), 0x138080e3 }, - { _MMIO(0x9888), 0x1580c0e1 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x11804000 }, - { _MMIO(0x9888), 0x1780c000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f804000 }, - { _MMIO(0xd24), 0x00000000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3d800800 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x43800842 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800842 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47801042 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x3f800084 }, - { _MMIO(0x9888), 0x41800000 }, -}; - -static int -get_memory_reads_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_memory_reads; - lens[n] = ARRAY_SIZE(mux_config_memory_reads); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_writes[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x86543210 }, - { _MMIO(0x2748), 0x86543210 }, - { _MMIO(0x2744), 0x00006667 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0x86543210 }, - { _MMIO(0x2758), 0x86543210 }, - { _MMIO(0x2754), 0x00006465 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fe00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fe00 }, - { _MMIO(0x2780), 0x0007f822 }, - { _MMIO(0x2784), 0x0000fe00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fe00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fe00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fe00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fe00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fe00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_writes[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_memory_writes[] = { - { _MMIO(0x9888), 0x198b0343 }, - { _MMIO(0x9888), 0x13845400 }, - { _MMIO(0x9888), 0x3580001a }, - { _MMIO(0x9888), 0x3d800805 }, - { _MMIO(0x9888), 0x038b6300 }, - { _MMIO(0x9888), 0x058b6b62 }, - { _MMIO(0x9888), 0x078b006a }, - { _MMIO(0x9888), 0x118b0000 }, - { _MMIO(0x9888), 0x238b0000 }, - { _MMIO(0x9888), 0x258b0000 }, - { _MMIO(0x9888), 0x1f85a080 }, - { _MMIO(0x9888), 0x2185aaaa }, - { _MMIO(0x9888), 0x23850002 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x01840010 }, - { _MMIO(0x9888), 0x07844880 }, - { _MMIO(0x9888), 0x09840992 }, - { _MMIO(0x9888), 0x0b840a94 }, - { _MMIO(0x9888), 0x0d840b96 }, - { _MMIO(0x9888), 0x11840000 }, - { _MMIO(0x9888), 0x03848000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x2d800147 }, - { _MMIO(0x9888), 0x2f8000e5 }, - { _MMIO(0x9888), 0x138080e3 }, - { _MMIO(0x9888), 0x1580c0e1 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x11804000 }, - { _MMIO(0x9888), 0x1780c000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f800000 }, - { _MMIO(0xd24), 0x00000000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x43800842 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800842 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47801082 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x3f800084 }, - { _MMIO(0x9888), 0x41800000 }, -}; - -static int -get_memory_writes_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_memory_writes; - lens[n] = ARRAY_SIZE(mux_config_memory_writes); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_extended[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007fc2a }, - { _MMIO(0x2774), 0x0000bf00 }, - { _MMIO(0x2778), 0x0007fc6a }, - { _MMIO(0x277c), 0x0000bf00 }, - { _MMIO(0x2780), 0x0007fc92 }, - { _MMIO(0x2784), 0x0000bf00 }, - { _MMIO(0x2788), 0x0007fca2 }, - { _MMIO(0x278c), 0x0000bf00 }, - { _MMIO(0x2790), 0x0007fc32 }, - { _MMIO(0x2794), 0x0000bf00 }, - { _MMIO(0x2798), 0x0007fc9a }, - { _MMIO(0x279c), 0x0000bf00 }, - { _MMIO(0x27a0), 0x0007fe6a }, - { _MMIO(0x27a4), 0x0000bf00 }, - { _MMIO(0x27a8), 0x0007fe7a }, - { _MMIO(0x27ac), 0x0000bf00 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_extended[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_compute_extended_0_subslices_0x01[] = { - { _MMIO(0x9888), 0x143d0160 }, - { _MMIO(0x9888), 0x163d2800 }, - { _MMIO(0x9888), 0x183d0120 }, - { _MMIO(0x9888), 0x105800e0 }, - { _MMIO(0x9888), 0x005cc000 }, - { _MMIO(0x9888), 0x065c8000 }, - { _MMIO(0x9888), 0x085cc000 }, - { _MMIO(0x9888), 0x0a5cc000 }, - { _MMIO(0x9888), 0x0c5cc000 }, - { _MMIO(0x9888), 0x0e5cc000 }, - { _MMIO(0x9888), 0x025cc000 }, - { _MMIO(0x9888), 0x045cc000 }, - { _MMIO(0x9888), 0x003d0011 }, - { _MMIO(0x9888), 0x063d0900 }, - { _MMIO(0x9888), 0x083d0a13 }, - { _MMIO(0x9888), 0x0a3d0b15 }, - { _MMIO(0x9888), 0x0c3d2317 }, - { _MMIO(0x9888), 0x043d21b7 }, - { _MMIO(0x9888), 0x103d0000 }, - { _MMIO(0x9888), 0x0e3d0000 }, - { _MMIO(0x9888), 0x1a3d0000 }, - { _MMIO(0x9888), 0x0e5825c1 }, - { _MMIO(0x9888), 0x00586100 }, - { _MMIO(0x9888), 0x0258204c }, - { _MMIO(0x9888), 0x06588000 }, - { _MMIO(0x9888), 0x0858c000 }, - { _MMIO(0x9888), 0x0a58c000 }, - { _MMIO(0x9888), 0x0c58c000 }, - { _MMIO(0x9888), 0x0458c000 }, - { _MMIO(0x9888), 0x005b4000 }, - { _MMIO(0x9888), 0x0e5b4000 }, - { _MMIO(0x9888), 0x185b5400 }, - { _MMIO(0x9888), 0x1a5b0155 }, - { _MMIO(0x9888), 0x025b4000 }, - { _MMIO(0x9888), 0x045b4000 }, - { _MMIO(0x9888), 0x065b4000 }, - { _MMIO(0x9888), 0x085b4000 }, - { _MMIO(0x9888), 0x0a5b4000 }, - { _MMIO(0x9888), 0x0c1fa800 }, - { _MMIO(0x9888), 0x0e1faa2a }, - { _MMIO(0x9888), 0x101f02aa }, - { _MMIO(0x9888), 0x00384000 }, - { _MMIO(0x9888), 0x0e384000 }, - { _MMIO(0x9888), 0x16384000 }, - { _MMIO(0x9888), 0x18381555 }, - { _MMIO(0x9888), 0x02384000 }, - { _MMIO(0x9888), 0x04384000 }, - { _MMIO(0x9888), 0x06384000 }, - { _MMIO(0x9888), 0x08384000 }, - { _MMIO(0x9888), 0x0a384000 }, - { _MMIO(0x9888), 0x0039a000 }, - { _MMIO(0x9888), 0x06398000 }, - { _MMIO(0x9888), 0x0839a000 }, - { _MMIO(0x9888), 0x0a39a000 }, - { _MMIO(0x9888), 0x0c39a000 }, - { _MMIO(0x9888), 0x0e39a000 }, - { _MMIO(0x9888), 0x0239a000 }, - { _MMIO(0x9888), 0x0439a000 }, - { _MMIO(0x9888), 0x018a8000 }, - { _MMIO(0x9888), 0x0f8a8000 }, - { _MMIO(0x9888), 0x198a8000 }, - { _MMIO(0x9888), 0x1b8aaaa0 }, - { _MMIO(0x9888), 0x1d8a0002 }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x078a8000 }, - { _MMIO(0x9888), 0x098a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x238b2aa0 }, - { _MMIO(0x9888), 0x258b5551 }, - { _MMIO(0x9888), 0x278b0015 }, - { _MMIO(0x9888), 0x1f85aa80 }, - { _MMIO(0x9888), 0x2185aaa2 }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x01834000 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0184c000 }, - { _MMIO(0x9888), 0x07848000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x1180c000 }, - { _MMIO(0x9888), 0x17808000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0xd24), 0x00000000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3d800000 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x43800000 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47800420 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x3f800421 }, - { _MMIO(0x9888), 0x41800000 }, -}; - -static const struct i915_oa_reg mux_config_compute_extended_2_subslices_0x02[] = { - { _MMIO(0x9888), 0x105c00e0 }, - { _MMIO(0x9888), 0x145b0160 }, - { _MMIO(0x9888), 0x165b2800 }, - { _MMIO(0x9888), 0x185b0120 }, - { _MMIO(0x9888), 0x0e5c25c1 }, - { _MMIO(0x9888), 0x005c6100 }, - { _MMIO(0x9888), 0x025c204c }, - { _MMIO(0x9888), 0x065c8000 }, - { _MMIO(0x9888), 0x085cc000 }, - { _MMIO(0x9888), 0x0a5cc000 }, - { _MMIO(0x9888), 0x0c5cc000 }, - { _MMIO(0x9888), 0x045cc000 }, - { _MMIO(0x9888), 0x005b0011 }, - { _MMIO(0x9888), 0x065b0900 }, - { _MMIO(0x9888), 0x085b0a13 }, - { _MMIO(0x9888), 0x0a5b0b15 }, - { _MMIO(0x9888), 0x0c5b2317 }, - { _MMIO(0x9888), 0x045b21b7 }, - { _MMIO(0x9888), 0x105b0000 }, - { _MMIO(0x9888), 0x0e5b0000 }, - { _MMIO(0x9888), 0x1a5b0000 }, - { _MMIO(0x9888), 0x0c1fa800 }, - { _MMIO(0x9888), 0x0e1faa2a }, - { _MMIO(0x9888), 0x101f02aa }, - { _MMIO(0x9888), 0x00384000 }, - { _MMIO(0x9888), 0x0e384000 }, - { _MMIO(0x9888), 0x16384000 }, - { _MMIO(0x9888), 0x18381555 }, - { _MMIO(0x9888), 0x02384000 }, - { _MMIO(0x9888), 0x04384000 }, - { _MMIO(0x9888), 0x06384000 }, - { _MMIO(0x9888), 0x08384000 }, - { _MMIO(0x9888), 0x0a384000 }, - { _MMIO(0x9888), 0x0039a000 }, - { _MMIO(0x9888), 0x06398000 }, - { _MMIO(0x9888), 0x0839a000 }, - { _MMIO(0x9888), 0x0a39a000 }, - { _MMIO(0x9888), 0x0c39a000 }, - { _MMIO(0x9888), 0x0e39a000 }, - { _MMIO(0x9888), 0x0239a000 }, - { _MMIO(0x9888), 0x0439a000 }, - { _MMIO(0x9888), 0x018a8000 }, - { _MMIO(0x9888), 0x0f8a8000 }, - { _MMIO(0x9888), 0x198a8000 }, - { _MMIO(0x9888), 0x1b8aaaa0 }, - { _MMIO(0x9888), 0x1d8a0002 }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x078a8000 }, - { _MMIO(0x9888), 0x098a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x238b2aa0 }, - { _MMIO(0x9888), 0x258b5551 }, - { _MMIO(0x9888), 0x278b0015 }, - { _MMIO(0x9888), 0x1f85aa80 }, - { _MMIO(0x9888), 0x2185aaa2 }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x01834000 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0184c000 }, - { _MMIO(0x9888), 0x07848000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x1180c000 }, - { _MMIO(0x9888), 0x17808000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0xd24), 0x00000000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3d800000 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x43800000 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47800420 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x3f800421 }, - { _MMIO(0x9888), 0x41800000 }, -}; - -static const struct i915_oa_reg mux_config_compute_extended_4_subslices_0x04[] = { - { _MMIO(0x9888), 0x103800e0 }, - { _MMIO(0x9888), 0x143a0160 }, - { _MMIO(0x9888), 0x163a2800 }, - { _MMIO(0x9888), 0x183a0120 }, - { _MMIO(0x9888), 0x0c1fa800 }, - { _MMIO(0x9888), 0x0e1faa2a }, - { _MMIO(0x9888), 0x101f02aa }, - { _MMIO(0x9888), 0x0e38a5c1 }, - { _MMIO(0x9888), 0x0038a100 }, - { _MMIO(0x9888), 0x0238204c }, - { _MMIO(0x9888), 0x16388000 }, - { _MMIO(0x9888), 0x183802aa }, - { _MMIO(0x9888), 0x04380000 }, - { _MMIO(0x9888), 0x06380000 }, - { _MMIO(0x9888), 0x08388000 }, - { _MMIO(0x9888), 0x0a388000 }, - { _MMIO(0x9888), 0x0039a000 }, - { _MMIO(0x9888), 0x06398000 }, - { _MMIO(0x9888), 0x0839a000 }, - { _MMIO(0x9888), 0x0a39a000 }, - { _MMIO(0x9888), 0x0c39a000 }, - { _MMIO(0x9888), 0x0e39a000 }, - { _MMIO(0x9888), 0x0239a000 }, - { _MMIO(0x9888), 0x0439a000 }, - { _MMIO(0x9888), 0x003a0011 }, - { _MMIO(0x9888), 0x063a0900 }, - { _MMIO(0x9888), 0x083a0a13 }, - { _MMIO(0x9888), 0x0a3a0b15 }, - { _MMIO(0x9888), 0x0c3a2317 }, - { _MMIO(0x9888), 0x043a21b7 }, - { _MMIO(0x9888), 0x103a0000 }, - { _MMIO(0x9888), 0x0e3a0000 }, - { _MMIO(0x9888), 0x1a3a0000 }, - { _MMIO(0x9888), 0x018a8000 }, - { _MMIO(0x9888), 0x0f8a8000 }, - { _MMIO(0x9888), 0x198a8000 }, - { _MMIO(0x9888), 0x1b8aaaa0 }, - { _MMIO(0x9888), 0x1d8a0002 }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x078a8000 }, - { _MMIO(0x9888), 0x098a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x238b2aa0 }, - { _MMIO(0x9888), 0x258b5551 }, - { _MMIO(0x9888), 0x278b0015 }, - { _MMIO(0x9888), 0x1f85aa80 }, - { _MMIO(0x9888), 0x2185aaa2 }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x01834000 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0184c000 }, - { _MMIO(0x9888), 0x07848000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x1180c000 }, - { _MMIO(0x9888), 0x17808000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0xd24), 0x00000000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3d800000 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x43800000 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47800420 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x3f800421 }, - { _MMIO(0x9888), 0x41800000 }, -}; - -static const struct i915_oa_reg mux_config_compute_extended_1_subslices_0x08[] = { - { _MMIO(0x9888), 0x14bd0160 }, - { _MMIO(0x9888), 0x16bd2800 }, - { _MMIO(0x9888), 0x18bd0120 }, - { _MMIO(0x9888), 0x10d800e0 }, - { _MMIO(0x9888), 0x00dcc000 }, - { _MMIO(0x9888), 0x06dc8000 }, - { _MMIO(0x9888), 0x08dcc000 }, - { _MMIO(0x9888), 0x0adcc000 }, - { _MMIO(0x9888), 0x0cdcc000 }, - { _MMIO(0x9888), 0x0edcc000 }, - { _MMIO(0x9888), 0x02dcc000 }, - { _MMIO(0x9888), 0x04dcc000 }, - { _MMIO(0x9888), 0x00bd0011 }, - { _MMIO(0x9888), 0x06bd0900 }, - { _MMIO(0x9888), 0x08bd0a13 }, - { _MMIO(0x9888), 0x0abd0b15 }, - { _MMIO(0x9888), 0x0cbd2317 }, - { _MMIO(0x9888), 0x04bd21b7 }, - { _MMIO(0x9888), 0x10bd0000 }, - { _MMIO(0x9888), 0x0ebd0000 }, - { _MMIO(0x9888), 0x1abd0000 }, - { _MMIO(0x9888), 0x0ed825c1 }, - { _MMIO(0x9888), 0x00d86100 }, - { _MMIO(0x9888), 0x02d8204c }, - { _MMIO(0x9888), 0x06d88000 }, - { _MMIO(0x9888), 0x08d8c000 }, - { _MMIO(0x9888), 0x0ad8c000 }, - { _MMIO(0x9888), 0x0cd8c000 }, - { _MMIO(0x9888), 0x04d8c000 }, - { _MMIO(0x9888), 0x00db4000 }, - { _MMIO(0x9888), 0x0edb4000 }, - { _MMIO(0x9888), 0x18db5400 }, - { _MMIO(0x9888), 0x1adb0155 }, - { _MMIO(0x9888), 0x02db4000 }, - { _MMIO(0x9888), 0x04db4000 }, - { _MMIO(0x9888), 0x06db4000 }, - { _MMIO(0x9888), 0x08db4000 }, - { _MMIO(0x9888), 0x0adb4000 }, - { _MMIO(0x9888), 0x0c9fa800 }, - { _MMIO(0x9888), 0x0e9faa2a }, - { _MMIO(0x9888), 0x109f02aa }, - { _MMIO(0x9888), 0x00b84000 }, - { _MMIO(0x9888), 0x0eb84000 }, - { _MMIO(0x9888), 0x16b84000 }, - { _MMIO(0x9888), 0x18b81555 }, - { _MMIO(0x9888), 0x02b84000 }, - { _MMIO(0x9888), 0x04b84000 }, - { _MMIO(0x9888), 0x06b84000 }, - { _MMIO(0x9888), 0x08b84000 }, - { _MMIO(0x9888), 0x0ab84000 }, - { _MMIO(0x9888), 0x00b9a000 }, - { _MMIO(0x9888), 0x06b98000 }, - { _MMIO(0x9888), 0x08b9a000 }, - { _MMIO(0x9888), 0x0ab9a000 }, - { _MMIO(0x9888), 0x0cb9a000 }, - { _MMIO(0x9888), 0x0eb9a000 }, - { _MMIO(0x9888), 0x02b9a000 }, - { _MMIO(0x9888), 0x04b9a000 }, - { _MMIO(0x9888), 0x01888000 }, - { _MMIO(0x9888), 0x0d88f800 }, - { _MMIO(0x9888), 0x0f88000f }, - { _MMIO(0x9888), 0x03888000 }, - { _MMIO(0x9888), 0x05888000 }, - { _MMIO(0x9888), 0x07888000 }, - { _MMIO(0x9888), 0x09888000 }, - { _MMIO(0x9888), 0x0b888000 }, - { _MMIO(0x9888), 0x238b5540 }, - { _MMIO(0x9888), 0x258baaa2 }, - { _MMIO(0x9888), 0x278b002a }, - { _MMIO(0x9888), 0x018c4000 }, - { _MMIO(0x9888), 0x0f8c4000 }, - { _MMIO(0x9888), 0x178c2000 }, - { _MMIO(0x9888), 0x198c5500 }, - { _MMIO(0x9888), 0x1b8c0015 }, - { _MMIO(0x9888), 0x038c4000 }, - { _MMIO(0x9888), 0x058c4000 }, - { _MMIO(0x9888), 0x078c4000 }, - { _MMIO(0x9888), 0x098c4000 }, - { _MMIO(0x9888), 0x0b8c4000 }, - { _MMIO(0x9888), 0x018da000 }, - { _MMIO(0x9888), 0x078d8000 }, - { _MMIO(0x9888), 0x098da000 }, - { _MMIO(0x9888), 0x0b8da000 }, - { _MMIO(0x9888), 0x0d8da000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x038da000 }, - { _MMIO(0x9888), 0x058da000 }, - { _MMIO(0x9888), 0x1f85aa80 }, - { _MMIO(0x9888), 0x2185aaa2 }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x01834000 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0184c000 }, - { _MMIO(0x9888), 0x07848000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x1180c000 }, - { _MMIO(0x9888), 0x17808000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0xd24), 0x00000000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3d800000 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x43800000 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47800420 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x3f800421 }, - { _MMIO(0x9888), 0x41800000 }, -}; - -static const struct i915_oa_reg mux_config_compute_extended_3_subslices_0x10[] = { - { _MMIO(0x9888), 0x10dc00e0 }, - { _MMIO(0x9888), 0x14db0160 }, - { _MMIO(0x9888), 0x16db2800 }, - { _MMIO(0x9888), 0x18db0120 }, - { _MMIO(0x9888), 0x0edc25c1 }, - { _MMIO(0x9888), 0x00dc6100 }, - { _MMIO(0x9888), 0x02dc204c }, - { _MMIO(0x9888), 0x06dc8000 }, - { _MMIO(0x9888), 0x08dcc000 }, - { _MMIO(0x9888), 0x0adcc000 }, - { _MMIO(0x9888), 0x0cdcc000 }, - { _MMIO(0x9888), 0x04dcc000 }, - { _MMIO(0x9888), 0x00db0011 }, - { _MMIO(0x9888), 0x06db0900 }, - { _MMIO(0x9888), 0x08db0a13 }, - { _MMIO(0x9888), 0x0adb0b15 }, - { _MMIO(0x9888), 0x0cdb2317 }, - { _MMIO(0x9888), 0x04db21b7 }, - { _MMIO(0x9888), 0x10db0000 }, - { _MMIO(0x9888), 0x0edb0000 }, - { _MMIO(0x9888), 0x1adb0000 }, - { _MMIO(0x9888), 0x0c9fa800 }, - { _MMIO(0x9888), 0x0e9faa2a }, - { _MMIO(0x9888), 0x109f02aa }, - { _MMIO(0x9888), 0x00b84000 }, - { _MMIO(0x9888), 0x0eb84000 }, - { _MMIO(0x9888), 0x16b84000 }, - { _MMIO(0x9888), 0x18b81555 }, - { _MMIO(0x9888), 0x02b84000 }, - { _MMIO(0x9888), 0x04b84000 }, - { _MMIO(0x9888), 0x06b84000 }, - { _MMIO(0x9888), 0x08b84000 }, - { _MMIO(0x9888), 0x0ab84000 }, - { _MMIO(0x9888), 0x00b9a000 }, - { _MMIO(0x9888), 0x06b98000 }, - { _MMIO(0x9888), 0x08b9a000 }, - { _MMIO(0x9888), 0x0ab9a000 }, - { _MMIO(0x9888), 0x0cb9a000 }, - { _MMIO(0x9888), 0x0eb9a000 }, - { _MMIO(0x9888), 0x02b9a000 }, - { _MMIO(0x9888), 0x04b9a000 }, - { _MMIO(0x9888), 0x01888000 }, - { _MMIO(0x9888), 0x0d88f800 }, - { _MMIO(0x9888), 0x0f88000f }, - { _MMIO(0x9888), 0x03888000 }, - { _MMIO(0x9888), 0x05888000 }, - { _MMIO(0x9888), 0x07888000 }, - { _MMIO(0x9888), 0x09888000 }, - { _MMIO(0x9888), 0x0b888000 }, - { _MMIO(0x9888), 0x238b5540 }, - { _MMIO(0x9888), 0x258baaa2 }, - { _MMIO(0x9888), 0x278b002a }, - { _MMIO(0x9888), 0x018c4000 }, - { _MMIO(0x9888), 0x0f8c4000 }, - { _MMIO(0x9888), 0x178c2000 }, - { _MMIO(0x9888), 0x198c5500 }, - { _MMIO(0x9888), 0x1b8c0015 }, - { _MMIO(0x9888), 0x038c4000 }, - { _MMIO(0x9888), 0x058c4000 }, - { _MMIO(0x9888), 0x078c4000 }, - { _MMIO(0x9888), 0x098c4000 }, - { _MMIO(0x9888), 0x0b8c4000 }, - { _MMIO(0x9888), 0x018da000 }, - { _MMIO(0x9888), 0x078d8000 }, - { _MMIO(0x9888), 0x098da000 }, - { _MMIO(0x9888), 0x0b8da000 }, - { _MMIO(0x9888), 0x0d8da000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x038da000 }, - { _MMIO(0x9888), 0x058da000 }, - { _MMIO(0x9888), 0x1f85aa80 }, - { _MMIO(0x9888), 0x2185aaa2 }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x01834000 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0184c000 }, - { _MMIO(0x9888), 0x07848000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x1180c000 }, - { _MMIO(0x9888), 0x17808000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0xd24), 0x00000000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3d800000 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x43800000 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47800420 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x3f800421 }, - { _MMIO(0x9888), 0x41800000 }, -}; - -static const struct i915_oa_reg mux_config_compute_extended_5_subslices_0x20[] = { - { _MMIO(0x9888), 0x10b800e0 }, - { _MMIO(0x9888), 0x14ba0160 }, - { _MMIO(0x9888), 0x16ba2800 }, - { _MMIO(0x9888), 0x18ba0120 }, - { _MMIO(0x9888), 0x0c9fa800 }, - { _MMIO(0x9888), 0x0e9faa2a }, - { _MMIO(0x9888), 0x109f02aa }, - { _MMIO(0x9888), 0x0eb8a5c1 }, - { _MMIO(0x9888), 0x00b8a100 }, - { _MMIO(0x9888), 0x02b8204c }, - { _MMIO(0x9888), 0x16b88000 }, - { _MMIO(0x9888), 0x18b802aa }, - { _MMIO(0x9888), 0x04b80000 }, - { _MMIO(0x9888), 0x06b80000 }, - { _MMIO(0x9888), 0x08b88000 }, - { _MMIO(0x9888), 0x0ab88000 }, - { _MMIO(0x9888), 0x00b9a000 }, - { _MMIO(0x9888), 0x06b98000 }, - { _MMIO(0x9888), 0x08b9a000 }, - { _MMIO(0x9888), 0x0ab9a000 }, - { _MMIO(0x9888), 0x0cb9a000 }, - { _MMIO(0x9888), 0x0eb9a000 }, - { _MMIO(0x9888), 0x02b9a000 }, - { _MMIO(0x9888), 0x04b9a000 }, - { _MMIO(0x9888), 0x00ba0011 }, - { _MMIO(0x9888), 0x06ba0900 }, - { _MMIO(0x9888), 0x08ba0a13 }, - { _MMIO(0x9888), 0x0aba0b15 }, - { _MMIO(0x9888), 0x0cba2317 }, - { _MMIO(0x9888), 0x04ba21b7 }, - { _MMIO(0x9888), 0x10ba0000 }, - { _MMIO(0x9888), 0x0eba0000 }, - { _MMIO(0x9888), 0x1aba0000 }, - { _MMIO(0x9888), 0x01888000 }, - { _MMIO(0x9888), 0x0d88f800 }, - { _MMIO(0x9888), 0x0f88000f }, - { _MMIO(0x9888), 0x03888000 }, - { _MMIO(0x9888), 0x05888000 }, - { _MMIO(0x9888), 0x07888000 }, - { _MMIO(0x9888), 0x09888000 }, - { _MMIO(0x9888), 0x0b888000 }, - { _MMIO(0x9888), 0x238b5540 }, - { _MMIO(0x9888), 0x258baaa2 }, - { _MMIO(0x9888), 0x278b002a }, - { _MMIO(0x9888), 0x018c4000 }, - { _MMIO(0x9888), 0x0f8c4000 }, - { _MMIO(0x9888), 0x178c2000 }, - { _MMIO(0x9888), 0x198c5500 }, - { _MMIO(0x9888), 0x1b8c0015 }, - { _MMIO(0x9888), 0x038c4000 }, - { _MMIO(0x9888), 0x058c4000 }, - { _MMIO(0x9888), 0x078c4000 }, - { _MMIO(0x9888), 0x098c4000 }, - { _MMIO(0x9888), 0x0b8c4000 }, - { _MMIO(0x9888), 0x018da000 }, - { _MMIO(0x9888), 0x078d8000 }, - { _MMIO(0x9888), 0x098da000 }, - { _MMIO(0x9888), 0x0b8da000 }, - { _MMIO(0x9888), 0x0d8da000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x038da000 }, - { _MMIO(0x9888), 0x058da000 }, - { _MMIO(0x9888), 0x1f85aa80 }, - { _MMIO(0x9888), 0x2185aaa2 }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x01834000 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0184c000 }, - { _MMIO(0x9888), 0x07848000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x1180c000 }, - { _MMIO(0x9888), 0x17808000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0xd24), 0x00000000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3d800000 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x43800000 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47800420 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x3f800421 }, - { _MMIO(0x9888), 0x41800000 }, -}; - -static int -get_compute_extended_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 6); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 6); - - if (INTEL_INFO(dev_priv)->sseu.subslice_mask & 0x01) { - regs[n] = mux_config_compute_extended_0_subslices_0x01; - lens[n] = ARRAY_SIZE(mux_config_compute_extended_0_subslices_0x01); - n++; - } - if (INTEL_INFO(dev_priv)->sseu.subslice_mask & 0x08) { - regs[n] = mux_config_compute_extended_1_subslices_0x08; - lens[n] = ARRAY_SIZE(mux_config_compute_extended_1_subslices_0x08); - n++; - } - if (INTEL_INFO(dev_priv)->sseu.subslice_mask & 0x02) { - regs[n] = mux_config_compute_extended_2_subslices_0x02; - lens[n] = ARRAY_SIZE(mux_config_compute_extended_2_subslices_0x02); - n++; - } - if (INTEL_INFO(dev_priv)->sseu.subslice_mask & 0x10) { - regs[n] = mux_config_compute_extended_3_subslices_0x10; - lens[n] = ARRAY_SIZE(mux_config_compute_extended_3_subslices_0x10); - n++; - } - if (INTEL_INFO(dev_priv)->sseu.subslice_mask & 0x04) { - regs[n] = mux_config_compute_extended_4_subslices_0x04; - lens[n] = ARRAY_SIZE(mux_config_compute_extended_4_subslices_0x04); - n++; - } - if (INTEL_INFO(dev_priv)->sseu.subslice_mask & 0x20) { - regs[n] = mux_config_compute_extended_5_subslices_0x20; - lens[n] = ARRAY_SIZE(mux_config_compute_extended_5_subslices_0x20); - n++; - } - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_l3_cache[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x30800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007fffa }, - { _MMIO(0x2774), 0x0000fefe }, - { _MMIO(0x2778), 0x0007fffa }, - { _MMIO(0x277c), 0x0000fefd }, - { _MMIO(0x2790), 0x0007fffa }, - { _MMIO(0x2794), 0x0000fbef }, - { _MMIO(0x2798), 0x0007fffa }, - { _MMIO(0x279c), 0x0000fbdf }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_l3_cache[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00101100 }, - { _MMIO(0xe45c), 0x00201200 }, - { _MMIO(0xe55c), 0x00301300 }, - { _MMIO(0xe65c), 0x00401400 }, -}; - -static const struct i915_oa_reg mux_config_compute_l3_cache[] = { - { _MMIO(0x9888), 0x143f00b3 }, - { _MMIO(0x9888), 0x14bf00b3 }, - { _MMIO(0x9888), 0x138303c0 }, - { _MMIO(0x9888), 0x3b800060 }, - { _MMIO(0x9888), 0x3d800805 }, - { _MMIO(0x9888), 0x003f0029 }, - { _MMIO(0x9888), 0x063f1400 }, - { _MMIO(0x9888), 0x083f1225 }, - { _MMIO(0x9888), 0x0e3f1327 }, - { _MMIO(0x9888), 0x103f0000 }, - { _MMIO(0x9888), 0x005a4000 }, - { _MMIO(0x9888), 0x065a8000 }, - { _MMIO(0x9888), 0x085ac000 }, - { _MMIO(0x9888), 0x0e5ac000 }, - { _MMIO(0x9888), 0x001d4000 }, - { _MMIO(0x9888), 0x061d8000 }, - { _MMIO(0x9888), 0x081dc000 }, - { _MMIO(0x9888), 0x0e1dc000 }, - { _MMIO(0x9888), 0x0c1f0800 }, - { _MMIO(0x9888), 0x0e1f2a00 }, - { _MMIO(0x9888), 0x101f0280 }, - { _MMIO(0x9888), 0x00391000 }, - { _MMIO(0x9888), 0x06394000 }, - { _MMIO(0x9888), 0x08395000 }, - { _MMIO(0x9888), 0x0e395000 }, - { _MMIO(0x9888), 0x0abf1429 }, - { _MMIO(0x9888), 0x0cbf1225 }, - { _MMIO(0x9888), 0x00bf1380 }, - { _MMIO(0x9888), 0x02bf0026 }, - { _MMIO(0x9888), 0x10bf0000 }, - { _MMIO(0x9888), 0x0adac000 }, - { _MMIO(0x9888), 0x0cdac000 }, - { _MMIO(0x9888), 0x00da8000 }, - { _MMIO(0x9888), 0x02da4000 }, - { _MMIO(0x9888), 0x0a9dc000 }, - { _MMIO(0x9888), 0x0c9dc000 }, - { _MMIO(0x9888), 0x009d8000 }, - { _MMIO(0x9888), 0x029d4000 }, - { _MMIO(0x9888), 0x0e9f8000 }, - { _MMIO(0x9888), 0x109f002a }, - { _MMIO(0x9888), 0x0c9fa000 }, - { _MMIO(0x9888), 0x0ab95000 }, - { _MMIO(0x9888), 0x0cb95000 }, - { _MMIO(0x9888), 0x00b94000 }, - { _MMIO(0x9888), 0x02b91000 }, - { _MMIO(0x9888), 0x0d88c000 }, - { _MMIO(0x9888), 0x0f880003 }, - { _MMIO(0x9888), 0x03888000 }, - { _MMIO(0x9888), 0x05888000 }, - { _MMIO(0x9888), 0x018a8000 }, - { _MMIO(0x9888), 0x0f8a8000 }, - { _MMIO(0x9888), 0x198a8000 }, - { _MMIO(0x9888), 0x1b8a8020 }, - { _MMIO(0x9888), 0x1d8a0002 }, - { _MMIO(0x9888), 0x238b0520 }, - { _MMIO(0x9888), 0x258ba950 }, - { _MMIO(0x9888), 0x278b0016 }, - { _MMIO(0x9888), 0x198c5400 }, - { _MMIO(0x9888), 0x1b8c0001 }, - { _MMIO(0x9888), 0x038c4000 }, - { _MMIO(0x9888), 0x058c4000 }, - { _MMIO(0x9888), 0x0b8da000 }, - { _MMIO(0x9888), 0x0d8da000 }, - { _MMIO(0x9888), 0x018d8000 }, - { _MMIO(0x9888), 0x038d2000 }, - { _MMIO(0x9888), 0x1f85aa80 }, - { _MMIO(0x9888), 0x2185aaa0 }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x03835180 }, - { _MMIO(0x9888), 0x05834022 }, - { _MMIO(0x9888), 0x11830000 }, - { _MMIO(0x9888), 0x01834000 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x07830000 }, - { _MMIO(0x9888), 0x09830000 }, - { _MMIO(0x9888), 0x0184c000 }, - { _MMIO(0x9888), 0x07848000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x05844000 }, - { _MMIO(0x9888), 0x1b80c137 }, - { _MMIO(0x9888), 0x1d80c147 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x1180c000 }, - { _MMIO(0x9888), 0x17808000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x15804000 }, - { _MMIO(0xd24), 0x00000000 }, - { _MMIO(0x9888), 0x4d801000 }, - { _MMIO(0x9888), 0x4f800111 }, - { _MMIO(0x9888), 0x43800842 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47800840 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x3f800800 }, - { _MMIO(0x9888), 0x418014a2 }, -}; - -static int -get_compute_l3_cache_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_l3_cache; - lens[n] = ARRAY_SIZE(mux_config_compute_l3_cache); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_data_port_reads_coalescing[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0xba98ba98 }, - { _MMIO(0x2748), 0xba98ba98 }, - { _MMIO(0x2744), 0x00003377 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007fff2 }, - { _MMIO(0x2774), 0x00007ff0 }, - { _MMIO(0x2778), 0x0007ffe2 }, - { _MMIO(0x277c), 0x00007ff0 }, - { _MMIO(0x2780), 0x0007ffc2 }, - { _MMIO(0x2784), 0x00007ff0 }, - { _MMIO(0x2788), 0x0007ff82 }, - { _MMIO(0x278c), 0x00007ff0 }, - { _MMIO(0x2790), 0x0007fffa }, - { _MMIO(0x2794), 0x0000bfef }, - { _MMIO(0x2798), 0x0007fffa }, - { _MMIO(0x279c), 0x0000bfdf }, - { _MMIO(0x27a0), 0x0007fffa }, - { _MMIO(0x27a4), 0x0000bfbf }, - { _MMIO(0x27a8), 0x0007fffa }, - { _MMIO(0x27ac), 0x0000bf7f }, -}; - -static const struct i915_oa_reg flex_eu_config_data_port_reads_coalescing[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_data_port_reads_coalescing_0_subslices_0x01[] = { - { _MMIO(0x9888), 0x103d0005 }, - { _MMIO(0x9888), 0x163d240b }, - { _MMIO(0x9888), 0x1058022f }, - { _MMIO(0x9888), 0x185b5520 }, - { _MMIO(0x9888), 0x198b0003 }, - { _MMIO(0x9888), 0x005cc000 }, - { _MMIO(0x9888), 0x065cc000 }, - { _MMIO(0x9888), 0x085cc000 }, - { _MMIO(0x9888), 0x0a5cc000 }, - { _MMIO(0x9888), 0x0c5cc000 }, - { _MMIO(0x9888), 0x0e5cc000 }, - { _MMIO(0x9888), 0x025c4000 }, - { _MMIO(0x9888), 0x045c8000 }, - { _MMIO(0x9888), 0x003d0000 }, - { _MMIO(0x9888), 0x063d00b0 }, - { _MMIO(0x9888), 0x083d0182 }, - { _MMIO(0x9888), 0x0a3d10a0 }, - { _MMIO(0x9888), 0x0c3d11a2 }, - { _MMIO(0x9888), 0x0e3d0000 }, - { _MMIO(0x9888), 0x183d0000 }, - { _MMIO(0x9888), 0x1a3d0000 }, - { _MMIO(0x9888), 0x0e582242 }, - { _MMIO(0x9888), 0x00586700 }, - { _MMIO(0x9888), 0x0258004f }, - { _MMIO(0x9888), 0x0658c000 }, - { _MMIO(0x9888), 0x0858c000 }, - { _MMIO(0x9888), 0x0a58c000 }, - { _MMIO(0x9888), 0x0c58c000 }, - { _MMIO(0x9888), 0x045b6300 }, - { _MMIO(0x9888), 0x105b0000 }, - { _MMIO(0x9888), 0x005b4000 }, - { _MMIO(0x9888), 0x0e5b4000 }, - { _MMIO(0x9888), 0x1a5b0155 }, - { _MMIO(0x9888), 0x025b4000 }, - { _MMIO(0x9888), 0x0a5b0000 }, - { _MMIO(0x9888), 0x0c5b4000 }, - { _MMIO(0x9888), 0x0c1fa800 }, - { _MMIO(0x9888), 0x0e1faaa0 }, - { _MMIO(0x9888), 0x101f02aa }, - { _MMIO(0x9888), 0x00384000 }, - { _MMIO(0x9888), 0x0e384000 }, - { _MMIO(0x9888), 0x16384000 }, - { _MMIO(0x9888), 0x18381555 }, - { _MMIO(0x9888), 0x02384000 }, - { _MMIO(0x9888), 0x04384000 }, - { _MMIO(0x9888), 0x0a384000 }, - { _MMIO(0x9888), 0x0c384000 }, - { _MMIO(0x9888), 0x0039a000 }, - { _MMIO(0x9888), 0x0639a000 }, - { _MMIO(0x9888), 0x0839a000 }, - { _MMIO(0x9888), 0x0a39a000 }, - { _MMIO(0x9888), 0x0c39a000 }, - { _MMIO(0x9888), 0x0e39a000 }, - { _MMIO(0x9888), 0x02392000 }, - { _MMIO(0x9888), 0x04398000 }, - { _MMIO(0x9888), 0x018a8000 }, - { _MMIO(0x9888), 0x0f8a8000 }, - { _MMIO(0x9888), 0x198a8000 }, - { _MMIO(0x9888), 0x1b8aaaa0 }, - { _MMIO(0x9888), 0x1d8a0002 }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x0d8a8000 }, - { _MMIO(0x9888), 0x038b6300 }, - { _MMIO(0x9888), 0x058b0062 }, - { _MMIO(0x9888), 0x118b0000 }, - { _MMIO(0x9888), 0x238b02a0 }, - { _MMIO(0x9888), 0x258b5555 }, - { _MMIO(0x9888), 0x278b0015 }, - { _MMIO(0x9888), 0x1f85aa80 }, - { _MMIO(0x9888), 0x2185aaaa }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x01834000 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0184c000 }, - { _MMIO(0x9888), 0x0784c000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x1180c000 }, - { _MMIO(0x9888), 0x1780c000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0xd24), 0x00000000 }, - { _MMIO(0x9888), 0x4d801000 }, - { _MMIO(0x9888), 0x3d800000 }, - { _MMIO(0x9888), 0x4f800001 }, - { _MMIO(0x9888), 0x43800000 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47800420 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x3f800421 }, - { _MMIO(0x9888), 0x41800041 }, -}; - -static int -get_data_port_reads_coalescing_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - if (INTEL_INFO(dev_priv)->sseu.subslice_mask & 0x01) { - regs[n] = mux_config_data_port_reads_coalescing_0_subslices_0x01; - lens[n] = ARRAY_SIZE(mux_config_data_port_reads_coalescing_0_subslices_0x01); - n++; - } - - return n; -} - -static const struct i915_oa_reg b_counter_config_data_port_writes_coalescing[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0xba98ba98 }, - { _MMIO(0x2748), 0xba98ba98 }, - { _MMIO(0x2744), 0x00003377 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007ff72 }, - { _MMIO(0x2774), 0x0000bfd0 }, - { _MMIO(0x2778), 0x0007ff62 }, - { _MMIO(0x277c), 0x0000bfd0 }, - { _MMIO(0x2780), 0x0007ff42 }, - { _MMIO(0x2784), 0x0000bfd0 }, - { _MMIO(0x2788), 0x0007ff02 }, - { _MMIO(0x278c), 0x0000bfd0 }, - { _MMIO(0x2790), 0x0005fff2 }, - { _MMIO(0x2794), 0x0000bfd0 }, - { _MMIO(0x2798), 0x0005ffe2 }, - { _MMIO(0x279c), 0x0000bfd0 }, - { _MMIO(0x27a0), 0x0005ffc2 }, - { _MMIO(0x27a4), 0x0000bfd0 }, - { _MMIO(0x27a8), 0x0005ff82 }, - { _MMIO(0x27ac), 0x0000bfd0 }, -}; - -static const struct i915_oa_reg flex_eu_config_data_port_writes_coalescing[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_data_port_writes_coalescing_0_subslices_0x01[] = { - { _MMIO(0x9888), 0x103d0005 }, - { _MMIO(0x9888), 0x143d0120 }, - { _MMIO(0x9888), 0x163d2400 }, - { _MMIO(0x9888), 0x1058022f }, - { _MMIO(0x9888), 0x105b0000 }, - { _MMIO(0x9888), 0x198b0003 }, - { _MMIO(0x9888), 0x005cc000 }, - { _MMIO(0x9888), 0x065cc000 }, - { _MMIO(0x9888), 0x085cc000 }, - { _MMIO(0x9888), 0x0a5cc000 }, - { _MMIO(0x9888), 0x0e5cc000 }, - { _MMIO(0x9888), 0x025c4000 }, - { _MMIO(0x9888), 0x045c8000 }, - { _MMIO(0x9888), 0x003d0000 }, - { _MMIO(0x9888), 0x063d0094 }, - { _MMIO(0x9888), 0x083d0182 }, - { _MMIO(0x9888), 0x0a3d1814 }, - { _MMIO(0x9888), 0x0e3d0000 }, - { _MMIO(0x9888), 0x183d0000 }, - { _MMIO(0x9888), 0x1a3d0000 }, - { _MMIO(0x9888), 0x0c3d0000 }, - { _MMIO(0x9888), 0x0e582242 }, - { _MMIO(0x9888), 0x00586700 }, - { _MMIO(0x9888), 0x0258004f }, - { _MMIO(0x9888), 0x0658c000 }, - { _MMIO(0x9888), 0x0858c000 }, - { _MMIO(0x9888), 0x0a58c000 }, - { _MMIO(0x9888), 0x045b6a80 }, - { _MMIO(0x9888), 0x005b4000 }, - { _MMIO(0x9888), 0x0e5b4000 }, - { _MMIO(0x9888), 0x185b5400 }, - { _MMIO(0x9888), 0x1a5b0141 }, - { _MMIO(0x9888), 0x025b4000 }, - { _MMIO(0x9888), 0x0a5b0000 }, - { _MMIO(0x9888), 0x0c5b4000 }, - { _MMIO(0x9888), 0x0c1fa800 }, - { _MMIO(0x9888), 0x0e1faaa0 }, - { _MMIO(0x9888), 0x101f0282 }, - { _MMIO(0x9888), 0x00384000 }, - { _MMIO(0x9888), 0x0e384000 }, - { _MMIO(0x9888), 0x16384000 }, - { _MMIO(0x9888), 0x18381415 }, - { _MMIO(0x9888), 0x02384000 }, - { _MMIO(0x9888), 0x04384000 }, - { _MMIO(0x9888), 0x0a384000 }, - { _MMIO(0x9888), 0x0c384000 }, - { _MMIO(0x9888), 0x0039a000 }, - { _MMIO(0x9888), 0x0639a000 }, - { _MMIO(0x9888), 0x0839a000 }, - { _MMIO(0x9888), 0x0a39a000 }, - { _MMIO(0x9888), 0x0e39a000 }, - { _MMIO(0x9888), 0x02392000 }, - { _MMIO(0x9888), 0x04398000 }, - { _MMIO(0x9888), 0x018a8000 }, - { _MMIO(0x9888), 0x0f8a8000 }, - { _MMIO(0x9888), 0x198a8000 }, - { _MMIO(0x9888), 0x1b8a82a0 }, - { _MMIO(0x9888), 0x1d8a0002 }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x0d8a8000 }, - { _MMIO(0x9888), 0x038b6300 }, - { _MMIO(0x9888), 0x058b0062 }, - { _MMIO(0x9888), 0x118b0000 }, - { _MMIO(0x9888), 0x238b02a0 }, - { _MMIO(0x9888), 0x258b1555 }, - { _MMIO(0x9888), 0x278b0014 }, - { _MMIO(0x9888), 0x1f85aa80 }, - { _MMIO(0x9888), 0x21852aaa }, - { _MMIO(0x9888), 0x23850028 }, - { _MMIO(0x9888), 0x01834000 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830141 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0184c000 }, - { _MMIO(0x9888), 0x0784c000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x1180c000 }, - { _MMIO(0x9888), 0x1780c000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0xd24), 0x00000000 }, - { _MMIO(0x9888), 0x4d801000 }, - { _MMIO(0x9888), 0x3d800000 }, - { _MMIO(0x9888), 0x4f800001 }, - { _MMIO(0x9888), 0x43800000 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800000 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47800420 }, - { _MMIO(0x9888), 0x3f800421 }, - { _MMIO(0x9888), 0x41800041 }, -}; - -static int -get_data_port_writes_coalescing_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - if (INTEL_INFO(dev_priv)->sseu.subslice_mask & 0x01) { - regs[n] = mux_config_data_port_writes_coalescing_0_subslices_0x01; - lens[n] = ARRAY_SIZE(mux_config_data_port_writes_coalescing_0_subslices_0x01); - n++; - } - - return n; -} - -static const struct i915_oa_reg b_counter_config_hdc_and_sf[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x10800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000fff7 }, -}; - -static const struct i915_oa_reg flex_eu_config_hdc_and_sf[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_hdc_and_sf[] = { - { _MMIO(0x9888), 0x105c0232 }, - { _MMIO(0x9888), 0x10580232 }, - { _MMIO(0x9888), 0x10380232 }, - { _MMIO(0x9888), 0x10dc0232 }, - { _MMIO(0x9888), 0x10d80232 }, - { _MMIO(0x9888), 0x10b80232 }, - { _MMIO(0x9888), 0x118e4400 }, - { _MMIO(0x9888), 0x025c6080 }, - { _MMIO(0x9888), 0x045c004b }, - { _MMIO(0x9888), 0x005c8000 }, - { _MMIO(0x9888), 0x00582080 }, - { _MMIO(0x9888), 0x0258004b }, - { _MMIO(0x9888), 0x025b4000 }, - { _MMIO(0x9888), 0x045b4000 }, - { _MMIO(0x9888), 0x0c1fa000 }, - { _MMIO(0x9888), 0x0e1f00aa }, - { _MMIO(0x9888), 0x04386080 }, - { _MMIO(0x9888), 0x0638404b }, - { _MMIO(0x9888), 0x02384000 }, - { _MMIO(0x9888), 0x08384000 }, - { _MMIO(0x9888), 0x0a380000 }, - { _MMIO(0x9888), 0x0c380000 }, - { _MMIO(0x9888), 0x00398000 }, - { _MMIO(0x9888), 0x0239a000 }, - { _MMIO(0x9888), 0x0439a000 }, - { _MMIO(0x9888), 0x06392000 }, - { _MMIO(0x9888), 0x0cdc25c1 }, - { _MMIO(0x9888), 0x0adcc000 }, - { _MMIO(0x9888), 0x0ad825c1 }, - { _MMIO(0x9888), 0x18db4000 }, - { _MMIO(0x9888), 0x1adb0001 }, - { _MMIO(0x9888), 0x0e9f8000 }, - { _MMIO(0x9888), 0x109f02aa }, - { _MMIO(0x9888), 0x0eb825c1 }, - { _MMIO(0x9888), 0x18b80154 }, - { _MMIO(0x9888), 0x0ab9a000 }, - { _MMIO(0x9888), 0x0cb9a000 }, - { _MMIO(0x9888), 0x0eb9a000 }, - { _MMIO(0x9888), 0x0d88c000 }, - { _MMIO(0x9888), 0x0f88000f }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x078a8000 }, - { _MMIO(0x9888), 0x098a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x0d8a8000 }, - { _MMIO(0x9888), 0x258baa05 }, - { _MMIO(0x9888), 0x278b002a }, - { _MMIO(0x9888), 0x238b2a80 }, - { _MMIO(0x9888), 0x198c5400 }, - { _MMIO(0x9888), 0x1b8c0015 }, - { _MMIO(0x9888), 0x098dc000 }, - { _MMIO(0x9888), 0x0b8da000 }, - { _MMIO(0x9888), 0x0d8da000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x098e05c0 }, - { _MMIO(0x9888), 0x058e0000 }, - { _MMIO(0x9888), 0x198f0020 }, - { _MMIO(0x9888), 0x2185aa0a }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x19835000 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x09848000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x07844000 }, - { _MMIO(0x9888), 0x19808000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x17804000 }, - { _MMIO(0x9888), 0x51800040 }, - { _MMIO(0x9888), 0x43800400 }, - { _MMIO(0x9888), 0x45800800 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47800c62 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f801042 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x418014a4 }, -}; - -static int -get_hdc_and_sf_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_hdc_and_sf; - lens[n] = ARRAY_SIZE(mux_config_hdc_and_sf); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00014002 }, - { _MMIO(0x277c), 0x0000c3ff }, - { _MMIO(0x2780), 0x00010002 }, - { _MMIO(0x2784), 0x0000c7ff }, - { _MMIO(0x2788), 0x00004002 }, - { _MMIO(0x278c), 0x0000d3ff }, - { _MMIO(0x2790), 0x00100700 }, - { _MMIO(0x2794), 0x0000ff1f }, - { _MMIO(0x2798), 0x00001402 }, - { _MMIO(0x279c), 0x0000fc3f }, - { _MMIO(0x27a0), 0x00001002 }, - { _MMIO(0x27a4), 0x0000fc7f }, - { _MMIO(0x27a8), 0x00000402 }, - { _MMIO(0x27ac), 0x0000fd3f }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_1[] = { - { _MMIO(0x9888), 0x10bf03da }, - { _MMIO(0x9888), 0x14bf0001 }, - { _MMIO(0x9888), 0x12980340 }, - { _MMIO(0x9888), 0x12990340 }, - { _MMIO(0x9888), 0x0cbf1187 }, - { _MMIO(0x9888), 0x0ebf1205 }, - { _MMIO(0x9888), 0x00bf0500 }, - { _MMIO(0x9888), 0x02bf042b }, - { _MMIO(0x9888), 0x04bf002c }, - { _MMIO(0x9888), 0x0cdac000 }, - { _MMIO(0x9888), 0x0edac000 }, - { _MMIO(0x9888), 0x00da8000 }, - { _MMIO(0x9888), 0x02dac000 }, - { _MMIO(0x9888), 0x04da4000 }, - { _MMIO(0x9888), 0x04983400 }, - { _MMIO(0x9888), 0x10980000 }, - { _MMIO(0x9888), 0x06990034 }, - { _MMIO(0x9888), 0x10990000 }, - { _MMIO(0x9888), 0x0c9dc000 }, - { _MMIO(0x9888), 0x0e9dc000 }, - { _MMIO(0x9888), 0x009d8000 }, - { _MMIO(0x9888), 0x029dc000 }, - { _MMIO(0x9888), 0x049d4000 }, - { _MMIO(0x9888), 0x109f02a8 }, - { _MMIO(0x9888), 0x0c9fa000 }, - { _MMIO(0x9888), 0x0e9f00ba }, - { _MMIO(0x9888), 0x0cb88000 }, - { _MMIO(0x9888), 0x0cb95000 }, - { _MMIO(0x9888), 0x0eb95000 }, - { _MMIO(0x9888), 0x00b94000 }, - { _MMIO(0x9888), 0x02b95000 }, - { _MMIO(0x9888), 0x04b91000 }, - { _MMIO(0x9888), 0x06b92000 }, - { _MMIO(0x9888), 0x0cba4000 }, - { _MMIO(0x9888), 0x0f88000f }, - { _MMIO(0x9888), 0x03888000 }, - { _MMIO(0x9888), 0x05888000 }, - { _MMIO(0x9888), 0x07888000 }, - { _MMIO(0x9888), 0x09888000 }, - { _MMIO(0x9888), 0x0b888000 }, - { _MMIO(0x9888), 0x0d880400 }, - { _MMIO(0x9888), 0x258b800a }, - { _MMIO(0x9888), 0x278b002a }, - { _MMIO(0x9888), 0x238b5500 }, - { _MMIO(0x9888), 0x198c4000 }, - { _MMIO(0x9888), 0x1b8c0015 }, - { _MMIO(0x9888), 0x038c4000 }, - { _MMIO(0x9888), 0x058c4000 }, - { _MMIO(0x9888), 0x078c4000 }, - { _MMIO(0x9888), 0x098c4000 }, - { _MMIO(0x9888), 0x0b8c4000 }, - { _MMIO(0x9888), 0x0d8c4000 }, - { _MMIO(0x9888), 0x0d8da000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x018d8000 }, - { _MMIO(0x9888), 0x038da000 }, - { _MMIO(0x9888), 0x058da000 }, - { _MMIO(0x9888), 0x078d2000 }, - { _MMIO(0x9888), 0x2185800a }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x1b830154 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x07844000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x17804000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x45800000 }, - { _MMIO(0x9888), 0x47800000 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f800000 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x41800060 }, -}; - -static int -get_l3_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_1; - lens[n] = ARRAY_SIZE(mux_config_l3_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00014002 }, - { _MMIO(0x277c), 0x0000c3ff }, - { _MMIO(0x2780), 0x00010002 }, - { _MMIO(0x2784), 0x0000c7ff }, - { _MMIO(0x2788), 0x00004002 }, - { _MMIO(0x278c), 0x0000d3ff }, - { _MMIO(0x2790), 0x00100700 }, - { _MMIO(0x2794), 0x0000ff1f }, - { _MMIO(0x2798), 0x00001402 }, - { _MMIO(0x279c), 0x0000fc3f }, - { _MMIO(0x27a0), 0x00001002 }, - { _MMIO(0x27a4), 0x0000fc7f }, - { _MMIO(0x27a8), 0x00000402 }, - { _MMIO(0x27ac), 0x0000fd3f }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_2[] = { - { _MMIO(0x9888), 0x103f03da }, - { _MMIO(0x9888), 0x143f0001 }, - { _MMIO(0x9888), 0x12180340 }, - { _MMIO(0x9888), 0x12190340 }, - { _MMIO(0x9888), 0x0c3f1187 }, - { _MMIO(0x9888), 0x0e3f1205 }, - { _MMIO(0x9888), 0x003f0500 }, - { _MMIO(0x9888), 0x023f042b }, - { _MMIO(0x9888), 0x043f002c }, - { _MMIO(0x9888), 0x0c5ac000 }, - { _MMIO(0x9888), 0x0e5ac000 }, - { _MMIO(0x9888), 0x005a8000 }, - { _MMIO(0x9888), 0x025ac000 }, - { _MMIO(0x9888), 0x045a4000 }, - { _MMIO(0x9888), 0x04183400 }, - { _MMIO(0x9888), 0x10180000 }, - { _MMIO(0x9888), 0x06190034 }, - { _MMIO(0x9888), 0x10190000 }, - { _MMIO(0x9888), 0x0c1dc000 }, - { _MMIO(0x9888), 0x0e1dc000 }, - { _MMIO(0x9888), 0x001d8000 }, - { _MMIO(0x9888), 0x021dc000 }, - { _MMIO(0x9888), 0x041d4000 }, - { _MMIO(0x9888), 0x101f02a8 }, - { _MMIO(0x9888), 0x0c1fa000 }, - { _MMIO(0x9888), 0x0e1f00ba }, - { _MMIO(0x9888), 0x0c388000 }, - { _MMIO(0x9888), 0x0c395000 }, - { _MMIO(0x9888), 0x0e395000 }, - { _MMIO(0x9888), 0x00394000 }, - { _MMIO(0x9888), 0x02395000 }, - { _MMIO(0x9888), 0x04391000 }, - { _MMIO(0x9888), 0x06392000 }, - { _MMIO(0x9888), 0x0c3a4000 }, - { _MMIO(0x9888), 0x1b8aa800 }, - { _MMIO(0x9888), 0x1d8a0002 }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x078a8000 }, - { _MMIO(0x9888), 0x098a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x0d8a8000 }, - { _MMIO(0x9888), 0x258b4005 }, - { _MMIO(0x9888), 0x278b0015 }, - { _MMIO(0x9888), 0x238b2a80 }, - { _MMIO(0x9888), 0x2185800a }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x1b830154 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x07844000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x17804000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x45800000 }, - { _MMIO(0x9888), 0x47800000 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f800000 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x41800060 }, -}; - -static int -get_l3_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_2; - lens[n] = ARRAY_SIZE(mux_config_l3_2); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_3[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00014002 }, - { _MMIO(0x277c), 0x0000c3ff }, - { _MMIO(0x2780), 0x00010002 }, - { _MMIO(0x2784), 0x0000c7ff }, - { _MMIO(0x2788), 0x00004002 }, - { _MMIO(0x278c), 0x0000d3ff }, - { _MMIO(0x2790), 0x00100700 }, - { _MMIO(0x2794), 0x0000ff1f }, - { _MMIO(0x2798), 0x00001402 }, - { _MMIO(0x279c), 0x0000fc3f }, - { _MMIO(0x27a0), 0x00001002 }, - { _MMIO(0x27a4), 0x0000fc7f }, - { _MMIO(0x27a8), 0x00000402 }, - { _MMIO(0x27ac), 0x0000fd3f }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_3[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_3[] = { - { _MMIO(0x9888), 0x121b0340 }, - { _MMIO(0x9888), 0x103f0274 }, - { _MMIO(0x9888), 0x123f0000 }, - { _MMIO(0x9888), 0x129b0340 }, - { _MMIO(0x9888), 0x10bf0274 }, - { _MMIO(0x9888), 0x12bf0000 }, - { _MMIO(0x9888), 0x041b3400 }, - { _MMIO(0x9888), 0x101b0000 }, - { _MMIO(0x9888), 0x045c8000 }, - { _MMIO(0x9888), 0x0a3d4000 }, - { _MMIO(0x9888), 0x003f0080 }, - { _MMIO(0x9888), 0x023f0793 }, - { _MMIO(0x9888), 0x043f0014 }, - { _MMIO(0x9888), 0x04588000 }, - { _MMIO(0x9888), 0x005a8000 }, - { _MMIO(0x9888), 0x025ac000 }, - { _MMIO(0x9888), 0x045a4000 }, - { _MMIO(0x9888), 0x0a5b4000 }, - { _MMIO(0x9888), 0x001d8000 }, - { _MMIO(0x9888), 0x021dc000 }, - { _MMIO(0x9888), 0x041d4000 }, - { _MMIO(0x9888), 0x0c1fa000 }, - { _MMIO(0x9888), 0x0e1f002a }, - { _MMIO(0x9888), 0x0a384000 }, - { _MMIO(0x9888), 0x00394000 }, - { _MMIO(0x9888), 0x02395000 }, - { _MMIO(0x9888), 0x04399000 }, - { _MMIO(0x9888), 0x069b0034 }, - { _MMIO(0x9888), 0x109b0000 }, - { _MMIO(0x9888), 0x06dc4000 }, - { _MMIO(0x9888), 0x0cbd4000 }, - { _MMIO(0x9888), 0x0cbf0981 }, - { _MMIO(0x9888), 0x0ebf0a0f }, - { _MMIO(0x9888), 0x06d84000 }, - { _MMIO(0x9888), 0x0cdac000 }, - { _MMIO(0x9888), 0x0edac000 }, - { _MMIO(0x9888), 0x0cdb4000 }, - { _MMIO(0x9888), 0x0c9dc000 }, - { _MMIO(0x9888), 0x0e9dc000 }, - { _MMIO(0x9888), 0x109f02a8 }, - { _MMIO(0x9888), 0x0e9f0080 }, - { _MMIO(0x9888), 0x0cb84000 }, - { _MMIO(0x9888), 0x0cb95000 }, - { _MMIO(0x9888), 0x0eb95000 }, - { _MMIO(0x9888), 0x06b92000 }, - { _MMIO(0x9888), 0x0f88000f }, - { _MMIO(0x9888), 0x0d880400 }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x078a8000 }, - { _MMIO(0x9888), 0x098a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x258b8009 }, - { _MMIO(0x9888), 0x278b002a }, - { _MMIO(0x9888), 0x238b2a80 }, - { _MMIO(0x9888), 0x198c4000 }, - { _MMIO(0x9888), 0x1b8c0015 }, - { _MMIO(0x9888), 0x0d8c4000 }, - { _MMIO(0x9888), 0x0d8da000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x078d2000 }, - { _MMIO(0x9888), 0x2185800a }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x1b830154 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x07844000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x17804000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x45800c00 }, - { _MMIO(0x9888), 0x47800c63 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f8014a5 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x41800045 }, -}; - -static int -get_l3_3_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_3; - lens[n] = ARRAY_SIZE(mux_config_l3_3); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_4[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00014002 }, - { _MMIO(0x277c), 0x0000c3ff }, - { _MMIO(0x2780), 0x00010002 }, - { _MMIO(0x2784), 0x0000c7ff }, - { _MMIO(0x2788), 0x00004002 }, - { _MMIO(0x278c), 0x0000d3ff }, - { _MMIO(0x2790), 0x00100700 }, - { _MMIO(0x2794), 0x0000ff1f }, - { _MMIO(0x2798), 0x00001402 }, - { _MMIO(0x279c), 0x0000fc3f }, - { _MMIO(0x27a0), 0x00001002 }, - { _MMIO(0x27a4), 0x0000fc7f }, - { _MMIO(0x27a8), 0x00000402 }, - { _MMIO(0x27ac), 0x0000fd3f }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_4[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_4[] = { - { _MMIO(0x9888), 0x121a0340 }, - { _MMIO(0x9888), 0x103f0017 }, - { _MMIO(0x9888), 0x123f0020 }, - { _MMIO(0x9888), 0x129a0340 }, - { _MMIO(0x9888), 0x10bf0017 }, - { _MMIO(0x9888), 0x12bf0020 }, - { _MMIO(0x9888), 0x041a3400 }, - { _MMIO(0x9888), 0x101a0000 }, - { _MMIO(0x9888), 0x043b8000 }, - { _MMIO(0x9888), 0x0a3e0010 }, - { _MMIO(0x9888), 0x003f0200 }, - { _MMIO(0x9888), 0x023f0113 }, - { _MMIO(0x9888), 0x043f0014 }, - { _MMIO(0x9888), 0x02592000 }, - { _MMIO(0x9888), 0x005a8000 }, - { _MMIO(0x9888), 0x025ac000 }, - { _MMIO(0x9888), 0x045a4000 }, - { _MMIO(0x9888), 0x0a1c8000 }, - { _MMIO(0x9888), 0x001d8000 }, - { _MMIO(0x9888), 0x021dc000 }, - { _MMIO(0x9888), 0x041d4000 }, - { _MMIO(0x9888), 0x0a1e8000 }, - { _MMIO(0x9888), 0x0c1fa000 }, - { _MMIO(0x9888), 0x0e1f001a }, - { _MMIO(0x9888), 0x00394000 }, - { _MMIO(0x9888), 0x02395000 }, - { _MMIO(0x9888), 0x04391000 }, - { _MMIO(0x9888), 0x069a0034 }, - { _MMIO(0x9888), 0x109a0000 }, - { _MMIO(0x9888), 0x06bb4000 }, - { _MMIO(0x9888), 0x0abe0040 }, - { _MMIO(0x9888), 0x0cbf0984 }, - { _MMIO(0x9888), 0x0ebf0a02 }, - { _MMIO(0x9888), 0x02d94000 }, - { _MMIO(0x9888), 0x0cdac000 }, - { _MMIO(0x9888), 0x0edac000 }, - { _MMIO(0x9888), 0x0c9c0400 }, - { _MMIO(0x9888), 0x0c9dc000 }, - { _MMIO(0x9888), 0x0e9dc000 }, - { _MMIO(0x9888), 0x0c9e0400 }, - { _MMIO(0x9888), 0x109f02a8 }, - { _MMIO(0x9888), 0x0e9f0040 }, - { _MMIO(0x9888), 0x0cb95000 }, - { _MMIO(0x9888), 0x0eb95000 }, - { _MMIO(0x9888), 0x0f88000f }, - { _MMIO(0x9888), 0x0d880400 }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x078a8000 }, - { _MMIO(0x9888), 0x098a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x258b8009 }, - { _MMIO(0x9888), 0x278b002a }, - { _MMIO(0x9888), 0x238b2a80 }, - { _MMIO(0x9888), 0x198c4000 }, - { _MMIO(0x9888), 0x1b8c0015 }, - { _MMIO(0x9888), 0x0d8c4000 }, - { _MMIO(0x9888), 0x0d8da000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x078d2000 }, - { _MMIO(0x9888), 0x2185800a }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x1b830154 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x07844000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x17804000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x45800800 }, - { _MMIO(0x9888), 0x47800842 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f801084 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x41800044 }, -}; - -static int -get_l3_4_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_4; - lens[n] = ARRAY_SIZE(mux_config_l3_4); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00006000 }, - { _MMIO(0x2774), 0x0000f3ff }, - { _MMIO(0x2778), 0x00001800 }, - { _MMIO(0x277c), 0x0000fcff }, - { _MMIO(0x2780), 0x00000600 }, - { _MMIO(0x2784), 0x0000ff3f }, - { _MMIO(0x2788), 0x00000180 }, - { _MMIO(0x278c), 0x0000ffcf }, - { _MMIO(0x2790), 0x00000060 }, - { _MMIO(0x2794), 0x0000fff3 }, - { _MMIO(0x2798), 0x00000018 }, - { _MMIO(0x279c), 0x0000fffc }, -}; - -static const struct i915_oa_reg flex_eu_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x9888), 0x143b000e }, - { _MMIO(0x9888), 0x043c55c0 }, - { _MMIO(0x9888), 0x0a1e0280 }, - { _MMIO(0x9888), 0x0c1e0408 }, - { _MMIO(0x9888), 0x10390000 }, - { _MMIO(0x9888), 0x12397a1f }, - { _MMIO(0x9888), 0x14bb000e }, - { _MMIO(0x9888), 0x04bc5000 }, - { _MMIO(0x9888), 0x0a9e0296 }, - { _MMIO(0x9888), 0x0c9e0008 }, - { _MMIO(0x9888), 0x10b90000 }, - { _MMIO(0x9888), 0x12b97a1f }, - { _MMIO(0x9888), 0x063b0042 }, - { _MMIO(0x9888), 0x103b0000 }, - { _MMIO(0x9888), 0x083c0000 }, - { _MMIO(0x9888), 0x0a3e0040 }, - { _MMIO(0x9888), 0x043f8000 }, - { _MMIO(0x9888), 0x02594000 }, - { _MMIO(0x9888), 0x045a8000 }, - { _MMIO(0x9888), 0x0c1c0400 }, - { _MMIO(0x9888), 0x041d8000 }, - { _MMIO(0x9888), 0x081e02c0 }, - { _MMIO(0x9888), 0x0e1e0000 }, - { _MMIO(0x9888), 0x0c1fa800 }, - { _MMIO(0x9888), 0x0e1f0260 }, - { _MMIO(0x9888), 0x101f0014 }, - { _MMIO(0x9888), 0x003905e0 }, - { _MMIO(0x9888), 0x06390bc0 }, - { _MMIO(0x9888), 0x02390018 }, - { _MMIO(0x9888), 0x04394000 }, - { _MMIO(0x9888), 0x04bb0042 }, - { _MMIO(0x9888), 0x10bb0000 }, - { _MMIO(0x9888), 0x02bc05c0 }, - { _MMIO(0x9888), 0x08bc0000 }, - { _MMIO(0x9888), 0x0abe0004 }, - { _MMIO(0x9888), 0x02bf8000 }, - { _MMIO(0x9888), 0x02d91000 }, - { _MMIO(0x9888), 0x02da8000 }, - { _MMIO(0x9888), 0x089c8000 }, - { _MMIO(0x9888), 0x029d8000 }, - { _MMIO(0x9888), 0x089e8000 }, - { _MMIO(0x9888), 0x0e9e0000 }, - { _MMIO(0x9888), 0x0e9fa806 }, - { _MMIO(0x9888), 0x109f0142 }, - { _MMIO(0x9888), 0x08b90617 }, - { _MMIO(0x9888), 0x0ab90be0 }, - { _MMIO(0x9888), 0x02b94000 }, - { _MMIO(0x9888), 0x0d88f000 }, - { _MMIO(0x9888), 0x0f88000c }, - { _MMIO(0x9888), 0x07888000 }, - { _MMIO(0x9888), 0x09888000 }, - { _MMIO(0x9888), 0x018a8000 }, - { _MMIO(0x9888), 0x0f8a8000 }, - { _MMIO(0x9888), 0x1b8a2800 }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x0d8a8000 }, - { _MMIO(0x9888), 0x238b52a0 }, - { _MMIO(0x9888), 0x258b6a95 }, - { _MMIO(0x9888), 0x278b0029 }, - { _MMIO(0x9888), 0x178c2000 }, - { _MMIO(0x9888), 0x198c1500 }, - { _MMIO(0x9888), 0x1b8c0014 }, - { _MMIO(0x9888), 0x078c4000 }, - { _MMIO(0x9888), 0x098c4000 }, - { _MMIO(0x9888), 0x098da000 }, - { _MMIO(0x9888), 0x0b8da000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x038d8000 }, - { _MMIO(0x9888), 0x058d2000 }, - { _MMIO(0x9888), 0x1f85aa80 }, - { _MMIO(0x9888), 0x2185aaaa }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x01834000 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0184c000 }, - { _MMIO(0x9888), 0x0784c000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x1180c000 }, - { _MMIO(0x9888), 0x1780c000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x4d800444 }, - { _MMIO(0x9888), 0x3d800000 }, - { _MMIO(0x9888), 0x4f804000 }, - { _MMIO(0x9888), 0x43801080 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800084 }, - { _MMIO(0x9888), 0x53800044 }, - { _MMIO(0x9888), 0x47801080 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x3f800000 }, - { _MMIO(0x9888), 0x41800840 }, -}; - -static int -get_rasterizer_and_pixel_backend_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_rasterizer_and_pixel_backend; - lens[n] = ARRAY_SIZE(mux_config_rasterizer_and_pixel_backend); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_sampler_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x70800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x0000c000 }, - { _MMIO(0x2774), 0x0000e7ff }, - { _MMIO(0x2778), 0x00003000 }, - { _MMIO(0x277c), 0x0000f9ff }, - { _MMIO(0x2780), 0x00000c00 }, - { _MMIO(0x2784), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_sampler_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_sampler_1[] = { - { _MMIO(0x9888), 0x18921400 }, - { _MMIO(0x9888), 0x149500ab }, - { _MMIO(0x9888), 0x18b21400 }, - { _MMIO(0x9888), 0x14b500ab }, - { _MMIO(0x9888), 0x18d21400 }, - { _MMIO(0x9888), 0x14d500ab }, - { _MMIO(0x9888), 0x0cdc8000 }, - { _MMIO(0x9888), 0x0edc4000 }, - { _MMIO(0x9888), 0x02dcc000 }, - { _MMIO(0x9888), 0x04dcc000 }, - { _MMIO(0x9888), 0x1abd00a0 }, - { _MMIO(0x9888), 0x0abd8000 }, - { _MMIO(0x9888), 0x0cd88000 }, - { _MMIO(0x9888), 0x0ed84000 }, - { _MMIO(0x9888), 0x04d88000 }, - { _MMIO(0x9888), 0x1adb0050 }, - { _MMIO(0x9888), 0x04db8000 }, - { _MMIO(0x9888), 0x06db8000 }, - { _MMIO(0x9888), 0x08db8000 }, - { _MMIO(0x9888), 0x0adb4000 }, - { _MMIO(0x9888), 0x109f02a0 }, - { _MMIO(0x9888), 0x0c9fa000 }, - { _MMIO(0x9888), 0x0e9f00aa }, - { _MMIO(0x9888), 0x18b82500 }, - { _MMIO(0x9888), 0x02b88000 }, - { _MMIO(0x9888), 0x04b84000 }, - { _MMIO(0x9888), 0x06b84000 }, - { _MMIO(0x9888), 0x08b84000 }, - { _MMIO(0x9888), 0x0ab84000 }, - { _MMIO(0x9888), 0x0cb88000 }, - { _MMIO(0x9888), 0x0cb98000 }, - { _MMIO(0x9888), 0x0eb9a000 }, - { _MMIO(0x9888), 0x00b98000 }, - { _MMIO(0x9888), 0x02b9a000 }, - { _MMIO(0x9888), 0x04b9a000 }, - { _MMIO(0x9888), 0x06b92000 }, - { _MMIO(0x9888), 0x1aba0200 }, - { _MMIO(0x9888), 0x02ba8000 }, - { _MMIO(0x9888), 0x0cba8000 }, - { _MMIO(0x9888), 0x04908000 }, - { _MMIO(0x9888), 0x04918000 }, - { _MMIO(0x9888), 0x04927300 }, - { _MMIO(0x9888), 0x10920000 }, - { _MMIO(0x9888), 0x1893000a }, - { _MMIO(0x9888), 0x0a934000 }, - { _MMIO(0x9888), 0x0a946000 }, - { _MMIO(0x9888), 0x0c959000 }, - { _MMIO(0x9888), 0x0e950098 }, - { _MMIO(0x9888), 0x10950000 }, - { _MMIO(0x9888), 0x04b04000 }, - { _MMIO(0x9888), 0x04b14000 }, - { _MMIO(0x9888), 0x04b20073 }, - { _MMIO(0x9888), 0x10b20000 }, - { _MMIO(0x9888), 0x04b38000 }, - { _MMIO(0x9888), 0x06b38000 }, - { _MMIO(0x9888), 0x08b34000 }, - { _MMIO(0x9888), 0x04b4c000 }, - { _MMIO(0x9888), 0x02b59890 }, - { _MMIO(0x9888), 0x10b50000 }, - { _MMIO(0x9888), 0x06d04000 }, - { _MMIO(0x9888), 0x06d14000 }, - { _MMIO(0x9888), 0x06d20073 }, - { _MMIO(0x9888), 0x10d20000 }, - { _MMIO(0x9888), 0x18d30020 }, - { _MMIO(0x9888), 0x02d38000 }, - { _MMIO(0x9888), 0x0cd34000 }, - { _MMIO(0x9888), 0x0ad48000 }, - { _MMIO(0x9888), 0x04d42000 }, - { _MMIO(0x9888), 0x0ed59000 }, - { _MMIO(0x9888), 0x00d59800 }, - { _MMIO(0x9888), 0x10d50000 }, - { _MMIO(0x9888), 0x0f88000e }, - { _MMIO(0x9888), 0x03888000 }, - { _MMIO(0x9888), 0x05888000 }, - { _MMIO(0x9888), 0x07888000 }, - { _MMIO(0x9888), 0x09888000 }, - { _MMIO(0x9888), 0x0b888000 }, - { _MMIO(0x9888), 0x0d880400 }, - { _MMIO(0x9888), 0x278b002a }, - { _MMIO(0x9888), 0x238b5500 }, - { _MMIO(0x9888), 0x258b000a }, - { _MMIO(0x9888), 0x1b8c0015 }, - { _MMIO(0x9888), 0x038c4000 }, - { _MMIO(0x9888), 0x058c4000 }, - { _MMIO(0x9888), 0x078c4000 }, - { _MMIO(0x9888), 0x098c4000 }, - { _MMIO(0x9888), 0x0b8c4000 }, - { _MMIO(0x9888), 0x0d8c4000 }, - { _MMIO(0x9888), 0x0d8d8000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x018d8000 }, - { _MMIO(0x9888), 0x038da000 }, - { _MMIO(0x9888), 0x058da000 }, - { _MMIO(0x9888), 0x078d2000 }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x2185000a }, - { _MMIO(0x9888), 0x1b830150 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0d848000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x07844000 }, - { _MMIO(0x9888), 0x1d808000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x17804000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47801021 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f800c64 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x41800c02 }, -}; - -static int -get_sampler_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_sampler_1; - lens[n] = ARRAY_SIZE(mux_config_sampler_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_sampler_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x70800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x0000c000 }, - { _MMIO(0x2774), 0x0000e7ff }, - { _MMIO(0x2778), 0x00003000 }, - { _MMIO(0x277c), 0x0000f9ff }, - { _MMIO(0x2780), 0x00000c00 }, - { _MMIO(0x2784), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_sampler_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_sampler_2[] = { - { _MMIO(0x9888), 0x18121400 }, - { _MMIO(0x9888), 0x141500ab }, - { _MMIO(0x9888), 0x18321400 }, - { _MMIO(0x9888), 0x143500ab }, - { _MMIO(0x9888), 0x18521400 }, - { _MMIO(0x9888), 0x145500ab }, - { _MMIO(0x9888), 0x0c5c8000 }, - { _MMIO(0x9888), 0x0e5c4000 }, - { _MMIO(0x9888), 0x025cc000 }, - { _MMIO(0x9888), 0x045cc000 }, - { _MMIO(0x9888), 0x1a3d00a0 }, - { _MMIO(0x9888), 0x0a3d8000 }, - { _MMIO(0x9888), 0x0c588000 }, - { _MMIO(0x9888), 0x0e584000 }, - { _MMIO(0x9888), 0x04588000 }, - { _MMIO(0x9888), 0x1a5b0050 }, - { _MMIO(0x9888), 0x045b8000 }, - { _MMIO(0x9888), 0x065b8000 }, - { _MMIO(0x9888), 0x085b8000 }, - { _MMIO(0x9888), 0x0a5b4000 }, - { _MMIO(0x9888), 0x101f02a0 }, - { _MMIO(0x9888), 0x0c1fa000 }, - { _MMIO(0x9888), 0x0e1f00aa }, - { _MMIO(0x9888), 0x18382500 }, - { _MMIO(0x9888), 0x02388000 }, - { _MMIO(0x9888), 0x04384000 }, - { _MMIO(0x9888), 0x06384000 }, - { _MMIO(0x9888), 0x08384000 }, - { _MMIO(0x9888), 0x0a384000 }, - { _MMIO(0x9888), 0x0c388000 }, - { _MMIO(0x9888), 0x0c398000 }, - { _MMIO(0x9888), 0x0e39a000 }, - { _MMIO(0x9888), 0x00398000 }, - { _MMIO(0x9888), 0x0239a000 }, - { _MMIO(0x9888), 0x0439a000 }, - { _MMIO(0x9888), 0x06392000 }, - { _MMIO(0x9888), 0x1a3a0200 }, - { _MMIO(0x9888), 0x023a8000 }, - { _MMIO(0x9888), 0x0c3a8000 }, - { _MMIO(0x9888), 0x04108000 }, - { _MMIO(0x9888), 0x04118000 }, - { _MMIO(0x9888), 0x04127300 }, - { _MMIO(0x9888), 0x10120000 }, - { _MMIO(0x9888), 0x1813000a }, - { _MMIO(0x9888), 0x0a134000 }, - { _MMIO(0x9888), 0x0a146000 }, - { _MMIO(0x9888), 0x0c159000 }, - { _MMIO(0x9888), 0x0e150098 }, - { _MMIO(0x9888), 0x10150000 }, - { _MMIO(0x9888), 0x04304000 }, - { _MMIO(0x9888), 0x04314000 }, - { _MMIO(0x9888), 0x04320073 }, - { _MMIO(0x9888), 0x10320000 }, - { _MMIO(0x9888), 0x04338000 }, - { _MMIO(0x9888), 0x06338000 }, - { _MMIO(0x9888), 0x08334000 }, - { _MMIO(0x9888), 0x0434c000 }, - { _MMIO(0x9888), 0x02359890 }, - { _MMIO(0x9888), 0x10350000 }, - { _MMIO(0x9888), 0x06504000 }, - { _MMIO(0x9888), 0x06514000 }, - { _MMIO(0x9888), 0x06520073 }, - { _MMIO(0x9888), 0x10520000 }, - { _MMIO(0x9888), 0x18530020 }, - { _MMIO(0x9888), 0x02538000 }, - { _MMIO(0x9888), 0x0c534000 }, - { _MMIO(0x9888), 0x0a548000 }, - { _MMIO(0x9888), 0x04542000 }, - { _MMIO(0x9888), 0x0e559000 }, - { _MMIO(0x9888), 0x00559800 }, - { _MMIO(0x9888), 0x10550000 }, - { _MMIO(0x9888), 0x1b8aa000 }, - { _MMIO(0x9888), 0x1d8a0002 }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x078a8000 }, - { _MMIO(0x9888), 0x098a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x0d8a8000 }, - { _MMIO(0x9888), 0x278b0015 }, - { _MMIO(0x9888), 0x238b2a80 }, - { _MMIO(0x9888), 0x258b0005 }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x2185000a }, - { _MMIO(0x9888), 0x1b830150 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0d848000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x07844000 }, - { _MMIO(0x9888), 0x1d808000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x17804000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47801021 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f800c64 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x41800c02 }, -}; - -static int -get_sampler_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_sampler_2; - lens[n] = ARRAY_SIZE(mux_config_sampler_2); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000fdff }, - { _MMIO(0x2778), 0x00000000 }, - { _MMIO(0x277c), 0x0000fe7f }, - { _MMIO(0x2780), 0x00000002 }, - { _MMIO(0x2784), 0x0000ffbf }, - { _MMIO(0x2788), 0x00000000 }, - { _MMIO(0x278c), 0x0000ffcf }, - { _MMIO(0x2790), 0x00000002 }, - { _MMIO(0x2794), 0x0000fff7 }, - { _MMIO(0x2798), 0x00000000 }, - { _MMIO(0x279c), 0x0000fff9 }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_1[] = { - { _MMIO(0x9888), 0x16154d60 }, - { _MMIO(0x9888), 0x16352e60 }, - { _MMIO(0x9888), 0x16554d60 }, - { _MMIO(0x9888), 0x16950000 }, - { _MMIO(0x9888), 0x16b50000 }, - { _MMIO(0x9888), 0x16d50000 }, - { _MMIO(0x9888), 0x005c8000 }, - { _MMIO(0x9888), 0x045cc000 }, - { _MMIO(0x9888), 0x065c4000 }, - { _MMIO(0x9888), 0x083d8000 }, - { _MMIO(0x9888), 0x0a3d8000 }, - { _MMIO(0x9888), 0x0458c000 }, - { _MMIO(0x9888), 0x025b8000 }, - { _MMIO(0x9888), 0x085b4000 }, - { _MMIO(0x9888), 0x0a5b4000 }, - { _MMIO(0x9888), 0x0c5b8000 }, - { _MMIO(0x9888), 0x0c1fa000 }, - { _MMIO(0x9888), 0x0e1f00aa }, - { _MMIO(0x9888), 0x02384000 }, - { _MMIO(0x9888), 0x04388000 }, - { _MMIO(0x9888), 0x06388000 }, - { _MMIO(0x9888), 0x08384000 }, - { _MMIO(0x9888), 0x0a384000 }, - { _MMIO(0x9888), 0x0c384000 }, - { _MMIO(0x9888), 0x00398000 }, - { _MMIO(0x9888), 0x0239a000 }, - { _MMIO(0x9888), 0x0439a000 }, - { _MMIO(0x9888), 0x06392000 }, - { _MMIO(0x9888), 0x043a8000 }, - { _MMIO(0x9888), 0x063a8000 }, - { _MMIO(0x9888), 0x08138000 }, - { _MMIO(0x9888), 0x0a138000 }, - { _MMIO(0x9888), 0x06143000 }, - { _MMIO(0x9888), 0x0415cfc7 }, - { _MMIO(0x9888), 0x10150000 }, - { _MMIO(0x9888), 0x02338000 }, - { _MMIO(0x9888), 0x0c338000 }, - { _MMIO(0x9888), 0x04342000 }, - { _MMIO(0x9888), 0x06344000 }, - { _MMIO(0x9888), 0x0035c700 }, - { _MMIO(0x9888), 0x063500cf }, - { _MMIO(0x9888), 0x10350000 }, - { _MMIO(0x9888), 0x04538000 }, - { _MMIO(0x9888), 0x06538000 }, - { _MMIO(0x9888), 0x0454c000 }, - { _MMIO(0x9888), 0x0255cfc7 }, - { _MMIO(0x9888), 0x10550000 }, - { _MMIO(0x9888), 0x06dc8000 }, - { _MMIO(0x9888), 0x08dc4000 }, - { _MMIO(0x9888), 0x0cdcc000 }, - { _MMIO(0x9888), 0x0edcc000 }, - { _MMIO(0x9888), 0x1abd00a8 }, - { _MMIO(0x9888), 0x0cd8c000 }, - { _MMIO(0x9888), 0x0ed84000 }, - { _MMIO(0x9888), 0x0edb8000 }, - { _MMIO(0x9888), 0x18db0800 }, - { _MMIO(0x9888), 0x1adb0254 }, - { _MMIO(0x9888), 0x0e9faa00 }, - { _MMIO(0x9888), 0x109f02aa }, - { _MMIO(0x9888), 0x0eb84000 }, - { _MMIO(0x9888), 0x16b84000 }, - { _MMIO(0x9888), 0x18b8156a }, - { _MMIO(0x9888), 0x06b98000 }, - { _MMIO(0x9888), 0x08b9a000 }, - { _MMIO(0x9888), 0x0ab9a000 }, - { _MMIO(0x9888), 0x0cb9a000 }, - { _MMIO(0x9888), 0x0eb9a000 }, - { _MMIO(0x9888), 0x18baa000 }, - { _MMIO(0x9888), 0x1aba0002 }, - { _MMIO(0x9888), 0x16934000 }, - { _MMIO(0x9888), 0x1893000a }, - { _MMIO(0x9888), 0x0a947000 }, - { _MMIO(0x9888), 0x0c95c5c1 }, - { _MMIO(0x9888), 0x0e9500c3 }, - { _MMIO(0x9888), 0x10950000 }, - { _MMIO(0x9888), 0x0eb38000 }, - { _MMIO(0x9888), 0x16b30040 }, - { _MMIO(0x9888), 0x18b30020 }, - { _MMIO(0x9888), 0x06b48000 }, - { _MMIO(0x9888), 0x08b41000 }, - { _MMIO(0x9888), 0x0ab48000 }, - { _MMIO(0x9888), 0x06b5c500 }, - { _MMIO(0x9888), 0x08b500c3 }, - { _MMIO(0x9888), 0x0eb5c100 }, - { _MMIO(0x9888), 0x10b50000 }, - { _MMIO(0x9888), 0x16d31500 }, - { _MMIO(0x9888), 0x08d4e000 }, - { _MMIO(0x9888), 0x08d5c100 }, - { _MMIO(0x9888), 0x0ad5c3c5 }, - { _MMIO(0x9888), 0x10d50000 }, - { _MMIO(0x9888), 0x0d88f800 }, - { _MMIO(0x9888), 0x0f88000f }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x078a8000 }, - { _MMIO(0x9888), 0x098a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x0d8a8000 }, - { _MMIO(0x9888), 0x258baaa5 }, - { _MMIO(0x9888), 0x278b002a }, - { _MMIO(0x9888), 0x238b2a80 }, - { _MMIO(0x9888), 0x0f8c4000 }, - { _MMIO(0x9888), 0x178c2000 }, - { _MMIO(0x9888), 0x198c5500 }, - { _MMIO(0x9888), 0x1b8c0015 }, - { _MMIO(0x9888), 0x078d8000 }, - { _MMIO(0x9888), 0x098da000 }, - { _MMIO(0x9888), 0x0b8da000 }, - { _MMIO(0x9888), 0x0d8da000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x2185aaaa }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0784c000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x1780c000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x43800c42 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800063 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47800800 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f8014a4 }, - { _MMIO(0x9888), 0x41801042 }, -}; - -static int -get_tdl_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_1; - lens[n] = ARRAY_SIZE(mux_config_tdl_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000fdff }, - { _MMIO(0x2778), 0x00000000 }, - { _MMIO(0x277c), 0x0000fe7f }, - { _MMIO(0x2780), 0x00000000 }, - { _MMIO(0x2784), 0x0000ff9f }, - { _MMIO(0x2788), 0x00000000 }, - { _MMIO(0x278c), 0x0000ffe7 }, - { _MMIO(0x2790), 0x00000002 }, - { _MMIO(0x2794), 0x0000fffb }, - { _MMIO(0x2798), 0x00000002 }, - { _MMIO(0x279c), 0x0000fffd }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_2[] = { - { _MMIO(0x9888), 0x16150000 }, - { _MMIO(0x9888), 0x16350000 }, - { _MMIO(0x9888), 0x16550000 }, - { _MMIO(0x9888), 0x16952e60 }, - { _MMIO(0x9888), 0x16b54d60 }, - { _MMIO(0x9888), 0x16d52e60 }, - { _MMIO(0x9888), 0x065c8000 }, - { _MMIO(0x9888), 0x085cc000 }, - { _MMIO(0x9888), 0x0a5cc000 }, - { _MMIO(0x9888), 0x0c5c4000 }, - { _MMIO(0x9888), 0x0e3d8000 }, - { _MMIO(0x9888), 0x183da000 }, - { _MMIO(0x9888), 0x06588000 }, - { _MMIO(0x9888), 0x08588000 }, - { _MMIO(0x9888), 0x0a584000 }, - { _MMIO(0x9888), 0x0e5b4000 }, - { _MMIO(0x9888), 0x185b5800 }, - { _MMIO(0x9888), 0x1a5b000a }, - { _MMIO(0x9888), 0x0e1faa00 }, - { _MMIO(0x9888), 0x101f02aa }, - { _MMIO(0x9888), 0x0e384000 }, - { _MMIO(0x9888), 0x16384000 }, - { _MMIO(0x9888), 0x18382a55 }, - { _MMIO(0x9888), 0x06398000 }, - { _MMIO(0x9888), 0x0839a000 }, - { _MMIO(0x9888), 0x0a39a000 }, - { _MMIO(0x9888), 0x0c39a000 }, - { _MMIO(0x9888), 0x0e39a000 }, - { _MMIO(0x9888), 0x1a3a02a0 }, - { _MMIO(0x9888), 0x0e138000 }, - { _MMIO(0x9888), 0x16130500 }, - { _MMIO(0x9888), 0x06148000 }, - { _MMIO(0x9888), 0x08146000 }, - { _MMIO(0x9888), 0x0615c100 }, - { _MMIO(0x9888), 0x0815c500 }, - { _MMIO(0x9888), 0x0a1500c3 }, - { _MMIO(0x9888), 0x10150000 }, - { _MMIO(0x9888), 0x16335040 }, - { _MMIO(0x9888), 0x08349000 }, - { _MMIO(0x9888), 0x0a341000 }, - { _MMIO(0x9888), 0x083500c1 }, - { _MMIO(0x9888), 0x0a35c500 }, - { _MMIO(0x9888), 0x0c3500c3 }, - { _MMIO(0x9888), 0x10350000 }, - { _MMIO(0x9888), 0x1853002a }, - { _MMIO(0x9888), 0x0a54e000 }, - { _MMIO(0x9888), 0x0c55c500 }, - { _MMIO(0x9888), 0x0e55c1c3 }, - { _MMIO(0x9888), 0x10550000 }, - { _MMIO(0x9888), 0x00dc8000 }, - { _MMIO(0x9888), 0x02dcc000 }, - { _MMIO(0x9888), 0x04dc4000 }, - { _MMIO(0x9888), 0x04bd8000 }, - { _MMIO(0x9888), 0x06bd8000 }, - { _MMIO(0x9888), 0x02d8c000 }, - { _MMIO(0x9888), 0x02db8000 }, - { _MMIO(0x9888), 0x04db4000 }, - { _MMIO(0x9888), 0x06db4000 }, - { _MMIO(0x9888), 0x08db8000 }, - { _MMIO(0x9888), 0x0c9fa000 }, - { _MMIO(0x9888), 0x0e9f00aa }, - { _MMIO(0x9888), 0x02b84000 }, - { _MMIO(0x9888), 0x04b84000 }, - { _MMIO(0x9888), 0x06b84000 }, - { _MMIO(0x9888), 0x08b84000 }, - { _MMIO(0x9888), 0x0ab88000 }, - { _MMIO(0x9888), 0x0cb88000 }, - { _MMIO(0x9888), 0x00b98000 }, - { _MMIO(0x9888), 0x02b9a000 }, - { _MMIO(0x9888), 0x04b9a000 }, - { _MMIO(0x9888), 0x06b92000 }, - { _MMIO(0x9888), 0x0aba8000 }, - { _MMIO(0x9888), 0x0cba8000 }, - { _MMIO(0x9888), 0x04938000 }, - { _MMIO(0x9888), 0x06938000 }, - { _MMIO(0x9888), 0x0494c000 }, - { _MMIO(0x9888), 0x0295cfc7 }, - { _MMIO(0x9888), 0x10950000 }, - { _MMIO(0x9888), 0x02b38000 }, - { _MMIO(0x9888), 0x08b38000 }, - { _MMIO(0x9888), 0x04b42000 }, - { _MMIO(0x9888), 0x06b41000 }, - { _MMIO(0x9888), 0x00b5c700 }, - { _MMIO(0x9888), 0x04b500cf }, - { _MMIO(0x9888), 0x10b50000 }, - { _MMIO(0x9888), 0x0ad38000 }, - { _MMIO(0x9888), 0x0cd38000 }, - { _MMIO(0x9888), 0x06d46000 }, - { _MMIO(0x9888), 0x04d5c700 }, - { _MMIO(0x9888), 0x06d500cf }, - { _MMIO(0x9888), 0x10d50000 }, - { _MMIO(0x9888), 0x03888000 }, - { _MMIO(0x9888), 0x05888000 }, - { _MMIO(0x9888), 0x07888000 }, - { _MMIO(0x9888), 0x09888000 }, - { _MMIO(0x9888), 0x0b888000 }, - { _MMIO(0x9888), 0x0d880400 }, - { _MMIO(0x9888), 0x0f8a8000 }, - { _MMIO(0x9888), 0x198a8000 }, - { _MMIO(0x9888), 0x1b8aaaa0 }, - { _MMIO(0x9888), 0x1d8a0002 }, - { _MMIO(0x9888), 0x258b555a }, - { _MMIO(0x9888), 0x278b0015 }, - { _MMIO(0x9888), 0x238b5500 }, - { _MMIO(0x9888), 0x038c4000 }, - { _MMIO(0x9888), 0x058c4000 }, - { _MMIO(0x9888), 0x078c4000 }, - { _MMIO(0x9888), 0x098c4000 }, - { _MMIO(0x9888), 0x0b8c4000 }, - { _MMIO(0x9888), 0x0d8c4000 }, - { _MMIO(0x9888), 0x018d8000 }, - { _MMIO(0x9888), 0x038da000 }, - { _MMIO(0x9888), 0x058da000 }, - { _MMIO(0x9888), 0x078d2000 }, - { _MMIO(0x9888), 0x2185aaaa }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0784c000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x1780c000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x43800882 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45801082 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x478014a5 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f800002 }, - { _MMIO(0x9888), 0x41800c62 }, -}; - -static int -get_tdl_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_2; - lens[n] = ARRAY_SIZE(mux_config_tdl_2); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_extra[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_extra[] = { - { _MMIO(0xe458), 0x00001000 }, - { _MMIO(0xe558), 0x00003002 }, - { _MMIO(0xe658), 0x00005004 }, - { _MMIO(0xe758), 0x00011010 }, - { _MMIO(0xe45c), 0x00050012 }, - { _MMIO(0xe55c), 0x00052051 }, - { _MMIO(0xe65c), 0x00000008 }, -}; - -static const struct i915_oa_reg mux_config_compute_extra[] = { - { _MMIO(0x9888), 0x161503e0 }, - { _MMIO(0x9888), 0x163503e0 }, - { _MMIO(0x9888), 0x165503e0 }, - { _MMIO(0x9888), 0x169503e0 }, - { _MMIO(0x9888), 0x16b503e0 }, - { _MMIO(0x9888), 0x16d503e0 }, - { _MMIO(0x9888), 0x045cc000 }, - { _MMIO(0x9888), 0x083d8000 }, - { _MMIO(0x9888), 0x04584000 }, - { _MMIO(0x9888), 0x085b4000 }, - { _MMIO(0x9888), 0x0a5b8000 }, - { _MMIO(0x9888), 0x0e1f00a8 }, - { _MMIO(0x9888), 0x08384000 }, - { _MMIO(0x9888), 0x0a384000 }, - { _MMIO(0x9888), 0x0c388000 }, - { _MMIO(0x9888), 0x0439a000 }, - { _MMIO(0x9888), 0x06392000 }, - { _MMIO(0x9888), 0x0c3a8000 }, - { _MMIO(0x9888), 0x08138000 }, - { _MMIO(0x9888), 0x06141000 }, - { _MMIO(0x9888), 0x041500c3 }, - { _MMIO(0x9888), 0x10150000 }, - { _MMIO(0x9888), 0x0a338000 }, - { _MMIO(0x9888), 0x06342000 }, - { _MMIO(0x9888), 0x0435c300 }, - { _MMIO(0x9888), 0x10350000 }, - { _MMIO(0x9888), 0x0c538000 }, - { _MMIO(0x9888), 0x06544000 }, - { _MMIO(0x9888), 0x065500c3 }, - { _MMIO(0x9888), 0x10550000 }, - { _MMIO(0x9888), 0x00dc8000 }, - { _MMIO(0x9888), 0x02dc4000 }, - { _MMIO(0x9888), 0x02bd8000 }, - { _MMIO(0x9888), 0x00d88000 }, - { _MMIO(0x9888), 0x02db4000 }, - { _MMIO(0x9888), 0x04db8000 }, - { _MMIO(0x9888), 0x0c9fa000 }, - { _MMIO(0x9888), 0x0e9f0002 }, - { _MMIO(0x9888), 0x02b84000 }, - { _MMIO(0x9888), 0x04b84000 }, - { _MMIO(0x9888), 0x06b88000 }, - { _MMIO(0x9888), 0x00b98000 }, - { _MMIO(0x9888), 0x02b9a000 }, - { _MMIO(0x9888), 0x06ba8000 }, - { _MMIO(0x9888), 0x02938000 }, - { _MMIO(0x9888), 0x04942000 }, - { _MMIO(0x9888), 0x0095c300 }, - { _MMIO(0x9888), 0x10950000 }, - { _MMIO(0x9888), 0x04b38000 }, - { _MMIO(0x9888), 0x04b44000 }, - { _MMIO(0x9888), 0x02b500c3 }, - { _MMIO(0x9888), 0x10b50000 }, - { _MMIO(0x9888), 0x06d38000 }, - { _MMIO(0x9888), 0x04d48000 }, - { _MMIO(0x9888), 0x02d5c300 }, - { _MMIO(0x9888), 0x10d50000 }, - { _MMIO(0x9888), 0x03888000 }, - { _MMIO(0x9888), 0x05888000 }, - { _MMIO(0x9888), 0x07888000 }, - { _MMIO(0x9888), 0x098a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x0d8a8000 }, - { _MMIO(0x9888), 0x238b3500 }, - { _MMIO(0x9888), 0x258b0005 }, - { _MMIO(0x9888), 0x038c4000 }, - { _MMIO(0x9888), 0x058c4000 }, - { _MMIO(0x9888), 0x078c4000 }, - { _MMIO(0x9888), 0x018d8000 }, - { _MMIO(0x9888), 0x038da000 }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x2185000a }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x07844000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x17804000 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f800c40 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x41801482 }, - { _MMIO(0x9888), 0x31800000 }, -}; - -static int -get_compute_extra_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_extra; - lens[n] = ARRAY_SIZE(mux_config_compute_extra); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_vme_pipe[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00100030 }, - { _MMIO(0x2774), 0x0000fff9 }, - { _MMIO(0x2778), 0x00000002 }, - { _MMIO(0x277c), 0x0000fffc }, - { _MMIO(0x2780), 0x00000002 }, - { _MMIO(0x2784), 0x0000fff3 }, - { _MMIO(0x2788), 0x00100180 }, - { _MMIO(0x278c), 0x0000ffcf }, - { _MMIO(0x2790), 0x00000002 }, - { _MMIO(0x2794), 0x0000ffcf }, - { _MMIO(0x2798), 0x00000002 }, - { _MMIO(0x279c), 0x0000ff3f }, -}; - -static const struct i915_oa_reg flex_eu_config_vme_pipe[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00008003 }, -}; - -static const struct i915_oa_reg mux_config_vme_pipe[] = { - { _MMIO(0x9888), 0x14100812 }, - { _MMIO(0x9888), 0x14125800 }, - { _MMIO(0x9888), 0x161200c0 }, - { _MMIO(0x9888), 0x14300812 }, - { _MMIO(0x9888), 0x14325800 }, - { _MMIO(0x9888), 0x163200c0 }, - { _MMIO(0x9888), 0x005c4000 }, - { _MMIO(0x9888), 0x065c8000 }, - { _MMIO(0x9888), 0x085cc000 }, - { _MMIO(0x9888), 0x0a5cc000 }, - { _MMIO(0x9888), 0x0c5cc000 }, - { _MMIO(0x9888), 0x003d8000 }, - { _MMIO(0x9888), 0x0e3d8000 }, - { _MMIO(0x9888), 0x183d2800 }, - { _MMIO(0x9888), 0x00584000 }, - { _MMIO(0x9888), 0x06588000 }, - { _MMIO(0x9888), 0x0858c000 }, - { _MMIO(0x9888), 0x005b4000 }, - { _MMIO(0x9888), 0x0e5b4000 }, - { _MMIO(0x9888), 0x185b9400 }, - { _MMIO(0x9888), 0x1a5b002a }, - { _MMIO(0x9888), 0x0c1f0800 }, - { _MMIO(0x9888), 0x0e1faa00 }, - { _MMIO(0x9888), 0x101f002a }, - { _MMIO(0x9888), 0x00384000 }, - { _MMIO(0x9888), 0x0e384000 }, - { _MMIO(0x9888), 0x16384000 }, - { _MMIO(0x9888), 0x18380155 }, - { _MMIO(0x9888), 0x00392000 }, - { _MMIO(0x9888), 0x06398000 }, - { _MMIO(0x9888), 0x0839a000 }, - { _MMIO(0x9888), 0x0a39a000 }, - { _MMIO(0x9888), 0x0c39a000 }, - { _MMIO(0x9888), 0x00100047 }, - { _MMIO(0x9888), 0x06101a80 }, - { _MMIO(0x9888), 0x10100000 }, - { _MMIO(0x9888), 0x0810c000 }, - { _MMIO(0x9888), 0x0811c000 }, - { _MMIO(0x9888), 0x08126151 }, - { _MMIO(0x9888), 0x10120000 }, - { _MMIO(0x9888), 0x00134000 }, - { _MMIO(0x9888), 0x0e134000 }, - { _MMIO(0x9888), 0x161300a0 }, - { _MMIO(0x9888), 0x0a301ac7 }, - { _MMIO(0x9888), 0x10300000 }, - { _MMIO(0x9888), 0x0c30c000 }, - { _MMIO(0x9888), 0x0c31c000 }, - { _MMIO(0x9888), 0x0c326151 }, - { _MMIO(0x9888), 0x10320000 }, - { _MMIO(0x9888), 0x16332a00 }, - { _MMIO(0x9888), 0x18330001 }, - { _MMIO(0x9888), 0x018a8000 }, - { _MMIO(0x9888), 0x0f8a8000 }, - { _MMIO(0x9888), 0x198a8000 }, - { _MMIO(0x9888), 0x1b8a2aa0 }, - { _MMIO(0x9888), 0x238b0020 }, - { _MMIO(0x9888), 0x258b5550 }, - { _MMIO(0x9888), 0x278b0001 }, - { _MMIO(0x9888), 0x1f850080 }, - { _MMIO(0x9888), 0x2185aaa0 }, - { _MMIO(0x9888), 0x23850002 }, - { _MMIO(0x9888), 0x01834000 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830015 }, - { _MMIO(0x9888), 0x01844000 }, - { _MMIO(0x9888), 0x07848000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x11804000 }, - { _MMIO(0x9888), 0x17808000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3d800800 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x43800002 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800884 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47800002 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, -}; - -static int -get_vme_pipe_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_vme_pipe; - lens[n] = ARRAY_SIZE(mux_config_vme_pipe); - n++; - - return n; -} - static const struct i915_oa_reg b_counter_config_test_oa[] = { { _MMIO(0x2740), 0x00000000 }, { _MMIO(0x2744), 0x00800000 }, @@ -4049,1328 +74,35 @@ static const struct i915_oa_reg mux_config_test_oa[] = { { _MMIO(0x9888), 0x31800000 }, }; -static int -get_test_oa_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_test_oa; - lens[n] = ARRAY_SIZE(mux_config_test_oa); - n++; - - return n; -} - -int i915_oa_select_metric_set_bdw(struct drm_i915_private *dev_priv) -{ - dev_priv->perf.oa.n_mux_configs = 0; - dev_priv->perf.oa.b_counter_regs = NULL; - dev_priv->perf.oa.b_counter_regs_len = 0; - dev_priv->perf.oa.flex_regs = NULL; - dev_priv->perf.oa.flex_regs_len = 0; - - switch (dev_priv->perf.oa.metrics_set) { - case METRIC_SET_ID_RENDER_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_render_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_basic); - - return 0; - case METRIC_SET_ID_COMPUTE_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_compute_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_basic); - - return 0; - case METRIC_SET_ID_RENDER_PIPE_PROFILE: - dev_priv->perf.oa.n_mux_configs = - get_render_pipe_profile_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_PIPE_PROFILE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_pipe_profile; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_pipe_profile); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_pipe_profile; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_pipe_profile); - - return 0; - case METRIC_SET_ID_MEMORY_READS: - dev_priv->perf.oa.n_mux_configs = - get_memory_reads_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_READS\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_reads; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_reads); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_reads; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_reads); - - return 0; - case METRIC_SET_ID_MEMORY_WRITES: - dev_priv->perf.oa.n_mux_configs = - get_memory_writes_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_WRITES\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_writes; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_writes); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_writes; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_writes); - - return 0; - case METRIC_SET_ID_COMPUTE_EXTENDED: - dev_priv->perf.oa.n_mux_configs = - get_compute_extended_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTENDED\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_extended; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_extended); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_extended; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_extended); - - return 0; - case METRIC_SET_ID_COMPUTE_L3_CACHE: - dev_priv->perf.oa.n_mux_configs = - get_compute_l3_cache_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_L3_CACHE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_l3_cache; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_l3_cache); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_l3_cache; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_l3_cache); - - return 0; - case METRIC_SET_ID_DATA_PORT_READS_COALESCING: - dev_priv->perf.oa.n_mux_configs = - get_data_port_reads_coalescing_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"DATA_PORT_READS_COALESCING\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_data_port_reads_coalescing; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_data_port_reads_coalescing); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_data_port_reads_coalescing; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_data_port_reads_coalescing); - - return 0; - case METRIC_SET_ID_DATA_PORT_WRITES_COALESCING: - dev_priv->perf.oa.n_mux_configs = - get_data_port_writes_coalescing_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"DATA_PORT_WRITES_COALESCING\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_data_port_writes_coalescing; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_data_port_writes_coalescing); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_data_port_writes_coalescing; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_data_port_writes_coalescing); - - return 0; - case METRIC_SET_ID_HDC_AND_SF: - dev_priv->perf.oa.n_mux_configs = - get_hdc_and_sf_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"HDC_AND_SF\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_hdc_and_sf; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_hdc_and_sf); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_hdc_and_sf; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_hdc_and_sf); - - return 0; - case METRIC_SET_ID_L3_1: - dev_priv->perf.oa.n_mux_configs = - get_l3_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_1); - - return 0; - case METRIC_SET_ID_L3_2: - dev_priv->perf.oa.n_mux_configs = - get_l3_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_2); - - return 0; - case METRIC_SET_ID_L3_3: - dev_priv->perf.oa.n_mux_configs = - get_l3_3_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_3\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_3; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_3); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_3; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_3); - - return 0; - case METRIC_SET_ID_L3_4: - dev_priv->perf.oa.n_mux_configs = - get_l3_4_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_4\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_4; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_4); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_4; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_4); - - return 0; - case METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND: - dev_priv->perf.oa.n_mux_configs = - get_rasterizer_and_pixel_backend_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RASTERIZER_AND_PIXEL_BACKEND\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_rasterizer_and_pixel_backend); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_rasterizer_and_pixel_backend); - - return 0; - case METRIC_SET_ID_SAMPLER_1: - dev_priv->perf.oa.n_mux_configs = - get_sampler_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"SAMPLER_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_sampler_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_sampler_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_sampler_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_sampler_1); - - return 0; - case METRIC_SET_ID_SAMPLER_2: - dev_priv->perf.oa.n_mux_configs = - get_sampler_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"SAMPLER_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_sampler_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_sampler_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_sampler_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_sampler_2); - - return 0; - case METRIC_SET_ID_TDL_1: - dev_priv->perf.oa.n_mux_configs = - get_tdl_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_1); - - return 0; - case METRIC_SET_ID_TDL_2: - dev_priv->perf.oa.n_mux_configs = - get_tdl_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_2); - - return 0; - case METRIC_SET_ID_COMPUTE_EXTRA: - dev_priv->perf.oa.n_mux_configs = - get_compute_extra_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTRA\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_extra; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_extra); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_extra; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_extra); - - return 0; - case METRIC_SET_ID_VME_PIPE: - dev_priv->perf.oa.n_mux_configs = - get_vme_pipe_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"VME_PIPE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_vme_pipe; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_vme_pipe); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_vme_pipe; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_vme_pipe); - - return 0; - case METRIC_SET_ID_TEST_OA: - dev_priv->perf.oa.n_mux_configs = - get_test_oa_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TEST_OA\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_test_oa; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_test_oa); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_test_oa; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_test_oa); - - return 0; - default: - return -ENODEV; - } -} - -static ssize_t -show_render_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_BASIC); -} - -static struct device_attribute dev_attr_render_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_render_basic[] = { - &dev_attr_render_basic_id.attr, - NULL, -}; - -static struct attribute_group group_render_basic = { - .name = "b541bd57-0e0f-4154-b4c0-5858010a2bf7", - .attrs = attrs_render_basic, -}; - -static ssize_t -show_compute_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_BASIC); -} - -static struct device_attribute dev_attr_compute_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_basic[] = { - &dev_attr_compute_basic_id.attr, - NULL, -}; - -static struct attribute_group group_compute_basic = { - .name = "35fbc9b2-a891-40a6-a38d-022bb7057552", - .attrs = attrs_compute_basic, -}; - -static ssize_t -show_render_pipe_profile_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_PIPE_PROFILE); -} - -static struct device_attribute dev_attr_render_pipe_profile_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_pipe_profile_id, - .store = NULL, -}; - -static struct attribute *attrs_render_pipe_profile[] = { - &dev_attr_render_pipe_profile_id.attr, - NULL, -}; - -static struct attribute_group group_render_pipe_profile = { - .name = "233d0544-fff7-4281-8291-e02f222aff72", - .attrs = attrs_render_pipe_profile, -}; - -static ssize_t -show_memory_reads_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_READS); -} - -static struct device_attribute dev_attr_memory_reads_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_reads_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_reads[] = { - &dev_attr_memory_reads_id.attr, - NULL, -}; - -static struct attribute_group group_memory_reads = { - .name = "2b255d48-2117-4fef-a8f7-f151e1d25a2c", - .attrs = attrs_memory_reads, -}; - -static ssize_t -show_memory_writes_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_WRITES); -} - -static struct device_attribute dev_attr_memory_writes_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_writes_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_writes[] = { - &dev_attr_memory_writes_id.attr, - NULL, -}; - -static struct attribute_group group_memory_writes = { - .name = "f7fd3220-b466-4a4d-9f98-b0caf3f2394c", - .attrs = attrs_memory_writes, -}; - -static ssize_t -show_compute_extended_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_EXTENDED); -} - -static struct device_attribute dev_attr_compute_extended_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_extended_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_extended[] = { - &dev_attr_compute_extended_id.attr, - NULL, -}; - -static struct attribute_group group_compute_extended = { - .name = "e99ccaca-821c-4df9-97a7-96bdb7204e43", - .attrs = attrs_compute_extended, -}; - -static ssize_t -show_compute_l3_cache_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_L3_CACHE); -} - -static struct device_attribute dev_attr_compute_l3_cache_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_l3_cache_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_l3_cache[] = { - &dev_attr_compute_l3_cache_id.attr, - NULL, -}; - -static struct attribute_group group_compute_l3_cache = { - .name = "27a364dc-8225-4ecb-b607-d6f1925598d9", - .attrs = attrs_compute_l3_cache, -}; - -static ssize_t -show_data_port_reads_coalescing_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_DATA_PORT_READS_COALESCING); -} - -static struct device_attribute dev_attr_data_port_reads_coalescing_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_data_port_reads_coalescing_id, - .store = NULL, -}; - -static struct attribute *attrs_data_port_reads_coalescing[] = { - &dev_attr_data_port_reads_coalescing_id.attr, - NULL, -}; - -static struct attribute_group group_data_port_reads_coalescing = { - .name = "857fc630-2f09-4804-85f1-084adfadd5ab", - .attrs = attrs_data_port_reads_coalescing, -}; - -static ssize_t -show_data_port_writes_coalescing_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_DATA_PORT_WRITES_COALESCING); -} - -static struct device_attribute dev_attr_data_port_writes_coalescing_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_data_port_writes_coalescing_id, - .store = NULL, -}; - -static struct attribute *attrs_data_port_writes_coalescing[] = { - &dev_attr_data_port_writes_coalescing_id.attr, - NULL, -}; - -static struct attribute_group group_data_port_writes_coalescing = { - .name = "343ebc99-4a55-414c-8c17-d8e259cf5e20", - .attrs = attrs_data_port_writes_coalescing, -}; - -static ssize_t -show_hdc_and_sf_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_HDC_AND_SF); -} - -static struct device_attribute dev_attr_hdc_and_sf_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_hdc_and_sf_id, - .store = NULL, -}; - -static struct attribute *attrs_hdc_and_sf[] = { - &dev_attr_hdc_and_sf_id.attr, - NULL, -}; - -static struct attribute_group group_hdc_and_sf = { - .name = "7bdafd88-a4fa-4ed5-bc09-1a977aa5be3e", - .attrs = attrs_hdc_and_sf, -}; - -static ssize_t -show_l3_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_1); -} - -static struct device_attribute dev_attr_l3_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_1_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_1[] = { - &dev_attr_l3_1_id.attr, - NULL, -}; - -static struct attribute_group group_l3_1 = { - .name = "9385ebb2-f34f-4aa5-aec5-7e9cbbea0f0b", - .attrs = attrs_l3_1, -}; - -static ssize_t -show_l3_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_2); -} - -static struct device_attribute dev_attr_l3_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_2_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_2[] = { - &dev_attr_l3_2_id.attr, - NULL, -}; - -static struct attribute_group group_l3_2 = { - .name = "446ae59b-ff2e-41c9-b49e-0184a54bf00a", - .attrs = attrs_l3_2, -}; - -static ssize_t -show_l3_3_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_3); -} - -static struct device_attribute dev_attr_l3_3_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_3_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_3[] = { - &dev_attr_l3_3_id.attr, - NULL, -}; - -static struct attribute_group group_l3_3 = { - .name = "84a7956f-1ea4-4d0d-837f-e39a0376e38c", - .attrs = attrs_l3_3, -}; - -static ssize_t -show_l3_4_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_4); -} - -static struct device_attribute dev_attr_l3_4_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_4_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_4[] = { - &dev_attr_l3_4_id.attr, - NULL, -}; - -static struct attribute_group group_l3_4 = { - .name = "92b493d9-df18-4bed-be06-5cac6f2a6f5f", - .attrs = attrs_l3_4, -}; - -static ssize_t -show_rasterizer_and_pixel_backend_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND); -} - -static struct device_attribute dev_attr_rasterizer_and_pixel_backend_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_rasterizer_and_pixel_backend_id, - .store = NULL, -}; - -static struct attribute *attrs_rasterizer_and_pixel_backend[] = { - &dev_attr_rasterizer_and_pixel_backend_id.attr, - NULL, -}; - -static struct attribute_group group_rasterizer_and_pixel_backend = { - .name = "14345c35-cc46-40d0-bb04-6ed1fbb43679", - .attrs = attrs_rasterizer_and_pixel_backend, -}; - -static ssize_t -show_sampler_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_SAMPLER_1); -} - -static struct device_attribute dev_attr_sampler_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_sampler_1_id, - .store = NULL, -}; - -static struct attribute *attrs_sampler_1[] = { - &dev_attr_sampler_1_id.attr, - NULL, -}; - -static struct attribute_group group_sampler_1 = { - .name = "f0c6ba37-d3d3-4211-91b5-226730312a54", - .attrs = attrs_sampler_1, -}; - -static ssize_t -show_sampler_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_SAMPLER_2); -} - -static struct device_attribute dev_attr_sampler_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_sampler_2_id, - .store = NULL, -}; - -static struct attribute *attrs_sampler_2[] = { - &dev_attr_sampler_2_id.attr, - NULL, -}; - -static struct attribute_group group_sampler_2 = { - .name = "30bf3702-48cf-4bca-b412-7cf50bb2f564", - .attrs = attrs_sampler_2, -}; - -static ssize_t -show_tdl_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_1); -} - -static struct device_attribute dev_attr_tdl_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_1_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_1[] = { - &dev_attr_tdl_1_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_1 = { - .name = "238bec85-df05-44f3-b905-d166712f2451", - .attrs = attrs_tdl_1, -}; - -static ssize_t -show_tdl_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_2); -} - -static struct device_attribute dev_attr_tdl_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_2_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_2[] = { - &dev_attr_tdl_2_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_2 = { - .name = "24bf02cd-8693-4583-981c-c4165b33da01", - .attrs = attrs_tdl_2, -}; - -static ssize_t -show_compute_extra_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_EXTRA); -} - -static struct device_attribute dev_attr_compute_extra_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_extra_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_extra[] = { - &dev_attr_compute_extra_id.attr, - NULL, -}; - -static struct attribute_group group_compute_extra = { - .name = "8fb61ba2-2fbb-454c-a136-2dec5a8a595e", - .attrs = attrs_compute_extra, -}; - -static ssize_t -show_vme_pipe_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_VME_PIPE); -} - -static struct device_attribute dev_attr_vme_pipe_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_vme_pipe_id, - .store = NULL, -}; - -static struct attribute *attrs_vme_pipe[] = { - &dev_attr_vme_pipe_id.attr, - NULL, -}; - -static struct attribute_group group_vme_pipe = { - .name = "e1743ca0-7fc8-410b-a066-de7bbb9280b7", - .attrs = attrs_vme_pipe, -}; - static ssize_t show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", METRIC_SET_ID_TEST_OA); + return sprintf(buf, "1\n"); } -static struct device_attribute dev_attr_test_oa_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_test_oa_id, - .store = NULL, -}; - -static struct attribute *attrs_test_oa[] = { - &dev_attr_test_oa_id.attr, - NULL, -}; - -static struct attribute_group group_test_oa = { - .name = "d6de6f55-e526-4f79-a6a6-d7315c09044e", - .attrs = attrs_test_oa, -}; - -int -i915_perf_register_sysfs_bdw(struct drm_i915_private *dev_priv) +void +i915_perf_load_test_config_bdw(struct drm_i915_private *dev_priv) { - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; - int ret = 0; + strncpy(dev_priv->perf.oa.test_config.uuid, + "d6de6f55-e526-4f79-a6a6-d7315c09044e", + UUID_STRING_LEN); + dev_priv->perf.oa.test_config.id = 1; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (ret) - goto error_render_basic; - } - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (ret) - goto error_compute_basic; - } - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (ret) - goto error_render_pipe_profile; - } - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (ret) - goto error_memory_reads; - } - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (ret) - goto error_memory_writes; - } - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (ret) - goto error_compute_extended; - } - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); - if (ret) - goto error_compute_l3_cache; - } - if (get_data_port_reads_coalescing_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_data_port_reads_coalescing); - if (ret) - goto error_data_port_reads_coalescing; - } - if (get_data_port_writes_coalescing_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_data_port_writes_coalescing); - if (ret) - goto error_data_port_writes_coalescing; - } - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (ret) - goto error_hdc_and_sf; - } - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (ret) - goto error_l3_1; - } - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_2); - if (ret) - goto error_l3_2; - } - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_3); - if (ret) - goto error_l3_3; - } - if (get_l3_4_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_4); - if (ret) - goto error_l3_4; - } - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (ret) - goto error_rasterizer_and_pixel_backend; - } - if (get_sampler_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_sampler_1); - if (ret) - goto error_sampler_1; - } - if (get_sampler_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_sampler_2); - if (ret) - goto error_sampler_2; - } - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (ret) - goto error_tdl_1; - } - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (ret) - goto error_tdl_2; - } - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extra); - if (ret) - goto error_compute_extra; - } - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); - if (ret) - goto error_vme_pipe; - } - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_test_oa); - if (ret) - goto error_test_oa; - } + dev_priv->perf.oa.test_config.mux_regs = mux_config_test_oa; + dev_priv->perf.oa.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa); - return 0; + dev_priv->perf.oa.test_config.b_counter_regs = b_counter_config_test_oa; + dev_priv->perf.oa.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa); -error_test_oa: - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); -error_vme_pipe: - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extra); -error_compute_extra: - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); -error_tdl_2: - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); -error_tdl_1: - if (get_sampler_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler_2); -error_sampler_2: - if (get_sampler_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler_1); -error_sampler_1: - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); -error_rasterizer_and_pixel_backend: - if (get_l3_4_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_4); -error_l3_4: - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_3); -error_l3_3: - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_2); -error_l3_2: - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); -error_l3_1: - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); -error_hdc_and_sf: - if (get_data_port_writes_coalescing_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_data_port_writes_coalescing); -error_data_port_writes_coalescing: - if (get_data_port_reads_coalescing_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_data_port_reads_coalescing); -error_data_port_reads_coalescing: - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); -error_compute_l3_cache: - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); -error_compute_extended: - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); -error_memory_writes: - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); -error_memory_reads: - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); -error_render_pipe_profile: - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); -error_compute_basic: - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); -error_render_basic: - return ret; -} + dev_priv->perf.oa.test_config.flex_regs = flex_eu_config_test_oa; + dev_priv->perf.oa.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa); -void -i915_perf_unregister_sysfs_bdw(struct drm_i915_private *dev_priv) -{ - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; + dev_priv->perf.oa.test_config.sysfs_metric.name = "d6de6f55-e526-4f79-a6a6-d7315c09044e"; + dev_priv->perf.oa.test_config.sysfs_metric.attrs = dev_priv->perf.oa.test_config.attrs; + + dev_priv->perf.oa.test_config.attrs[0] = &dev_priv->perf.oa.test_config.sysfs_metric_id.attr; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); - if (get_data_port_reads_coalescing_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_data_port_reads_coalescing); - if (get_data_port_writes_coalescing_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_data_port_writes_coalescing); - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_2); - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_3); - if (get_l3_4_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_4); - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (get_sampler_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler_1); - if (get_sampler_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler_2); - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extra); - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_test_oa); + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.name = "id"; + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.mode = 0444; + dev_priv->perf.oa.test_config.sysfs_metric_id.show = show_test_oa_id; } diff --git a/drivers/gpu/drm/i915/i915_oa_bdw.h b/drivers/gpu/drm/i915/i915_oa_bdw.h index 6363ff9f64c0..b812d16162ac 100644 --- a/drivers/gpu/drm/i915/i915_oa_bdw.h +++ b/drivers/gpu/drm/i915/i915_oa_bdw.h @@ -29,12 +29,6 @@ #ifndef __I915_OA_BDW_H__ #define __I915_OA_BDW_H__ -extern int i915_oa_n_builtin_metric_sets_bdw; - -extern int i915_oa_select_metric_set_bdw(struct drm_i915_private *dev_priv); - -extern int i915_perf_register_sysfs_bdw(struct drm_i915_private *dev_priv); - -extern void i915_perf_unregister_sysfs_bdw(struct drm_i915_private *dev_priv); +extern void i915_perf_load_test_config_bdw(struct drm_i915_private *dev_priv); #endif diff --git a/drivers/gpu/drm/i915/i915_oa_bxt.c b/drivers/gpu/drm/i915/i915_oa_bxt.c index 93864d8f32dd..d52074429def 100644 --- a/drivers/gpu/drm/i915/i915_oa_bxt.c +++ b/drivers/gpu/drm/i915/i915_oa_bxt.c @@ -31,1702 +31,6 @@ #include "i915_drv.h" #include "i915_oa_bxt.h" -enum metric_set_id { - METRIC_SET_ID_RENDER_BASIC = 1, - METRIC_SET_ID_COMPUTE_BASIC, - METRIC_SET_ID_RENDER_PIPE_PROFILE, - METRIC_SET_ID_MEMORY_READS, - METRIC_SET_ID_MEMORY_WRITES, - METRIC_SET_ID_COMPUTE_EXTENDED, - METRIC_SET_ID_COMPUTE_L3_CACHE, - METRIC_SET_ID_HDC_AND_SF, - METRIC_SET_ID_L3_1, - METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND, - METRIC_SET_ID_SAMPLER, - METRIC_SET_ID_TDL_1, - METRIC_SET_ID_TDL_2, - METRIC_SET_ID_COMPUTE_EXTRA, - METRIC_SET_ID_TEST_OA, -}; - -int i915_oa_n_builtin_metric_sets_bxt = 15; - -static const struct i915_oa_reg b_counter_config_render_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2740), 0x00000000 }, -}; - -static const struct i915_oa_reg flex_eu_config_render_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_render_basic_0_sku_gte_0x03[] = { - { _MMIO(0x9888), 0x166c00f0 }, - { _MMIO(0x9888), 0x12120280 }, - { _MMIO(0x9888), 0x12320280 }, - { _MMIO(0x9888), 0x11930317 }, - { _MMIO(0x9888), 0x159303df }, - { _MMIO(0x9888), 0x3f900c00 }, - { _MMIO(0x9888), 0x419000a0 }, - { _MMIO(0x9888), 0x002d1000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x082d5000 }, - { _MMIO(0x9888), 0x0a2d1000 }, - { _MMIO(0x9888), 0x0c2e0800 }, - { _MMIO(0x9888), 0x0e2e5900 }, - { _MMIO(0x9888), 0x0a4c8000 }, - { _MMIO(0x9888), 0x0c4c8000 }, - { _MMIO(0x9888), 0x0e4c4000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e2000 }, - { _MMIO(0x9888), 0x1c4f0010 }, - { _MMIO(0x9888), 0x0a6c0053 }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1a0fcc00 }, - { _MMIO(0x9888), 0x1c0f0002 }, - { _MMIO(0x9888), 0x1c2c0040 }, - { _MMIO(0x9888), 0x00101000 }, - { _MMIO(0x9888), 0x04101000 }, - { _MMIO(0x9888), 0x00114000 }, - { _MMIO(0x9888), 0x08114000 }, - { _MMIO(0x9888), 0x00120020 }, - { _MMIO(0x9888), 0x08120021 }, - { _MMIO(0x9888), 0x00141000 }, - { _MMIO(0x9888), 0x08141000 }, - { _MMIO(0x9888), 0x02308000 }, - { _MMIO(0x9888), 0x04302000 }, - { _MMIO(0x9888), 0x06318000 }, - { _MMIO(0x9888), 0x08318000 }, - { _MMIO(0x9888), 0x06320800 }, - { _MMIO(0x9888), 0x08320840 }, - { _MMIO(0x9888), 0x00320000 }, - { _MMIO(0x9888), 0x06344000 }, - { _MMIO(0x9888), 0x08344000 }, - { _MMIO(0x9888), 0x0d931831 }, - { _MMIO(0x9888), 0x0f939f3f }, - { _MMIO(0x9888), 0x01939e80 }, - { _MMIO(0x9888), 0x039303bc }, - { _MMIO(0x9888), 0x0593000e }, - { _MMIO(0x9888), 0x1993002a }, - { _MMIO(0x9888), 0x07930000 }, - { _MMIO(0x9888), 0x09930000 }, - { _MMIO(0x9888), 0x1d900177 }, - { _MMIO(0x9888), 0x1f900187 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x13904000 }, - { _MMIO(0x9888), 0x21904000 }, - { _MMIO(0x9888), 0x23904000 }, - { _MMIO(0x9888), 0x25904000 }, - { _MMIO(0x9888), 0x27904000 }, - { _MMIO(0x9888), 0x2b904000 }, - { _MMIO(0x9888), 0x2d904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17904000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x53901110 }, - { _MMIO(0x9888), 0x43900423 }, - { _MMIO(0x9888), 0x55900111 }, - { _MMIO(0x9888), 0x47900c02 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900020 }, - { _MMIO(0x9888), 0x59901111 }, - { _MMIO(0x9888), 0x4b900421 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900001 }, - { _MMIO(0x9888), 0x45900821 }, -}; - -static int -get_render_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - if (dev_priv->drm.pdev->revision >= 0x03) { - regs[n] = mux_config_render_basic_0_sku_gte_0x03; - lens[n] = ARRAY_SIZE(mux_config_render_basic_0_sku_gte_0x03); - n++; - } - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2740), 0x00000000 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_compute_basic[] = { - { _MMIO(0x9888), 0x104f00e0 }, - { _MMIO(0x9888), 0x124f1c00 }, - { _MMIO(0x9888), 0x39900340 }, - { _MMIO(0x9888), 0x3f900c00 }, - { _MMIO(0x9888), 0x41900000 }, - { _MMIO(0x9888), 0x002d5000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x082d4000 }, - { _MMIO(0x9888), 0x0a2d1000 }, - { _MMIO(0x9888), 0x0c2d5000 }, - { _MMIO(0x9888), 0x0e2d4000 }, - { _MMIO(0x9888), 0x0c2e1400 }, - { _MMIO(0x9888), 0x0e2e5100 }, - { _MMIO(0x9888), 0x102e0114 }, - { _MMIO(0x9888), 0x044cc000 }, - { _MMIO(0x9888), 0x0a4c8000 }, - { _MMIO(0x9888), 0x0c4c8000 }, - { _MMIO(0x9888), 0x0e4c4000 }, - { _MMIO(0x9888), 0x104c8000 }, - { _MMIO(0x9888), 0x124c8000 }, - { _MMIO(0x9888), 0x164c2000 }, - { _MMIO(0x9888), 0x004ea000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e2000 }, - { _MMIO(0x9888), 0x0c4ea000 }, - { _MMIO(0x9888), 0x0e4e8000 }, - { _MMIO(0x9888), 0x004f6b42 }, - { _MMIO(0x9888), 0x064f6200 }, - { _MMIO(0x9888), 0x084f4100 }, - { _MMIO(0x9888), 0x0a4f0061 }, - { _MMIO(0x9888), 0x0c4f6c4c }, - { _MMIO(0x9888), 0x0e4f4b00 }, - { _MMIO(0x9888), 0x1a4f0000 }, - { _MMIO(0x9888), 0x1c4f0000 }, - { _MMIO(0x9888), 0x180f5000 }, - { _MMIO(0x9888), 0x1a0f8800 }, - { _MMIO(0x9888), 0x1c0f08a2 }, - { _MMIO(0x9888), 0x182c4000 }, - { _MMIO(0x9888), 0x1c2c1451 }, - { _MMIO(0x9888), 0x1e2c0001 }, - { _MMIO(0x9888), 0x1a2c0010 }, - { _MMIO(0x9888), 0x01938000 }, - { _MMIO(0x9888), 0x0f938000 }, - { _MMIO(0x9888), 0x19938a28 }, - { _MMIO(0x9888), 0x03938000 }, - { _MMIO(0x9888), 0x19900177 }, - { _MMIO(0x9888), 0x1b900178 }, - { _MMIO(0x9888), 0x1d900125 }, - { _MMIO(0x9888), 0x1f900123 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x13904000 }, - { _MMIO(0x9888), 0x21904000 }, - { _MMIO(0x9888), 0x25904000 }, - { _MMIO(0x9888), 0x27904000 }, - { _MMIO(0x9888), 0x2b904000 }, - { _MMIO(0x9888), 0x2d904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x53901000 }, - { _MMIO(0x9888), 0x43900000 }, - { _MMIO(0x9888), 0x55900111 }, - { _MMIO(0x9888), 0x47900000 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900000 }, - { _MMIO(0x9888), 0x45900000 }, -}; - -static int -get_compute_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_basic; - lens[n] = ARRAY_SIZE(mux_config_compute_basic); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_render_pipe_profile[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007ffea }, - { _MMIO(0x2774), 0x00007ffc }, - { _MMIO(0x2778), 0x0007affa }, - { _MMIO(0x277c), 0x0000f5fd }, - { _MMIO(0x2780), 0x00079ffa }, - { _MMIO(0x2784), 0x0000f3fb }, - { _MMIO(0x2788), 0x0007bf7a }, - { _MMIO(0x278c), 0x0000f7e7 }, - { _MMIO(0x2790), 0x0007fefa }, - { _MMIO(0x2794), 0x0000f7cf }, - { _MMIO(0x2798), 0x00077ffa }, - { _MMIO(0x279c), 0x0000efdf }, - { _MMIO(0x27a0), 0x0006fffa }, - { _MMIO(0x27a4), 0x0000cfbf }, - { _MMIO(0x27a8), 0x0003fffa }, - { _MMIO(0x27ac), 0x00005f7f }, -}; - -static const struct i915_oa_reg flex_eu_config_render_pipe_profile[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_render_pipe_profile[] = { - { _MMIO(0x9888), 0x0c2e001f }, - { _MMIO(0x9888), 0x0a2f0000 }, - { _MMIO(0x9888), 0x10186800 }, - { _MMIO(0x9888), 0x11810019 }, - { _MMIO(0x9888), 0x15810013 }, - { _MMIO(0x9888), 0x13820020 }, - { _MMIO(0x9888), 0x11830020 }, - { _MMIO(0x9888), 0x17840000 }, - { _MMIO(0x9888), 0x11860007 }, - { _MMIO(0x9888), 0x21860000 }, - { _MMIO(0x9888), 0x178703e0 }, - { _MMIO(0x9888), 0x0c2d8000 }, - { _MMIO(0x9888), 0x042d4000 }, - { _MMIO(0x9888), 0x062d1000 }, - { _MMIO(0x9888), 0x022e5400 }, - { _MMIO(0x9888), 0x002e0000 }, - { _MMIO(0x9888), 0x0e2e0080 }, - { _MMIO(0x9888), 0x082f0040 }, - { _MMIO(0x9888), 0x002f0000 }, - { _MMIO(0x9888), 0x06143000 }, - { _MMIO(0x9888), 0x06174000 }, - { _MMIO(0x9888), 0x06180012 }, - { _MMIO(0x9888), 0x00180000 }, - { _MMIO(0x9888), 0x0d804000 }, - { _MMIO(0x9888), 0x0f804000 }, - { _MMIO(0x9888), 0x05804000 }, - { _MMIO(0x9888), 0x09810200 }, - { _MMIO(0x9888), 0x0b810030 }, - { _MMIO(0x9888), 0x03810003 }, - { _MMIO(0x9888), 0x21819140 }, - { _MMIO(0x9888), 0x23819050 }, - { _MMIO(0x9888), 0x25810018 }, - { _MMIO(0x9888), 0x0b820980 }, - { _MMIO(0x9888), 0x03820d80 }, - { _MMIO(0x9888), 0x11820000 }, - { _MMIO(0x9888), 0x0182c000 }, - { _MMIO(0x9888), 0x07828000 }, - { _MMIO(0x9888), 0x09824000 }, - { _MMIO(0x9888), 0x0f828000 }, - { _MMIO(0x9888), 0x0d830004 }, - { _MMIO(0x9888), 0x0583000c }, - { _MMIO(0x9888), 0x0f831000 }, - { _MMIO(0x9888), 0x01848072 }, - { _MMIO(0x9888), 0x11840000 }, - { _MMIO(0x9888), 0x07848000 }, - { _MMIO(0x9888), 0x09844000 }, - { _MMIO(0x9888), 0x0f848000 }, - { _MMIO(0x9888), 0x07860000 }, - { _MMIO(0x9888), 0x09860092 }, - { _MMIO(0x9888), 0x0f860400 }, - { _MMIO(0x9888), 0x01869100 }, - { _MMIO(0x9888), 0x0f870065 }, - { _MMIO(0x9888), 0x01870000 }, - { _MMIO(0x9888), 0x19930800 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x0d938000 }, - { _MMIO(0x9888), 0x1b952000 }, - { _MMIO(0x9888), 0x1d955055 }, - { _MMIO(0x9888), 0x1f951455 }, - { _MMIO(0x9888), 0x0992a000 }, - { _MMIO(0x9888), 0x0f928000 }, - { _MMIO(0x9888), 0x1192a800 }, - { _MMIO(0x9888), 0x1392028a }, - { _MMIO(0x9888), 0x0b92a000 }, - { _MMIO(0x9888), 0x0d922000 }, - { _MMIO(0x9888), 0x13908000 }, - { _MMIO(0x9888), 0x21908000 }, - { _MMIO(0x9888), 0x23908000 }, - { _MMIO(0x9888), 0x25908000 }, - { _MMIO(0x9888), 0x27908000 }, - { _MMIO(0x9888), 0x29908000 }, - { _MMIO(0x9888), 0x2b908000 }, - { _MMIO(0x9888), 0x2d904000 }, - { _MMIO(0x9888), 0x2f908000 }, - { _MMIO(0x9888), 0x31908000 }, - { _MMIO(0x9888), 0x15908000 }, - { _MMIO(0x9888), 0x17908000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x1f904000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43900c01 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47900000 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900863 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b900061 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900000 }, - { _MMIO(0x9888), 0x45900c22 }, -}; - -static int -get_render_pipe_profile_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_render_pipe_profile; - lens[n] = ARRAY_SIZE(mux_config_render_pipe_profile); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_reads[] = { - { _MMIO(0x272c), 0xffffffff }, - { _MMIO(0x2728), 0xffffffff }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x271c), 0xffffffff }, - { _MMIO(0x2718), 0xffffffff }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x86543210 }, - { _MMIO(0x2748), 0x86543210 }, - { _MMIO(0x2744), 0x00006667 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0x86543210 }, - { _MMIO(0x2758), 0x86543210 }, - { _MMIO(0x2754), 0x00006465 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fe00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fe00 }, - { _MMIO(0x2780), 0x0007f872 }, - { _MMIO(0x2784), 0x0000fe00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fe00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fe00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fe00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fe00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fe00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_reads[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_memory_reads[] = { - { _MMIO(0x9888), 0x19800343 }, - { _MMIO(0x9888), 0x39900340 }, - { _MMIO(0x9888), 0x3f901000 }, - { _MMIO(0x9888), 0x41900003 }, - { _MMIO(0x9888), 0x03803180 }, - { _MMIO(0x9888), 0x058035e2 }, - { _MMIO(0x9888), 0x0780006a }, - { _MMIO(0x9888), 0x11800000 }, - { _MMIO(0x9888), 0x2181a000 }, - { _MMIO(0x9888), 0x2381000a }, - { _MMIO(0x9888), 0x1d950550 }, - { _MMIO(0x9888), 0x0b928000 }, - { _MMIO(0x9888), 0x0d92a000 }, - { _MMIO(0x9888), 0x0f922000 }, - { _MMIO(0x9888), 0x13900170 }, - { _MMIO(0x9888), 0x21900171 }, - { _MMIO(0x9888), 0x23900172 }, - { _MMIO(0x9888), 0x25900173 }, - { _MMIO(0x9888), 0x27900174 }, - { _MMIO(0x9888), 0x29900175 }, - { _MMIO(0x9888), 0x2b900176 }, - { _MMIO(0x9888), 0x2d900177 }, - { _MMIO(0x9888), 0x2f90017f }, - { _MMIO(0x9888), 0x31900125 }, - { _MMIO(0x9888), 0x15900123 }, - { _MMIO(0x9888), 0x17900121 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43901084 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47901080 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49901084 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b901084 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900004 }, - { _MMIO(0x9888), 0x45900000 }, -}; - -static int -get_memory_reads_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_memory_reads; - lens[n] = ARRAY_SIZE(mux_config_memory_reads); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_writes[] = { - { _MMIO(0x272c), 0xffffffff }, - { _MMIO(0x2728), 0xffffffff }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x271c), 0xffffffff }, - { _MMIO(0x2718), 0xffffffff }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x86543210 }, - { _MMIO(0x2748), 0x86543210 }, - { _MMIO(0x2744), 0x00006667 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0x86543210 }, - { _MMIO(0x2758), 0x86543210 }, - { _MMIO(0x2754), 0x00006465 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fe00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fe00 }, - { _MMIO(0x2780), 0x0007f822 }, - { _MMIO(0x2784), 0x0000fe00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fe00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fe00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fe00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fe00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fe00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_writes[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_memory_writes[] = { - { _MMIO(0x9888), 0x19800343 }, - { _MMIO(0x9888), 0x39900340 }, - { _MMIO(0x9888), 0x3f900000 }, - { _MMIO(0x9888), 0x41900080 }, - { _MMIO(0x9888), 0x03803180 }, - { _MMIO(0x9888), 0x058035e2 }, - { _MMIO(0x9888), 0x0780006a }, - { _MMIO(0x9888), 0x11800000 }, - { _MMIO(0x9888), 0x2181a000 }, - { _MMIO(0x9888), 0x2381000a }, - { _MMIO(0x9888), 0x1d950550 }, - { _MMIO(0x9888), 0x0b928000 }, - { _MMIO(0x9888), 0x0d92a000 }, - { _MMIO(0x9888), 0x0f922000 }, - { _MMIO(0x9888), 0x13900180 }, - { _MMIO(0x9888), 0x21900181 }, - { _MMIO(0x9888), 0x23900182 }, - { _MMIO(0x9888), 0x25900183 }, - { _MMIO(0x9888), 0x27900184 }, - { _MMIO(0x9888), 0x29900185 }, - { _MMIO(0x9888), 0x2b900186 }, - { _MMIO(0x9888), 0x2d900187 }, - { _MMIO(0x9888), 0x2f900170 }, - { _MMIO(0x9888), 0x31900125 }, - { _MMIO(0x9888), 0x15900123 }, - { _MMIO(0x9888), 0x17900121 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43901084 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47901080 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49901084 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b901084 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900004 }, - { _MMIO(0x9888), 0x45900000 }, -}; - -static int -get_memory_writes_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_memory_writes; - lens[n] = ARRAY_SIZE(mux_config_memory_writes); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_extended[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007fc2a }, - { _MMIO(0x2774), 0x0000bf00 }, - { _MMIO(0x2778), 0x0007fc6a }, - { _MMIO(0x277c), 0x0000bf00 }, - { _MMIO(0x2780), 0x0007fc92 }, - { _MMIO(0x2784), 0x0000bf00 }, - { _MMIO(0x2788), 0x0007fca2 }, - { _MMIO(0x278c), 0x0000bf00 }, - { _MMIO(0x2790), 0x0007fc32 }, - { _MMIO(0x2794), 0x0000bf00 }, - { _MMIO(0x2798), 0x0007fc9a }, - { _MMIO(0x279c), 0x0000bf00 }, - { _MMIO(0x27a0), 0x0007fe6a }, - { _MMIO(0x27a4), 0x0000bf00 }, - { _MMIO(0x27a8), 0x0007fe7a }, - { _MMIO(0x27ac), 0x0000bf00 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_extended[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_compute_extended[] = { - { _MMIO(0x9888), 0x104f00e0 }, - { _MMIO(0x9888), 0x141c0160 }, - { _MMIO(0x9888), 0x161c0015 }, - { _MMIO(0x9888), 0x181c0120 }, - { _MMIO(0x9888), 0x002d5000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x082d5000 }, - { _MMIO(0x9888), 0x0a2d5000 }, - { _MMIO(0x9888), 0x0c2d5000 }, - { _MMIO(0x9888), 0x0e2d5000 }, - { _MMIO(0x9888), 0x022d5000 }, - { _MMIO(0x9888), 0x042d5000 }, - { _MMIO(0x9888), 0x0c2e5400 }, - { _MMIO(0x9888), 0x0e2e5515 }, - { _MMIO(0x9888), 0x102e0155 }, - { _MMIO(0x9888), 0x044cc000 }, - { _MMIO(0x9888), 0x0a4c8000 }, - { _MMIO(0x9888), 0x0c4cc000 }, - { _MMIO(0x9888), 0x0e4cc000 }, - { _MMIO(0x9888), 0x104c8000 }, - { _MMIO(0x9888), 0x124c8000 }, - { _MMIO(0x9888), 0x144c8000 }, - { _MMIO(0x9888), 0x164c2000 }, - { _MMIO(0x9888), 0x064cc000 }, - { _MMIO(0x9888), 0x084cc000 }, - { _MMIO(0x9888), 0x004ea000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084ea000 }, - { _MMIO(0x9888), 0x0a4ea000 }, - { _MMIO(0x9888), 0x0c4ea000 }, - { _MMIO(0x9888), 0x0e4ea000 }, - { _MMIO(0x9888), 0x024ea000 }, - { _MMIO(0x9888), 0x044ea000 }, - { _MMIO(0x9888), 0x0e4f4b41 }, - { _MMIO(0x9888), 0x004f4200 }, - { _MMIO(0x9888), 0x024f404c }, - { _MMIO(0x9888), 0x1c4f0000 }, - { _MMIO(0x9888), 0x1a4f0000 }, - { _MMIO(0x9888), 0x001b4000 }, - { _MMIO(0x9888), 0x061b8000 }, - { _MMIO(0x9888), 0x081bc000 }, - { _MMIO(0x9888), 0x0a1bc000 }, - { _MMIO(0x9888), 0x0c1bc000 }, - { _MMIO(0x9888), 0x041bc000 }, - { _MMIO(0x9888), 0x001c0031 }, - { _MMIO(0x9888), 0x061c1900 }, - { _MMIO(0x9888), 0x081c1a33 }, - { _MMIO(0x9888), 0x0a1c1b35 }, - { _MMIO(0x9888), 0x0c1c3337 }, - { _MMIO(0x9888), 0x041c31c7 }, - { _MMIO(0x9888), 0x180f5000 }, - { _MMIO(0x9888), 0x1a0fa8aa }, - { _MMIO(0x9888), 0x1c0f0aaa }, - { _MMIO(0x9888), 0x182c8000 }, - { _MMIO(0x9888), 0x1c2c6aaa }, - { _MMIO(0x9888), 0x1e2c0001 }, - { _MMIO(0x9888), 0x1a2c2950 }, - { _MMIO(0x9888), 0x01938000 }, - { _MMIO(0x9888), 0x0f938000 }, - { _MMIO(0x9888), 0x1993aaaa }, - { _MMIO(0x9888), 0x03938000 }, - { _MMIO(0x9888), 0x05938000 }, - { _MMIO(0x9888), 0x07938000 }, - { _MMIO(0x9888), 0x09938000 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x13904000 }, - { _MMIO(0x9888), 0x21904000 }, - { _MMIO(0x9888), 0x23904000 }, - { _MMIO(0x9888), 0x25904000 }, - { _MMIO(0x9888), 0x27904000 }, - { _MMIO(0x9888), 0x29904000 }, - { _MMIO(0x9888), 0x2b904000 }, - { _MMIO(0x9888), 0x2d904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17904000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43900420 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47900000 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b900400 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900001 }, - { _MMIO(0x9888), 0x45900001 }, -}; - -static int -get_compute_extended_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_extended; - lens[n] = ARRAY_SIZE(mux_config_compute_extended); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_l3_cache[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x30800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007fffa }, - { _MMIO(0x2774), 0x0000fefe }, - { _MMIO(0x2778), 0x0007fffa }, - { _MMIO(0x277c), 0x0000fefd }, - { _MMIO(0x2790), 0x0007fffa }, - { _MMIO(0x2794), 0x0000fbef }, - { _MMIO(0x2798), 0x0007fffa }, - { _MMIO(0x279c), 0x0000fbdf }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_l3_cache[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00101100 }, - { _MMIO(0xe45c), 0x00201200 }, - { _MMIO(0xe55c), 0x00301300 }, - { _MMIO(0xe65c), 0x00401400 }, -}; - -static const struct i915_oa_reg mux_config_compute_l3_cache[] = { - { _MMIO(0x9888), 0x166c03b0 }, - { _MMIO(0x9888), 0x1593001e }, - { _MMIO(0x9888), 0x3f900c00 }, - { _MMIO(0x9888), 0x41900000 }, - { _MMIO(0x9888), 0x002d1000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x082d5000 }, - { _MMIO(0x9888), 0x0e2d5000 }, - { _MMIO(0x9888), 0x0c2e0400 }, - { _MMIO(0x9888), 0x0e2e1500 }, - { _MMIO(0x9888), 0x102e0140 }, - { _MMIO(0x9888), 0x044c4000 }, - { _MMIO(0x9888), 0x0a4c8000 }, - { _MMIO(0x9888), 0x0c4cc000 }, - { _MMIO(0x9888), 0x144c8000 }, - { _MMIO(0x9888), 0x164c2000 }, - { _MMIO(0x9888), 0x004e2000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084ea000 }, - { _MMIO(0x9888), 0x0e4ea000 }, - { _MMIO(0x9888), 0x1a4f4001 }, - { _MMIO(0x9888), 0x1c4f5005 }, - { _MMIO(0x9888), 0x006c0051 }, - { _MMIO(0x9888), 0x066c5000 }, - { _MMIO(0x9888), 0x086c5c5d }, - { _MMIO(0x9888), 0x0e6c5e5f }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x146c0000 }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x180f1000 }, - { _MMIO(0x9888), 0x1a0fa800 }, - { _MMIO(0x9888), 0x1c0f0a00 }, - { _MMIO(0x9888), 0x182c4000 }, - { _MMIO(0x9888), 0x1c2c4015 }, - { _MMIO(0x9888), 0x1e2c0001 }, - { _MMIO(0x9888), 0x03931980 }, - { _MMIO(0x9888), 0x05930032 }, - { _MMIO(0x9888), 0x11930000 }, - { _MMIO(0x9888), 0x01938000 }, - { _MMIO(0x9888), 0x0f938000 }, - { _MMIO(0x9888), 0x1993a00a }, - { _MMIO(0x9888), 0x07930000 }, - { _MMIO(0x9888), 0x09930000 }, - { _MMIO(0x9888), 0x1d900177 }, - { _MMIO(0x9888), 0x1f900178 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x13904000 }, - { _MMIO(0x9888), 0x21904000 }, - { _MMIO(0x9888), 0x23904000 }, - { _MMIO(0x9888), 0x25904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x53901000 }, - { _MMIO(0x9888), 0x43900000 }, - { _MMIO(0x9888), 0x55900111 }, - { _MMIO(0x9888), 0x47900001 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x4d900000 }, - { _MMIO(0x9888), 0x45900400 }, -}; - -static int -get_compute_l3_cache_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_l3_cache; - lens[n] = ARRAY_SIZE(mux_config_compute_l3_cache); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_hdc_and_sf[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x10800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000fdff }, -}; - -static const struct i915_oa_reg flex_eu_config_hdc_and_sf[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_hdc_and_sf[] = { - { _MMIO(0x9888), 0x104f0232 }, - { _MMIO(0x9888), 0x124f4640 }, - { _MMIO(0x9888), 0x11834400 }, - { _MMIO(0x9888), 0x022d4000 }, - { _MMIO(0x9888), 0x042d5000 }, - { _MMIO(0x9888), 0x062d1000 }, - { _MMIO(0x9888), 0x0e2e0055 }, - { _MMIO(0x9888), 0x064c8000 }, - { _MMIO(0x9888), 0x084cc000 }, - { _MMIO(0x9888), 0x0a4c4000 }, - { _MMIO(0x9888), 0x024e8000 }, - { _MMIO(0x9888), 0x044ea000 }, - { _MMIO(0x9888), 0x064e2000 }, - { _MMIO(0x9888), 0x024f6100 }, - { _MMIO(0x9888), 0x044f416b }, - { _MMIO(0x9888), 0x064f004b }, - { _MMIO(0x9888), 0x1a4f0000 }, - { _MMIO(0x9888), 0x1a0f02a8 }, - { _MMIO(0x9888), 0x1a2c5500 }, - { _MMIO(0x9888), 0x0f808000 }, - { _MMIO(0x9888), 0x25810020 }, - { _MMIO(0x9888), 0x0f8305c0 }, - { _MMIO(0x9888), 0x07938000 }, - { _MMIO(0x9888), 0x09938000 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x0d938000 }, - { _MMIO(0x9888), 0x1f951000 }, - { _MMIO(0x9888), 0x13920200 }, - { _MMIO(0x9888), 0x31908000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x1f904000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4d900003 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900000 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47900000 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_hdc_and_sf_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_hdc_and_sf; - lens[n] = ARRAY_SIZE(mux_config_hdc_and_sf); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00014002 }, - { _MMIO(0x277c), 0x0000c3ff }, - { _MMIO(0x2780), 0x00010002 }, - { _MMIO(0x2784), 0x0000c7ff }, - { _MMIO(0x2788), 0x00004002 }, - { _MMIO(0x278c), 0x0000d3ff }, - { _MMIO(0x2790), 0x00100700 }, - { _MMIO(0x2794), 0x0000ff1f }, - { _MMIO(0x2798), 0x00001402 }, - { _MMIO(0x279c), 0x0000fc3f }, - { _MMIO(0x27a0), 0x00001002 }, - { _MMIO(0x27a4), 0x0000fc7f }, - { _MMIO(0x27a8), 0x00000402 }, - { _MMIO(0x27ac), 0x0000fd3f }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_1_0_sku_gte_0x03[] = { - { _MMIO(0x9888), 0x12643400 }, - { _MMIO(0x9888), 0x12653400 }, - { _MMIO(0x9888), 0x106c6800 }, - { _MMIO(0x9888), 0x126c001e }, - { _MMIO(0x9888), 0x166c0010 }, - { _MMIO(0x9888), 0x0c2d5000 }, - { _MMIO(0x9888), 0x0e2d5000 }, - { _MMIO(0x9888), 0x002d4000 }, - { _MMIO(0x9888), 0x022d5000 }, - { _MMIO(0x9888), 0x042d5000 }, - { _MMIO(0x9888), 0x062d1000 }, - { _MMIO(0x9888), 0x102e0154 }, - { _MMIO(0x9888), 0x0c2e5000 }, - { _MMIO(0x9888), 0x0e2e0055 }, - { _MMIO(0x9888), 0x104c8000 }, - { _MMIO(0x9888), 0x124c8000 }, - { _MMIO(0x9888), 0x144c8000 }, - { _MMIO(0x9888), 0x164c2000 }, - { _MMIO(0x9888), 0x044c8000 }, - { _MMIO(0x9888), 0x064cc000 }, - { _MMIO(0x9888), 0x084cc000 }, - { _MMIO(0x9888), 0x0a4c4000 }, - { _MMIO(0x9888), 0x0c4ea000 }, - { _MMIO(0x9888), 0x0e4ea000 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x024ea000 }, - { _MMIO(0x9888), 0x044ea000 }, - { _MMIO(0x9888), 0x064e2000 }, - { _MMIO(0x9888), 0x1c4f5500 }, - { _MMIO(0x9888), 0x1a4f1554 }, - { _MMIO(0x9888), 0x0a640024 }, - { _MMIO(0x9888), 0x10640000 }, - { _MMIO(0x9888), 0x04640000 }, - { _MMIO(0x9888), 0x0c650024 }, - { _MMIO(0x9888), 0x10650000 }, - { _MMIO(0x9888), 0x06650000 }, - { _MMIO(0x9888), 0x0c6c5327 }, - { _MMIO(0x9888), 0x0e6c5425 }, - { _MMIO(0x9888), 0x006c2a00 }, - { _MMIO(0x9888), 0x026c285b }, - { _MMIO(0x9888), 0x046c005c }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1a6c0900 }, - { _MMIO(0x9888), 0x1c0f0aa0 }, - { _MMIO(0x9888), 0x180f4000 }, - { _MMIO(0x9888), 0x1a0f02aa }, - { _MMIO(0x9888), 0x1c2c5400 }, - { _MMIO(0x9888), 0x1e2c0001 }, - { _MMIO(0x9888), 0x1a2c5550 }, - { _MMIO(0x9888), 0x1993aa00 }, - { _MMIO(0x9888), 0x03938000 }, - { _MMIO(0x9888), 0x05938000 }, - { _MMIO(0x9888), 0x07938000 }, - { _MMIO(0x9888), 0x09938000 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x0d938000 }, - { _MMIO(0x9888), 0x2b904000 }, - { _MMIO(0x9888), 0x2d904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17904000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x1f904000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b900421 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900001 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43900420 }, - { _MMIO(0x9888), 0x45900021 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47900000 }, -}; - -static const struct i915_oa_reg mux_config_l3_1_0_sku_lt_0x03[] = { - { _MMIO(0x9888), 0x14640340 }, - { _MMIO(0x9888), 0x14650340 }, - { _MMIO(0x9888), 0x106c6800 }, - { _MMIO(0x9888), 0x126c001e }, - { _MMIO(0x9888), 0x166c0010 }, - { _MMIO(0x9888), 0x0c2d5000 }, - { _MMIO(0x9888), 0x0e2d5000 }, - { _MMIO(0x9888), 0x002d4000 }, - { _MMIO(0x9888), 0x022d5000 }, - { _MMIO(0x9888), 0x042d5000 }, - { _MMIO(0x9888), 0x062d1000 }, - { _MMIO(0x9888), 0x102e0154 }, - { _MMIO(0x9888), 0x0c2e5000 }, - { _MMIO(0x9888), 0x0e2e0055 }, - { _MMIO(0x9888), 0x104c8000 }, - { _MMIO(0x9888), 0x124c8000 }, - { _MMIO(0x9888), 0x144c8000 }, - { _MMIO(0x9888), 0x164c2000 }, - { _MMIO(0x9888), 0x044c8000 }, - { _MMIO(0x9888), 0x064cc000 }, - { _MMIO(0x9888), 0x084cc000 }, - { _MMIO(0x9888), 0x0a4c4000 }, - { _MMIO(0x9888), 0x0c4ea000 }, - { _MMIO(0x9888), 0x0e4ea000 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x024ea000 }, - { _MMIO(0x9888), 0x044ea000 }, - { _MMIO(0x9888), 0x064e2000 }, - { _MMIO(0x9888), 0x1c4f5500 }, - { _MMIO(0x9888), 0x1a4f1554 }, - { _MMIO(0x9888), 0x04642400 }, - { _MMIO(0x9888), 0x22640000 }, - { _MMIO(0x9888), 0x1a640000 }, - { _MMIO(0x9888), 0x06650024 }, - { _MMIO(0x9888), 0x22650000 }, - { _MMIO(0x9888), 0x1c650000 }, - { _MMIO(0x9888), 0x0c6c5327 }, - { _MMIO(0x9888), 0x0e6c5425 }, - { _MMIO(0x9888), 0x006c2a00 }, - { _MMIO(0x9888), 0x026c285b }, - { _MMIO(0x9888), 0x046c005c }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1a6c0900 }, - { _MMIO(0x9888), 0x1c0f0aa0 }, - { _MMIO(0x9888), 0x180f4000 }, - { _MMIO(0x9888), 0x1a0f02aa }, - { _MMIO(0x9888), 0x1c2c5400 }, - { _MMIO(0x9888), 0x1e2c0001 }, - { _MMIO(0x9888), 0x1a2c5550 }, - { _MMIO(0x9888), 0x1993aa00 }, - { _MMIO(0x9888), 0x03938000 }, - { _MMIO(0x9888), 0x05938000 }, - { _MMIO(0x9888), 0x07938000 }, - { _MMIO(0x9888), 0x09938000 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x0d938000 }, - { _MMIO(0x9888), 0x2b904000 }, - { _MMIO(0x9888), 0x2d904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17904000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x1f904000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b900421 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900001 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43900420 }, - { _MMIO(0x9888), 0x45900021 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47900000 }, -}; - -static int -get_l3_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 2); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 2); - - if (dev_priv->drm.pdev->revision >= 0x03) { - regs[n] = mux_config_l3_1_0_sku_gte_0x03; - lens[n] = ARRAY_SIZE(mux_config_l3_1_0_sku_gte_0x03); - n++; - } - if (dev_priv->drm.pdev->revision < 0x03) { - regs[n] = mux_config_l3_1_0_sku_lt_0x03; - lens[n] = ARRAY_SIZE(mux_config_l3_1_0_sku_lt_0x03); - n++; - } - - return n; -} - -static const struct i915_oa_reg b_counter_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x30800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000efff }, - { _MMIO(0x2778), 0x00006000 }, - { _MMIO(0x277c), 0x0000f3ff }, -}; - -static const struct i915_oa_reg flex_eu_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x9888), 0x102d7800 }, - { _MMIO(0x9888), 0x122d79e0 }, - { _MMIO(0x9888), 0x0c2f0004 }, - { _MMIO(0x9888), 0x100e3800 }, - { _MMIO(0x9888), 0x180f0005 }, - { _MMIO(0x9888), 0x002d0940 }, - { _MMIO(0x9888), 0x022d802f }, - { _MMIO(0x9888), 0x042d4013 }, - { _MMIO(0x9888), 0x062d1000 }, - { _MMIO(0x9888), 0x0e2e0050 }, - { _MMIO(0x9888), 0x022f0010 }, - { _MMIO(0x9888), 0x002f0000 }, - { _MMIO(0x9888), 0x084c8000 }, - { _MMIO(0x9888), 0x0a4c4000 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e2000 }, - { _MMIO(0x9888), 0x040e0480 }, - { _MMIO(0x9888), 0x000e0000 }, - { _MMIO(0x9888), 0x060f0027 }, - { _MMIO(0x9888), 0x100f0000 }, - { _MMIO(0x9888), 0x1a0f0040 }, - { _MMIO(0x9888), 0x03938000 }, - { _MMIO(0x9888), 0x05938000 }, - { _MMIO(0x9888), 0x07938000 }, - { _MMIO(0x9888), 0x09938000 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x0d938000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17904000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x1f904000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x439014a0 }, - { _MMIO(0x9888), 0x459000a4 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47900001 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_rasterizer_and_pixel_backend_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_rasterizer_and_pixel_backend; - lens[n] = ARRAY_SIZE(mux_config_rasterizer_and_pixel_backend); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_sampler[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x70800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x0000c000 }, - { _MMIO(0x2774), 0x0000e7ff }, - { _MMIO(0x2778), 0x00003000 }, - { _MMIO(0x277c), 0x0000f9ff }, - { _MMIO(0x2780), 0x00000c00 }, - { _MMIO(0x2784), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_sampler[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_sampler[] = { - { _MMIO(0x9888), 0x121300a0 }, - { _MMIO(0x9888), 0x141600ab }, - { _MMIO(0x9888), 0x123300a0 }, - { _MMIO(0x9888), 0x143600ab }, - { _MMIO(0x9888), 0x125300a0 }, - { _MMIO(0x9888), 0x145600ab }, - { _MMIO(0x9888), 0x0c2d4000 }, - { _MMIO(0x9888), 0x0e2d5000 }, - { _MMIO(0x9888), 0x002d4000 }, - { _MMIO(0x9888), 0x022d5000 }, - { _MMIO(0x9888), 0x042d5000 }, - { _MMIO(0x9888), 0x062d1000 }, - { _MMIO(0x9888), 0x102e01a0 }, - { _MMIO(0x9888), 0x0c2e5000 }, - { _MMIO(0x9888), 0x0e2e0065 }, - { _MMIO(0x9888), 0x164c2000 }, - { _MMIO(0x9888), 0x044c8000 }, - { _MMIO(0x9888), 0x064cc000 }, - { _MMIO(0x9888), 0x084c4000 }, - { _MMIO(0x9888), 0x0a4c4000 }, - { _MMIO(0x9888), 0x0e4e8000 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x024ea000 }, - { _MMIO(0x9888), 0x044e2000 }, - { _MMIO(0x9888), 0x064e2000 }, - { _MMIO(0x9888), 0x1c0f0800 }, - { _MMIO(0x9888), 0x180f4000 }, - { _MMIO(0x9888), 0x1a0f023f }, - { _MMIO(0x9888), 0x1e2c0003 }, - { _MMIO(0x9888), 0x1a2cc030 }, - { _MMIO(0x9888), 0x04132180 }, - { _MMIO(0x9888), 0x02130000 }, - { _MMIO(0x9888), 0x0c148000 }, - { _MMIO(0x9888), 0x0e142000 }, - { _MMIO(0x9888), 0x04148000 }, - { _MMIO(0x9888), 0x1e150140 }, - { _MMIO(0x9888), 0x1c150040 }, - { _MMIO(0x9888), 0x0c163000 }, - { _MMIO(0x9888), 0x0e160068 }, - { _MMIO(0x9888), 0x10160000 }, - { _MMIO(0x9888), 0x18160000 }, - { _MMIO(0x9888), 0x0a164000 }, - { _MMIO(0x9888), 0x04330043 }, - { _MMIO(0x9888), 0x02330000 }, - { _MMIO(0x9888), 0x0234a000 }, - { _MMIO(0x9888), 0x04342000 }, - { _MMIO(0x9888), 0x1c350015 }, - { _MMIO(0x9888), 0x02363460 }, - { _MMIO(0x9888), 0x10360000 }, - { _MMIO(0x9888), 0x04360000 }, - { _MMIO(0x9888), 0x06360000 }, - { _MMIO(0x9888), 0x08364000 }, - { _MMIO(0x9888), 0x06530043 }, - { _MMIO(0x9888), 0x02530000 }, - { _MMIO(0x9888), 0x0e548000 }, - { _MMIO(0x9888), 0x00548000 }, - { _MMIO(0x9888), 0x06542000 }, - { _MMIO(0x9888), 0x1e550400 }, - { _MMIO(0x9888), 0x1a552000 }, - { _MMIO(0x9888), 0x1c550100 }, - { _MMIO(0x9888), 0x0e563000 }, - { _MMIO(0x9888), 0x00563400 }, - { _MMIO(0x9888), 0x10560000 }, - { _MMIO(0x9888), 0x18560000 }, - { _MMIO(0x9888), 0x02560000 }, - { _MMIO(0x9888), 0x0c564000 }, - { _MMIO(0x9888), 0x1993a800 }, - { _MMIO(0x9888), 0x03938000 }, - { _MMIO(0x9888), 0x05938000 }, - { _MMIO(0x9888), 0x07938000 }, - { _MMIO(0x9888), 0x09938000 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x0d938000 }, - { _MMIO(0x9888), 0x2d904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17904000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x1f904000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b9014a0 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900001 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43900820 }, - { _MMIO(0x9888), 0x45901022 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47900000 }, -}; - -static int -get_sampler_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_sampler; - lens[n] = ARRAY_SIZE(mux_config_sampler); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x00007fff }, - { _MMIO(0x2778), 0x00000000 }, - { _MMIO(0x277c), 0x00009fff }, - { _MMIO(0x2780), 0x00000002 }, - { _MMIO(0x2784), 0x0000efff }, - { _MMIO(0x2788), 0x00000000 }, - { _MMIO(0x278c), 0x0000f3ff }, - { _MMIO(0x2790), 0x00000002 }, - { _MMIO(0x2794), 0x0000fdff }, - { _MMIO(0x2798), 0x00000000 }, - { _MMIO(0x279c), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_1[] = { - { _MMIO(0x9888), 0x141a0000 }, - { _MMIO(0x9888), 0x143a0000 }, - { _MMIO(0x9888), 0x145a0000 }, - { _MMIO(0x9888), 0x0c2d4000 }, - { _MMIO(0x9888), 0x0e2d5000 }, - { _MMIO(0x9888), 0x002d4000 }, - { _MMIO(0x9888), 0x022d5000 }, - { _MMIO(0x9888), 0x042d5000 }, - { _MMIO(0x9888), 0x062d1000 }, - { _MMIO(0x9888), 0x102e0150 }, - { _MMIO(0x9888), 0x0c2e5000 }, - { _MMIO(0x9888), 0x0e2e006a }, - { _MMIO(0x9888), 0x124c8000 }, - { _MMIO(0x9888), 0x144c8000 }, - { _MMIO(0x9888), 0x164c2000 }, - { _MMIO(0x9888), 0x044c8000 }, - { _MMIO(0x9888), 0x064c4000 }, - { _MMIO(0x9888), 0x0a4c4000 }, - { _MMIO(0x9888), 0x0c4e8000 }, - { _MMIO(0x9888), 0x0e4ea000 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x024e2000 }, - { _MMIO(0x9888), 0x064e2000 }, - { _MMIO(0x9888), 0x1c0f0bc0 }, - { _MMIO(0x9888), 0x180f4000 }, - { _MMIO(0x9888), 0x1a0f0302 }, - { _MMIO(0x9888), 0x1e2c0003 }, - { _MMIO(0x9888), 0x1a2c00f0 }, - { _MMIO(0x9888), 0x021a3080 }, - { _MMIO(0x9888), 0x041a31e5 }, - { _MMIO(0x9888), 0x02148000 }, - { _MMIO(0x9888), 0x0414a000 }, - { _MMIO(0x9888), 0x1c150054 }, - { _MMIO(0x9888), 0x06168000 }, - { _MMIO(0x9888), 0x08168000 }, - { _MMIO(0x9888), 0x0a168000 }, - { _MMIO(0x9888), 0x0c3a3280 }, - { _MMIO(0x9888), 0x0e3a0063 }, - { _MMIO(0x9888), 0x063a0061 }, - { _MMIO(0x9888), 0x023a0000 }, - { _MMIO(0x9888), 0x0c348000 }, - { _MMIO(0x9888), 0x0e342000 }, - { _MMIO(0x9888), 0x06342000 }, - { _MMIO(0x9888), 0x1e350140 }, - { _MMIO(0x9888), 0x1c350100 }, - { _MMIO(0x9888), 0x18360028 }, - { _MMIO(0x9888), 0x0c368000 }, - { _MMIO(0x9888), 0x0e5a3080 }, - { _MMIO(0x9888), 0x005a3280 }, - { _MMIO(0x9888), 0x025a0063 }, - { _MMIO(0x9888), 0x0e548000 }, - { _MMIO(0x9888), 0x00548000 }, - { _MMIO(0x9888), 0x02542000 }, - { _MMIO(0x9888), 0x1e550400 }, - { _MMIO(0x9888), 0x1a552000 }, - { _MMIO(0x9888), 0x1c550001 }, - { _MMIO(0x9888), 0x18560080 }, - { _MMIO(0x9888), 0x02568000 }, - { _MMIO(0x9888), 0x04568000 }, - { _MMIO(0x9888), 0x1993a800 }, - { _MMIO(0x9888), 0x03938000 }, - { _MMIO(0x9888), 0x05938000 }, - { _MMIO(0x9888), 0x07938000 }, - { _MMIO(0x9888), 0x09938000 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x0d938000 }, - { _MMIO(0x9888), 0x2d904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17904000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x1f904000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b900420 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43900000 }, - { _MMIO(0x9888), 0x45901084 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47900001 }, -}; - -static int -get_tdl_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_1; - lens[n] = ARRAY_SIZE(mux_config_tdl_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_2[] = { - { _MMIO(0x9888), 0x141a026b }, - { _MMIO(0x9888), 0x143a0173 }, - { _MMIO(0x9888), 0x145a026b }, - { _MMIO(0x9888), 0x002d4000 }, - { _MMIO(0x9888), 0x022d5000 }, - { _MMIO(0x9888), 0x042d5000 }, - { _MMIO(0x9888), 0x062d1000 }, - { _MMIO(0x9888), 0x0c2e5000 }, - { _MMIO(0x9888), 0x0e2e0069 }, - { _MMIO(0x9888), 0x044c8000 }, - { _MMIO(0x9888), 0x064cc000 }, - { _MMIO(0x9888), 0x0a4c4000 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x024ea000 }, - { _MMIO(0x9888), 0x064e2000 }, - { _MMIO(0x9888), 0x180f6000 }, - { _MMIO(0x9888), 0x1a0f030a }, - { _MMIO(0x9888), 0x1a2c03c0 }, - { _MMIO(0x9888), 0x041a37e7 }, - { _MMIO(0x9888), 0x021a0000 }, - { _MMIO(0x9888), 0x0414a000 }, - { _MMIO(0x9888), 0x1c150050 }, - { _MMIO(0x9888), 0x08168000 }, - { _MMIO(0x9888), 0x0a168000 }, - { _MMIO(0x9888), 0x003a3380 }, - { _MMIO(0x9888), 0x063a006f }, - { _MMIO(0x9888), 0x023a0000 }, - { _MMIO(0x9888), 0x00348000 }, - { _MMIO(0x9888), 0x06342000 }, - { _MMIO(0x9888), 0x1a352000 }, - { _MMIO(0x9888), 0x1c350100 }, - { _MMIO(0x9888), 0x02368000 }, - { _MMIO(0x9888), 0x0c368000 }, - { _MMIO(0x9888), 0x025a37e7 }, - { _MMIO(0x9888), 0x0254a000 }, - { _MMIO(0x9888), 0x1c550005 }, - { _MMIO(0x9888), 0x04568000 }, - { _MMIO(0x9888), 0x06568000 }, - { _MMIO(0x9888), 0x03938000 }, - { _MMIO(0x9888), 0x05938000 }, - { _MMIO(0x9888), 0x07938000 }, - { _MMIO(0x9888), 0x09938000 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x0d938000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17904000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x1f904000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43900020 }, - { _MMIO(0x9888), 0x45901080 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47900001 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_tdl_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_2; - lens[n] = ARRAY_SIZE(mux_config_tdl_2); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_extra[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_extra[] = { - { _MMIO(0xe458), 0x00001000 }, - { _MMIO(0xe558), 0x00003002 }, - { _MMIO(0xe658), 0x00005004 }, - { _MMIO(0xe758), 0x00011010 }, - { _MMIO(0xe45c), 0x00050012 }, - { _MMIO(0xe55c), 0x00052051 }, - { _MMIO(0xe65c), 0x00000008 }, -}; - -static const struct i915_oa_reg mux_config_compute_extra[] = { - { _MMIO(0x9888), 0x141a001f }, - { _MMIO(0x9888), 0x143a001f }, - { _MMIO(0x9888), 0x145a001f }, - { _MMIO(0x9888), 0x042d5000 }, - { _MMIO(0x9888), 0x062d1000 }, - { _MMIO(0x9888), 0x0e2e0094 }, - { _MMIO(0x9888), 0x084cc000 }, - { _MMIO(0x9888), 0x044ea000 }, - { _MMIO(0x9888), 0x1a0f00e0 }, - { _MMIO(0x9888), 0x1a2c0c00 }, - { _MMIO(0x9888), 0x061a0063 }, - { _MMIO(0x9888), 0x021a0000 }, - { _MMIO(0x9888), 0x06142000 }, - { _MMIO(0x9888), 0x1c150100 }, - { _MMIO(0x9888), 0x0c168000 }, - { _MMIO(0x9888), 0x043a3180 }, - { _MMIO(0x9888), 0x023a0000 }, - { _MMIO(0x9888), 0x04348000 }, - { _MMIO(0x9888), 0x1c350040 }, - { _MMIO(0x9888), 0x0a368000 }, - { _MMIO(0x9888), 0x045a0063 }, - { _MMIO(0x9888), 0x025a0000 }, - { _MMIO(0x9888), 0x04542000 }, - { _MMIO(0x9888), 0x1c550010 }, - { _MMIO(0x9888), 0x08568000 }, - { _MMIO(0x9888), 0x09938000 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x0d938000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x1f904000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900400 }, - { _MMIO(0x9888), 0x47900004 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_compute_extra_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_extra; - lens[n] = ARRAY_SIZE(mux_config_compute_extra); - n++; - - return n; -} - static const struct i915_oa_reg b_counter_config_test_oa[] = { { _MMIO(0x2740), 0x00000000 }, { _MMIO(0x2744), 0x00800000 }, @@ -1769,922 +73,35 @@ static const struct i915_oa_reg mux_config_test_oa[] = { { _MMIO(0x9888), 0x33900000 }, }; -static int -get_test_oa_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_test_oa; - lens[n] = ARRAY_SIZE(mux_config_test_oa); - n++; - - return n; -} - -int i915_oa_select_metric_set_bxt(struct drm_i915_private *dev_priv) -{ - dev_priv->perf.oa.n_mux_configs = 0; - dev_priv->perf.oa.b_counter_regs = NULL; - dev_priv->perf.oa.b_counter_regs_len = 0; - dev_priv->perf.oa.flex_regs = NULL; - dev_priv->perf.oa.flex_regs_len = 0; - - switch (dev_priv->perf.oa.metrics_set) { - case METRIC_SET_ID_RENDER_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_render_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_basic); - - return 0; - case METRIC_SET_ID_COMPUTE_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_compute_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_basic); - - return 0; - case METRIC_SET_ID_RENDER_PIPE_PROFILE: - dev_priv->perf.oa.n_mux_configs = - get_render_pipe_profile_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_PIPE_PROFILE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_pipe_profile; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_pipe_profile); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_pipe_profile; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_pipe_profile); - - return 0; - case METRIC_SET_ID_MEMORY_READS: - dev_priv->perf.oa.n_mux_configs = - get_memory_reads_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_READS\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_reads; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_reads); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_reads; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_reads); - - return 0; - case METRIC_SET_ID_MEMORY_WRITES: - dev_priv->perf.oa.n_mux_configs = - get_memory_writes_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_WRITES\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_writes; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_writes); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_writes; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_writes); - - return 0; - case METRIC_SET_ID_COMPUTE_EXTENDED: - dev_priv->perf.oa.n_mux_configs = - get_compute_extended_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTENDED\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_extended; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_extended); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_extended; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_extended); - - return 0; - case METRIC_SET_ID_COMPUTE_L3_CACHE: - dev_priv->perf.oa.n_mux_configs = - get_compute_l3_cache_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_L3_CACHE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_l3_cache; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_l3_cache); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_l3_cache; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_l3_cache); - - return 0; - case METRIC_SET_ID_HDC_AND_SF: - dev_priv->perf.oa.n_mux_configs = - get_hdc_and_sf_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"HDC_AND_SF\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_hdc_and_sf; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_hdc_and_sf); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_hdc_and_sf; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_hdc_and_sf); - - return 0; - case METRIC_SET_ID_L3_1: - dev_priv->perf.oa.n_mux_configs = - get_l3_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_1); - - return 0; - case METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND: - dev_priv->perf.oa.n_mux_configs = - get_rasterizer_and_pixel_backend_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RASTERIZER_AND_PIXEL_BACKEND\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_rasterizer_and_pixel_backend); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_rasterizer_and_pixel_backend); - - return 0; - case METRIC_SET_ID_SAMPLER: - dev_priv->perf.oa.n_mux_configs = - get_sampler_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"SAMPLER\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_sampler; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_sampler); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_sampler; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_sampler); - - return 0; - case METRIC_SET_ID_TDL_1: - dev_priv->perf.oa.n_mux_configs = - get_tdl_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_1); - - return 0; - case METRIC_SET_ID_TDL_2: - dev_priv->perf.oa.n_mux_configs = - get_tdl_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_2); - - return 0; - case METRIC_SET_ID_COMPUTE_EXTRA: - dev_priv->perf.oa.n_mux_configs = - get_compute_extra_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTRA\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_extra; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_extra); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_extra; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_extra); - - return 0; - case METRIC_SET_ID_TEST_OA: - dev_priv->perf.oa.n_mux_configs = - get_test_oa_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TEST_OA\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_test_oa; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_test_oa); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_test_oa; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_test_oa); - - return 0; - default: - return -ENODEV; - } -} - -static ssize_t -show_render_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_BASIC); -} - -static struct device_attribute dev_attr_render_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_render_basic[] = { - &dev_attr_render_basic_id.attr, - NULL, -}; - -static struct attribute_group group_render_basic = { - .name = "22b9519a-e9ba-4c41-8b54-f4f8ca14fa0a", - .attrs = attrs_render_basic, -}; - -static ssize_t -show_compute_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_BASIC); -} - -static struct device_attribute dev_attr_compute_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_basic[] = { - &dev_attr_compute_basic_id.attr, - NULL, -}; - -static struct attribute_group group_compute_basic = { - .name = "012d72cf-82a9-4d25-8ddf-74076fd30797", - .attrs = attrs_compute_basic, -}; - -static ssize_t -show_render_pipe_profile_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_PIPE_PROFILE); -} - -static struct device_attribute dev_attr_render_pipe_profile_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_pipe_profile_id, - .store = NULL, -}; - -static struct attribute *attrs_render_pipe_profile[] = { - &dev_attr_render_pipe_profile_id.attr, - NULL, -}; - -static struct attribute_group group_render_pipe_profile = { - .name = "ce416533-e49e-4211-80af-ec513590a914", - .attrs = attrs_render_pipe_profile, -}; - -static ssize_t -show_memory_reads_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_READS); -} - -static struct device_attribute dev_attr_memory_reads_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_reads_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_reads[] = { - &dev_attr_memory_reads_id.attr, - NULL, -}; - -static struct attribute_group group_memory_reads = { - .name = "398e2452-18d7-42d0-b241-e4d0a9148ada", - .attrs = attrs_memory_reads, -}; - -static ssize_t -show_memory_writes_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_WRITES); -} - -static struct device_attribute dev_attr_memory_writes_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_writes_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_writes[] = { - &dev_attr_memory_writes_id.attr, - NULL, -}; - -static struct attribute_group group_memory_writes = { - .name = "d324a0d6-7269-4847-a5c2-6f71ddc7fed5", - .attrs = attrs_memory_writes, -}; - -static ssize_t -show_compute_extended_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_EXTENDED); -} - -static struct device_attribute dev_attr_compute_extended_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_extended_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_extended[] = { - &dev_attr_compute_extended_id.attr, - NULL, -}; - -static struct attribute_group group_compute_extended = { - .name = "caf3596a-7bb1-4dec-b3b3-2a080d283b49", - .attrs = attrs_compute_extended, -}; - -static ssize_t -show_compute_l3_cache_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_L3_CACHE); -} - -static struct device_attribute dev_attr_compute_l3_cache_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_l3_cache_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_l3_cache[] = { - &dev_attr_compute_l3_cache_id.attr, - NULL, -}; - -static struct attribute_group group_compute_l3_cache = { - .name = "49b956e2-d5b9-47e0-9d8a-cee5e8cec527", - .attrs = attrs_compute_l3_cache, -}; - -static ssize_t -show_hdc_and_sf_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_HDC_AND_SF); -} - -static struct device_attribute dev_attr_hdc_and_sf_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_hdc_and_sf_id, - .store = NULL, -}; - -static struct attribute *attrs_hdc_and_sf[] = { - &dev_attr_hdc_and_sf_id.attr, - NULL, -}; - -static struct attribute_group group_hdc_and_sf = { - .name = "f64ef50a-bdba-4b35-8f09-203c13d8ee5a", - .attrs = attrs_hdc_and_sf, -}; - -static ssize_t -show_l3_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_1); -} - -static struct device_attribute dev_attr_l3_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_1_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_1[] = { - &dev_attr_l3_1_id.attr, - NULL, -}; - -static struct attribute_group group_l3_1 = { - .name = "00ad5a41-7eab-4f7a-9103-49d411c67219", - .attrs = attrs_l3_1, -}; - -static ssize_t -show_rasterizer_and_pixel_backend_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND); -} - -static struct device_attribute dev_attr_rasterizer_and_pixel_backend_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_rasterizer_and_pixel_backend_id, - .store = NULL, -}; - -static struct attribute *attrs_rasterizer_and_pixel_backend[] = { - &dev_attr_rasterizer_and_pixel_backend_id.attr, - NULL, -}; - -static struct attribute_group group_rasterizer_and_pixel_backend = { - .name = "46dc44ca-491c-4cc1-a951-e7b3e62bf02b", - .attrs = attrs_rasterizer_and_pixel_backend, -}; - -static ssize_t -show_sampler_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_SAMPLER); -} - -static struct device_attribute dev_attr_sampler_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_sampler_id, - .store = NULL, -}; - -static struct attribute *attrs_sampler[] = { - &dev_attr_sampler_id.attr, - NULL, -}; - -static struct attribute_group group_sampler = { - .name = "8364e2a8-af63-40af-b0d5-42969a255654", - .attrs = attrs_sampler, -}; - -static ssize_t -show_tdl_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_1); -} - -static struct device_attribute dev_attr_tdl_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_1_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_1[] = { - &dev_attr_tdl_1_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_1 = { - .name = "175c8092-cb25-4d1e-8dc7-b4fdd39e2d92", - .attrs = attrs_tdl_1, -}; - -static ssize_t -show_tdl_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_2); -} - -static struct device_attribute dev_attr_tdl_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_2_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_2[] = { - &dev_attr_tdl_2_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_2 = { - .name = "d260f03f-b34d-4b49-a44e-436819117332", - .attrs = attrs_tdl_2, -}; - -static ssize_t -show_compute_extra_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_EXTRA); -} - -static struct device_attribute dev_attr_compute_extra_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_extra_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_extra[] = { - &dev_attr_compute_extra_id.attr, - NULL, -}; - -static struct attribute_group group_compute_extra = { - .name = "fa6ecf21-2cb8-4d0b-9308-6e4a7b4ca87a", - .attrs = attrs_compute_extra, -}; - static ssize_t show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", METRIC_SET_ID_TEST_OA); + return sprintf(buf, "1\n"); } -static struct device_attribute dev_attr_test_oa_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_test_oa_id, - .store = NULL, -}; - -static struct attribute *attrs_test_oa[] = { - &dev_attr_test_oa_id.attr, - NULL, -}; - -static struct attribute_group group_test_oa = { - .name = "5ee72f5c-092f-421e-8b70-225f7c3e9612", - .attrs = attrs_test_oa, -}; - -int -i915_perf_register_sysfs_bxt(struct drm_i915_private *dev_priv) +void +i915_perf_load_test_config_bxt(struct drm_i915_private *dev_priv) { - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; - int ret = 0; + strncpy(dev_priv->perf.oa.test_config.uuid, + "5ee72f5c-092f-421e-8b70-225f7c3e9612", + UUID_STRING_LEN); + dev_priv->perf.oa.test_config.id = 1; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (ret) - goto error_render_basic; - } - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (ret) - goto error_compute_basic; - } - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (ret) - goto error_render_pipe_profile; - } - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (ret) - goto error_memory_reads; - } - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (ret) - goto error_memory_writes; - } - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (ret) - goto error_compute_extended; - } - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); - if (ret) - goto error_compute_l3_cache; - } - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (ret) - goto error_hdc_and_sf; - } - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (ret) - goto error_l3_1; - } - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (ret) - goto error_rasterizer_and_pixel_backend; - } - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_sampler); - if (ret) - goto error_sampler; - } - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (ret) - goto error_tdl_1; - } - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (ret) - goto error_tdl_2; - } - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extra); - if (ret) - goto error_compute_extra; - } - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_test_oa); - if (ret) - goto error_test_oa; - } + dev_priv->perf.oa.test_config.mux_regs = mux_config_test_oa; + dev_priv->perf.oa.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa); - return 0; + dev_priv->perf.oa.test_config.b_counter_regs = b_counter_config_test_oa; + dev_priv->perf.oa.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa); -error_test_oa: - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extra); -error_compute_extra: - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); -error_tdl_2: - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); -error_tdl_1: - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler); -error_sampler: - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); -error_rasterizer_and_pixel_backend: - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); -error_l3_1: - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); -error_hdc_and_sf: - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); -error_compute_l3_cache: - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); -error_compute_extended: - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); -error_memory_writes: - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); -error_memory_reads: - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); -error_render_pipe_profile: - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); -error_compute_basic: - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); -error_render_basic: - return ret; -} + dev_priv->perf.oa.test_config.flex_regs = flex_eu_config_test_oa; + dev_priv->perf.oa.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa); -void -i915_perf_unregister_sysfs_bxt(struct drm_i915_private *dev_priv) -{ - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; + dev_priv->perf.oa.test_config.sysfs_metric.name = "5ee72f5c-092f-421e-8b70-225f7c3e9612"; + dev_priv->perf.oa.test_config.sysfs_metric.attrs = dev_priv->perf.oa.test_config.attrs; + + dev_priv->perf.oa.test_config.attrs[0] = &dev_priv->perf.oa.test_config.sysfs_metric_id.attr; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler); - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extra); - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_test_oa); + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.name = "id"; + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.mode = 0444; + dev_priv->perf.oa.test_config.sysfs_metric_id.show = show_test_oa_id; } diff --git a/drivers/gpu/drm/i915/i915_oa_bxt.h b/drivers/gpu/drm/i915/i915_oa_bxt.h index 6cf7ba746e7e..690b963a2383 100644 --- a/drivers/gpu/drm/i915/i915_oa_bxt.h +++ b/drivers/gpu/drm/i915/i915_oa_bxt.h @@ -29,12 +29,6 @@ #ifndef __I915_OA_BXT_H__ #define __I915_OA_BXT_H__ -extern int i915_oa_n_builtin_metric_sets_bxt; - -extern int i915_oa_select_metric_set_bxt(struct drm_i915_private *dev_priv); - -extern int i915_perf_register_sysfs_bxt(struct drm_i915_private *dev_priv); - -extern void i915_perf_unregister_sysfs_bxt(struct drm_i915_private *dev_priv); +extern void i915_perf_load_test_config_bxt(struct drm_i915_private *dev_priv); #endif diff --git a/drivers/gpu/drm/i915/i915_oa_chv.c b/drivers/gpu/drm/i915/i915_oa_chv.c index aa6bece7e75f..b4832a0fefaa 100644 --- a/drivers/gpu/drm/i915/i915_oa_chv.c +++ b/drivers/gpu/drm/i915/i915_oa_chv.c @@ -31,1943 +31,6 @@ #include "i915_drv.h" #include "i915_oa_chv.h" -enum metric_set_id { - METRIC_SET_ID_RENDER_BASIC = 1, - METRIC_SET_ID_COMPUTE_BASIC, - METRIC_SET_ID_RENDER_PIPE_PROFILE, - METRIC_SET_ID_HDC_AND_SF, - METRIC_SET_ID_L3_1, - METRIC_SET_ID_L3_2, - METRIC_SET_ID_L3_3, - METRIC_SET_ID_L3_4, - METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND, - METRIC_SET_ID_SAMPLER_1, - METRIC_SET_ID_SAMPLER_2, - METRIC_SET_ID_TDL_1, - METRIC_SET_ID_TDL_2, - METRIC_SET_ID_TEST_OA, -}; - -int i915_oa_n_builtin_metric_sets_chv = 14; - -static const struct i915_oa_reg b_counter_config_render_basic[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, -}; - -static const struct i915_oa_reg flex_eu_config_render_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_render_basic[] = { - { _MMIO(0x9888), 0x59800000 }, - { _MMIO(0x9888), 0x59800001 }, - { _MMIO(0x9888), 0x285a0006 }, - { _MMIO(0x9888), 0x2c110014 }, - { _MMIO(0x9888), 0x2e110000 }, - { _MMIO(0x9888), 0x2c310014 }, - { _MMIO(0x9888), 0x2e310000 }, - { _MMIO(0x9888), 0x2b8303df }, - { _MMIO(0x9888), 0x3580024f }, - { _MMIO(0x9888), 0x00580888 }, - { _MMIO(0x9888), 0x1e5a0015 }, - { _MMIO(0x9888), 0x205a0014 }, - { _MMIO(0x9888), 0x045a0000 }, - { _MMIO(0x9888), 0x025a0000 }, - { _MMIO(0x9888), 0x02180500 }, - { _MMIO(0x9888), 0x00190555 }, - { _MMIO(0x9888), 0x021d0500 }, - { _MMIO(0x9888), 0x021f0a00 }, - { _MMIO(0x9888), 0x00380444 }, - { _MMIO(0x9888), 0x02390500 }, - { _MMIO(0x9888), 0x003a0666 }, - { _MMIO(0x9888), 0x00100111 }, - { _MMIO(0x9888), 0x06110030 }, - { _MMIO(0x9888), 0x0a110031 }, - { _MMIO(0x9888), 0x0e110046 }, - { _MMIO(0x9888), 0x04110000 }, - { _MMIO(0x9888), 0x00110000 }, - { _MMIO(0x9888), 0x00130111 }, - { _MMIO(0x9888), 0x00300444 }, - { _MMIO(0x9888), 0x08310030 }, - { _MMIO(0x9888), 0x0c310031 }, - { _MMIO(0x9888), 0x10310046 }, - { _MMIO(0x9888), 0x04310000 }, - { _MMIO(0x9888), 0x00310000 }, - { _MMIO(0x9888), 0x00330444 }, - { _MMIO(0x9888), 0x038a0a00 }, - { _MMIO(0x9888), 0x018b0fff }, - { _MMIO(0x9888), 0x038b0a00 }, - { _MMIO(0x9888), 0x01855000 }, - { _MMIO(0x9888), 0x03850055 }, - { _MMIO(0x9888), 0x13830021 }, - { _MMIO(0x9888), 0x15830020 }, - { _MMIO(0x9888), 0x1783002f }, - { _MMIO(0x9888), 0x1983002e }, - { _MMIO(0x9888), 0x1b83002d }, - { _MMIO(0x9888), 0x1d83002c }, - { _MMIO(0x9888), 0x05830000 }, - { _MMIO(0x9888), 0x01840555 }, - { _MMIO(0x9888), 0x03840500 }, - { _MMIO(0x9888), 0x23800074 }, - { _MMIO(0x9888), 0x2580007d }, - { _MMIO(0x9888), 0x05800000 }, - { _MMIO(0x9888), 0x01805000 }, - { _MMIO(0x9888), 0x03800055 }, - { _MMIO(0x9888), 0x01865000 }, - { _MMIO(0x9888), 0x03860055 }, - { _MMIO(0x9888), 0x01875000 }, - { _MMIO(0x9888), 0x03870055 }, - { _MMIO(0x9888), 0x418000aa }, - { _MMIO(0x9888), 0x4380000a }, - { _MMIO(0x9888), 0x45800000 }, - { _MMIO(0x9888), 0x4780000a }, - { _MMIO(0x9888), 0x49800000 }, - { _MMIO(0x9888), 0x4b800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x55800000 }, - { _MMIO(0x9888), 0x57800000 }, - { _MMIO(0x9888), 0x59800000 }, -}; - -static int -get_render_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_render_basic; - lens[n] = ARRAY_SIZE(mux_config_render_basic); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_compute_basic[] = { - { _MMIO(0x9888), 0x59800000 }, - { _MMIO(0x9888), 0x59800001 }, - { _MMIO(0x9888), 0x2e5800e0 }, - { _MMIO(0x9888), 0x2e3800e0 }, - { _MMIO(0x9888), 0x3580024f }, - { _MMIO(0x9888), 0x3d800140 }, - { _MMIO(0x9888), 0x08580042 }, - { _MMIO(0x9888), 0x0c580040 }, - { _MMIO(0x9888), 0x1058004c }, - { _MMIO(0x9888), 0x1458004b }, - { _MMIO(0x9888), 0x04580000 }, - { _MMIO(0x9888), 0x00580000 }, - { _MMIO(0x9888), 0x00195555 }, - { _MMIO(0x9888), 0x06380042 }, - { _MMIO(0x9888), 0x0a380040 }, - { _MMIO(0x9888), 0x0e38004c }, - { _MMIO(0x9888), 0x1238004b }, - { _MMIO(0x9888), 0x04380000 }, - { _MMIO(0x9888), 0x00384444 }, - { _MMIO(0x9888), 0x003a5555 }, - { _MMIO(0x9888), 0x018bffff }, - { _MMIO(0x9888), 0x01845555 }, - { _MMIO(0x9888), 0x17800074 }, - { _MMIO(0x9888), 0x1980007d }, - { _MMIO(0x9888), 0x1b80007c }, - { _MMIO(0x9888), 0x1d8000b6 }, - { _MMIO(0x9888), 0x1f8000b7 }, - { _MMIO(0x9888), 0x05800000 }, - { _MMIO(0x9888), 0x03800000 }, - { _MMIO(0x9888), 0x418000aa }, - { _MMIO(0x9888), 0x438000aa }, - { _MMIO(0x9888), 0x45800000 }, - { _MMIO(0x9888), 0x47800000 }, - { _MMIO(0x9888), 0x4980012a }, - { _MMIO(0x9888), 0x4b80012a }, - { _MMIO(0x9888), 0x4d80012a }, - { _MMIO(0x9888), 0x4f80012a }, - { _MMIO(0x9888), 0x518001ce }, - { _MMIO(0x9888), 0x538001ce }, - { _MMIO(0x9888), 0x5580000e }, - { _MMIO(0x9888), 0x59800000 }, -}; - -static int -get_compute_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_basic; - lens[n] = ARRAY_SIZE(mux_config_compute_basic); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_render_pipe_profile[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2770), 0x0007ffea }, - { _MMIO(0x2774), 0x00007ffc }, - { _MMIO(0x2778), 0x0007affa }, - { _MMIO(0x277c), 0x0000f5fd }, - { _MMIO(0x2780), 0x00079ffa }, - { _MMIO(0x2784), 0x0000f3fb }, - { _MMIO(0x2788), 0x0007bf7a }, - { _MMIO(0x278c), 0x0000f7e7 }, - { _MMIO(0x2790), 0x0007fefa }, - { _MMIO(0x2794), 0x0000f7cf }, - { _MMIO(0x2798), 0x00077ffa }, - { _MMIO(0x279c), 0x0000efdf }, - { _MMIO(0x27a0), 0x0006fffa }, - { _MMIO(0x27a4), 0x0000cfbf }, - { _MMIO(0x27a8), 0x0003fffa }, - { _MMIO(0x27ac), 0x00005f7f }, -}; - -static const struct i915_oa_reg flex_eu_config_render_pipe_profile[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_render_pipe_profile[] = { - { _MMIO(0x9888), 0x59800000 }, - { _MMIO(0x9888), 0x59800001 }, - { _MMIO(0x9888), 0x261e0000 }, - { _MMIO(0x9888), 0x281f000f }, - { _MMIO(0x9888), 0x2817001a }, - { _MMIO(0x9888), 0x2791001f }, - { _MMIO(0x9888), 0x27880019 }, - { _MMIO(0x9888), 0x2d890000 }, - { _MMIO(0x9888), 0x278a0007 }, - { _MMIO(0x9888), 0x298d001f }, - { _MMIO(0x9888), 0x278e0020 }, - { _MMIO(0x9888), 0x2b8f0012 }, - { _MMIO(0x9888), 0x29900000 }, - { _MMIO(0x9888), 0x00184000 }, - { _MMIO(0x9888), 0x02181000 }, - { _MMIO(0x9888), 0x02194000 }, - { _MMIO(0x9888), 0x141e0002 }, - { _MMIO(0x9888), 0x041e0000 }, - { _MMIO(0x9888), 0x001e0000 }, - { _MMIO(0x9888), 0x221f0015 }, - { _MMIO(0x9888), 0x041f0000 }, - { _MMIO(0x9888), 0x001f4000 }, - { _MMIO(0x9888), 0x021f0000 }, - { _MMIO(0x9888), 0x023a8000 }, - { _MMIO(0x9888), 0x0213c000 }, - { _MMIO(0x9888), 0x02164000 }, - { _MMIO(0x9888), 0x24170012 }, - { _MMIO(0x9888), 0x04170000 }, - { _MMIO(0x9888), 0x07910005 }, - { _MMIO(0x9888), 0x05910000 }, - { _MMIO(0x9888), 0x01911500 }, - { _MMIO(0x9888), 0x03910501 }, - { _MMIO(0x9888), 0x0d880002 }, - { _MMIO(0x9888), 0x1d880003 }, - { _MMIO(0x9888), 0x05880000 }, - { _MMIO(0x9888), 0x0b890032 }, - { _MMIO(0x9888), 0x1b890031 }, - { _MMIO(0x9888), 0x05890000 }, - { _MMIO(0x9888), 0x01890040 }, - { _MMIO(0x9888), 0x03890040 }, - { _MMIO(0x9888), 0x098a0000 }, - { _MMIO(0x9888), 0x198a0004 }, - { _MMIO(0x9888), 0x058a0000 }, - { _MMIO(0x9888), 0x018a8050 }, - { _MMIO(0x9888), 0x038a2050 }, - { _MMIO(0x9888), 0x018b95a9 }, - { _MMIO(0x9888), 0x038be5a9 }, - { _MMIO(0x9888), 0x018c1500 }, - { _MMIO(0x9888), 0x038c0501 }, - { _MMIO(0x9888), 0x178d0015 }, - { _MMIO(0x9888), 0x058d0000 }, - { _MMIO(0x9888), 0x138e0004 }, - { _MMIO(0x9888), 0x218e000c }, - { _MMIO(0x9888), 0x058e0000 }, - { _MMIO(0x9888), 0x018e0500 }, - { _MMIO(0x9888), 0x038e0101 }, - { _MMIO(0x9888), 0x0f8f0027 }, - { _MMIO(0x9888), 0x058f0000 }, - { _MMIO(0x9888), 0x018f0000 }, - { _MMIO(0x9888), 0x038f0001 }, - { _MMIO(0x9888), 0x11900013 }, - { _MMIO(0x9888), 0x1f900017 }, - { _MMIO(0x9888), 0x05900000 }, - { _MMIO(0x9888), 0x01900100 }, - { _MMIO(0x9888), 0x03900001 }, - { _MMIO(0x9888), 0x01845555 }, - { _MMIO(0x9888), 0x03845555 }, - { _MMIO(0x9888), 0x418000aa }, - { _MMIO(0x9888), 0x438000aa }, - { _MMIO(0x9888), 0x458000aa }, - { _MMIO(0x9888), 0x478000aa }, - { _MMIO(0x9888), 0x4980018c }, - { _MMIO(0x9888), 0x4b80014b }, - { _MMIO(0x9888), 0x4d800128 }, - { _MMIO(0x9888), 0x4f80012a }, - { _MMIO(0x9888), 0x51800187 }, - { _MMIO(0x9888), 0x5380014b }, - { _MMIO(0x9888), 0x55800149 }, - { _MMIO(0x9888), 0x5780010a }, - { _MMIO(0x9888), 0x59800000 }, -}; - -static int -get_render_pipe_profile_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_render_pipe_profile; - lens[n] = ARRAY_SIZE(mux_config_render_pipe_profile); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_hdc_and_sf[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x10800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000fff7 }, -}; - -static const struct i915_oa_reg flex_eu_config_hdc_and_sf[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_hdc_and_sf[] = { - { _MMIO(0x9888), 0x105c0232 }, - { _MMIO(0x9888), 0x10580232 }, - { _MMIO(0x9888), 0x10380232 }, - { _MMIO(0x9888), 0x10dc0232 }, - { _MMIO(0x9888), 0x10d80232 }, - { _MMIO(0x9888), 0x10b80232 }, - { _MMIO(0x9888), 0x118e4400 }, - { _MMIO(0x9888), 0x025c6080 }, - { _MMIO(0x9888), 0x045c004b }, - { _MMIO(0x9888), 0x005c8000 }, - { _MMIO(0x9888), 0x00582080 }, - { _MMIO(0x9888), 0x0258004b }, - { _MMIO(0x9888), 0x025b4000 }, - { _MMIO(0x9888), 0x045b4000 }, - { _MMIO(0x9888), 0x0c1fa000 }, - { _MMIO(0x9888), 0x0e1f00aa }, - { _MMIO(0x9888), 0x04386080 }, - { _MMIO(0x9888), 0x0638404b }, - { _MMIO(0x9888), 0x02384000 }, - { _MMIO(0x9888), 0x08384000 }, - { _MMIO(0x9888), 0x0a380000 }, - { _MMIO(0x9888), 0x0c380000 }, - { _MMIO(0x9888), 0x00398000 }, - { _MMIO(0x9888), 0x0239a000 }, - { _MMIO(0x9888), 0x0439a000 }, - { _MMIO(0x9888), 0x06392000 }, - { _MMIO(0x9888), 0x0cdc25c1 }, - { _MMIO(0x9888), 0x0adcc000 }, - { _MMIO(0x9888), 0x0ad825c1 }, - { _MMIO(0x9888), 0x18db4000 }, - { _MMIO(0x9888), 0x1adb0001 }, - { _MMIO(0x9888), 0x0e9f8000 }, - { _MMIO(0x9888), 0x109f02aa }, - { _MMIO(0x9888), 0x0eb825c1 }, - { _MMIO(0x9888), 0x18b80154 }, - { _MMIO(0x9888), 0x0ab9a000 }, - { _MMIO(0x9888), 0x0cb9a000 }, - { _MMIO(0x9888), 0x0eb9a000 }, - { _MMIO(0x9888), 0x0d88c000 }, - { _MMIO(0x9888), 0x0f88000f }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x078a8000 }, - { _MMIO(0x9888), 0x098a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x0d8a8000 }, - { _MMIO(0x9888), 0x258baa05 }, - { _MMIO(0x9888), 0x278b002a }, - { _MMIO(0x9888), 0x238b2a80 }, - { _MMIO(0x9888), 0x198c5400 }, - { _MMIO(0x9888), 0x1b8c0015 }, - { _MMIO(0x9888), 0x098dc000 }, - { _MMIO(0x9888), 0x0b8da000 }, - { _MMIO(0x9888), 0x0d8da000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x098e05c0 }, - { _MMIO(0x9888), 0x058e0000 }, - { _MMIO(0x9888), 0x198f0020 }, - { _MMIO(0x9888), 0x2185aa0a }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x19835000 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x09848000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x07844000 }, - { _MMIO(0x9888), 0x19808000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x17804000 }, - { _MMIO(0x9888), 0x51800040 }, - { _MMIO(0x9888), 0x43800400 }, - { _MMIO(0x9888), 0x45800800 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47800c62 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f801042 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x418014a4 }, -}; - -static int -get_hdc_and_sf_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_hdc_and_sf; - lens[n] = ARRAY_SIZE(mux_config_hdc_and_sf); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00014002 }, - { _MMIO(0x277c), 0x0000c3ff }, - { _MMIO(0x2780), 0x00010002 }, - { _MMIO(0x2784), 0x0000c7ff }, - { _MMIO(0x2788), 0x00004002 }, - { _MMIO(0x278c), 0x0000d3ff }, - { _MMIO(0x2790), 0x00100700 }, - { _MMIO(0x2794), 0x0000ff1f }, - { _MMIO(0x2798), 0x00001402 }, - { _MMIO(0x279c), 0x0000fc3f }, - { _MMIO(0x27a0), 0x00001002 }, - { _MMIO(0x27a4), 0x0000fc7f }, - { _MMIO(0x27a8), 0x00000402 }, - { _MMIO(0x27ac), 0x0000fd3f }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_1[] = { - { _MMIO(0x9888), 0x10bf03da }, - { _MMIO(0x9888), 0x14bf0001 }, - { _MMIO(0x9888), 0x12980340 }, - { _MMIO(0x9888), 0x12990340 }, - { _MMIO(0x9888), 0x0cbf1187 }, - { _MMIO(0x9888), 0x0ebf1205 }, - { _MMIO(0x9888), 0x00bf0500 }, - { _MMIO(0x9888), 0x02bf042b }, - { _MMIO(0x9888), 0x04bf002c }, - { _MMIO(0x9888), 0x0cdac000 }, - { _MMIO(0x9888), 0x0edac000 }, - { _MMIO(0x9888), 0x00da8000 }, - { _MMIO(0x9888), 0x02dac000 }, - { _MMIO(0x9888), 0x04da4000 }, - { _MMIO(0x9888), 0x04983400 }, - { _MMIO(0x9888), 0x10980000 }, - { _MMIO(0x9888), 0x06990034 }, - { _MMIO(0x9888), 0x10990000 }, - { _MMIO(0x9888), 0x0c9dc000 }, - { _MMIO(0x9888), 0x0e9dc000 }, - { _MMIO(0x9888), 0x009d8000 }, - { _MMIO(0x9888), 0x029dc000 }, - { _MMIO(0x9888), 0x049d4000 }, - { _MMIO(0x9888), 0x109f02a8 }, - { _MMIO(0x9888), 0x0c9fa000 }, - { _MMIO(0x9888), 0x0e9f00ba }, - { _MMIO(0x9888), 0x0cb88000 }, - { _MMIO(0x9888), 0x0cb95000 }, - { _MMIO(0x9888), 0x0eb95000 }, - { _MMIO(0x9888), 0x00b94000 }, - { _MMIO(0x9888), 0x02b95000 }, - { _MMIO(0x9888), 0x04b91000 }, - { _MMIO(0x9888), 0x06b92000 }, - { _MMIO(0x9888), 0x0cba4000 }, - { _MMIO(0x9888), 0x0f88000f }, - { _MMIO(0x9888), 0x03888000 }, - { _MMIO(0x9888), 0x05888000 }, - { _MMIO(0x9888), 0x07888000 }, - { _MMIO(0x9888), 0x09888000 }, - { _MMIO(0x9888), 0x0b888000 }, - { _MMIO(0x9888), 0x0d880400 }, - { _MMIO(0x9888), 0x258b800a }, - { _MMIO(0x9888), 0x278b002a }, - { _MMIO(0x9888), 0x238b5500 }, - { _MMIO(0x9888), 0x198c4000 }, - { _MMIO(0x9888), 0x1b8c0015 }, - { _MMIO(0x9888), 0x038c4000 }, - { _MMIO(0x9888), 0x058c4000 }, - { _MMIO(0x9888), 0x078c4000 }, - { _MMIO(0x9888), 0x098c4000 }, - { _MMIO(0x9888), 0x0b8c4000 }, - { _MMIO(0x9888), 0x0d8c4000 }, - { _MMIO(0x9888), 0x0d8da000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x018d8000 }, - { _MMIO(0x9888), 0x038da000 }, - { _MMIO(0x9888), 0x058da000 }, - { _MMIO(0x9888), 0x078d2000 }, - { _MMIO(0x9888), 0x2185800a }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x1b830154 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x07844000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x17804000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x45800000 }, - { _MMIO(0x9888), 0x47800000 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f800000 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x41800060 }, -}; - -static int -get_l3_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_1; - lens[n] = ARRAY_SIZE(mux_config_l3_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00014002 }, - { _MMIO(0x277c), 0x0000c3ff }, - { _MMIO(0x2780), 0x00010002 }, - { _MMIO(0x2784), 0x0000c7ff }, - { _MMIO(0x2788), 0x00004002 }, - { _MMIO(0x278c), 0x0000d3ff }, - { _MMIO(0x2790), 0x00100700 }, - { _MMIO(0x2794), 0x0000ff1f }, - { _MMIO(0x2798), 0x00001402 }, - { _MMIO(0x279c), 0x0000fc3f }, - { _MMIO(0x27a0), 0x00001002 }, - { _MMIO(0x27a4), 0x0000fc7f }, - { _MMIO(0x27a8), 0x00000402 }, - { _MMIO(0x27ac), 0x0000fd3f }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_2[] = { - { _MMIO(0x9888), 0x103f03da }, - { _MMIO(0x9888), 0x143f0001 }, - { _MMIO(0x9888), 0x12180340 }, - { _MMIO(0x9888), 0x12190340 }, - { _MMIO(0x9888), 0x0c3f1187 }, - { _MMIO(0x9888), 0x0e3f1205 }, - { _MMIO(0x9888), 0x003f0500 }, - { _MMIO(0x9888), 0x023f042b }, - { _MMIO(0x9888), 0x043f002c }, - { _MMIO(0x9888), 0x0c5ac000 }, - { _MMIO(0x9888), 0x0e5ac000 }, - { _MMIO(0x9888), 0x005a8000 }, - { _MMIO(0x9888), 0x025ac000 }, - { _MMIO(0x9888), 0x045a4000 }, - { _MMIO(0x9888), 0x04183400 }, - { _MMIO(0x9888), 0x10180000 }, - { _MMIO(0x9888), 0x06190034 }, - { _MMIO(0x9888), 0x10190000 }, - { _MMIO(0x9888), 0x0c1dc000 }, - { _MMIO(0x9888), 0x0e1dc000 }, - { _MMIO(0x9888), 0x001d8000 }, - { _MMIO(0x9888), 0x021dc000 }, - { _MMIO(0x9888), 0x041d4000 }, - { _MMIO(0x9888), 0x101f02a8 }, - { _MMIO(0x9888), 0x0c1fa000 }, - { _MMIO(0x9888), 0x0e1f00ba }, - { _MMIO(0x9888), 0x0c388000 }, - { _MMIO(0x9888), 0x0c395000 }, - { _MMIO(0x9888), 0x0e395000 }, - { _MMIO(0x9888), 0x00394000 }, - { _MMIO(0x9888), 0x02395000 }, - { _MMIO(0x9888), 0x04391000 }, - { _MMIO(0x9888), 0x06392000 }, - { _MMIO(0x9888), 0x0c3a4000 }, - { _MMIO(0x9888), 0x1b8aa800 }, - { _MMIO(0x9888), 0x1d8a0002 }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x078a8000 }, - { _MMIO(0x9888), 0x098a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x0d8a8000 }, - { _MMIO(0x9888), 0x258b4005 }, - { _MMIO(0x9888), 0x278b0015 }, - { _MMIO(0x9888), 0x238b2a80 }, - { _MMIO(0x9888), 0x2185800a }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x1b830154 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x07844000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x17804000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x45800000 }, - { _MMIO(0x9888), 0x47800000 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f800000 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x41800060 }, -}; - -static int -get_l3_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_2; - lens[n] = ARRAY_SIZE(mux_config_l3_2); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_3[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00014002 }, - { _MMIO(0x277c), 0x0000c3ff }, - { _MMIO(0x2780), 0x00010002 }, - { _MMIO(0x2784), 0x0000c7ff }, - { _MMIO(0x2788), 0x00004002 }, - { _MMIO(0x278c), 0x0000d3ff }, - { _MMIO(0x2790), 0x00100700 }, - { _MMIO(0x2794), 0x0000ff1f }, - { _MMIO(0x2798), 0x00001402 }, - { _MMIO(0x279c), 0x0000fc3f }, - { _MMIO(0x27a0), 0x00001002 }, - { _MMIO(0x27a4), 0x0000fc7f }, - { _MMIO(0x27a8), 0x00000402 }, - { _MMIO(0x27ac), 0x0000fd3f }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_3[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_3[] = { - { _MMIO(0x9888), 0x121b0340 }, - { _MMIO(0x9888), 0x103f0274 }, - { _MMIO(0x9888), 0x123f0000 }, - { _MMIO(0x9888), 0x129b0340 }, - { _MMIO(0x9888), 0x10bf0274 }, - { _MMIO(0x9888), 0x12bf0000 }, - { _MMIO(0x9888), 0x041b3400 }, - { _MMIO(0x9888), 0x101b0000 }, - { _MMIO(0x9888), 0x045c8000 }, - { _MMIO(0x9888), 0x0a3d4000 }, - { _MMIO(0x9888), 0x003f0080 }, - { _MMIO(0x9888), 0x023f0793 }, - { _MMIO(0x9888), 0x043f0014 }, - { _MMIO(0x9888), 0x04588000 }, - { _MMIO(0x9888), 0x005a8000 }, - { _MMIO(0x9888), 0x025ac000 }, - { _MMIO(0x9888), 0x045a4000 }, - { _MMIO(0x9888), 0x0a5b4000 }, - { _MMIO(0x9888), 0x001d8000 }, - { _MMIO(0x9888), 0x021dc000 }, - { _MMIO(0x9888), 0x041d4000 }, - { _MMIO(0x9888), 0x0c1fa000 }, - { _MMIO(0x9888), 0x0e1f002a }, - { _MMIO(0x9888), 0x0a384000 }, - { _MMIO(0x9888), 0x00394000 }, - { _MMIO(0x9888), 0x02395000 }, - { _MMIO(0x9888), 0x04399000 }, - { _MMIO(0x9888), 0x069b0034 }, - { _MMIO(0x9888), 0x109b0000 }, - { _MMIO(0x9888), 0x06dc4000 }, - { _MMIO(0x9888), 0x0cbd4000 }, - { _MMIO(0x9888), 0x0cbf0981 }, - { _MMIO(0x9888), 0x0ebf0a0f }, - { _MMIO(0x9888), 0x06d84000 }, - { _MMIO(0x9888), 0x0cdac000 }, - { _MMIO(0x9888), 0x0edac000 }, - { _MMIO(0x9888), 0x0cdb4000 }, - { _MMIO(0x9888), 0x0c9dc000 }, - { _MMIO(0x9888), 0x0e9dc000 }, - { _MMIO(0x9888), 0x109f02a8 }, - { _MMIO(0x9888), 0x0e9f0080 }, - { _MMIO(0x9888), 0x0cb84000 }, - { _MMIO(0x9888), 0x0cb95000 }, - { _MMIO(0x9888), 0x0eb95000 }, - { _MMIO(0x9888), 0x06b92000 }, - { _MMIO(0x9888), 0x0f88000f }, - { _MMIO(0x9888), 0x0d880400 }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x078a8000 }, - { _MMIO(0x9888), 0x098a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x258b8009 }, - { _MMIO(0x9888), 0x278b002a }, - { _MMIO(0x9888), 0x238b2a80 }, - { _MMIO(0x9888), 0x198c4000 }, - { _MMIO(0x9888), 0x1b8c0015 }, - { _MMIO(0x9888), 0x0d8c4000 }, - { _MMIO(0x9888), 0x0d8da000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x078d2000 }, - { _MMIO(0x9888), 0x2185800a }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x1b830154 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x07844000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x17804000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x45800c00 }, - { _MMIO(0x9888), 0x47800c63 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f8014a5 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x41800045 }, -}; - -static int -get_l3_3_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_3; - lens[n] = ARRAY_SIZE(mux_config_l3_3); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_4[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00014002 }, - { _MMIO(0x277c), 0x0000c3ff }, - { _MMIO(0x2780), 0x00010002 }, - { _MMIO(0x2784), 0x0000c7ff }, - { _MMIO(0x2788), 0x00004002 }, - { _MMIO(0x278c), 0x0000d3ff }, - { _MMIO(0x2790), 0x00100700 }, - { _MMIO(0x2794), 0x0000ff1f }, - { _MMIO(0x2798), 0x00001402 }, - { _MMIO(0x279c), 0x0000fc3f }, - { _MMIO(0x27a0), 0x00001002 }, - { _MMIO(0x27a4), 0x0000fc7f }, - { _MMIO(0x27a8), 0x00000402 }, - { _MMIO(0x27ac), 0x0000fd3f }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_4[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_4[] = { - { _MMIO(0x9888), 0x121a0340 }, - { _MMIO(0x9888), 0x103f0017 }, - { _MMIO(0x9888), 0x123f0020 }, - { _MMIO(0x9888), 0x129a0340 }, - { _MMIO(0x9888), 0x10bf0017 }, - { _MMIO(0x9888), 0x12bf0020 }, - { _MMIO(0x9888), 0x041a3400 }, - { _MMIO(0x9888), 0x101a0000 }, - { _MMIO(0x9888), 0x043b8000 }, - { _MMIO(0x9888), 0x0a3e0010 }, - { _MMIO(0x9888), 0x003f0200 }, - { _MMIO(0x9888), 0x023f0113 }, - { _MMIO(0x9888), 0x043f0014 }, - { _MMIO(0x9888), 0x02592000 }, - { _MMIO(0x9888), 0x005a8000 }, - { _MMIO(0x9888), 0x025ac000 }, - { _MMIO(0x9888), 0x045a4000 }, - { _MMIO(0x9888), 0x0a1c8000 }, - { _MMIO(0x9888), 0x001d8000 }, - { _MMIO(0x9888), 0x021dc000 }, - { _MMIO(0x9888), 0x041d4000 }, - { _MMIO(0x9888), 0x0a1e8000 }, - { _MMIO(0x9888), 0x0c1fa000 }, - { _MMIO(0x9888), 0x0e1f001a }, - { _MMIO(0x9888), 0x00394000 }, - { _MMIO(0x9888), 0x02395000 }, - { _MMIO(0x9888), 0x04391000 }, - { _MMIO(0x9888), 0x069a0034 }, - { _MMIO(0x9888), 0x109a0000 }, - { _MMIO(0x9888), 0x06bb4000 }, - { _MMIO(0x9888), 0x0abe0040 }, - { _MMIO(0x9888), 0x0cbf0984 }, - { _MMIO(0x9888), 0x0ebf0a02 }, - { _MMIO(0x9888), 0x02d94000 }, - { _MMIO(0x9888), 0x0cdac000 }, - { _MMIO(0x9888), 0x0edac000 }, - { _MMIO(0x9888), 0x0c9c0400 }, - { _MMIO(0x9888), 0x0c9dc000 }, - { _MMIO(0x9888), 0x0e9dc000 }, - { _MMIO(0x9888), 0x0c9e0400 }, - { _MMIO(0x9888), 0x109f02a8 }, - { _MMIO(0x9888), 0x0e9f0040 }, - { _MMIO(0x9888), 0x0cb95000 }, - { _MMIO(0x9888), 0x0eb95000 }, - { _MMIO(0x9888), 0x0f88000f }, - { _MMIO(0x9888), 0x0d880400 }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x078a8000 }, - { _MMIO(0x9888), 0x098a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x258b8009 }, - { _MMIO(0x9888), 0x278b002a }, - { _MMIO(0x9888), 0x238b2a80 }, - { _MMIO(0x9888), 0x198c4000 }, - { _MMIO(0x9888), 0x1b8c0015 }, - { _MMIO(0x9888), 0x0d8c4000 }, - { _MMIO(0x9888), 0x0d8da000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x078d2000 }, - { _MMIO(0x9888), 0x2185800a }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x1b830154 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x07844000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x17804000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x45800800 }, - { _MMIO(0x9888), 0x47800842 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f801084 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x41800044 }, -}; - -static int -get_l3_4_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_4; - lens[n] = ARRAY_SIZE(mux_config_l3_4); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00006000 }, - { _MMIO(0x2774), 0x0000f3ff }, - { _MMIO(0x2778), 0x00001800 }, - { _MMIO(0x277c), 0x0000fcff }, - { _MMIO(0x2780), 0x00000600 }, - { _MMIO(0x2784), 0x0000ff3f }, - { _MMIO(0x2788), 0x00000180 }, - { _MMIO(0x278c), 0x0000ffcf }, - { _MMIO(0x2790), 0x00000060 }, - { _MMIO(0x2794), 0x0000fff3 }, - { _MMIO(0x2798), 0x00000018 }, - { _MMIO(0x279c), 0x0000fffc }, -}; - -static const struct i915_oa_reg flex_eu_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x9888), 0x143b000e }, - { _MMIO(0x9888), 0x043c55c0 }, - { _MMIO(0x9888), 0x0a1e0280 }, - { _MMIO(0x9888), 0x0c1e0408 }, - { _MMIO(0x9888), 0x10390000 }, - { _MMIO(0x9888), 0x12397a1f }, - { _MMIO(0x9888), 0x14bb000e }, - { _MMIO(0x9888), 0x04bc5000 }, - { _MMIO(0x9888), 0x0a9e0296 }, - { _MMIO(0x9888), 0x0c9e0008 }, - { _MMIO(0x9888), 0x10b90000 }, - { _MMIO(0x9888), 0x12b97a1f }, - { _MMIO(0x9888), 0x063b0042 }, - { _MMIO(0x9888), 0x103b0000 }, - { _MMIO(0x9888), 0x083c0000 }, - { _MMIO(0x9888), 0x0a3e0040 }, - { _MMIO(0x9888), 0x043f8000 }, - { _MMIO(0x9888), 0x02594000 }, - { _MMIO(0x9888), 0x045a8000 }, - { _MMIO(0x9888), 0x0c1c0400 }, - { _MMIO(0x9888), 0x041d8000 }, - { _MMIO(0x9888), 0x081e02c0 }, - { _MMIO(0x9888), 0x0e1e0000 }, - { _MMIO(0x9888), 0x0c1fa800 }, - { _MMIO(0x9888), 0x0e1f0260 }, - { _MMIO(0x9888), 0x101f0014 }, - { _MMIO(0x9888), 0x003905e0 }, - { _MMIO(0x9888), 0x06390bc0 }, - { _MMIO(0x9888), 0x02390018 }, - { _MMIO(0x9888), 0x04394000 }, - { _MMIO(0x9888), 0x04bb0042 }, - { _MMIO(0x9888), 0x10bb0000 }, - { _MMIO(0x9888), 0x02bc05c0 }, - { _MMIO(0x9888), 0x08bc0000 }, - { _MMIO(0x9888), 0x0abe0004 }, - { _MMIO(0x9888), 0x02bf8000 }, - { _MMIO(0x9888), 0x02d91000 }, - { _MMIO(0x9888), 0x02da8000 }, - { _MMIO(0x9888), 0x089c8000 }, - { _MMIO(0x9888), 0x029d8000 }, - { _MMIO(0x9888), 0x089e8000 }, - { _MMIO(0x9888), 0x0e9e0000 }, - { _MMIO(0x9888), 0x0e9fa806 }, - { _MMIO(0x9888), 0x109f0142 }, - { _MMIO(0x9888), 0x08b90617 }, - { _MMIO(0x9888), 0x0ab90be0 }, - { _MMIO(0x9888), 0x02b94000 }, - { _MMIO(0x9888), 0x0d88f000 }, - { _MMIO(0x9888), 0x0f88000c }, - { _MMIO(0x9888), 0x07888000 }, - { _MMIO(0x9888), 0x09888000 }, - { _MMIO(0x9888), 0x018a8000 }, - { _MMIO(0x9888), 0x0f8a8000 }, - { _MMIO(0x9888), 0x1b8a2800 }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x0d8a8000 }, - { _MMIO(0x9888), 0x238b52a0 }, - { _MMIO(0x9888), 0x258b6a95 }, - { _MMIO(0x9888), 0x278b0029 }, - { _MMIO(0x9888), 0x178c2000 }, - { _MMIO(0x9888), 0x198c1500 }, - { _MMIO(0x9888), 0x1b8c0014 }, - { _MMIO(0x9888), 0x078c4000 }, - { _MMIO(0x9888), 0x098c4000 }, - { _MMIO(0x9888), 0x098da000 }, - { _MMIO(0x9888), 0x0b8da000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x038d8000 }, - { _MMIO(0x9888), 0x058d2000 }, - { _MMIO(0x9888), 0x1f85aa80 }, - { _MMIO(0x9888), 0x2185aaaa }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x01834000 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0184c000 }, - { _MMIO(0x9888), 0x0784c000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x1180c000 }, - { _MMIO(0x9888), 0x1780c000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x4d800444 }, - { _MMIO(0x9888), 0x3d800000 }, - { _MMIO(0x9888), 0x4f804000 }, - { _MMIO(0x9888), 0x43801080 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800084 }, - { _MMIO(0x9888), 0x53800044 }, - { _MMIO(0x9888), 0x47801080 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x3f800000 }, - { _MMIO(0x9888), 0x41800840 }, -}; - -static int -get_rasterizer_and_pixel_backend_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_rasterizer_and_pixel_backend; - lens[n] = ARRAY_SIZE(mux_config_rasterizer_and_pixel_backend); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_sampler_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x70800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x0000c000 }, - { _MMIO(0x2774), 0x0000e7ff }, - { _MMIO(0x2778), 0x00003000 }, - { _MMIO(0x277c), 0x0000f9ff }, - { _MMIO(0x2780), 0x00000c00 }, - { _MMIO(0x2784), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_sampler_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_sampler_1[] = { - { _MMIO(0x9888), 0x18921400 }, - { _MMIO(0x9888), 0x149500ab }, - { _MMIO(0x9888), 0x18b21400 }, - { _MMIO(0x9888), 0x14b500ab }, - { _MMIO(0x9888), 0x18d21400 }, - { _MMIO(0x9888), 0x14d500ab }, - { _MMIO(0x9888), 0x0cdc8000 }, - { _MMIO(0x9888), 0x0edc4000 }, - { _MMIO(0x9888), 0x02dcc000 }, - { _MMIO(0x9888), 0x04dcc000 }, - { _MMIO(0x9888), 0x1abd00a0 }, - { _MMIO(0x9888), 0x0abd8000 }, - { _MMIO(0x9888), 0x0cd88000 }, - { _MMIO(0x9888), 0x0ed84000 }, - { _MMIO(0x9888), 0x04d88000 }, - { _MMIO(0x9888), 0x1adb0050 }, - { _MMIO(0x9888), 0x04db8000 }, - { _MMIO(0x9888), 0x06db8000 }, - { _MMIO(0x9888), 0x08db8000 }, - { _MMIO(0x9888), 0x0adb4000 }, - { _MMIO(0x9888), 0x109f02a0 }, - { _MMIO(0x9888), 0x0c9fa000 }, - { _MMIO(0x9888), 0x0e9f00aa }, - { _MMIO(0x9888), 0x18b82500 }, - { _MMIO(0x9888), 0x02b88000 }, - { _MMIO(0x9888), 0x04b84000 }, - { _MMIO(0x9888), 0x06b84000 }, - { _MMIO(0x9888), 0x08b84000 }, - { _MMIO(0x9888), 0x0ab84000 }, - { _MMIO(0x9888), 0x0cb88000 }, - { _MMIO(0x9888), 0x0cb98000 }, - { _MMIO(0x9888), 0x0eb9a000 }, - { _MMIO(0x9888), 0x00b98000 }, - { _MMIO(0x9888), 0x02b9a000 }, - { _MMIO(0x9888), 0x04b9a000 }, - { _MMIO(0x9888), 0x06b92000 }, - { _MMIO(0x9888), 0x1aba0200 }, - { _MMIO(0x9888), 0x02ba8000 }, - { _MMIO(0x9888), 0x0cba8000 }, - { _MMIO(0x9888), 0x04908000 }, - { _MMIO(0x9888), 0x04918000 }, - { _MMIO(0x9888), 0x04927300 }, - { _MMIO(0x9888), 0x10920000 }, - { _MMIO(0x9888), 0x1893000a }, - { _MMIO(0x9888), 0x0a934000 }, - { _MMIO(0x9888), 0x0a946000 }, - { _MMIO(0x9888), 0x0c959000 }, - { _MMIO(0x9888), 0x0e950098 }, - { _MMIO(0x9888), 0x10950000 }, - { _MMIO(0x9888), 0x04b04000 }, - { _MMIO(0x9888), 0x04b14000 }, - { _MMIO(0x9888), 0x04b20073 }, - { _MMIO(0x9888), 0x10b20000 }, - { _MMIO(0x9888), 0x04b38000 }, - { _MMIO(0x9888), 0x06b38000 }, - { _MMIO(0x9888), 0x08b34000 }, - { _MMIO(0x9888), 0x04b4c000 }, - { _MMIO(0x9888), 0x02b59890 }, - { _MMIO(0x9888), 0x10b50000 }, - { _MMIO(0x9888), 0x06d04000 }, - { _MMIO(0x9888), 0x06d14000 }, - { _MMIO(0x9888), 0x06d20073 }, - { _MMIO(0x9888), 0x10d20000 }, - { _MMIO(0x9888), 0x18d30020 }, - { _MMIO(0x9888), 0x02d38000 }, - { _MMIO(0x9888), 0x0cd34000 }, - { _MMIO(0x9888), 0x0ad48000 }, - { _MMIO(0x9888), 0x04d42000 }, - { _MMIO(0x9888), 0x0ed59000 }, - { _MMIO(0x9888), 0x00d59800 }, - { _MMIO(0x9888), 0x10d50000 }, - { _MMIO(0x9888), 0x0f88000e }, - { _MMIO(0x9888), 0x03888000 }, - { _MMIO(0x9888), 0x05888000 }, - { _MMIO(0x9888), 0x07888000 }, - { _MMIO(0x9888), 0x09888000 }, - { _MMIO(0x9888), 0x0b888000 }, - { _MMIO(0x9888), 0x0d880400 }, - { _MMIO(0x9888), 0x278b002a }, - { _MMIO(0x9888), 0x238b5500 }, - { _MMIO(0x9888), 0x258b000a }, - { _MMIO(0x9888), 0x1b8c0015 }, - { _MMIO(0x9888), 0x038c4000 }, - { _MMIO(0x9888), 0x058c4000 }, - { _MMIO(0x9888), 0x078c4000 }, - { _MMIO(0x9888), 0x098c4000 }, - { _MMIO(0x9888), 0x0b8c4000 }, - { _MMIO(0x9888), 0x0d8c4000 }, - { _MMIO(0x9888), 0x0d8d8000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x018d8000 }, - { _MMIO(0x9888), 0x038da000 }, - { _MMIO(0x9888), 0x058da000 }, - { _MMIO(0x9888), 0x078d2000 }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x2185000a }, - { _MMIO(0x9888), 0x1b830150 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0d848000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x07844000 }, - { _MMIO(0x9888), 0x1d808000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x17804000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47801021 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f800c64 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x41800c02 }, -}; - -static int -get_sampler_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_sampler_1; - lens[n] = ARRAY_SIZE(mux_config_sampler_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_sampler_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x70800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x0000c000 }, - { _MMIO(0x2774), 0x0000e7ff }, - { _MMIO(0x2778), 0x00003000 }, - { _MMIO(0x277c), 0x0000f9ff }, - { _MMIO(0x2780), 0x00000c00 }, - { _MMIO(0x2784), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_sampler_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_sampler_2[] = { - { _MMIO(0x9888), 0x18121400 }, - { _MMIO(0x9888), 0x141500ab }, - { _MMIO(0x9888), 0x18321400 }, - { _MMIO(0x9888), 0x143500ab }, - { _MMIO(0x9888), 0x18521400 }, - { _MMIO(0x9888), 0x145500ab }, - { _MMIO(0x9888), 0x0c5c8000 }, - { _MMIO(0x9888), 0x0e5c4000 }, - { _MMIO(0x9888), 0x025cc000 }, - { _MMIO(0x9888), 0x045cc000 }, - { _MMIO(0x9888), 0x1a3d00a0 }, - { _MMIO(0x9888), 0x0a3d8000 }, - { _MMIO(0x9888), 0x0c588000 }, - { _MMIO(0x9888), 0x0e584000 }, - { _MMIO(0x9888), 0x04588000 }, - { _MMIO(0x9888), 0x1a5b0050 }, - { _MMIO(0x9888), 0x045b8000 }, - { _MMIO(0x9888), 0x065b8000 }, - { _MMIO(0x9888), 0x085b8000 }, - { _MMIO(0x9888), 0x0a5b4000 }, - { _MMIO(0x9888), 0x101f02a0 }, - { _MMIO(0x9888), 0x0c1fa000 }, - { _MMIO(0x9888), 0x0e1f00aa }, - { _MMIO(0x9888), 0x18382500 }, - { _MMIO(0x9888), 0x02388000 }, - { _MMIO(0x9888), 0x04384000 }, - { _MMIO(0x9888), 0x06384000 }, - { _MMIO(0x9888), 0x08384000 }, - { _MMIO(0x9888), 0x0a384000 }, - { _MMIO(0x9888), 0x0c388000 }, - { _MMIO(0x9888), 0x0c398000 }, - { _MMIO(0x9888), 0x0e39a000 }, - { _MMIO(0x9888), 0x00398000 }, - { _MMIO(0x9888), 0x0239a000 }, - { _MMIO(0x9888), 0x0439a000 }, - { _MMIO(0x9888), 0x06392000 }, - { _MMIO(0x9888), 0x1a3a0200 }, - { _MMIO(0x9888), 0x023a8000 }, - { _MMIO(0x9888), 0x0c3a8000 }, - { _MMIO(0x9888), 0x04108000 }, - { _MMIO(0x9888), 0x04118000 }, - { _MMIO(0x9888), 0x04127300 }, - { _MMIO(0x9888), 0x10120000 }, - { _MMIO(0x9888), 0x1813000a }, - { _MMIO(0x9888), 0x0a134000 }, - { _MMIO(0x9888), 0x0a146000 }, - { _MMIO(0x9888), 0x0c159000 }, - { _MMIO(0x9888), 0x0e150098 }, - { _MMIO(0x9888), 0x10150000 }, - { _MMIO(0x9888), 0x04304000 }, - { _MMIO(0x9888), 0x04314000 }, - { _MMIO(0x9888), 0x04320073 }, - { _MMIO(0x9888), 0x10320000 }, - { _MMIO(0x9888), 0x04338000 }, - { _MMIO(0x9888), 0x06338000 }, - { _MMIO(0x9888), 0x08334000 }, - { _MMIO(0x9888), 0x0434c000 }, - { _MMIO(0x9888), 0x02359890 }, - { _MMIO(0x9888), 0x10350000 }, - { _MMIO(0x9888), 0x06504000 }, - { _MMIO(0x9888), 0x06514000 }, - { _MMIO(0x9888), 0x06520073 }, - { _MMIO(0x9888), 0x10520000 }, - { _MMIO(0x9888), 0x18530020 }, - { _MMIO(0x9888), 0x02538000 }, - { _MMIO(0x9888), 0x0c534000 }, - { _MMIO(0x9888), 0x0a548000 }, - { _MMIO(0x9888), 0x04542000 }, - { _MMIO(0x9888), 0x0e559000 }, - { _MMIO(0x9888), 0x00559800 }, - { _MMIO(0x9888), 0x10550000 }, - { _MMIO(0x9888), 0x1b8aa000 }, - { _MMIO(0x9888), 0x1d8a0002 }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x078a8000 }, - { _MMIO(0x9888), 0x098a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x0d8a8000 }, - { _MMIO(0x9888), 0x278b0015 }, - { _MMIO(0x9888), 0x238b2a80 }, - { _MMIO(0x9888), 0x258b0005 }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x2185000a }, - { _MMIO(0x9888), 0x1b830150 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0d848000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x07844000 }, - { _MMIO(0x9888), 0x1d808000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x17804000 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47801021 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f800c64 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x41800c02 }, -}; - -static int -get_sampler_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_sampler_2; - lens[n] = ARRAY_SIZE(mux_config_sampler_2); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000fdff }, - { _MMIO(0x2778), 0x00000000 }, - { _MMIO(0x277c), 0x0000fe7f }, - { _MMIO(0x2780), 0x00000002 }, - { _MMIO(0x2784), 0x0000ffbf }, - { _MMIO(0x2788), 0x00000000 }, - { _MMIO(0x278c), 0x0000ffcf }, - { _MMIO(0x2790), 0x00000002 }, - { _MMIO(0x2794), 0x0000fff7 }, - { _MMIO(0x2798), 0x00000000 }, - { _MMIO(0x279c), 0x0000fff9 }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_1[] = { - { _MMIO(0x9888), 0x16154d60 }, - { _MMIO(0x9888), 0x16352e60 }, - { _MMIO(0x9888), 0x16554d60 }, - { _MMIO(0x9888), 0x16950000 }, - { _MMIO(0x9888), 0x16b50000 }, - { _MMIO(0x9888), 0x16d50000 }, - { _MMIO(0x9888), 0x005c8000 }, - { _MMIO(0x9888), 0x045cc000 }, - { _MMIO(0x9888), 0x065c4000 }, - { _MMIO(0x9888), 0x083d8000 }, - { _MMIO(0x9888), 0x0a3d8000 }, - { _MMIO(0x9888), 0x0458c000 }, - { _MMIO(0x9888), 0x025b8000 }, - { _MMIO(0x9888), 0x085b4000 }, - { _MMIO(0x9888), 0x0a5b4000 }, - { _MMIO(0x9888), 0x0c5b8000 }, - { _MMIO(0x9888), 0x0c1fa000 }, - { _MMIO(0x9888), 0x0e1f00aa }, - { _MMIO(0x9888), 0x02384000 }, - { _MMIO(0x9888), 0x04388000 }, - { _MMIO(0x9888), 0x06388000 }, - { _MMIO(0x9888), 0x08384000 }, - { _MMIO(0x9888), 0x0a384000 }, - { _MMIO(0x9888), 0x0c384000 }, - { _MMIO(0x9888), 0x00398000 }, - { _MMIO(0x9888), 0x0239a000 }, - { _MMIO(0x9888), 0x0439a000 }, - { _MMIO(0x9888), 0x06392000 }, - { _MMIO(0x9888), 0x043a8000 }, - { _MMIO(0x9888), 0x063a8000 }, - { _MMIO(0x9888), 0x08138000 }, - { _MMIO(0x9888), 0x0a138000 }, - { _MMIO(0x9888), 0x06143000 }, - { _MMIO(0x9888), 0x0415cfc7 }, - { _MMIO(0x9888), 0x10150000 }, - { _MMIO(0x9888), 0x02338000 }, - { _MMIO(0x9888), 0x0c338000 }, - { _MMIO(0x9888), 0x04342000 }, - { _MMIO(0x9888), 0x06344000 }, - { _MMIO(0x9888), 0x0035c700 }, - { _MMIO(0x9888), 0x063500cf }, - { _MMIO(0x9888), 0x10350000 }, - { _MMIO(0x9888), 0x04538000 }, - { _MMIO(0x9888), 0x06538000 }, - { _MMIO(0x9888), 0x0454c000 }, - { _MMIO(0x9888), 0x0255cfc7 }, - { _MMIO(0x9888), 0x10550000 }, - { _MMIO(0x9888), 0x06dc8000 }, - { _MMIO(0x9888), 0x08dc4000 }, - { _MMIO(0x9888), 0x0cdcc000 }, - { _MMIO(0x9888), 0x0edcc000 }, - { _MMIO(0x9888), 0x1abd00a8 }, - { _MMIO(0x9888), 0x0cd8c000 }, - { _MMIO(0x9888), 0x0ed84000 }, - { _MMIO(0x9888), 0x0edb8000 }, - { _MMIO(0x9888), 0x18db0800 }, - { _MMIO(0x9888), 0x1adb0254 }, - { _MMIO(0x9888), 0x0e9faa00 }, - { _MMIO(0x9888), 0x109f02aa }, - { _MMIO(0x9888), 0x0eb84000 }, - { _MMIO(0x9888), 0x16b84000 }, - { _MMIO(0x9888), 0x18b8156a }, - { _MMIO(0x9888), 0x06b98000 }, - { _MMIO(0x9888), 0x08b9a000 }, - { _MMIO(0x9888), 0x0ab9a000 }, - { _MMIO(0x9888), 0x0cb9a000 }, - { _MMIO(0x9888), 0x0eb9a000 }, - { _MMIO(0x9888), 0x18baa000 }, - { _MMIO(0x9888), 0x1aba0002 }, - { _MMIO(0x9888), 0x16934000 }, - { _MMIO(0x9888), 0x1893000a }, - { _MMIO(0x9888), 0x0a947000 }, - { _MMIO(0x9888), 0x0c95c5c1 }, - { _MMIO(0x9888), 0x0e9500c3 }, - { _MMIO(0x9888), 0x10950000 }, - { _MMIO(0x9888), 0x0eb38000 }, - { _MMIO(0x9888), 0x16b30040 }, - { _MMIO(0x9888), 0x18b30020 }, - { _MMIO(0x9888), 0x06b48000 }, - { _MMIO(0x9888), 0x08b41000 }, - { _MMIO(0x9888), 0x0ab48000 }, - { _MMIO(0x9888), 0x06b5c500 }, - { _MMIO(0x9888), 0x08b500c3 }, - { _MMIO(0x9888), 0x0eb5c100 }, - { _MMIO(0x9888), 0x10b50000 }, - { _MMIO(0x9888), 0x16d31500 }, - { _MMIO(0x9888), 0x08d4e000 }, - { _MMIO(0x9888), 0x08d5c100 }, - { _MMIO(0x9888), 0x0ad5c3c5 }, - { _MMIO(0x9888), 0x10d50000 }, - { _MMIO(0x9888), 0x0d88f800 }, - { _MMIO(0x9888), 0x0f88000f }, - { _MMIO(0x9888), 0x038a8000 }, - { _MMIO(0x9888), 0x058a8000 }, - { _MMIO(0x9888), 0x078a8000 }, - { _MMIO(0x9888), 0x098a8000 }, - { _MMIO(0x9888), 0x0b8a8000 }, - { _MMIO(0x9888), 0x0d8a8000 }, - { _MMIO(0x9888), 0x258baaa5 }, - { _MMIO(0x9888), 0x278b002a }, - { _MMIO(0x9888), 0x238b2a80 }, - { _MMIO(0x9888), 0x0f8c4000 }, - { _MMIO(0x9888), 0x178c2000 }, - { _MMIO(0x9888), 0x198c5500 }, - { _MMIO(0x9888), 0x1b8c0015 }, - { _MMIO(0x9888), 0x078d8000 }, - { _MMIO(0x9888), 0x098da000 }, - { _MMIO(0x9888), 0x0b8da000 }, - { _MMIO(0x9888), 0x0d8da000 }, - { _MMIO(0x9888), 0x0f8da000 }, - { _MMIO(0x9888), 0x2185aaaa }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0784c000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x1780c000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x43800c42 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45800063 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x47800800 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f8014a4 }, - { _MMIO(0x9888), 0x41801042 }, -}; - -static int -get_tdl_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_1; - lens[n] = ARRAY_SIZE(mux_config_tdl_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000fdff }, - { _MMIO(0x2778), 0x00000000 }, - { _MMIO(0x277c), 0x0000fe7f }, - { _MMIO(0x2780), 0x00000000 }, - { _MMIO(0x2784), 0x0000ff9f }, - { _MMIO(0x2788), 0x00000000 }, - { _MMIO(0x278c), 0x0000ffe7 }, - { _MMIO(0x2790), 0x00000002 }, - { _MMIO(0x2794), 0x0000fffb }, - { _MMIO(0x2798), 0x00000002 }, - { _MMIO(0x279c), 0x0000fffd }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_2[] = { - { _MMIO(0x9888), 0x16150000 }, - { _MMIO(0x9888), 0x16350000 }, - { _MMIO(0x9888), 0x16550000 }, - { _MMIO(0x9888), 0x16952e60 }, - { _MMIO(0x9888), 0x16b54d60 }, - { _MMIO(0x9888), 0x16d52e60 }, - { _MMIO(0x9888), 0x065c8000 }, - { _MMIO(0x9888), 0x085cc000 }, - { _MMIO(0x9888), 0x0a5cc000 }, - { _MMIO(0x9888), 0x0c5c4000 }, - { _MMIO(0x9888), 0x0e3d8000 }, - { _MMIO(0x9888), 0x183da000 }, - { _MMIO(0x9888), 0x06588000 }, - { _MMIO(0x9888), 0x08588000 }, - { _MMIO(0x9888), 0x0a584000 }, - { _MMIO(0x9888), 0x0e5b4000 }, - { _MMIO(0x9888), 0x185b5800 }, - { _MMIO(0x9888), 0x1a5b000a }, - { _MMIO(0x9888), 0x0e1faa00 }, - { _MMIO(0x9888), 0x101f02aa }, - { _MMIO(0x9888), 0x0e384000 }, - { _MMIO(0x9888), 0x16384000 }, - { _MMIO(0x9888), 0x18382a55 }, - { _MMIO(0x9888), 0x06398000 }, - { _MMIO(0x9888), 0x0839a000 }, - { _MMIO(0x9888), 0x0a39a000 }, - { _MMIO(0x9888), 0x0c39a000 }, - { _MMIO(0x9888), 0x0e39a000 }, - { _MMIO(0x9888), 0x1a3a02a0 }, - { _MMIO(0x9888), 0x0e138000 }, - { _MMIO(0x9888), 0x16130500 }, - { _MMIO(0x9888), 0x06148000 }, - { _MMIO(0x9888), 0x08146000 }, - { _MMIO(0x9888), 0x0615c100 }, - { _MMIO(0x9888), 0x0815c500 }, - { _MMIO(0x9888), 0x0a1500c3 }, - { _MMIO(0x9888), 0x10150000 }, - { _MMIO(0x9888), 0x16335040 }, - { _MMIO(0x9888), 0x08349000 }, - { _MMIO(0x9888), 0x0a341000 }, - { _MMIO(0x9888), 0x083500c1 }, - { _MMIO(0x9888), 0x0a35c500 }, - { _MMIO(0x9888), 0x0c3500c3 }, - { _MMIO(0x9888), 0x10350000 }, - { _MMIO(0x9888), 0x1853002a }, - { _MMIO(0x9888), 0x0a54e000 }, - { _MMIO(0x9888), 0x0c55c500 }, - { _MMIO(0x9888), 0x0e55c1c3 }, - { _MMIO(0x9888), 0x10550000 }, - { _MMIO(0x9888), 0x00dc8000 }, - { _MMIO(0x9888), 0x02dcc000 }, - { _MMIO(0x9888), 0x04dc4000 }, - { _MMIO(0x9888), 0x04bd8000 }, - { _MMIO(0x9888), 0x06bd8000 }, - { _MMIO(0x9888), 0x02d8c000 }, - { _MMIO(0x9888), 0x02db8000 }, - { _MMIO(0x9888), 0x04db4000 }, - { _MMIO(0x9888), 0x06db4000 }, - { _MMIO(0x9888), 0x08db8000 }, - { _MMIO(0x9888), 0x0c9fa000 }, - { _MMIO(0x9888), 0x0e9f00aa }, - { _MMIO(0x9888), 0x02b84000 }, - { _MMIO(0x9888), 0x04b84000 }, - { _MMIO(0x9888), 0x06b84000 }, - { _MMIO(0x9888), 0x08b84000 }, - { _MMIO(0x9888), 0x0ab88000 }, - { _MMIO(0x9888), 0x0cb88000 }, - { _MMIO(0x9888), 0x00b98000 }, - { _MMIO(0x9888), 0x02b9a000 }, - { _MMIO(0x9888), 0x04b9a000 }, - { _MMIO(0x9888), 0x06b92000 }, - { _MMIO(0x9888), 0x0aba8000 }, - { _MMIO(0x9888), 0x0cba8000 }, - { _MMIO(0x9888), 0x04938000 }, - { _MMIO(0x9888), 0x06938000 }, - { _MMIO(0x9888), 0x0494c000 }, - { _MMIO(0x9888), 0x0295cfc7 }, - { _MMIO(0x9888), 0x10950000 }, - { _MMIO(0x9888), 0x02b38000 }, - { _MMIO(0x9888), 0x08b38000 }, - { _MMIO(0x9888), 0x04b42000 }, - { _MMIO(0x9888), 0x06b41000 }, - { _MMIO(0x9888), 0x00b5c700 }, - { _MMIO(0x9888), 0x04b500cf }, - { _MMIO(0x9888), 0x10b50000 }, - { _MMIO(0x9888), 0x0ad38000 }, - { _MMIO(0x9888), 0x0cd38000 }, - { _MMIO(0x9888), 0x06d46000 }, - { _MMIO(0x9888), 0x04d5c700 }, - { _MMIO(0x9888), 0x06d500cf }, - { _MMIO(0x9888), 0x10d50000 }, - { _MMIO(0x9888), 0x03888000 }, - { _MMIO(0x9888), 0x05888000 }, - { _MMIO(0x9888), 0x07888000 }, - { _MMIO(0x9888), 0x09888000 }, - { _MMIO(0x9888), 0x0b888000 }, - { _MMIO(0x9888), 0x0d880400 }, - { _MMIO(0x9888), 0x0f8a8000 }, - { _MMIO(0x9888), 0x198a8000 }, - { _MMIO(0x9888), 0x1b8aaaa0 }, - { _MMIO(0x9888), 0x1d8a0002 }, - { _MMIO(0x9888), 0x258b555a }, - { _MMIO(0x9888), 0x278b0015 }, - { _MMIO(0x9888), 0x238b5500 }, - { _MMIO(0x9888), 0x038c4000 }, - { _MMIO(0x9888), 0x058c4000 }, - { _MMIO(0x9888), 0x078c4000 }, - { _MMIO(0x9888), 0x098c4000 }, - { _MMIO(0x9888), 0x0b8c4000 }, - { _MMIO(0x9888), 0x0d8c4000 }, - { _MMIO(0x9888), 0x018d8000 }, - { _MMIO(0x9888), 0x038da000 }, - { _MMIO(0x9888), 0x058da000 }, - { _MMIO(0x9888), 0x078d2000 }, - { _MMIO(0x9888), 0x2185aaaa }, - { _MMIO(0x9888), 0x2385002a }, - { _MMIO(0x9888), 0x1f85aa00 }, - { _MMIO(0x9888), 0x0f834000 }, - { _MMIO(0x9888), 0x19835400 }, - { _MMIO(0x9888), 0x1b830155 }, - { _MMIO(0x9888), 0x03834000 }, - { _MMIO(0x9888), 0x05834000 }, - { _MMIO(0x9888), 0x07834000 }, - { _MMIO(0x9888), 0x09834000 }, - { _MMIO(0x9888), 0x0b834000 }, - { _MMIO(0x9888), 0x0d834000 }, - { _MMIO(0x9888), 0x0784c000 }, - { _MMIO(0x9888), 0x0984c000 }, - { _MMIO(0x9888), 0x0b84c000 }, - { _MMIO(0x9888), 0x0d84c000 }, - { _MMIO(0x9888), 0x0f84c000 }, - { _MMIO(0x9888), 0x01848000 }, - { _MMIO(0x9888), 0x0384c000 }, - { _MMIO(0x9888), 0x0584c000 }, - { _MMIO(0x9888), 0x1780c000 }, - { _MMIO(0x9888), 0x1980c000 }, - { _MMIO(0x9888), 0x1b80c000 }, - { _MMIO(0x9888), 0x1d80c000 }, - { _MMIO(0x9888), 0x1f80c000 }, - { _MMIO(0x9888), 0x11808000 }, - { _MMIO(0x9888), 0x1380c000 }, - { _MMIO(0x9888), 0x1580c000 }, - { _MMIO(0x9888), 0x4f800000 }, - { _MMIO(0x9888), 0x43800882 }, - { _MMIO(0x9888), 0x51800000 }, - { _MMIO(0x9888), 0x45801082 }, - { _MMIO(0x9888), 0x53800000 }, - { _MMIO(0x9888), 0x478014a5 }, - { _MMIO(0x9888), 0x21800000 }, - { _MMIO(0x9888), 0x31800000 }, - { _MMIO(0x9888), 0x4d800000 }, - { _MMIO(0x9888), 0x3f800002 }, - { _MMIO(0x9888), 0x41800c62 }, -}; - -static int -get_tdl_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_2; - lens[n] = ARRAY_SIZE(mux_config_tdl_2); - n++; - - return n; -} - static const struct i915_oa_reg b_counter_config_test_oa[] = { { _MMIO(0x2740), 0x00000000 }, { _MMIO(0x2744), 0x00800000 }, @@ -2010,864 +73,35 @@ static const struct i915_oa_reg mux_config_test_oa[] = { { _MMIO(0x9888), 0x59800000 }, }; -static int -get_test_oa_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_test_oa; - lens[n] = ARRAY_SIZE(mux_config_test_oa); - n++; - - return n; -} - -int i915_oa_select_metric_set_chv(struct drm_i915_private *dev_priv) -{ - dev_priv->perf.oa.n_mux_configs = 0; - dev_priv->perf.oa.b_counter_regs = NULL; - dev_priv->perf.oa.b_counter_regs_len = 0; - dev_priv->perf.oa.flex_regs = NULL; - dev_priv->perf.oa.flex_regs_len = 0; - - switch (dev_priv->perf.oa.metrics_set) { - case METRIC_SET_ID_RENDER_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_render_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_basic); - - return 0; - case METRIC_SET_ID_COMPUTE_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_compute_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_basic); - - return 0; - case METRIC_SET_ID_RENDER_PIPE_PROFILE: - dev_priv->perf.oa.n_mux_configs = - get_render_pipe_profile_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_PIPE_PROFILE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_pipe_profile; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_pipe_profile); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_pipe_profile; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_pipe_profile); - - return 0; - case METRIC_SET_ID_HDC_AND_SF: - dev_priv->perf.oa.n_mux_configs = - get_hdc_and_sf_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"HDC_AND_SF\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_hdc_and_sf; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_hdc_and_sf); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_hdc_and_sf; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_hdc_and_sf); - - return 0; - case METRIC_SET_ID_L3_1: - dev_priv->perf.oa.n_mux_configs = - get_l3_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_1); - - return 0; - case METRIC_SET_ID_L3_2: - dev_priv->perf.oa.n_mux_configs = - get_l3_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_2); - - return 0; - case METRIC_SET_ID_L3_3: - dev_priv->perf.oa.n_mux_configs = - get_l3_3_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_3\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_3; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_3); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_3; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_3); - - return 0; - case METRIC_SET_ID_L3_4: - dev_priv->perf.oa.n_mux_configs = - get_l3_4_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_4\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_4; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_4); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_4; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_4); - - return 0; - case METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND: - dev_priv->perf.oa.n_mux_configs = - get_rasterizer_and_pixel_backend_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RASTERIZER_AND_PIXEL_BACKEND\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_rasterizer_and_pixel_backend); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_rasterizer_and_pixel_backend); - - return 0; - case METRIC_SET_ID_SAMPLER_1: - dev_priv->perf.oa.n_mux_configs = - get_sampler_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"SAMPLER_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_sampler_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_sampler_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_sampler_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_sampler_1); - - return 0; - case METRIC_SET_ID_SAMPLER_2: - dev_priv->perf.oa.n_mux_configs = - get_sampler_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"SAMPLER_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_sampler_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_sampler_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_sampler_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_sampler_2); - - return 0; - case METRIC_SET_ID_TDL_1: - dev_priv->perf.oa.n_mux_configs = - get_tdl_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_1); - - return 0; - case METRIC_SET_ID_TDL_2: - dev_priv->perf.oa.n_mux_configs = - get_tdl_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_2); - - return 0; - case METRIC_SET_ID_TEST_OA: - dev_priv->perf.oa.n_mux_configs = - get_test_oa_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TEST_OA\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_test_oa; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_test_oa); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_test_oa; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_test_oa); - - return 0; - default: - return -ENODEV; - } -} - -static ssize_t -show_render_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_BASIC); -} - -static struct device_attribute dev_attr_render_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_render_basic[] = { - &dev_attr_render_basic_id.attr, - NULL, -}; - -static struct attribute_group group_render_basic = { - .name = "9d8a3af5-c02c-4a4a-b947-f1672469e0fb", - .attrs = attrs_render_basic, -}; - -static ssize_t -show_compute_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_BASIC); -} - -static struct device_attribute dev_attr_compute_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_basic[] = { - &dev_attr_compute_basic_id.attr, - NULL, -}; - -static struct attribute_group group_compute_basic = { - .name = "f522a89c-ecd1-4522-8331-3383c54af5f5", - .attrs = attrs_compute_basic, -}; - -static ssize_t -show_render_pipe_profile_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_PIPE_PROFILE); -} - -static struct device_attribute dev_attr_render_pipe_profile_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_pipe_profile_id, - .store = NULL, -}; - -static struct attribute *attrs_render_pipe_profile[] = { - &dev_attr_render_pipe_profile_id.attr, - NULL, -}; - -static struct attribute_group group_render_pipe_profile = { - .name = "a9ccc03d-a943-4e6b-9cd6-13e063075927", - .attrs = attrs_render_pipe_profile, -}; - -static ssize_t -show_hdc_and_sf_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_HDC_AND_SF); -} - -static struct device_attribute dev_attr_hdc_and_sf_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_hdc_and_sf_id, - .store = NULL, -}; - -static struct attribute *attrs_hdc_and_sf[] = { - &dev_attr_hdc_and_sf_id.attr, - NULL, -}; - -static struct attribute_group group_hdc_and_sf = { - .name = "2cf0c064-68df-4fac-9b3f-57f51ca8a069", - .attrs = attrs_hdc_and_sf, -}; - -static ssize_t -show_l3_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_1); -} - -static struct device_attribute dev_attr_l3_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_1_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_1[] = { - &dev_attr_l3_1_id.attr, - NULL, -}; - -static struct attribute_group group_l3_1 = { - .name = "78a87ff9-543a-49ce-95ea-26d86071ea93", - .attrs = attrs_l3_1, -}; - -static ssize_t -show_l3_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_2); -} - -static struct device_attribute dev_attr_l3_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_2_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_2[] = { - &dev_attr_l3_2_id.attr, - NULL, -}; - -static struct attribute_group group_l3_2 = { - .name = "9f2cece5-7bfe-4320-ad66-8c7cc526bec5", - .attrs = attrs_l3_2, -}; - -static ssize_t -show_l3_3_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_3); -} - -static struct device_attribute dev_attr_l3_3_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_3_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_3[] = { - &dev_attr_l3_3_id.attr, - NULL, -}; - -static struct attribute_group group_l3_3 = { - .name = "d890ef38-d309-47e4-b8b5-aa779bb19ab0", - .attrs = attrs_l3_3, -}; - -static ssize_t -show_l3_4_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_4); -} - -static struct device_attribute dev_attr_l3_4_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_4_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_4[] = { - &dev_attr_l3_4_id.attr, - NULL, -}; - -static struct attribute_group group_l3_4 = { - .name = "5fdff4a6-9dc8-45e1-bfda-ef54869fbdd4", - .attrs = attrs_l3_4, -}; - -static ssize_t -show_rasterizer_and_pixel_backend_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND); -} - -static struct device_attribute dev_attr_rasterizer_and_pixel_backend_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_rasterizer_and_pixel_backend_id, - .store = NULL, -}; - -static struct attribute *attrs_rasterizer_and_pixel_backend[] = { - &dev_attr_rasterizer_and_pixel_backend_id.attr, - NULL, -}; - -static struct attribute_group group_rasterizer_and_pixel_backend = { - .name = "2c0e45e1-7e2c-4a14-ae00-0b7ec868b8aa", - .attrs = attrs_rasterizer_and_pixel_backend, -}; - -static ssize_t -show_sampler_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_SAMPLER_1); -} - -static struct device_attribute dev_attr_sampler_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_sampler_1_id, - .store = NULL, -}; - -static struct attribute *attrs_sampler_1[] = { - &dev_attr_sampler_1_id.attr, - NULL, -}; - -static struct attribute_group group_sampler_1 = { - .name = "71148d78-baf5-474f-878a-e23158d0265d", - .attrs = attrs_sampler_1, -}; - -static ssize_t -show_sampler_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_SAMPLER_2); -} - -static struct device_attribute dev_attr_sampler_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_sampler_2_id, - .store = NULL, -}; - -static struct attribute *attrs_sampler_2[] = { - &dev_attr_sampler_2_id.attr, - NULL, -}; - -static struct attribute_group group_sampler_2 = { - .name = "b996a2b7-c59c-492d-877a-8cd54fd6df84", - .attrs = attrs_sampler_2, -}; - -static ssize_t -show_tdl_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_1); -} - -static struct device_attribute dev_attr_tdl_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_1_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_1[] = { - &dev_attr_tdl_1_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_1 = { - .name = "eb2fecba-b431-42e7-8261-fe9429a6e67a", - .attrs = attrs_tdl_1, -}; - -static ssize_t -show_tdl_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_2); -} - -static struct device_attribute dev_attr_tdl_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_2_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_2[] = { - &dev_attr_tdl_2_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_2 = { - .name = "60749470-a648-4a4b-9f10-dbfe1e36e44d", - .attrs = attrs_tdl_2, -}; - static ssize_t show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", METRIC_SET_ID_TEST_OA); + return sprintf(buf, "1\n"); } -static struct device_attribute dev_attr_test_oa_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_test_oa_id, - .store = NULL, -}; - -static struct attribute *attrs_test_oa[] = { - &dev_attr_test_oa_id.attr, - NULL, -}; - -static struct attribute_group group_test_oa = { - .name = "4a534b07-cba3-414d-8d60-874830e883aa", - .attrs = attrs_test_oa, -}; - -int -i915_perf_register_sysfs_chv(struct drm_i915_private *dev_priv) +void +i915_perf_load_test_config_chv(struct drm_i915_private *dev_priv) { - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; - int ret = 0; + strncpy(dev_priv->perf.oa.test_config.uuid, + "4a534b07-cba3-414d-8d60-874830e883aa", + UUID_STRING_LEN); + dev_priv->perf.oa.test_config.id = 1; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (ret) - goto error_render_basic; - } - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (ret) - goto error_compute_basic; - } - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (ret) - goto error_render_pipe_profile; - } - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (ret) - goto error_hdc_and_sf; - } - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (ret) - goto error_l3_1; - } - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_2); - if (ret) - goto error_l3_2; - } - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_3); - if (ret) - goto error_l3_3; - } - if (get_l3_4_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_4); - if (ret) - goto error_l3_4; - } - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (ret) - goto error_rasterizer_and_pixel_backend; - } - if (get_sampler_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_sampler_1); - if (ret) - goto error_sampler_1; - } - if (get_sampler_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_sampler_2); - if (ret) - goto error_sampler_2; - } - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (ret) - goto error_tdl_1; - } - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (ret) - goto error_tdl_2; - } - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_test_oa); - if (ret) - goto error_test_oa; - } + dev_priv->perf.oa.test_config.mux_regs = mux_config_test_oa; + dev_priv->perf.oa.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa); - return 0; + dev_priv->perf.oa.test_config.b_counter_regs = b_counter_config_test_oa; + dev_priv->perf.oa.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa); -error_test_oa: - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); -error_tdl_2: - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); -error_tdl_1: - if (get_sampler_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler_2); -error_sampler_2: - if (get_sampler_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler_1); -error_sampler_1: - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); -error_rasterizer_and_pixel_backend: - if (get_l3_4_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_4); -error_l3_4: - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_3); -error_l3_3: - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_2); -error_l3_2: - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); -error_l3_1: - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); -error_hdc_and_sf: - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); -error_render_pipe_profile: - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); -error_compute_basic: - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); -error_render_basic: - return ret; -} + dev_priv->perf.oa.test_config.flex_regs = flex_eu_config_test_oa; + dev_priv->perf.oa.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa); -void -i915_perf_unregister_sysfs_chv(struct drm_i915_private *dev_priv) -{ - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; + dev_priv->perf.oa.test_config.sysfs_metric.name = "4a534b07-cba3-414d-8d60-874830e883aa"; + dev_priv->perf.oa.test_config.sysfs_metric.attrs = dev_priv->perf.oa.test_config.attrs; + + dev_priv->perf.oa.test_config.attrs[0] = &dev_priv->perf.oa.test_config.sysfs_metric_id.attr; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_2); - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_3); - if (get_l3_4_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_4); - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (get_sampler_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler_1); - if (get_sampler_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler_2); - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_test_oa); + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.name = "id"; + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.mode = 0444; + dev_priv->perf.oa.test_config.sysfs_metric_id.show = show_test_oa_id; } diff --git a/drivers/gpu/drm/i915/i915_oa_chv.h b/drivers/gpu/drm/i915/i915_oa_chv.h index 8b8bdc26d726..b9622496979e 100644 --- a/drivers/gpu/drm/i915/i915_oa_chv.h +++ b/drivers/gpu/drm/i915/i915_oa_chv.h @@ -29,12 +29,6 @@ #ifndef __I915_OA_CHV_H__ #define __I915_OA_CHV_H__ -extern int i915_oa_n_builtin_metric_sets_chv; - -extern int i915_oa_select_metric_set_chv(struct drm_i915_private *dev_priv); - -extern int i915_perf_register_sysfs_chv(struct drm_i915_private *dev_priv); - -extern void i915_perf_unregister_sysfs_chv(struct drm_i915_private *dev_priv); +extern void i915_perf_load_test_config_chv(struct drm_i915_private *dev_priv); #endif diff --git a/drivers/gpu/drm/i915/i915_oa_glk.c b/drivers/gpu/drm/i915/i915_oa_glk.c index 2f356d51bff8..f0dbab5d19e0 100644 --- a/drivers/gpu/drm/i915/i915_oa_glk.c +++ b/drivers/gpu/drm/i915/i915_oa_glk.c @@ -31,1614 +31,6 @@ #include "i915_drv.h" #include "i915_oa_glk.h" -enum metric_set_id { - METRIC_SET_ID_RENDER_BASIC = 1, - METRIC_SET_ID_COMPUTE_BASIC, - METRIC_SET_ID_RENDER_PIPE_PROFILE, - METRIC_SET_ID_MEMORY_READS, - METRIC_SET_ID_MEMORY_WRITES, - METRIC_SET_ID_COMPUTE_EXTENDED, - METRIC_SET_ID_COMPUTE_L3_CACHE, - METRIC_SET_ID_HDC_AND_SF, - METRIC_SET_ID_L3_1, - METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND, - METRIC_SET_ID_SAMPLER, - METRIC_SET_ID_TDL_1, - METRIC_SET_ID_TDL_2, - METRIC_SET_ID_COMPUTE_EXTRA, - METRIC_SET_ID_TEST_OA, -}; - -int i915_oa_n_builtin_metric_sets_glk = 15; - -static const struct i915_oa_reg b_counter_config_render_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2740), 0x00000000 }, -}; - -static const struct i915_oa_reg flex_eu_config_render_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_render_basic[] = { - { _MMIO(0x9888), 0x166c00f0 }, - { _MMIO(0x9888), 0x12120280 }, - { _MMIO(0x9888), 0x12320280 }, - { _MMIO(0x9888), 0x11930317 }, - { _MMIO(0x9888), 0x159303df }, - { _MMIO(0x9888), 0x3f900c00 }, - { _MMIO(0x9888), 0x419000a0 }, - { _MMIO(0x9888), 0x002d1000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x082d5000 }, - { _MMIO(0x9888), 0x0a2d1000 }, - { _MMIO(0x9888), 0x0c2e0800 }, - { _MMIO(0x9888), 0x0e2e5900 }, - { _MMIO(0x9888), 0x0a4c8000 }, - { _MMIO(0x9888), 0x0c4c8000 }, - { _MMIO(0x9888), 0x0e4c4000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e2000 }, - { _MMIO(0x9888), 0x1c4f0010 }, - { _MMIO(0x9888), 0x0a6c0053 }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1a0fcc00 }, - { _MMIO(0x9888), 0x1c0f0002 }, - { _MMIO(0x9888), 0x1c2c0040 }, - { _MMIO(0x9888), 0x00101000 }, - { _MMIO(0x9888), 0x04101000 }, - { _MMIO(0x9888), 0x00114000 }, - { _MMIO(0x9888), 0x08114000 }, - { _MMIO(0x9888), 0x00120020 }, - { _MMIO(0x9888), 0x08120021 }, - { _MMIO(0x9888), 0x00141000 }, - { _MMIO(0x9888), 0x08141000 }, - { _MMIO(0x9888), 0x02308000 }, - { _MMIO(0x9888), 0x04302000 }, - { _MMIO(0x9888), 0x06318000 }, - { _MMIO(0x9888), 0x08318000 }, - { _MMIO(0x9888), 0x06320800 }, - { _MMIO(0x9888), 0x08320840 }, - { _MMIO(0x9888), 0x00320000 }, - { _MMIO(0x9888), 0x06344000 }, - { _MMIO(0x9888), 0x08344000 }, - { _MMIO(0x9888), 0x0d931831 }, - { _MMIO(0x9888), 0x0f939f3f }, - { _MMIO(0x9888), 0x01939e80 }, - { _MMIO(0x9888), 0x039303bc }, - { _MMIO(0x9888), 0x0593000e }, - { _MMIO(0x9888), 0x1993002a }, - { _MMIO(0x9888), 0x07930000 }, - { _MMIO(0x9888), 0x09930000 }, - { _MMIO(0x9888), 0x1d900177 }, - { _MMIO(0x9888), 0x1f900187 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x13904000 }, - { _MMIO(0x9888), 0x21904000 }, - { _MMIO(0x9888), 0x23904000 }, - { _MMIO(0x9888), 0x25904000 }, - { _MMIO(0x9888), 0x27904000 }, - { _MMIO(0x9888), 0x2b904000 }, - { _MMIO(0x9888), 0x2d904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17904000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x53901110 }, - { _MMIO(0x9888), 0x43900423 }, - { _MMIO(0x9888), 0x55900111 }, - { _MMIO(0x9888), 0x47900c02 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900020 }, - { _MMIO(0x9888), 0x59901111 }, - { _MMIO(0x9888), 0x4b900421 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900001 }, - { _MMIO(0x9888), 0x45900821 }, -}; - -static int -get_render_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_render_basic; - lens[n] = ARRAY_SIZE(mux_config_render_basic); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2740), 0x00000000 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_compute_basic[] = { - { _MMIO(0x9888), 0x104f00e0 }, - { _MMIO(0x9888), 0x124f1c00 }, - { _MMIO(0x9888), 0x39900340 }, - { _MMIO(0x9888), 0x3f900c00 }, - { _MMIO(0x9888), 0x41900000 }, - { _MMIO(0x9888), 0x002d5000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x082d4000 }, - { _MMIO(0x9888), 0x0a2d1000 }, - { _MMIO(0x9888), 0x0c2d5000 }, - { _MMIO(0x9888), 0x0e2d4000 }, - { _MMIO(0x9888), 0x0c2e1400 }, - { _MMIO(0x9888), 0x0e2e5100 }, - { _MMIO(0x9888), 0x102e0114 }, - { _MMIO(0x9888), 0x044cc000 }, - { _MMIO(0x9888), 0x0a4c8000 }, - { _MMIO(0x9888), 0x0c4c8000 }, - { _MMIO(0x9888), 0x0e4c4000 }, - { _MMIO(0x9888), 0x104c8000 }, - { _MMIO(0x9888), 0x124c8000 }, - { _MMIO(0x9888), 0x164c2000 }, - { _MMIO(0x9888), 0x004ea000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e2000 }, - { _MMIO(0x9888), 0x0c4ea000 }, - { _MMIO(0x9888), 0x0e4e8000 }, - { _MMIO(0x9888), 0x004f6b42 }, - { _MMIO(0x9888), 0x064f6200 }, - { _MMIO(0x9888), 0x084f4100 }, - { _MMIO(0x9888), 0x0a4f0061 }, - { _MMIO(0x9888), 0x0c4f6c4c }, - { _MMIO(0x9888), 0x0e4f4b00 }, - { _MMIO(0x9888), 0x1a4f0000 }, - { _MMIO(0x9888), 0x1c4f0000 }, - { _MMIO(0x9888), 0x180f5000 }, - { _MMIO(0x9888), 0x1a0f8800 }, - { _MMIO(0x9888), 0x1c0f08a2 }, - { _MMIO(0x9888), 0x182c4000 }, - { _MMIO(0x9888), 0x1c2c1451 }, - { _MMIO(0x9888), 0x1e2c0001 }, - { _MMIO(0x9888), 0x1a2c0010 }, - { _MMIO(0x9888), 0x01938000 }, - { _MMIO(0x9888), 0x0f938000 }, - { _MMIO(0x9888), 0x19938a28 }, - { _MMIO(0x9888), 0x03938000 }, - { _MMIO(0x9888), 0x19900177 }, - { _MMIO(0x9888), 0x1b900178 }, - { _MMIO(0x9888), 0x1d900125 }, - { _MMIO(0x9888), 0x1f900123 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x13904000 }, - { _MMIO(0x9888), 0x21904000 }, - { _MMIO(0x9888), 0x25904000 }, - { _MMIO(0x9888), 0x27904000 }, - { _MMIO(0x9888), 0x2b904000 }, - { _MMIO(0x9888), 0x2d904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x53901000 }, - { _MMIO(0x9888), 0x43900000 }, - { _MMIO(0x9888), 0x55900111 }, - { _MMIO(0x9888), 0x47900000 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900000 }, - { _MMIO(0x9888), 0x45900000 }, -}; - -static int -get_compute_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_basic; - lens[n] = ARRAY_SIZE(mux_config_compute_basic); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_render_pipe_profile[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007ffea }, - { _MMIO(0x2774), 0x00007ffc }, - { _MMIO(0x2778), 0x0007affa }, - { _MMIO(0x277c), 0x0000f5fd }, - { _MMIO(0x2780), 0x00079ffa }, - { _MMIO(0x2784), 0x0000f3fb }, - { _MMIO(0x2788), 0x0007bf7a }, - { _MMIO(0x278c), 0x0000f7e7 }, - { _MMIO(0x2790), 0x0007fefa }, - { _MMIO(0x2794), 0x0000f7cf }, - { _MMIO(0x2798), 0x00077ffa }, - { _MMIO(0x279c), 0x0000efdf }, - { _MMIO(0x27a0), 0x0006fffa }, - { _MMIO(0x27a4), 0x0000cfbf }, - { _MMIO(0x27a8), 0x0003fffa }, - { _MMIO(0x27ac), 0x00005f7f }, -}; - -static const struct i915_oa_reg flex_eu_config_render_pipe_profile[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_render_pipe_profile[] = { - { _MMIO(0x9888), 0x0c2e001f }, - { _MMIO(0x9888), 0x0a2f0000 }, - { _MMIO(0x9888), 0x10186800 }, - { _MMIO(0x9888), 0x11810019 }, - { _MMIO(0x9888), 0x15810013 }, - { _MMIO(0x9888), 0x13820020 }, - { _MMIO(0x9888), 0x11830020 }, - { _MMIO(0x9888), 0x17840000 }, - { _MMIO(0x9888), 0x11860007 }, - { _MMIO(0x9888), 0x21860000 }, - { _MMIO(0x9888), 0x178703e0 }, - { _MMIO(0x9888), 0x0c2d8000 }, - { _MMIO(0x9888), 0x042d4000 }, - { _MMIO(0x9888), 0x062d1000 }, - { _MMIO(0x9888), 0x022e5400 }, - { _MMIO(0x9888), 0x002e0000 }, - { _MMIO(0x9888), 0x0e2e0080 }, - { _MMIO(0x9888), 0x082f0040 }, - { _MMIO(0x9888), 0x002f0000 }, - { _MMIO(0x9888), 0x06143000 }, - { _MMIO(0x9888), 0x06174000 }, - { _MMIO(0x9888), 0x06180012 }, - { _MMIO(0x9888), 0x00180000 }, - { _MMIO(0x9888), 0x0d804000 }, - { _MMIO(0x9888), 0x0f804000 }, - { _MMIO(0x9888), 0x05804000 }, - { _MMIO(0x9888), 0x09810200 }, - { _MMIO(0x9888), 0x0b810030 }, - { _MMIO(0x9888), 0x03810003 }, - { _MMIO(0x9888), 0x21819140 }, - { _MMIO(0x9888), 0x23819050 }, - { _MMIO(0x9888), 0x25810018 }, - { _MMIO(0x9888), 0x0b820980 }, - { _MMIO(0x9888), 0x03820d80 }, - { _MMIO(0x9888), 0x11820000 }, - { _MMIO(0x9888), 0x0182c000 }, - { _MMIO(0x9888), 0x07828000 }, - { _MMIO(0x9888), 0x09824000 }, - { _MMIO(0x9888), 0x0f828000 }, - { _MMIO(0x9888), 0x0d830004 }, - { _MMIO(0x9888), 0x0583000c }, - { _MMIO(0x9888), 0x0f831000 }, - { _MMIO(0x9888), 0x01848072 }, - { _MMIO(0x9888), 0x11840000 }, - { _MMIO(0x9888), 0x07848000 }, - { _MMIO(0x9888), 0x09844000 }, - { _MMIO(0x9888), 0x0f848000 }, - { _MMIO(0x9888), 0x07860000 }, - { _MMIO(0x9888), 0x09860092 }, - { _MMIO(0x9888), 0x0f860400 }, - { _MMIO(0x9888), 0x01869100 }, - { _MMIO(0x9888), 0x0f870065 }, - { _MMIO(0x9888), 0x01870000 }, - { _MMIO(0x9888), 0x19930800 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x0d938000 }, - { _MMIO(0x9888), 0x1b952000 }, - { _MMIO(0x9888), 0x1d955055 }, - { _MMIO(0x9888), 0x1f951455 }, - { _MMIO(0x9888), 0x0992a000 }, - { _MMIO(0x9888), 0x0f928000 }, - { _MMIO(0x9888), 0x1192a800 }, - { _MMIO(0x9888), 0x1392028a }, - { _MMIO(0x9888), 0x0b92a000 }, - { _MMIO(0x9888), 0x0d922000 }, - { _MMIO(0x9888), 0x13908000 }, - { _MMIO(0x9888), 0x21908000 }, - { _MMIO(0x9888), 0x23908000 }, - { _MMIO(0x9888), 0x25908000 }, - { _MMIO(0x9888), 0x27908000 }, - { _MMIO(0x9888), 0x29908000 }, - { _MMIO(0x9888), 0x2b908000 }, - { _MMIO(0x9888), 0x2d904000 }, - { _MMIO(0x9888), 0x2f908000 }, - { _MMIO(0x9888), 0x31908000 }, - { _MMIO(0x9888), 0x15908000 }, - { _MMIO(0x9888), 0x17908000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x1f904000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43900c01 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47900000 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900863 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b900061 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900000 }, - { _MMIO(0x9888), 0x45900c22 }, -}; - -static int -get_render_pipe_profile_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_render_pipe_profile; - lens[n] = ARRAY_SIZE(mux_config_render_pipe_profile); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_reads[] = { - { _MMIO(0x272c), 0xffffffff }, - { _MMIO(0x2728), 0xffffffff }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x271c), 0xffffffff }, - { _MMIO(0x2718), 0xffffffff }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x86543210 }, - { _MMIO(0x2748), 0x86543210 }, - { _MMIO(0x2744), 0x00006667 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0x86543210 }, - { _MMIO(0x2758), 0x86543210 }, - { _MMIO(0x2754), 0x00006465 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fe00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fe00 }, - { _MMIO(0x2780), 0x0007f872 }, - { _MMIO(0x2784), 0x0000fe00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fe00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fe00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fe00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fe00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fe00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_reads[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_memory_reads[] = { - { _MMIO(0x9888), 0x19800343 }, - { _MMIO(0x9888), 0x39900340 }, - { _MMIO(0x9888), 0x3f901000 }, - { _MMIO(0x9888), 0x41900003 }, - { _MMIO(0x9888), 0x03803180 }, - { _MMIO(0x9888), 0x058035e2 }, - { _MMIO(0x9888), 0x0780006a }, - { _MMIO(0x9888), 0x11800000 }, - { _MMIO(0x9888), 0x2181a000 }, - { _MMIO(0x9888), 0x2381000a }, - { _MMIO(0x9888), 0x1d950550 }, - { _MMIO(0x9888), 0x0b928000 }, - { _MMIO(0x9888), 0x0d92a000 }, - { _MMIO(0x9888), 0x0f922000 }, - { _MMIO(0x9888), 0x13900170 }, - { _MMIO(0x9888), 0x21900171 }, - { _MMIO(0x9888), 0x23900172 }, - { _MMIO(0x9888), 0x25900173 }, - { _MMIO(0x9888), 0x27900174 }, - { _MMIO(0x9888), 0x29900175 }, - { _MMIO(0x9888), 0x2b900176 }, - { _MMIO(0x9888), 0x2d900177 }, - { _MMIO(0x9888), 0x2f90017f }, - { _MMIO(0x9888), 0x31900125 }, - { _MMIO(0x9888), 0x15900123 }, - { _MMIO(0x9888), 0x17900121 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43901084 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47901080 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49901084 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b901084 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900004 }, - { _MMIO(0x9888), 0x45900000 }, -}; - -static int -get_memory_reads_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_memory_reads; - lens[n] = ARRAY_SIZE(mux_config_memory_reads); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_writes[] = { - { _MMIO(0x272c), 0xffffffff }, - { _MMIO(0x2728), 0xffffffff }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x271c), 0xffffffff }, - { _MMIO(0x2718), 0xffffffff }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x86543210 }, - { _MMIO(0x2748), 0x86543210 }, - { _MMIO(0x2744), 0x00006667 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0x86543210 }, - { _MMIO(0x2758), 0x86543210 }, - { _MMIO(0x2754), 0x00006465 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fe00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fe00 }, - { _MMIO(0x2780), 0x0007f822 }, - { _MMIO(0x2784), 0x0000fe00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fe00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fe00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fe00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fe00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fe00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_writes[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_memory_writes[] = { - { _MMIO(0x9888), 0x19800343 }, - { _MMIO(0x9888), 0x39900340 }, - { _MMIO(0x9888), 0x3f900000 }, - { _MMIO(0x9888), 0x41900080 }, - { _MMIO(0x9888), 0x03803180 }, - { _MMIO(0x9888), 0x058035e2 }, - { _MMIO(0x9888), 0x0780006a }, - { _MMIO(0x9888), 0x11800000 }, - { _MMIO(0x9888), 0x2181a000 }, - { _MMIO(0x9888), 0x2381000a }, - { _MMIO(0x9888), 0x1d950550 }, - { _MMIO(0x9888), 0x0b928000 }, - { _MMIO(0x9888), 0x0d92a000 }, - { _MMIO(0x9888), 0x0f922000 }, - { _MMIO(0x9888), 0x13900180 }, - { _MMIO(0x9888), 0x21900181 }, - { _MMIO(0x9888), 0x23900182 }, - { _MMIO(0x9888), 0x25900183 }, - { _MMIO(0x9888), 0x27900184 }, - { _MMIO(0x9888), 0x29900185 }, - { _MMIO(0x9888), 0x2b900186 }, - { _MMIO(0x9888), 0x2d900187 }, - { _MMIO(0x9888), 0x2f900170 }, - { _MMIO(0x9888), 0x31900125 }, - { _MMIO(0x9888), 0x15900123 }, - { _MMIO(0x9888), 0x17900121 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43901084 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47901080 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49901084 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b901084 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900004 }, - { _MMIO(0x9888), 0x45900000 }, -}; - -static int -get_memory_writes_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_memory_writes; - lens[n] = ARRAY_SIZE(mux_config_memory_writes); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_extended[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007fc2a }, - { _MMIO(0x2774), 0x0000bf00 }, - { _MMIO(0x2778), 0x0007fc6a }, - { _MMIO(0x277c), 0x0000bf00 }, - { _MMIO(0x2780), 0x0007fc92 }, - { _MMIO(0x2784), 0x0000bf00 }, - { _MMIO(0x2788), 0x0007fca2 }, - { _MMIO(0x278c), 0x0000bf00 }, - { _MMIO(0x2790), 0x0007fc32 }, - { _MMIO(0x2794), 0x0000bf00 }, - { _MMIO(0x2798), 0x0007fc9a }, - { _MMIO(0x279c), 0x0000bf00 }, - { _MMIO(0x27a0), 0x0007fe6a }, - { _MMIO(0x27a4), 0x0000bf00 }, - { _MMIO(0x27a8), 0x0007fe7a }, - { _MMIO(0x27ac), 0x0000bf00 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_extended[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_compute_extended[] = { - { _MMIO(0x9888), 0x104f00e0 }, - { _MMIO(0x9888), 0x141c0160 }, - { _MMIO(0x9888), 0x161c0015 }, - { _MMIO(0x9888), 0x181c0120 }, - { _MMIO(0x9888), 0x002d5000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x082d5000 }, - { _MMIO(0x9888), 0x0a2d5000 }, - { _MMIO(0x9888), 0x0c2d5000 }, - { _MMIO(0x9888), 0x0e2d5000 }, - { _MMIO(0x9888), 0x022d5000 }, - { _MMIO(0x9888), 0x042d5000 }, - { _MMIO(0x9888), 0x0c2e5400 }, - { _MMIO(0x9888), 0x0e2e5515 }, - { _MMIO(0x9888), 0x102e0155 }, - { _MMIO(0x9888), 0x044cc000 }, - { _MMIO(0x9888), 0x0a4c8000 }, - { _MMIO(0x9888), 0x0c4cc000 }, - { _MMIO(0x9888), 0x0e4cc000 }, - { _MMIO(0x9888), 0x104c8000 }, - { _MMIO(0x9888), 0x124c8000 }, - { _MMIO(0x9888), 0x144c8000 }, - { _MMIO(0x9888), 0x164c2000 }, - { _MMIO(0x9888), 0x064cc000 }, - { _MMIO(0x9888), 0x084cc000 }, - { _MMIO(0x9888), 0x004ea000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084ea000 }, - { _MMIO(0x9888), 0x0a4ea000 }, - { _MMIO(0x9888), 0x0c4ea000 }, - { _MMIO(0x9888), 0x0e4ea000 }, - { _MMIO(0x9888), 0x024ea000 }, - { _MMIO(0x9888), 0x044ea000 }, - { _MMIO(0x9888), 0x0e4f4b41 }, - { _MMIO(0x9888), 0x004f4200 }, - { _MMIO(0x9888), 0x024f404c }, - { _MMIO(0x9888), 0x1c4f0000 }, - { _MMIO(0x9888), 0x1a4f0000 }, - { _MMIO(0x9888), 0x001b4000 }, - { _MMIO(0x9888), 0x061b8000 }, - { _MMIO(0x9888), 0x081bc000 }, - { _MMIO(0x9888), 0x0a1bc000 }, - { _MMIO(0x9888), 0x0c1bc000 }, - { _MMIO(0x9888), 0x041bc000 }, - { _MMIO(0x9888), 0x001c0031 }, - { _MMIO(0x9888), 0x061c1900 }, - { _MMIO(0x9888), 0x081c1a33 }, - { _MMIO(0x9888), 0x0a1c1b35 }, - { _MMIO(0x9888), 0x0c1c3337 }, - { _MMIO(0x9888), 0x041c31c7 }, - { _MMIO(0x9888), 0x180f5000 }, - { _MMIO(0x9888), 0x1a0fa8aa }, - { _MMIO(0x9888), 0x1c0f0aaa }, - { _MMIO(0x9888), 0x182c8000 }, - { _MMIO(0x9888), 0x1c2c6aaa }, - { _MMIO(0x9888), 0x1e2c0001 }, - { _MMIO(0x9888), 0x1a2c2950 }, - { _MMIO(0x9888), 0x01938000 }, - { _MMIO(0x9888), 0x0f938000 }, - { _MMIO(0x9888), 0x1993aaaa }, - { _MMIO(0x9888), 0x03938000 }, - { _MMIO(0x9888), 0x05938000 }, - { _MMIO(0x9888), 0x07938000 }, - { _MMIO(0x9888), 0x09938000 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x13904000 }, - { _MMIO(0x9888), 0x21904000 }, - { _MMIO(0x9888), 0x23904000 }, - { _MMIO(0x9888), 0x25904000 }, - { _MMIO(0x9888), 0x27904000 }, - { _MMIO(0x9888), 0x29904000 }, - { _MMIO(0x9888), 0x2b904000 }, - { _MMIO(0x9888), 0x2d904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17904000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43900420 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47900000 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b900400 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900001 }, - { _MMIO(0x9888), 0x45900001 }, -}; - -static int -get_compute_extended_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_extended; - lens[n] = ARRAY_SIZE(mux_config_compute_extended); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_l3_cache[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x30800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007fffa }, - { _MMIO(0x2774), 0x0000fefe }, - { _MMIO(0x2778), 0x0007fffa }, - { _MMIO(0x277c), 0x0000fefd }, - { _MMIO(0x2790), 0x0007fffa }, - { _MMIO(0x2794), 0x0000fbef }, - { _MMIO(0x2798), 0x0007fffa }, - { _MMIO(0x279c), 0x0000fbdf }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_l3_cache[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00101100 }, - { _MMIO(0xe45c), 0x00201200 }, - { _MMIO(0xe55c), 0x00301300 }, - { _MMIO(0xe65c), 0x00401400 }, -}; - -static const struct i915_oa_reg mux_config_compute_l3_cache[] = { - { _MMIO(0x9888), 0x166c03b0 }, - { _MMIO(0x9888), 0x1593001e }, - { _MMIO(0x9888), 0x3f900c00 }, - { _MMIO(0x9888), 0x41900000 }, - { _MMIO(0x9888), 0x002d1000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x082d5000 }, - { _MMIO(0x9888), 0x0e2d5000 }, - { _MMIO(0x9888), 0x0c2e0400 }, - { _MMIO(0x9888), 0x0e2e1500 }, - { _MMIO(0x9888), 0x102e0140 }, - { _MMIO(0x9888), 0x044c4000 }, - { _MMIO(0x9888), 0x0a4c8000 }, - { _MMIO(0x9888), 0x0c4cc000 }, - { _MMIO(0x9888), 0x144c8000 }, - { _MMIO(0x9888), 0x164c2000 }, - { _MMIO(0x9888), 0x004e2000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084ea000 }, - { _MMIO(0x9888), 0x0e4ea000 }, - { _MMIO(0x9888), 0x1a4f4001 }, - { _MMIO(0x9888), 0x1c4f5005 }, - { _MMIO(0x9888), 0x006c0051 }, - { _MMIO(0x9888), 0x066c5000 }, - { _MMIO(0x9888), 0x086c5c5d }, - { _MMIO(0x9888), 0x0e6c5e5f }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x146c0000 }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x180f1000 }, - { _MMIO(0x9888), 0x1a0fa800 }, - { _MMIO(0x9888), 0x1c0f0a00 }, - { _MMIO(0x9888), 0x182c4000 }, - { _MMIO(0x9888), 0x1c2c4015 }, - { _MMIO(0x9888), 0x1e2c0001 }, - { _MMIO(0x9888), 0x03931980 }, - { _MMIO(0x9888), 0x05930032 }, - { _MMIO(0x9888), 0x11930000 }, - { _MMIO(0x9888), 0x01938000 }, - { _MMIO(0x9888), 0x0f938000 }, - { _MMIO(0x9888), 0x1993a00a }, - { _MMIO(0x9888), 0x07930000 }, - { _MMIO(0x9888), 0x09930000 }, - { _MMIO(0x9888), 0x1d900177 }, - { _MMIO(0x9888), 0x1f900178 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x13904000 }, - { _MMIO(0x9888), 0x21904000 }, - { _MMIO(0x9888), 0x23904000 }, - { _MMIO(0x9888), 0x25904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x53901000 }, - { _MMIO(0x9888), 0x43900000 }, - { _MMIO(0x9888), 0x55900111 }, - { _MMIO(0x9888), 0x47900001 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x4d900000 }, - { _MMIO(0x9888), 0x45900400 }, -}; - -static int -get_compute_l3_cache_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_l3_cache; - lens[n] = ARRAY_SIZE(mux_config_compute_l3_cache); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_hdc_and_sf[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x10800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000fdff }, -}; - -static const struct i915_oa_reg flex_eu_config_hdc_and_sf[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_hdc_and_sf[] = { - { _MMIO(0x9888), 0x104f0232 }, - { _MMIO(0x9888), 0x124f4640 }, - { _MMIO(0x9888), 0x11834400 }, - { _MMIO(0x9888), 0x022d4000 }, - { _MMIO(0x9888), 0x042d5000 }, - { _MMIO(0x9888), 0x062d1000 }, - { _MMIO(0x9888), 0x0e2e0055 }, - { _MMIO(0x9888), 0x064c8000 }, - { _MMIO(0x9888), 0x084cc000 }, - { _MMIO(0x9888), 0x0a4c4000 }, - { _MMIO(0x9888), 0x024e8000 }, - { _MMIO(0x9888), 0x044ea000 }, - { _MMIO(0x9888), 0x064e2000 }, - { _MMIO(0x9888), 0x024f6100 }, - { _MMIO(0x9888), 0x044f416b }, - { _MMIO(0x9888), 0x064f004b }, - { _MMIO(0x9888), 0x1a4f0000 }, - { _MMIO(0x9888), 0x1a0f02a8 }, - { _MMIO(0x9888), 0x1a2c5500 }, - { _MMIO(0x9888), 0x0f808000 }, - { _MMIO(0x9888), 0x25810020 }, - { _MMIO(0x9888), 0x0f8305c0 }, - { _MMIO(0x9888), 0x07938000 }, - { _MMIO(0x9888), 0x09938000 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x0d938000 }, - { _MMIO(0x9888), 0x1f951000 }, - { _MMIO(0x9888), 0x13920200 }, - { _MMIO(0x9888), 0x31908000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x1f904000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4d900003 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900000 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47900000 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_hdc_and_sf_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_hdc_and_sf; - lens[n] = ARRAY_SIZE(mux_config_hdc_and_sf); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00014002 }, - { _MMIO(0x277c), 0x0000c3ff }, - { _MMIO(0x2780), 0x00010002 }, - { _MMIO(0x2784), 0x0000c7ff }, - { _MMIO(0x2788), 0x00004002 }, - { _MMIO(0x278c), 0x0000d3ff }, - { _MMIO(0x2790), 0x00100700 }, - { _MMIO(0x2794), 0x0000ff1f }, - { _MMIO(0x2798), 0x00001402 }, - { _MMIO(0x279c), 0x0000fc3f }, - { _MMIO(0x27a0), 0x00001002 }, - { _MMIO(0x27a4), 0x0000fc7f }, - { _MMIO(0x27a8), 0x00000402 }, - { _MMIO(0x27ac), 0x0000fd3f }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_1[] = { - { _MMIO(0x9888), 0x12643400 }, - { _MMIO(0x9888), 0x12653400 }, - { _MMIO(0x9888), 0x106c6800 }, - { _MMIO(0x9888), 0x126c001e }, - { _MMIO(0x9888), 0x166c0010 }, - { _MMIO(0x9888), 0x0c2d5000 }, - { _MMIO(0x9888), 0x0e2d5000 }, - { _MMIO(0x9888), 0x002d4000 }, - { _MMIO(0x9888), 0x022d5000 }, - { _MMIO(0x9888), 0x042d5000 }, - { _MMIO(0x9888), 0x062d1000 }, - { _MMIO(0x9888), 0x102e0154 }, - { _MMIO(0x9888), 0x0c2e5000 }, - { _MMIO(0x9888), 0x0e2e0055 }, - { _MMIO(0x9888), 0x104c8000 }, - { _MMIO(0x9888), 0x124c8000 }, - { _MMIO(0x9888), 0x144c8000 }, - { _MMIO(0x9888), 0x164c2000 }, - { _MMIO(0x9888), 0x044c8000 }, - { _MMIO(0x9888), 0x064cc000 }, - { _MMIO(0x9888), 0x084cc000 }, - { _MMIO(0x9888), 0x0a4c4000 }, - { _MMIO(0x9888), 0x0c4ea000 }, - { _MMIO(0x9888), 0x0e4ea000 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x024ea000 }, - { _MMIO(0x9888), 0x044ea000 }, - { _MMIO(0x9888), 0x064e2000 }, - { _MMIO(0x9888), 0x1c4f5500 }, - { _MMIO(0x9888), 0x1a4f1554 }, - { _MMIO(0x9888), 0x0a640024 }, - { _MMIO(0x9888), 0x10640000 }, - { _MMIO(0x9888), 0x04640000 }, - { _MMIO(0x9888), 0x0c650024 }, - { _MMIO(0x9888), 0x10650000 }, - { _MMIO(0x9888), 0x06650000 }, - { _MMIO(0x9888), 0x0c6c5327 }, - { _MMIO(0x9888), 0x0e6c5425 }, - { _MMIO(0x9888), 0x006c2a00 }, - { _MMIO(0x9888), 0x026c285b }, - { _MMIO(0x9888), 0x046c005c }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1a6c0900 }, - { _MMIO(0x9888), 0x1c0f0aa0 }, - { _MMIO(0x9888), 0x180f4000 }, - { _MMIO(0x9888), 0x1a0f02aa }, - { _MMIO(0x9888), 0x1c2c5400 }, - { _MMIO(0x9888), 0x1e2c0001 }, - { _MMIO(0x9888), 0x1a2c5550 }, - { _MMIO(0x9888), 0x1993aa00 }, - { _MMIO(0x9888), 0x03938000 }, - { _MMIO(0x9888), 0x05938000 }, - { _MMIO(0x9888), 0x07938000 }, - { _MMIO(0x9888), 0x09938000 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x0d938000 }, - { _MMIO(0x9888), 0x2b904000 }, - { _MMIO(0x9888), 0x2d904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17904000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x1f904000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b900421 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900001 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43900420 }, - { _MMIO(0x9888), 0x45900021 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47900000 }, -}; - -static int -get_l3_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_1; - lens[n] = ARRAY_SIZE(mux_config_l3_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x30800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000efff }, - { _MMIO(0x2778), 0x00006000 }, - { _MMIO(0x277c), 0x0000f3ff }, -}; - -static const struct i915_oa_reg flex_eu_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x9888), 0x102d7800 }, - { _MMIO(0x9888), 0x122d79e0 }, - { _MMIO(0x9888), 0x0c2f0004 }, - { _MMIO(0x9888), 0x100e3800 }, - { _MMIO(0x9888), 0x180f0005 }, - { _MMIO(0x9888), 0x002d0940 }, - { _MMIO(0x9888), 0x022d802f }, - { _MMIO(0x9888), 0x042d4013 }, - { _MMIO(0x9888), 0x062d1000 }, - { _MMIO(0x9888), 0x0e2e0050 }, - { _MMIO(0x9888), 0x022f0010 }, - { _MMIO(0x9888), 0x002f0000 }, - { _MMIO(0x9888), 0x084c8000 }, - { _MMIO(0x9888), 0x0a4c4000 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e2000 }, - { _MMIO(0x9888), 0x040e0480 }, - { _MMIO(0x9888), 0x000e0000 }, - { _MMIO(0x9888), 0x060f0027 }, - { _MMIO(0x9888), 0x100f0000 }, - { _MMIO(0x9888), 0x1a0f0040 }, - { _MMIO(0x9888), 0x03938000 }, - { _MMIO(0x9888), 0x05938000 }, - { _MMIO(0x9888), 0x07938000 }, - { _MMIO(0x9888), 0x09938000 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x0d938000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17904000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x1f904000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x439014a0 }, - { _MMIO(0x9888), 0x459000a4 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47900001 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_rasterizer_and_pixel_backend_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_rasterizer_and_pixel_backend; - lens[n] = ARRAY_SIZE(mux_config_rasterizer_and_pixel_backend); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_sampler[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x70800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x0000c000 }, - { _MMIO(0x2774), 0x0000e7ff }, - { _MMIO(0x2778), 0x00003000 }, - { _MMIO(0x277c), 0x0000f9ff }, - { _MMIO(0x2780), 0x00000c00 }, - { _MMIO(0x2784), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_sampler[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_sampler[] = { - { _MMIO(0x9888), 0x121300a0 }, - { _MMIO(0x9888), 0x141600ab }, - { _MMIO(0x9888), 0x123300a0 }, - { _MMIO(0x9888), 0x143600ab }, - { _MMIO(0x9888), 0x125300a0 }, - { _MMIO(0x9888), 0x145600ab }, - { _MMIO(0x9888), 0x0c2d4000 }, - { _MMIO(0x9888), 0x0e2d5000 }, - { _MMIO(0x9888), 0x002d4000 }, - { _MMIO(0x9888), 0x022d5000 }, - { _MMIO(0x9888), 0x042d5000 }, - { _MMIO(0x9888), 0x062d1000 }, - { _MMIO(0x9888), 0x102e01a0 }, - { _MMIO(0x9888), 0x0c2e5000 }, - { _MMIO(0x9888), 0x0e2e0065 }, - { _MMIO(0x9888), 0x164c2000 }, - { _MMIO(0x9888), 0x044c8000 }, - { _MMIO(0x9888), 0x064cc000 }, - { _MMIO(0x9888), 0x084c4000 }, - { _MMIO(0x9888), 0x0a4c4000 }, - { _MMIO(0x9888), 0x0e4e8000 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x024ea000 }, - { _MMIO(0x9888), 0x044e2000 }, - { _MMIO(0x9888), 0x064e2000 }, - { _MMIO(0x9888), 0x1c0f0800 }, - { _MMIO(0x9888), 0x180f4000 }, - { _MMIO(0x9888), 0x1a0f023f }, - { _MMIO(0x9888), 0x1e2c0003 }, - { _MMIO(0x9888), 0x1a2cc030 }, - { _MMIO(0x9888), 0x04132180 }, - { _MMIO(0x9888), 0x02130000 }, - { _MMIO(0x9888), 0x0c148000 }, - { _MMIO(0x9888), 0x0e142000 }, - { _MMIO(0x9888), 0x04148000 }, - { _MMIO(0x9888), 0x1e150140 }, - { _MMIO(0x9888), 0x1c150040 }, - { _MMIO(0x9888), 0x0c163000 }, - { _MMIO(0x9888), 0x0e160068 }, - { _MMIO(0x9888), 0x10160000 }, - { _MMIO(0x9888), 0x18160000 }, - { _MMIO(0x9888), 0x0a164000 }, - { _MMIO(0x9888), 0x04330043 }, - { _MMIO(0x9888), 0x02330000 }, - { _MMIO(0x9888), 0x0234a000 }, - { _MMIO(0x9888), 0x04342000 }, - { _MMIO(0x9888), 0x1c350015 }, - { _MMIO(0x9888), 0x02363460 }, - { _MMIO(0x9888), 0x10360000 }, - { _MMIO(0x9888), 0x04360000 }, - { _MMIO(0x9888), 0x06360000 }, - { _MMIO(0x9888), 0x08364000 }, - { _MMIO(0x9888), 0x06530043 }, - { _MMIO(0x9888), 0x02530000 }, - { _MMIO(0x9888), 0x0e548000 }, - { _MMIO(0x9888), 0x00548000 }, - { _MMIO(0x9888), 0x06542000 }, - { _MMIO(0x9888), 0x1e550400 }, - { _MMIO(0x9888), 0x1a552000 }, - { _MMIO(0x9888), 0x1c550100 }, - { _MMIO(0x9888), 0x0e563000 }, - { _MMIO(0x9888), 0x00563400 }, - { _MMIO(0x9888), 0x10560000 }, - { _MMIO(0x9888), 0x18560000 }, - { _MMIO(0x9888), 0x02560000 }, - { _MMIO(0x9888), 0x0c564000 }, - { _MMIO(0x9888), 0x1993a800 }, - { _MMIO(0x9888), 0x03938000 }, - { _MMIO(0x9888), 0x05938000 }, - { _MMIO(0x9888), 0x07938000 }, - { _MMIO(0x9888), 0x09938000 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x0d938000 }, - { _MMIO(0x9888), 0x2d904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17904000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x1f904000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b9014a0 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900001 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43900820 }, - { _MMIO(0x9888), 0x45901022 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47900000 }, -}; - -static int -get_sampler_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_sampler; - lens[n] = ARRAY_SIZE(mux_config_sampler); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x00007fff }, - { _MMIO(0x2778), 0x00000000 }, - { _MMIO(0x277c), 0x00009fff }, - { _MMIO(0x2780), 0x00000002 }, - { _MMIO(0x2784), 0x0000efff }, - { _MMIO(0x2788), 0x00000000 }, - { _MMIO(0x278c), 0x0000f3ff }, - { _MMIO(0x2790), 0x00000002 }, - { _MMIO(0x2794), 0x0000fdff }, - { _MMIO(0x2798), 0x00000000 }, - { _MMIO(0x279c), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_1[] = { - { _MMIO(0x9888), 0x141a0000 }, - { _MMIO(0x9888), 0x143a0000 }, - { _MMIO(0x9888), 0x145a0000 }, - { _MMIO(0x9888), 0x0c2d4000 }, - { _MMIO(0x9888), 0x0e2d5000 }, - { _MMIO(0x9888), 0x002d4000 }, - { _MMIO(0x9888), 0x022d5000 }, - { _MMIO(0x9888), 0x042d5000 }, - { _MMIO(0x9888), 0x062d1000 }, - { _MMIO(0x9888), 0x102e0150 }, - { _MMIO(0x9888), 0x0c2e5000 }, - { _MMIO(0x9888), 0x0e2e006a }, - { _MMIO(0x9888), 0x124c8000 }, - { _MMIO(0x9888), 0x144c8000 }, - { _MMIO(0x9888), 0x164c2000 }, - { _MMIO(0x9888), 0x044c8000 }, - { _MMIO(0x9888), 0x064c4000 }, - { _MMIO(0x9888), 0x0a4c4000 }, - { _MMIO(0x9888), 0x0c4e8000 }, - { _MMIO(0x9888), 0x0e4ea000 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x024e2000 }, - { _MMIO(0x9888), 0x064e2000 }, - { _MMIO(0x9888), 0x1c0f0bc0 }, - { _MMIO(0x9888), 0x180f4000 }, - { _MMIO(0x9888), 0x1a0f0302 }, - { _MMIO(0x9888), 0x1e2c0003 }, - { _MMIO(0x9888), 0x1a2c00f0 }, - { _MMIO(0x9888), 0x021a3080 }, - { _MMIO(0x9888), 0x041a31e5 }, - { _MMIO(0x9888), 0x02148000 }, - { _MMIO(0x9888), 0x0414a000 }, - { _MMIO(0x9888), 0x1c150054 }, - { _MMIO(0x9888), 0x06168000 }, - { _MMIO(0x9888), 0x08168000 }, - { _MMIO(0x9888), 0x0a168000 }, - { _MMIO(0x9888), 0x0c3a3280 }, - { _MMIO(0x9888), 0x0e3a0063 }, - { _MMIO(0x9888), 0x063a0061 }, - { _MMIO(0x9888), 0x023a0000 }, - { _MMIO(0x9888), 0x0c348000 }, - { _MMIO(0x9888), 0x0e342000 }, - { _MMIO(0x9888), 0x06342000 }, - { _MMIO(0x9888), 0x1e350140 }, - { _MMIO(0x9888), 0x1c350100 }, - { _MMIO(0x9888), 0x18360028 }, - { _MMIO(0x9888), 0x0c368000 }, - { _MMIO(0x9888), 0x0e5a3080 }, - { _MMIO(0x9888), 0x005a3280 }, - { _MMIO(0x9888), 0x025a0063 }, - { _MMIO(0x9888), 0x0e548000 }, - { _MMIO(0x9888), 0x00548000 }, - { _MMIO(0x9888), 0x02542000 }, - { _MMIO(0x9888), 0x1e550400 }, - { _MMIO(0x9888), 0x1a552000 }, - { _MMIO(0x9888), 0x1c550001 }, - { _MMIO(0x9888), 0x18560080 }, - { _MMIO(0x9888), 0x02568000 }, - { _MMIO(0x9888), 0x04568000 }, - { _MMIO(0x9888), 0x1993a800 }, - { _MMIO(0x9888), 0x03938000 }, - { _MMIO(0x9888), 0x05938000 }, - { _MMIO(0x9888), 0x07938000 }, - { _MMIO(0x9888), 0x09938000 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x0d938000 }, - { _MMIO(0x9888), 0x2d904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17904000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x1f904000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b900420 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4d900000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43900000 }, - { _MMIO(0x9888), 0x45901084 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47900001 }, -}; - -static int -get_tdl_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_1; - lens[n] = ARRAY_SIZE(mux_config_tdl_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_2[] = { - { _MMIO(0x9888), 0x141a026b }, - { _MMIO(0x9888), 0x143a0173 }, - { _MMIO(0x9888), 0x145a026b }, - { _MMIO(0x9888), 0x002d4000 }, - { _MMIO(0x9888), 0x022d5000 }, - { _MMIO(0x9888), 0x042d5000 }, - { _MMIO(0x9888), 0x062d1000 }, - { _MMIO(0x9888), 0x0c2e5000 }, - { _MMIO(0x9888), 0x0e2e0069 }, - { _MMIO(0x9888), 0x044c8000 }, - { _MMIO(0x9888), 0x064cc000 }, - { _MMIO(0x9888), 0x0a4c4000 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x024ea000 }, - { _MMIO(0x9888), 0x064e2000 }, - { _MMIO(0x9888), 0x180f6000 }, - { _MMIO(0x9888), 0x1a0f030a }, - { _MMIO(0x9888), 0x1a2c03c0 }, - { _MMIO(0x9888), 0x041a37e7 }, - { _MMIO(0x9888), 0x021a0000 }, - { _MMIO(0x9888), 0x0414a000 }, - { _MMIO(0x9888), 0x1c150050 }, - { _MMIO(0x9888), 0x08168000 }, - { _MMIO(0x9888), 0x0a168000 }, - { _MMIO(0x9888), 0x003a3380 }, - { _MMIO(0x9888), 0x063a006f }, - { _MMIO(0x9888), 0x023a0000 }, - { _MMIO(0x9888), 0x00348000 }, - { _MMIO(0x9888), 0x06342000 }, - { _MMIO(0x9888), 0x1a352000 }, - { _MMIO(0x9888), 0x1c350100 }, - { _MMIO(0x9888), 0x02368000 }, - { _MMIO(0x9888), 0x0c368000 }, - { _MMIO(0x9888), 0x025a37e7 }, - { _MMIO(0x9888), 0x0254a000 }, - { _MMIO(0x9888), 0x1c550005 }, - { _MMIO(0x9888), 0x04568000 }, - { _MMIO(0x9888), 0x06568000 }, - { _MMIO(0x9888), 0x03938000 }, - { _MMIO(0x9888), 0x05938000 }, - { _MMIO(0x9888), 0x07938000 }, - { _MMIO(0x9888), 0x09938000 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x0d938000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17904000 }, - { _MMIO(0x9888), 0x19904000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x1f904000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43900020 }, - { _MMIO(0x9888), 0x45901080 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x47900001 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_tdl_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_2; - lens[n] = ARRAY_SIZE(mux_config_tdl_2); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_extra[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_extra[] = { - { _MMIO(0xe458), 0x00001000 }, - { _MMIO(0xe558), 0x00003002 }, - { _MMIO(0xe658), 0x00005004 }, - { _MMIO(0xe758), 0x00011010 }, - { _MMIO(0xe45c), 0x00050012 }, - { _MMIO(0xe55c), 0x00052051 }, - { _MMIO(0xe65c), 0x00000008 }, -}; - -static const struct i915_oa_reg mux_config_compute_extra[] = { - { _MMIO(0x9888), 0x141a001f }, - { _MMIO(0x9888), 0x143a001f }, - { _MMIO(0x9888), 0x145a001f }, - { _MMIO(0x9888), 0x042d5000 }, - { _MMIO(0x9888), 0x062d1000 }, - { _MMIO(0x9888), 0x0e2e0094 }, - { _MMIO(0x9888), 0x084cc000 }, - { _MMIO(0x9888), 0x044ea000 }, - { _MMIO(0x9888), 0x1a0f00e0 }, - { _MMIO(0x9888), 0x1a2c0c00 }, - { _MMIO(0x9888), 0x061a0063 }, - { _MMIO(0x9888), 0x021a0000 }, - { _MMIO(0x9888), 0x06142000 }, - { _MMIO(0x9888), 0x1c150100 }, - { _MMIO(0x9888), 0x0c168000 }, - { _MMIO(0x9888), 0x043a3180 }, - { _MMIO(0x9888), 0x023a0000 }, - { _MMIO(0x9888), 0x04348000 }, - { _MMIO(0x9888), 0x1c350040 }, - { _MMIO(0x9888), 0x0a368000 }, - { _MMIO(0x9888), 0x045a0063 }, - { _MMIO(0x9888), 0x025a0000 }, - { _MMIO(0x9888), 0x04542000 }, - { _MMIO(0x9888), 0x1c550010 }, - { _MMIO(0x9888), 0x08568000 }, - { _MMIO(0x9888), 0x09938000 }, - { _MMIO(0x9888), 0x0b938000 }, - { _MMIO(0x9888), 0x0d938000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1d904000 }, - { _MMIO(0x9888), 0x1f904000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900400 }, - { _MMIO(0x9888), 0x47900004 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_compute_extra_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_extra; - lens[n] = ARRAY_SIZE(mux_config_compute_extra); - n++; - - return n; -} - static const struct i915_oa_reg b_counter_config_test_oa[] = { { _MMIO(0x2740), 0x00000000 }, { _MMIO(0x2744), 0x00800000 }, @@ -1681,922 +73,35 @@ static const struct i915_oa_reg mux_config_test_oa[] = { { _MMIO(0x9888), 0x33900000 }, }; -static int -get_test_oa_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_test_oa; - lens[n] = ARRAY_SIZE(mux_config_test_oa); - n++; - - return n; -} - -int i915_oa_select_metric_set_glk(struct drm_i915_private *dev_priv) -{ - dev_priv->perf.oa.n_mux_configs = 0; - dev_priv->perf.oa.b_counter_regs = NULL; - dev_priv->perf.oa.b_counter_regs_len = 0; - dev_priv->perf.oa.flex_regs = NULL; - dev_priv->perf.oa.flex_regs_len = 0; - - switch (dev_priv->perf.oa.metrics_set) { - case METRIC_SET_ID_RENDER_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_render_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_basic); - - return 0; - case METRIC_SET_ID_COMPUTE_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_compute_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_basic); - - return 0; - case METRIC_SET_ID_RENDER_PIPE_PROFILE: - dev_priv->perf.oa.n_mux_configs = - get_render_pipe_profile_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_PIPE_PROFILE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_pipe_profile; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_pipe_profile); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_pipe_profile; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_pipe_profile); - - return 0; - case METRIC_SET_ID_MEMORY_READS: - dev_priv->perf.oa.n_mux_configs = - get_memory_reads_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_READS\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_reads; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_reads); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_reads; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_reads); - - return 0; - case METRIC_SET_ID_MEMORY_WRITES: - dev_priv->perf.oa.n_mux_configs = - get_memory_writes_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_WRITES\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_writes; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_writes); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_writes; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_writes); - - return 0; - case METRIC_SET_ID_COMPUTE_EXTENDED: - dev_priv->perf.oa.n_mux_configs = - get_compute_extended_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTENDED\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_extended; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_extended); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_extended; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_extended); - - return 0; - case METRIC_SET_ID_COMPUTE_L3_CACHE: - dev_priv->perf.oa.n_mux_configs = - get_compute_l3_cache_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_L3_CACHE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_l3_cache; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_l3_cache); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_l3_cache; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_l3_cache); - - return 0; - case METRIC_SET_ID_HDC_AND_SF: - dev_priv->perf.oa.n_mux_configs = - get_hdc_and_sf_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"HDC_AND_SF\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_hdc_and_sf; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_hdc_and_sf); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_hdc_and_sf; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_hdc_and_sf); - - return 0; - case METRIC_SET_ID_L3_1: - dev_priv->perf.oa.n_mux_configs = - get_l3_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_1); - - return 0; - case METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND: - dev_priv->perf.oa.n_mux_configs = - get_rasterizer_and_pixel_backend_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RASTERIZER_AND_PIXEL_BACKEND\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_rasterizer_and_pixel_backend); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_rasterizer_and_pixel_backend); - - return 0; - case METRIC_SET_ID_SAMPLER: - dev_priv->perf.oa.n_mux_configs = - get_sampler_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"SAMPLER\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_sampler; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_sampler); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_sampler; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_sampler); - - return 0; - case METRIC_SET_ID_TDL_1: - dev_priv->perf.oa.n_mux_configs = - get_tdl_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_1); - - return 0; - case METRIC_SET_ID_TDL_2: - dev_priv->perf.oa.n_mux_configs = - get_tdl_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_2); - - return 0; - case METRIC_SET_ID_COMPUTE_EXTRA: - dev_priv->perf.oa.n_mux_configs = - get_compute_extra_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTRA\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_extra; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_extra); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_extra; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_extra); - - return 0; - case METRIC_SET_ID_TEST_OA: - dev_priv->perf.oa.n_mux_configs = - get_test_oa_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TEST_OA\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_test_oa; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_test_oa); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_test_oa; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_test_oa); - - return 0; - default: - return -ENODEV; - } -} - -static ssize_t -show_render_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_BASIC); -} - -static struct device_attribute dev_attr_render_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_render_basic[] = { - &dev_attr_render_basic_id.attr, - NULL, -}; - -static struct attribute_group group_render_basic = { - .name = "d72df5c7-5b4a-4274-a43f-00b0fd51fc68", - .attrs = attrs_render_basic, -}; - -static ssize_t -show_compute_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_BASIC); -} - -static struct device_attribute dev_attr_compute_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_basic[] = { - &dev_attr_compute_basic_id.attr, - NULL, -}; - -static struct attribute_group group_compute_basic = { - .name = "814285f6-354d-41d2-ba49-e24e622714a0", - .attrs = attrs_compute_basic, -}; - -static ssize_t -show_render_pipe_profile_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_PIPE_PROFILE); -} - -static struct device_attribute dev_attr_render_pipe_profile_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_pipe_profile_id, - .store = NULL, -}; - -static struct attribute *attrs_render_pipe_profile[] = { - &dev_attr_render_pipe_profile_id.attr, - NULL, -}; - -static struct attribute_group group_render_pipe_profile = { - .name = "07d397a6-b3e6-49f6-9433-a4f293d55978", - .attrs = attrs_render_pipe_profile, -}; - -static ssize_t -show_memory_reads_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_READS); -} - -static struct device_attribute dev_attr_memory_reads_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_reads_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_reads[] = { - &dev_attr_memory_reads_id.attr, - NULL, -}; - -static struct attribute_group group_memory_reads = { - .name = "1a356946-5428-450b-a2f0-89f8783a302d", - .attrs = attrs_memory_reads, -}; - -static ssize_t -show_memory_writes_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_WRITES); -} - -static struct device_attribute dev_attr_memory_writes_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_writes_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_writes[] = { - &dev_attr_memory_writes_id.attr, - NULL, -}; - -static struct attribute_group group_memory_writes = { - .name = "5299be9d-7a61-4c99-9f81-f87e6c5aaca9", - .attrs = attrs_memory_writes, -}; - -static ssize_t -show_compute_extended_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_EXTENDED); -} - -static struct device_attribute dev_attr_compute_extended_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_extended_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_extended[] = { - &dev_attr_compute_extended_id.attr, - NULL, -}; - -static struct attribute_group group_compute_extended = { - .name = "bc9bcff2-459a-4cbc-986d-a84b077153f3", - .attrs = attrs_compute_extended, -}; - -static ssize_t -show_compute_l3_cache_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_L3_CACHE); -} - -static struct device_attribute dev_attr_compute_l3_cache_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_l3_cache_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_l3_cache[] = { - &dev_attr_compute_l3_cache_id.attr, - NULL, -}; - -static struct attribute_group group_compute_l3_cache = { - .name = "88ec931f-5b4a-453a-9db6-a61232b6143d", - .attrs = attrs_compute_l3_cache, -}; - -static ssize_t -show_hdc_and_sf_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_HDC_AND_SF); -} - -static struct device_attribute dev_attr_hdc_and_sf_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_hdc_and_sf_id, - .store = NULL, -}; - -static struct attribute *attrs_hdc_and_sf[] = { - &dev_attr_hdc_and_sf_id.attr, - NULL, -}; - -static struct attribute_group group_hdc_and_sf = { - .name = "530d176d-2a18-4014-adf8-1500c6c60835", - .attrs = attrs_hdc_and_sf, -}; - -static ssize_t -show_l3_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_1); -} - -static struct device_attribute dev_attr_l3_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_1_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_1[] = { - &dev_attr_l3_1_id.attr, - NULL, -}; - -static struct attribute_group group_l3_1 = { - .name = "fdee5a5a-f23c-43d1-aa73-f6257c71671d", - .attrs = attrs_l3_1, -}; - -static ssize_t -show_rasterizer_and_pixel_backend_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND); -} - -static struct device_attribute dev_attr_rasterizer_and_pixel_backend_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_rasterizer_and_pixel_backend_id, - .store = NULL, -}; - -static struct attribute *attrs_rasterizer_and_pixel_backend[] = { - &dev_attr_rasterizer_and_pixel_backend_id.attr, - NULL, -}; - -static struct attribute_group group_rasterizer_and_pixel_backend = { - .name = "6617623e-ca73-4791-b2b7-ddedd0846a0c", - .attrs = attrs_rasterizer_and_pixel_backend, -}; - -static ssize_t -show_sampler_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_SAMPLER); -} - -static struct device_attribute dev_attr_sampler_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_sampler_id, - .store = NULL, -}; - -static struct attribute *attrs_sampler[] = { - &dev_attr_sampler_id.attr, - NULL, -}; - -static struct attribute_group group_sampler = { - .name = "f3b2ea63-e82e-4234-b418-44dd20dd34d0", - .attrs = attrs_sampler, -}; - -static ssize_t -show_tdl_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_1); -} - -static struct device_attribute dev_attr_tdl_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_1_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_1[] = { - &dev_attr_tdl_1_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_1 = { - .name = "14411d35-cbf6-4f5e-b68b-190faf9a1a83", - .attrs = attrs_tdl_1, -}; - -static ssize_t -show_tdl_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_2); -} - -static struct device_attribute dev_attr_tdl_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_2_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_2[] = { - &dev_attr_tdl_2_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_2 = { - .name = "ffa3f263-0478-4724-8c9f-c911c5ec0f1d", - .attrs = attrs_tdl_2, -}; - -static ssize_t -show_compute_extra_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_EXTRA); -} - -static struct device_attribute dev_attr_compute_extra_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_extra_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_extra[] = { - &dev_attr_compute_extra_id.attr, - NULL, -}; - -static struct attribute_group group_compute_extra = { - .name = "15274c82-27d2-4819-876a-7cb1a2c59ba4", - .attrs = attrs_compute_extra, -}; - static ssize_t show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", METRIC_SET_ID_TEST_OA); + return sprintf(buf, "1\n"); } -static struct device_attribute dev_attr_test_oa_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_test_oa_id, - .store = NULL, -}; - -static struct attribute *attrs_test_oa[] = { - &dev_attr_test_oa_id.attr, - NULL, -}; - -static struct attribute_group group_test_oa = { - .name = "dd3fd789-e783-4204-8cd0-b671bbccb0cf", - .attrs = attrs_test_oa, -}; - -int -i915_perf_register_sysfs_glk(struct drm_i915_private *dev_priv) +void +i915_perf_load_test_config_glk(struct drm_i915_private *dev_priv) { - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; - int ret = 0; + strncpy(dev_priv->perf.oa.test_config.uuid, + "dd3fd789-e783-4204-8cd0-b671bbccb0cf", + UUID_STRING_LEN); + dev_priv->perf.oa.test_config.id = 1; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (ret) - goto error_render_basic; - } - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (ret) - goto error_compute_basic; - } - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (ret) - goto error_render_pipe_profile; - } - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (ret) - goto error_memory_reads; - } - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (ret) - goto error_memory_writes; - } - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (ret) - goto error_compute_extended; - } - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); - if (ret) - goto error_compute_l3_cache; - } - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (ret) - goto error_hdc_and_sf; - } - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (ret) - goto error_l3_1; - } - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (ret) - goto error_rasterizer_and_pixel_backend; - } - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_sampler); - if (ret) - goto error_sampler; - } - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (ret) - goto error_tdl_1; - } - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (ret) - goto error_tdl_2; - } - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extra); - if (ret) - goto error_compute_extra; - } - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_test_oa); - if (ret) - goto error_test_oa; - } + dev_priv->perf.oa.test_config.mux_regs = mux_config_test_oa; + dev_priv->perf.oa.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa); - return 0; + dev_priv->perf.oa.test_config.b_counter_regs = b_counter_config_test_oa; + dev_priv->perf.oa.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa); -error_test_oa: - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extra); -error_compute_extra: - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); -error_tdl_2: - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); -error_tdl_1: - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler); -error_sampler: - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); -error_rasterizer_and_pixel_backend: - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); -error_l3_1: - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); -error_hdc_and_sf: - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); -error_compute_l3_cache: - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); -error_compute_extended: - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); -error_memory_writes: - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); -error_memory_reads: - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); -error_render_pipe_profile: - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); -error_compute_basic: - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); -error_render_basic: - return ret; -} + dev_priv->perf.oa.test_config.flex_regs = flex_eu_config_test_oa; + dev_priv->perf.oa.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa); -void -i915_perf_unregister_sysfs_glk(struct drm_i915_private *dev_priv) -{ - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; + dev_priv->perf.oa.test_config.sysfs_metric.name = "dd3fd789-e783-4204-8cd0-b671bbccb0cf"; + dev_priv->perf.oa.test_config.sysfs_metric.attrs = dev_priv->perf.oa.test_config.attrs; + + dev_priv->perf.oa.test_config.attrs[0] = &dev_priv->perf.oa.test_config.sysfs_metric_id.attr; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler); - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extra); - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_test_oa); + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.name = "id"; + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.mode = 0444; + dev_priv->perf.oa.test_config.sysfs_metric_id.show = show_test_oa_id; } diff --git a/drivers/gpu/drm/i915/i915_oa_glk.h b/drivers/gpu/drm/i915/i915_oa_glk.h index 5511bb1cecf7..63bd113f4bc9 100644 --- a/drivers/gpu/drm/i915/i915_oa_glk.h +++ b/drivers/gpu/drm/i915/i915_oa_glk.h @@ -29,12 +29,6 @@ #ifndef __I915_OA_GLK_H__ #define __I915_OA_GLK_H__ -extern int i915_oa_n_builtin_metric_sets_glk; - -extern int i915_oa_select_metric_set_glk(struct drm_i915_private *dev_priv); - -extern int i915_perf_register_sysfs_glk(struct drm_i915_private *dev_priv); - -extern void i915_perf_unregister_sysfs_glk(struct drm_i915_private *dev_priv); +extern void i915_perf_load_test_config_glk(struct drm_i915_private *dev_priv); #endif diff --git a/drivers/gpu/drm/i915/i915_oa_hsw.c b/drivers/gpu/drm/i915/i915_oa_hsw.c index 10f169f683b7..867ec16dd831 100644 --- a/drivers/gpu/drm/i915/i915_oa_hsw.c +++ b/drivers/gpu/drm/i915/i915_oa_hsw.c @@ -31,17 +31,6 @@ #include "i915_drv.h" #include "i915_oa_hsw.h" -enum metric_set_id { - METRIC_SET_ID_RENDER_BASIC = 1, - METRIC_SET_ID_COMPUTE_BASIC, - METRIC_SET_ID_COMPUTE_EXTENDED, - METRIC_SET_ID_MEMORY_READS, - METRIC_SET_ID_MEMORY_WRITES, - METRIC_SET_ID_SAMPLER_BALANCE, -}; - -int i915_oa_n_builtin_metric_sets_hsw = 6; - static const struct i915_oa_reg b_counter_config_render_basic[] = { { _MMIO(0x2724), 0x00800000 }, { _MMIO(0x2720), 0x00000000 }, @@ -114,750 +103,35 @@ static const struct i915_oa_reg mux_config_render_basic[] = { { _MMIO(0x25428), 0x00042049 }, }; -static int -get_render_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_render_basic; - lens[n] = ARRAY_SIZE(mux_config_render_basic); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2718), 0xaaaaaaaa }, - { _MMIO(0x271c), 0xaaaaaaaa }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2728), 0xaaaaaaaa }, - { _MMIO(0x272c), 0xaaaaaaaa }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00000000 }, - { _MMIO(0x2748), 0x00000000 }, - { _MMIO(0x274c), 0x00000000 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2754), 0x00000000 }, - { _MMIO(0x2758), 0x00000000 }, - { _MMIO(0x275c), 0x00000000 }, - { _MMIO(0x236c), 0x00000000 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_basic[] = { -}; - -static const struct i915_oa_reg mux_config_compute_basic[] = { - { _MMIO(0x253a4), 0x00000000 }, - { _MMIO(0x2681c), 0x01f00800 }, - { _MMIO(0x26820), 0x00001000 }, - { _MMIO(0x2781c), 0x01f00800 }, - { _MMIO(0x26520), 0x00000007 }, - { _MMIO(0x265a0), 0x00000007 }, - { _MMIO(0x25380), 0x00000010 }, - { _MMIO(0x2538c), 0x00300000 }, - { _MMIO(0x25384), 0xaa8aaaaa }, - { _MMIO(0x25404), 0xffffffff }, - { _MMIO(0x26800), 0x00004202 }, - { _MMIO(0x26808), 0x00605817 }, - { _MMIO(0x2680c), 0x10001005 }, - { _MMIO(0x26804), 0x00000000 }, - { _MMIO(0x27800), 0x00000102 }, - { _MMIO(0x27808), 0x0c0701e0 }, - { _MMIO(0x2780c), 0x000200a0 }, - { _MMIO(0x27804), 0x00000000 }, - { _MMIO(0x26484), 0x44000000 }, - { _MMIO(0x26704), 0x44000000 }, - { _MMIO(0x26500), 0x00000006 }, - { _MMIO(0x26510), 0x00000001 }, - { _MMIO(0x26504), 0x88000000 }, - { _MMIO(0x26580), 0x00000006 }, - { _MMIO(0x26590), 0x00000020 }, - { _MMIO(0x26584), 0x00000000 }, - { _MMIO(0x26104), 0x55822222 }, - { _MMIO(0x26184), 0xaa866666 }, - { _MMIO(0x25420), 0x08320c83 }, - { _MMIO(0x25424), 0x06820c83 }, - { _MMIO(0x2541c), 0x00000000 }, - { _MMIO(0x25428), 0x00000c03 }, -}; - -static int -get_compute_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_basic; - lens[n] = ARRAY_SIZE(mux_config_compute_basic); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_extended[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2770), 0x0007fe2a }, - { _MMIO(0x2774), 0x0000ff00 }, - { _MMIO(0x2778), 0x0007fe6a }, - { _MMIO(0x277c), 0x0000ff00 }, - { _MMIO(0x2780), 0x0007fe92 }, - { _MMIO(0x2784), 0x0000ff00 }, - { _MMIO(0x2788), 0x0007fea2 }, - { _MMIO(0x278c), 0x0000ff00 }, - { _MMIO(0x2790), 0x0007fe32 }, - { _MMIO(0x2794), 0x0000ff00 }, - { _MMIO(0x2798), 0x0007fe9a }, - { _MMIO(0x279c), 0x0000ff00 }, - { _MMIO(0x27a0), 0x0007ff23 }, - { _MMIO(0x27a4), 0x0000ff00 }, - { _MMIO(0x27a8), 0x0007fff3 }, - { _MMIO(0x27ac), 0x0000fffe }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_extended[] = { -}; - -static const struct i915_oa_reg mux_config_compute_extended[] = { - { _MMIO(0x2681c), 0x3eb00800 }, - { _MMIO(0x26820), 0x00900000 }, - { _MMIO(0x25384), 0x02aaaaaa }, - { _MMIO(0x25404), 0x03ffffff }, - { _MMIO(0x26800), 0x00142284 }, - { _MMIO(0x26808), 0x0e629062 }, - { _MMIO(0x2680c), 0x3f6f55cb }, - { _MMIO(0x26810), 0x00000014 }, - { _MMIO(0x26804), 0x00000000 }, - { _MMIO(0x26104), 0x02aaaaaa }, - { _MMIO(0x26184), 0x02aaaaaa }, - { _MMIO(0x25420), 0x00000000 }, - { _MMIO(0x25424), 0x00000000 }, - { _MMIO(0x2541c), 0x00000000 }, - { _MMIO(0x25428), 0x00000000 }, -}; - -static int -get_compute_extended_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_extended; - lens[n] = ARRAY_SIZE(mux_config_compute_extended); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_reads[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x76543298 }, - { _MMIO(0x2748), 0x98989898 }, - { _MMIO(0x2744), 0x000000e4 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0x98a98a98 }, - { _MMIO(0x2758), 0x88888888 }, - { _MMIO(0x2754), 0x000c5500 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fc00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fc00 }, - { _MMIO(0x2780), 0x0007f872 }, - { _MMIO(0x2784), 0x0000fc00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fc00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fc00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fc00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fc00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fc00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_reads[] = { -}; - -static const struct i915_oa_reg mux_config_memory_reads[] = { - { _MMIO(0x253a4), 0x34300000 }, - { _MMIO(0x25440), 0x2d800000 }, - { _MMIO(0x25444), 0x00000008 }, - { _MMIO(0x25128), 0x0e600000 }, - { _MMIO(0x25380), 0x00000450 }, - { _MMIO(0x25390), 0x00052c43 }, - { _MMIO(0x25384), 0x00000000 }, - { _MMIO(0x25400), 0x00006144 }, - { _MMIO(0x25408), 0x0a418820 }, - { _MMIO(0x2540c), 0x000820e6 }, - { _MMIO(0x25404), 0xff500000 }, - { _MMIO(0x25100), 0x000005d6 }, - { _MMIO(0x2510c), 0x0ef00000 }, - { _MMIO(0x25104), 0x00000000 }, - { _MMIO(0x25420), 0x02108421 }, - { _MMIO(0x25424), 0x00008421 }, - { _MMIO(0x2541c), 0x00000000 }, - { _MMIO(0x25428), 0x00000000 }, -}; - -static int -get_memory_reads_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_memory_reads; - lens[n] = ARRAY_SIZE(mux_config_memory_reads); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_writes[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x76543298 }, - { _MMIO(0x2748), 0x98989898 }, - { _MMIO(0x2744), 0x000000e4 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0xbabababa }, - { _MMIO(0x2758), 0x88888888 }, - { _MMIO(0x2754), 0x000c5500 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fc00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fc00 }, - { _MMIO(0x2780), 0x0007f822 }, - { _MMIO(0x2784), 0x0000fc00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fc00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fc00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fc00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fc00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fc00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_writes[] = { -}; - -static const struct i915_oa_reg mux_config_memory_writes[] = { - { _MMIO(0x253a4), 0x34300000 }, - { _MMIO(0x25440), 0x01500000 }, - { _MMIO(0x25444), 0x00000120 }, - { _MMIO(0x25128), 0x0c200000 }, - { _MMIO(0x25380), 0x00000450 }, - { _MMIO(0x25390), 0x00052c43 }, - { _MMIO(0x25384), 0x00000000 }, - { _MMIO(0x25400), 0x00007184 }, - { _MMIO(0x25408), 0x0a418820 }, - { _MMIO(0x2540c), 0x000820e6 }, - { _MMIO(0x25404), 0xff500000 }, - { _MMIO(0x25100), 0x000005d6 }, - { _MMIO(0x2510c), 0x1e700000 }, - { _MMIO(0x25104), 0x00000000 }, - { _MMIO(0x25420), 0x02108421 }, - { _MMIO(0x25424), 0x00008421 }, - { _MMIO(0x2541c), 0x00000000 }, - { _MMIO(0x25428), 0x00000000 }, -}; - -static int -get_memory_writes_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_memory_writes; - lens[n] = ARRAY_SIZE(mux_config_memory_writes); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_sampler_balance[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, -}; - -static const struct i915_oa_reg flex_eu_config_sampler_balance[] = { -}; - -static const struct i915_oa_reg mux_config_sampler_balance[] = { - { _MMIO(0x2eb9c), 0x01906400 }, - { _MMIO(0x2fb9c), 0x01906400 }, - { _MMIO(0x253a4), 0x00000000 }, - { _MMIO(0x26b9c), 0x01906400 }, - { _MMIO(0x27b9c), 0x01906400 }, - { _MMIO(0x27104), 0x00a00000 }, - { _MMIO(0x27184), 0x00a50000 }, - { _MMIO(0x2e804), 0x00500000 }, - { _MMIO(0x2e984), 0x00500000 }, - { _MMIO(0x2eb04), 0x00500000 }, - { _MMIO(0x2eb80), 0x00000084 }, - { _MMIO(0x2eb8c), 0x14200000 }, - { _MMIO(0x2eb84), 0x00000000 }, - { _MMIO(0x2f804), 0x00050000 }, - { _MMIO(0x2f984), 0x00050000 }, - { _MMIO(0x2fb04), 0x00050000 }, - { _MMIO(0x2fb80), 0x00000084 }, - { _MMIO(0x2fb8c), 0x00050800 }, - { _MMIO(0x2fb84), 0x00000000 }, - { _MMIO(0x25380), 0x00000010 }, - { _MMIO(0x2538c), 0x000000c0 }, - { _MMIO(0x25384), 0xaa550000 }, - { _MMIO(0x25404), 0xffffc000 }, - { _MMIO(0x26804), 0x50000000 }, - { _MMIO(0x26984), 0x50000000 }, - { _MMIO(0x26b04), 0x50000000 }, - { _MMIO(0x26b80), 0x00000084 }, - { _MMIO(0x26b90), 0x00050800 }, - { _MMIO(0x26b84), 0x00000000 }, - { _MMIO(0x27804), 0x05000000 }, - { _MMIO(0x27984), 0x05000000 }, - { _MMIO(0x27b04), 0x05000000 }, - { _MMIO(0x27b80), 0x00000084 }, - { _MMIO(0x27b90), 0x00000142 }, - { _MMIO(0x27b84), 0x00000000 }, - { _MMIO(0x26104), 0xa0000000 }, - { _MMIO(0x26184), 0xa5000000 }, - { _MMIO(0x25424), 0x00008620 }, - { _MMIO(0x2541c), 0x00000000 }, - { _MMIO(0x25428), 0x0004a54a }, -}; - -static int -get_sampler_balance_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_sampler_balance; - lens[n] = ARRAY_SIZE(mux_config_sampler_balance); - n++; - - return n; -} - -int i915_oa_select_metric_set_hsw(struct drm_i915_private *dev_priv) -{ - dev_priv->perf.oa.n_mux_configs = 0; - dev_priv->perf.oa.b_counter_regs = NULL; - dev_priv->perf.oa.b_counter_regs_len = 0; - - switch (dev_priv->perf.oa.metrics_set) { - case METRIC_SET_ID_RENDER_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_render_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_basic); - - return 0; - case METRIC_SET_ID_COMPUTE_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_compute_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_basic); - - return 0; - case METRIC_SET_ID_COMPUTE_EXTENDED: - dev_priv->perf.oa.n_mux_configs = - get_compute_extended_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTENDED\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_extended; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_extended); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_extended; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_extended); - - return 0; - case METRIC_SET_ID_MEMORY_READS: - dev_priv->perf.oa.n_mux_configs = - get_memory_reads_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_READS\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_reads; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_reads); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_reads; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_reads); - - return 0; - case METRIC_SET_ID_MEMORY_WRITES: - dev_priv->perf.oa.n_mux_configs = - get_memory_writes_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_WRITES\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_writes; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_writes); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_writes; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_writes); - - return 0; - case METRIC_SET_ID_SAMPLER_BALANCE: - dev_priv->perf.oa.n_mux_configs = - get_sampler_balance_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"SAMPLER_BALANCE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_sampler_balance; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_sampler_balance); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_sampler_balance; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_sampler_balance); - - return 0; - default: - return -ENODEV; - } -} - static ssize_t show_render_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_BASIC); -} - -static struct device_attribute dev_attr_render_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_render_basic[] = { - &dev_attr_render_basic_id.attr, - NULL, -}; - -static struct attribute_group group_render_basic = { - .name = "403d8832-1a27-4aa6-a64e-f5389ce7b212", - .attrs = attrs_render_basic, -}; - -static ssize_t -show_compute_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_BASIC); -} - -static struct device_attribute dev_attr_compute_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_basic[] = { - &dev_attr_compute_basic_id.attr, - NULL, -}; - -static struct attribute_group group_compute_basic = { - .name = "39ad14bc-2380-45c4-91eb-fbcb3aa7ae7b", - .attrs = attrs_compute_basic, -}; - -static ssize_t -show_compute_extended_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_EXTENDED); + return sprintf(buf, "1\n"); } -static struct device_attribute dev_attr_compute_extended_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_extended_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_extended[] = { - &dev_attr_compute_extended_id.attr, - NULL, -}; - -static struct attribute_group group_compute_extended = { - .name = "3865be28-6982-49fe-9494-e4d1b4795413", - .attrs = attrs_compute_extended, -}; - -static ssize_t -show_memory_reads_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_READS); -} - -static struct device_attribute dev_attr_memory_reads_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_reads_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_reads[] = { - &dev_attr_memory_reads_id.attr, - NULL, -}; - -static struct attribute_group group_memory_reads = { - .name = "bb5ed49b-2497-4095-94f6-26ba294db88a", - .attrs = attrs_memory_reads, -}; - -static ssize_t -show_memory_writes_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_WRITES); -} - -static struct device_attribute dev_attr_memory_writes_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_writes_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_writes[] = { - &dev_attr_memory_writes_id.attr, - NULL, -}; - -static struct attribute_group group_memory_writes = { - .name = "3358d639-9b5f-45ab-976d-9b08cbfc6240", - .attrs = attrs_memory_writes, -}; - -static ssize_t -show_sampler_balance_id(struct device *kdev, struct device_attribute *attr, char *buf) +void +i915_perf_load_test_config_hsw(struct drm_i915_private *dev_priv) { - return sprintf(buf, "%d\n", METRIC_SET_ID_SAMPLER_BALANCE); -} - -static struct device_attribute dev_attr_sampler_balance_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_sampler_balance_id, - .store = NULL, -}; + strncpy(dev_priv->perf.oa.test_config.uuid, + "403d8832-1a27-4aa6-a64e-f5389ce7b212", + UUID_STRING_LEN); + dev_priv->perf.oa.test_config.id = 1; -static struct attribute *attrs_sampler_balance[] = { - &dev_attr_sampler_balance_id.attr, - NULL, -}; + dev_priv->perf.oa.test_config.mux_regs = mux_config_render_basic; + dev_priv->perf.oa.test_config.mux_regs_len = ARRAY_SIZE(mux_config_render_basic); -static struct attribute_group group_sampler_balance = { - .name = "bc274488-b4b6-40c7-90da-b77d7ad16189", - .attrs = attrs_sampler_balance, -}; + dev_priv->perf.oa.test_config.b_counter_regs = b_counter_config_render_basic; + dev_priv->perf.oa.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_render_basic); -int -i915_perf_register_sysfs_hsw(struct drm_i915_private *dev_priv) -{ - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; - int ret = 0; + dev_priv->perf.oa.test_config.flex_regs = flex_eu_config_render_basic; + dev_priv->perf.oa.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_render_basic); - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (ret) - goto error_render_basic; - } - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (ret) - goto error_compute_basic; - } - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (ret) - goto error_compute_extended; - } - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (ret) - goto error_memory_reads; - } - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (ret) - goto error_memory_writes; - } - if (get_sampler_balance_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_sampler_balance); - if (ret) - goto error_sampler_balance; - } + dev_priv->perf.oa.test_config.sysfs_metric.name = "403d8832-1a27-4aa6-a64e-f5389ce7b212"; + dev_priv->perf.oa.test_config.sysfs_metric.attrs = dev_priv->perf.oa.test_config.attrs; - return 0; - -error_sampler_balance: - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); -error_memory_writes: - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); -error_memory_reads: - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); -error_compute_extended: - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); -error_compute_basic: - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); -error_render_basic: - return ret; -} - -void -i915_perf_unregister_sysfs_hsw(struct drm_i915_private *dev_priv) -{ - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; + dev_priv->perf.oa.test_config.attrs[0] = &dev_priv->perf.oa.test_config.sysfs_metric_id.attr; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (get_sampler_balance_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler_balance); + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.name = "id"; + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.mode = 0444; + dev_priv->perf.oa.test_config.sysfs_metric_id.show = show_render_basic_id; } diff --git a/drivers/gpu/drm/i915/i915_oa_hsw.h b/drivers/gpu/drm/i915/i915_oa_hsw.h index 6fe7e0690ef3..74d03439c157 100644 --- a/drivers/gpu/drm/i915/i915_oa_hsw.h +++ b/drivers/gpu/drm/i915/i915_oa_hsw.h @@ -29,12 +29,6 @@ #ifndef __I915_OA_HSW_H__ #define __I915_OA_HSW_H__ -extern int i915_oa_n_builtin_metric_sets_hsw; - -extern int i915_oa_select_metric_set_hsw(struct drm_i915_private *dev_priv); - -extern int i915_perf_register_sysfs_hsw(struct drm_i915_private *dev_priv); - -extern void i915_perf_unregister_sysfs_hsw(struct drm_i915_private *dev_priv); +extern void i915_perf_load_test_config_hsw(struct drm_i915_private *dev_priv); #endif diff --git a/drivers/gpu/drm/i915/i915_oa_kblgt2.c b/drivers/gpu/drm/i915/i915_oa_kblgt2.c index 87dbd0a0b076..2e8700c74227 100644 --- a/drivers/gpu/drm/i915/i915_oa_kblgt2.c +++ b/drivers/gpu/drm/i915/i915_oa_kblgt2.c @@ -31,1828 +31,6 @@ #include "i915_drv.h" #include "i915_oa_kblgt2.h" -enum metric_set_id { - METRIC_SET_ID_RENDER_BASIC = 1, - METRIC_SET_ID_COMPUTE_BASIC, - METRIC_SET_ID_RENDER_PIPE_PROFILE, - METRIC_SET_ID_MEMORY_READS, - METRIC_SET_ID_MEMORY_WRITES, - METRIC_SET_ID_COMPUTE_EXTENDED, - METRIC_SET_ID_COMPUTE_L3_CACHE, - METRIC_SET_ID_HDC_AND_SF, - METRIC_SET_ID_L3_1, - METRIC_SET_ID_L3_2, - METRIC_SET_ID_L3_3, - METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND, - METRIC_SET_ID_SAMPLER, - METRIC_SET_ID_TDL_1, - METRIC_SET_ID_TDL_2, - METRIC_SET_ID_COMPUTE_EXTRA, - METRIC_SET_ID_VME_PIPE, - METRIC_SET_ID_TEST_OA, -}; - -int i915_oa_n_builtin_metric_sets_kblgt2 = 18; - -static const struct i915_oa_reg b_counter_config_render_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2740), 0x00000000 }, -}; - -static const struct i915_oa_reg flex_eu_config_render_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_render_basic[] = { - { _MMIO(0x9888), 0x166c01e0 }, - { _MMIO(0x9888), 0x12170280 }, - { _MMIO(0x9888), 0x12370280 }, - { _MMIO(0x9888), 0x11930317 }, - { _MMIO(0x9888), 0x159303df }, - { _MMIO(0x9888), 0x3f900003 }, - { _MMIO(0x9888), 0x1a4e0080 }, - { _MMIO(0x9888), 0x0a6c0053 }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x0a1b4000 }, - { _MMIO(0x9888), 0x1c1c0001 }, - { _MMIO(0x9888), 0x002f1000 }, - { _MMIO(0x9888), 0x042f1000 }, - { _MMIO(0x9888), 0x004c4000 }, - { _MMIO(0x9888), 0x0a4c8400 }, - { _MMIO(0x9888), 0x000d2000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0d2000 }, - { _MMIO(0x9888), 0x0c0f0400 }, - { _MMIO(0x9888), 0x0e0f6600 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x162c2200 }, - { _MMIO(0x9888), 0x062d8000 }, - { _MMIO(0x9888), 0x082d8000 }, - { _MMIO(0x9888), 0x00133000 }, - { _MMIO(0x9888), 0x08133000 }, - { _MMIO(0x9888), 0x00170020 }, - { _MMIO(0x9888), 0x08170021 }, - { _MMIO(0x9888), 0x10170000 }, - { _MMIO(0x9888), 0x0633c000 }, - { _MMIO(0x9888), 0x0833c000 }, - { _MMIO(0x9888), 0x06370800 }, - { _MMIO(0x9888), 0x08370840 }, - { _MMIO(0x9888), 0x10370000 }, - { _MMIO(0x9888), 0x0d933031 }, - { _MMIO(0x9888), 0x0f933e3f }, - { _MMIO(0x9888), 0x01933d00 }, - { _MMIO(0x9888), 0x0393073c }, - { _MMIO(0x9888), 0x0593000e }, - { _MMIO(0x9888), 0x1d930000 }, - { _MMIO(0x9888), 0x19930000 }, - { _MMIO(0x9888), 0x1b930000 }, - { _MMIO(0x9888), 0x1d900157 }, - { _MMIO(0x9888), 0x1f900158 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x2b908000 }, - { _MMIO(0x9888), 0x2d908000 }, - { _MMIO(0x9888), 0x2f908000 }, - { _MMIO(0x9888), 0x31908000 }, - { _MMIO(0x9888), 0x15908000 }, - { _MMIO(0x9888), 0x17908000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1190001f }, - { _MMIO(0x9888), 0x51904400 }, - { _MMIO(0x9888), 0x41900020 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900c21 }, - { _MMIO(0x9888), 0x47900061 }, - { _MMIO(0x9888), 0x57904440 }, - { _MMIO(0x9888), 0x49900000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x59900004 }, - { _MMIO(0x9888), 0x43900000 }, - { _MMIO(0x9888), 0x53904444 }, -}; - -static int -get_render_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_render_basic; - lens[n] = ARRAY_SIZE(mux_config_render_basic); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2740), 0x00000000 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_compute_basic[] = { - { _MMIO(0x9888), 0x104f00e0 }, - { _MMIO(0x9888), 0x124f1c00 }, - { _MMIO(0x9888), 0x106c00e0 }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f900003 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x1a4e0820 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x064f0900 }, - { _MMIO(0x9888), 0x084f0032 }, - { _MMIO(0x9888), 0x0a4f1891 }, - { _MMIO(0x9888), 0x0c4f0e00 }, - { _MMIO(0x9888), 0x0e4f003c }, - { _MMIO(0x9888), 0x004f0d80 }, - { _MMIO(0x9888), 0x024f003b }, - { _MMIO(0x9888), 0x006c0002 }, - { _MMIO(0x9888), 0x086c0100 }, - { _MMIO(0x9888), 0x0c6c000c }, - { _MMIO(0x9888), 0x0e6c0b00 }, - { _MMIO(0x9888), 0x186c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x001b4000 }, - { _MMIO(0x9888), 0x081b8000 }, - { _MMIO(0x9888), 0x0c1b4000 }, - { _MMIO(0x9888), 0x0e1b8000 }, - { _MMIO(0x9888), 0x101c8000 }, - { _MMIO(0x9888), 0x1a1c8000 }, - { _MMIO(0x9888), 0x1c1c0024 }, - { _MMIO(0x9888), 0x065b8000 }, - { _MMIO(0x9888), 0x085b4000 }, - { _MMIO(0x9888), 0x0a5bc000 }, - { _MMIO(0x9888), 0x0c5b8000 }, - { _MMIO(0x9888), 0x0e5b4000 }, - { _MMIO(0x9888), 0x005b8000 }, - { _MMIO(0x9888), 0x025b4000 }, - { _MMIO(0x9888), 0x1a5c6000 }, - { _MMIO(0x9888), 0x1c5c001b }, - { _MMIO(0x9888), 0x125c8000 }, - { _MMIO(0x9888), 0x145c8000 }, - { _MMIO(0x9888), 0x004c8000 }, - { _MMIO(0x9888), 0x0a4c2000 }, - { _MMIO(0x9888), 0x0c4c0208 }, - { _MMIO(0x9888), 0x000da000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x020d2000 }, - { _MMIO(0x9888), 0x0c0f5400 }, - { _MMIO(0x9888), 0x0e0f5500 }, - { _MMIO(0x9888), 0x100f0155 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2cc000 }, - { _MMIO(0x9888), 0x162cfb00 }, - { _MMIO(0x9888), 0x182c00be }, - { _MMIO(0x9888), 0x022cc000 }, - { _MMIO(0x9888), 0x042cc000 }, - { _MMIO(0x9888), 0x19900157 }, - { _MMIO(0x9888), 0x1b900158 }, - { _MMIO(0x9888), 0x1d900105 }, - { _MMIO(0x9888), 0x1f900103 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x11900fff }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900800 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900821 }, - { _MMIO(0x9888), 0x47900802 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900802 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900002 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900422 }, - { _MMIO(0x9888), 0x53904444 }, -}; - -static int -get_compute_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_basic; - lens[n] = ARRAY_SIZE(mux_config_compute_basic); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_render_pipe_profile[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007ffea }, - { _MMIO(0x2774), 0x00007ffc }, - { _MMIO(0x2778), 0x0007affa }, - { _MMIO(0x277c), 0x0000f5fd }, - { _MMIO(0x2780), 0x00079ffa }, - { _MMIO(0x2784), 0x0000f3fb }, - { _MMIO(0x2788), 0x0007bf7a }, - { _MMIO(0x278c), 0x0000f7e7 }, - { _MMIO(0x2790), 0x0007fefa }, - { _MMIO(0x2794), 0x0000f7cf }, - { _MMIO(0x2798), 0x00077ffa }, - { _MMIO(0x279c), 0x0000efdf }, - { _MMIO(0x27a0), 0x0006fffa }, - { _MMIO(0x27a4), 0x0000cfbf }, - { _MMIO(0x27a8), 0x0003fffa }, - { _MMIO(0x27ac), 0x00005f7f }, -}; - -static const struct i915_oa_reg flex_eu_config_render_pipe_profile[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_render_pipe_profile[] = { - { _MMIO(0x9888), 0x0c0e001f }, - { _MMIO(0x9888), 0x0a0f0000 }, - { _MMIO(0x9888), 0x10116800 }, - { _MMIO(0x9888), 0x178a03e0 }, - { _MMIO(0x9888), 0x11824c00 }, - { _MMIO(0x9888), 0x11830020 }, - { _MMIO(0x9888), 0x13840020 }, - { _MMIO(0x9888), 0x11850019 }, - { _MMIO(0x9888), 0x11860007 }, - { _MMIO(0x9888), 0x01870c40 }, - { _MMIO(0x9888), 0x17880000 }, - { _MMIO(0x9888), 0x022f4000 }, - { _MMIO(0x9888), 0x0a4c0040 }, - { _MMIO(0x9888), 0x0c0d8000 }, - { _MMIO(0x9888), 0x040d4000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x020e5400 }, - { _MMIO(0x9888), 0x000e0000 }, - { _MMIO(0x9888), 0x080f0040 }, - { _MMIO(0x9888), 0x000f0000 }, - { _MMIO(0x9888), 0x100f0000 }, - { _MMIO(0x9888), 0x0e0f0040 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x06104000 }, - { _MMIO(0x9888), 0x06110012 }, - { _MMIO(0x9888), 0x06131000 }, - { _MMIO(0x9888), 0x01898000 }, - { _MMIO(0x9888), 0x0d890100 }, - { _MMIO(0x9888), 0x03898000 }, - { _MMIO(0x9888), 0x09808000 }, - { _MMIO(0x9888), 0x0b808000 }, - { _MMIO(0x9888), 0x0380c000 }, - { _MMIO(0x9888), 0x0f8a0075 }, - { _MMIO(0x9888), 0x1d8a0000 }, - { _MMIO(0x9888), 0x118a8000 }, - { _MMIO(0x9888), 0x1b8a4000 }, - { _MMIO(0x9888), 0x138a8000 }, - { _MMIO(0x9888), 0x1d81a000 }, - { _MMIO(0x9888), 0x15818000 }, - { _MMIO(0x9888), 0x17818000 }, - { _MMIO(0x9888), 0x0b820030 }, - { _MMIO(0x9888), 0x07828000 }, - { _MMIO(0x9888), 0x0d824000 }, - { _MMIO(0x9888), 0x0f828000 }, - { _MMIO(0x9888), 0x05824000 }, - { _MMIO(0x9888), 0x0d830003 }, - { _MMIO(0x9888), 0x0583000c }, - { _MMIO(0x9888), 0x09830000 }, - { _MMIO(0x9888), 0x03838000 }, - { _MMIO(0x9888), 0x07838000 }, - { _MMIO(0x9888), 0x0b840980 }, - { _MMIO(0x9888), 0x03844d80 }, - { _MMIO(0x9888), 0x11840000 }, - { _MMIO(0x9888), 0x09848000 }, - { _MMIO(0x9888), 0x09850080 }, - { _MMIO(0x9888), 0x03850003 }, - { _MMIO(0x9888), 0x01850000 }, - { _MMIO(0x9888), 0x07860000 }, - { _MMIO(0x9888), 0x0f860400 }, - { _MMIO(0x9888), 0x09870032 }, - { _MMIO(0x9888), 0x01888052 }, - { _MMIO(0x9888), 0x11880000 }, - { _MMIO(0x9888), 0x09884000 }, - { _MMIO(0x9888), 0x1b931001 }, - { _MMIO(0x9888), 0x1d930001 }, - { _MMIO(0x9888), 0x19934000 }, - { _MMIO(0x9888), 0x1b958000 }, - { _MMIO(0x9888), 0x1d950094 }, - { _MMIO(0x9888), 0x19958000 }, - { _MMIO(0x9888), 0x09e58000 }, - { _MMIO(0x9888), 0x0be58000 }, - { _MMIO(0x9888), 0x03e5c000 }, - { _MMIO(0x9888), 0x0592c000 }, - { _MMIO(0x9888), 0x0b928000 }, - { _MMIO(0x9888), 0x0d924000 }, - { _MMIO(0x9888), 0x0f924000 }, - { _MMIO(0x9888), 0x11928000 }, - { _MMIO(0x9888), 0x1392c000 }, - { _MMIO(0x9888), 0x09924000 }, - { _MMIO(0x9888), 0x01985000 }, - { _MMIO(0x9888), 0x07988000 }, - { _MMIO(0x9888), 0x09981000 }, - { _MMIO(0x9888), 0x0b982000 }, - { _MMIO(0x9888), 0x0d982000 }, - { _MMIO(0x9888), 0x0f989000 }, - { _MMIO(0x9888), 0x05982000 }, - { _MMIO(0x9888), 0x13904000 }, - { _MMIO(0x9888), 0x21904000 }, - { _MMIO(0x9888), 0x23904000 }, - { _MMIO(0x9888), 0x25908000 }, - { _MMIO(0x9888), 0x27904000 }, - { _MMIO(0x9888), 0x29908000 }, - { _MMIO(0x9888), 0x2b904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17908000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1190c080 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900440 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900400 }, - { _MMIO(0x9888), 0x47900c21 }, - { _MMIO(0x9888), 0x57900400 }, - { _MMIO(0x9888), 0x49900042 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900024 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900841 }, - { _MMIO(0x9888), 0x53900400 }, -}; - -static int -get_render_pipe_profile_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_render_pipe_profile; - lens[n] = ARRAY_SIZE(mux_config_render_pipe_profile); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_reads[] = { - { _MMIO(0x272c), 0xffffffff }, - { _MMIO(0x2728), 0xffffffff }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x271c), 0xffffffff }, - { _MMIO(0x2718), 0xffffffff }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x86543210 }, - { _MMIO(0x2748), 0x86543210 }, - { _MMIO(0x2744), 0x00006667 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0x86543210 }, - { _MMIO(0x2758), 0x86543210 }, - { _MMIO(0x2754), 0x00006465 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fe00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fe00 }, - { _MMIO(0x2780), 0x0007f872 }, - { _MMIO(0x2784), 0x0000fe00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fe00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fe00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fe00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fe00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fe00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_reads[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_memory_reads[] = { - { _MMIO(0x9888), 0x11810c00 }, - { _MMIO(0x9888), 0x1381001a }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f900064 }, - { _MMIO(0x9888), 0x03811300 }, - { _MMIO(0x9888), 0x05811b12 }, - { _MMIO(0x9888), 0x0781001a }, - { _MMIO(0x9888), 0x1f810000 }, - { _MMIO(0x9888), 0x17810000 }, - { _MMIO(0x9888), 0x19810000 }, - { _MMIO(0x9888), 0x1b810000 }, - { _MMIO(0x9888), 0x1d810000 }, - { _MMIO(0x9888), 0x1b930055 }, - { _MMIO(0x9888), 0x03e58000 }, - { _MMIO(0x9888), 0x05e5c000 }, - { _MMIO(0x9888), 0x07e54000 }, - { _MMIO(0x9888), 0x13900150 }, - { _MMIO(0x9888), 0x21900151 }, - { _MMIO(0x9888), 0x23900152 }, - { _MMIO(0x9888), 0x25900153 }, - { _MMIO(0x9888), 0x27900154 }, - { _MMIO(0x9888), 0x29900155 }, - { _MMIO(0x9888), 0x2b900156 }, - { _MMIO(0x9888), 0x2d900157 }, - { _MMIO(0x9888), 0x2f90015f }, - { _MMIO(0x9888), 0x31900105 }, - { _MMIO(0x9888), 0x15900103 }, - { _MMIO(0x9888), 0x17900101 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0x9888), 0x11900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c60 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900c00 }, - { _MMIO(0x9888), 0x47900c63 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900c63 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900063 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static int -get_memory_reads_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_memory_reads; - lens[n] = ARRAY_SIZE(mux_config_memory_reads); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_writes[] = { - { _MMIO(0x272c), 0xffffffff }, - { _MMIO(0x2728), 0xffffffff }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x271c), 0xffffffff }, - { _MMIO(0x2718), 0xffffffff }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x86543210 }, - { _MMIO(0x2748), 0x86543210 }, - { _MMIO(0x2744), 0x00006667 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0x86543210 }, - { _MMIO(0x2758), 0x86543210 }, - { _MMIO(0x2754), 0x00006465 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fe00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fe00 }, - { _MMIO(0x2780), 0x0007f822 }, - { _MMIO(0x2784), 0x0000fe00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fe00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fe00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fe00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fe00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fe00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_writes[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_memory_writes[] = { - { _MMIO(0x9888), 0x11810c00 }, - { _MMIO(0x9888), 0x1381001a }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f901000 }, - { _MMIO(0x9888), 0x03811300 }, - { _MMIO(0x9888), 0x05811b12 }, - { _MMIO(0x9888), 0x0781001a }, - { _MMIO(0x9888), 0x1f810000 }, - { _MMIO(0x9888), 0x17810000 }, - { _MMIO(0x9888), 0x19810000 }, - { _MMIO(0x9888), 0x1b810000 }, - { _MMIO(0x9888), 0x1d810000 }, - { _MMIO(0x9888), 0x1b930055 }, - { _MMIO(0x9888), 0x03e58000 }, - { _MMIO(0x9888), 0x05e5c000 }, - { _MMIO(0x9888), 0x07e54000 }, - { _MMIO(0x9888), 0x13900160 }, - { _MMIO(0x9888), 0x21900161 }, - { _MMIO(0x9888), 0x23900162 }, - { _MMIO(0x9888), 0x25900163 }, - { _MMIO(0x9888), 0x27900164 }, - { _MMIO(0x9888), 0x29900165 }, - { _MMIO(0x9888), 0x2b900166 }, - { _MMIO(0x9888), 0x2d900167 }, - { _MMIO(0x9888), 0x2f900150 }, - { _MMIO(0x9888), 0x31900105 }, - { _MMIO(0x9888), 0x15900103 }, - { _MMIO(0x9888), 0x17900101 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0x9888), 0x11900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c60 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900c00 }, - { _MMIO(0x9888), 0x47900c63 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900c63 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900063 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static int -get_memory_writes_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_memory_writes; - lens[n] = ARRAY_SIZE(mux_config_memory_writes); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_extended[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007fc2a }, - { _MMIO(0x2774), 0x0000bf00 }, - { _MMIO(0x2778), 0x0007fc6a }, - { _MMIO(0x277c), 0x0000bf00 }, - { _MMIO(0x2780), 0x0007fc92 }, - { _MMIO(0x2784), 0x0000bf00 }, - { _MMIO(0x2788), 0x0007fca2 }, - { _MMIO(0x278c), 0x0000bf00 }, - { _MMIO(0x2790), 0x0007fc32 }, - { _MMIO(0x2794), 0x0000bf00 }, - { _MMIO(0x2798), 0x0007fc9a }, - { _MMIO(0x279c), 0x0000bf00 }, - { _MMIO(0x27a0), 0x0007fe6a }, - { _MMIO(0x27a4), 0x0000bf00 }, - { _MMIO(0x27a8), 0x0007fe7a }, - { _MMIO(0x27ac), 0x0000bf00 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_extended[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_compute_extended[] = { - { _MMIO(0x9888), 0x106c00e0 }, - { _MMIO(0x9888), 0x141c8160 }, - { _MMIO(0x9888), 0x161c8015 }, - { _MMIO(0x9888), 0x181c0120 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x0e4e8000 }, - { _MMIO(0x9888), 0x184e8000 }, - { _MMIO(0x9888), 0x1a4eaaa0 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x024e8000 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x0e6c0b01 }, - { _MMIO(0x9888), 0x006c0200 }, - { _MMIO(0x9888), 0x026c000c }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x0e1bc000 }, - { _MMIO(0x9888), 0x001b8000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x001c0041 }, - { _MMIO(0x9888), 0x061c4200 }, - { _MMIO(0x9888), 0x081c4443 }, - { _MMIO(0x9888), 0x0a1c4645 }, - { _MMIO(0x9888), 0x0c1c7647 }, - { _MMIO(0x9888), 0x041c7357 }, - { _MMIO(0x9888), 0x1c1c0030 }, - { _MMIO(0x9888), 0x101c0000 }, - { _MMIO(0x9888), 0x1a1c0000 }, - { _MMIO(0x9888), 0x121c8000 }, - { _MMIO(0x9888), 0x004c8000 }, - { _MMIO(0x9888), 0x0a4caa2a }, - { _MMIO(0x9888), 0x0c4c02aa }, - { _MMIO(0x9888), 0x084ca000 }, - { _MMIO(0x9888), 0x000da000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x0c0f5400 }, - { _MMIO(0x9888), 0x0e0f5515 }, - { _MMIO(0x9888), 0x100f0155 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2c8000 }, - { _MMIO(0x9888), 0x162caa00 }, - { _MMIO(0x9888), 0x182c00aa }, - { _MMIO(0x9888), 0x022c8000 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x11907fff }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900040 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900802 }, - { _MMIO(0x9888), 0x47900842 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900842 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900800 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static int -get_compute_extended_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_extended; - lens[n] = ARRAY_SIZE(mux_config_compute_extended); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_l3_cache[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x30800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007fffa }, - { _MMIO(0x2774), 0x0000fefe }, - { _MMIO(0x2778), 0x0007fffa }, - { _MMIO(0x277c), 0x0000fefd }, - { _MMIO(0x2790), 0x0007fffa }, - { _MMIO(0x2794), 0x0000fbef }, - { _MMIO(0x2798), 0x0007fffa }, - { _MMIO(0x279c), 0x0000fbdf }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_l3_cache[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00101100 }, - { _MMIO(0xe45c), 0x00201200 }, - { _MMIO(0xe55c), 0x00301300 }, - { _MMIO(0xe65c), 0x00401400 }, -}; - -static const struct i915_oa_reg mux_config_compute_l3_cache[] = { - { _MMIO(0x9888), 0x166c0760 }, - { _MMIO(0x9888), 0x1593001e }, - { _MMIO(0x9888), 0x3f900003 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x0e4e8000 }, - { _MMIO(0x9888), 0x184e8000 }, - { _MMIO(0x9888), 0x1a4e8020 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x006c0051 }, - { _MMIO(0x9888), 0x066c5000 }, - { _MMIO(0x9888), 0x086c5c5d }, - { _MMIO(0x9888), 0x0e6c5e5f }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x186c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x001b4000 }, - { _MMIO(0x9888), 0x061b8000 }, - { _MMIO(0x9888), 0x081bc000 }, - { _MMIO(0x9888), 0x0e1bc000 }, - { _MMIO(0x9888), 0x101c8000 }, - { _MMIO(0x9888), 0x1a1ce000 }, - { _MMIO(0x9888), 0x1c1c0030 }, - { _MMIO(0x9888), 0x004c8000 }, - { _MMIO(0x9888), 0x0a4c2a00 }, - { _MMIO(0x9888), 0x0c4c0280 }, - { _MMIO(0x9888), 0x000d2000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x0c0f0400 }, - { _MMIO(0x9888), 0x0e0f1500 }, - { _MMIO(0x9888), 0x100f0140 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2c8000 }, - { _MMIO(0x9888), 0x162c0a00 }, - { _MMIO(0x9888), 0x182c00a0 }, - { _MMIO(0x9888), 0x03933300 }, - { _MMIO(0x9888), 0x05930032 }, - { _MMIO(0x9888), 0x11930000 }, - { _MMIO(0x9888), 0x1b930000 }, - { _MMIO(0x9888), 0x1d900157 }, - { _MMIO(0x9888), 0x1f900158 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1190030f }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900000 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900021 }, - { _MMIO(0x9888), 0x47900000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x53904444 }, - { _MMIO(0x9888), 0x43900000 }, -}; - -static int -get_compute_l3_cache_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_l3_cache; - lens[n] = ARRAY_SIZE(mux_config_compute_l3_cache); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_hdc_and_sf[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x10800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000fdff }, -}; - -static const struct i915_oa_reg flex_eu_config_hdc_and_sf[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_hdc_and_sf[] = { - { _MMIO(0x9888), 0x104f0232 }, - { _MMIO(0x9888), 0x124f4640 }, - { _MMIO(0x9888), 0x106c0232 }, - { _MMIO(0x9888), 0x11834400 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x0c4e8000 }, - { _MMIO(0x9888), 0x004f1880 }, - { _MMIO(0x9888), 0x024f08bb }, - { _MMIO(0x9888), 0x044f001b }, - { _MMIO(0x9888), 0x046c0100 }, - { _MMIO(0x9888), 0x066c000b }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x041b8000 }, - { _MMIO(0x9888), 0x061b4000 }, - { _MMIO(0x9888), 0x1a1c1800 }, - { _MMIO(0x9888), 0x005b8000 }, - { _MMIO(0x9888), 0x025bc000 }, - { _MMIO(0x9888), 0x045b4000 }, - { _MMIO(0x9888), 0x125c8000 }, - { _MMIO(0x9888), 0x145c8000 }, - { _MMIO(0x9888), 0x165c8000 }, - { _MMIO(0x9888), 0x185c8000 }, - { _MMIO(0x9888), 0x0a4c00a0 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0f5000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x022cc000 }, - { _MMIO(0x9888), 0x042cc000 }, - { _MMIO(0x9888), 0x062cc000 }, - { _MMIO(0x9888), 0x082cc000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x0f828000 }, - { _MMIO(0x9888), 0x0f8305c0 }, - { _MMIO(0x9888), 0x09830000 }, - { _MMIO(0x9888), 0x07830000 }, - { _MMIO(0x9888), 0x1d950080 }, - { _MMIO(0x9888), 0x13928000 }, - { _MMIO(0x9888), 0x0f988000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x1190fc00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b900040 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900800 }, - { _MMIO(0x9888), 0x43900842 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900000 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_hdc_and_sf_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_hdc_and_sf; - lens[n] = ARRAY_SIZE(mux_config_hdc_and_sf); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00014002 }, - { _MMIO(0x277c), 0x0000c3ff }, - { _MMIO(0x2780), 0x00010002 }, - { _MMIO(0x2784), 0x0000c7ff }, - { _MMIO(0x2788), 0x00004002 }, - { _MMIO(0x278c), 0x0000d3ff }, - { _MMIO(0x2790), 0x00100700 }, - { _MMIO(0x2794), 0x0000ff1f }, - { _MMIO(0x2798), 0x00001402 }, - { _MMIO(0x279c), 0x0000fc3f }, - { _MMIO(0x27a0), 0x00001002 }, - { _MMIO(0x27a4), 0x0000fc7f }, - { _MMIO(0x27a8), 0x00000402 }, - { _MMIO(0x27ac), 0x0000fd3f }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_1[] = { - { _MMIO(0x9888), 0x126c7b40 }, - { _MMIO(0x9888), 0x166c0020 }, - { _MMIO(0x9888), 0x0a603444 }, - { _MMIO(0x9888), 0x0a613400 }, - { _MMIO(0x9888), 0x1a4ea800 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x024e8000 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x064f4000 }, - { _MMIO(0x9888), 0x0c6c5327 }, - { _MMIO(0x9888), 0x0e6c5425 }, - { _MMIO(0x9888), 0x006c2a00 }, - { _MMIO(0x9888), 0x026c285b }, - { _MMIO(0x9888), 0x046c005c }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x1a6c0800 }, - { _MMIO(0x9888), 0x0c1bc000 }, - { _MMIO(0x9888), 0x0e1bc000 }, - { _MMIO(0x9888), 0x001b8000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x041bc000 }, - { _MMIO(0x9888), 0x1c1c003c }, - { _MMIO(0x9888), 0x121c8000 }, - { _MMIO(0x9888), 0x141c8000 }, - { _MMIO(0x9888), 0x161c8000 }, - { _MMIO(0x9888), 0x181c8000 }, - { _MMIO(0x9888), 0x1a1c0800 }, - { _MMIO(0x9888), 0x065b4000 }, - { _MMIO(0x9888), 0x1a5c1000 }, - { _MMIO(0x9888), 0x10600000 }, - { _MMIO(0x9888), 0x04600000 }, - { _MMIO(0x9888), 0x0c610044 }, - { _MMIO(0x9888), 0x10610000 }, - { _MMIO(0x9888), 0x06610000 }, - { _MMIO(0x9888), 0x0c4c02a8 }, - { _MMIO(0x9888), 0x084ca000 }, - { _MMIO(0x9888), 0x0a4c002a }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x100f0154 }, - { _MMIO(0x9888), 0x0c0f5000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x182c00aa }, - { _MMIO(0x9888), 0x022c8000 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2cc000 }, - { _MMIO(0x9888), 0x1190ffc0 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900420 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900021 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900400 }, - { _MMIO(0x9888), 0x43900421 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900040 }, -}; - -static int -get_l3_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_1; - lens[n] = ARRAY_SIZE(mux_config_l3_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00028002 }, - { _MMIO(0x277c), 0x000087ff }, - { _MMIO(0x2780), 0x00020002 }, - { _MMIO(0x2784), 0x00008fff }, - { _MMIO(0x2788), 0x00008002 }, - { _MMIO(0x278c), 0x0000a7ff }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_2[] = { - { _MMIO(0x9888), 0x126c02e0 }, - { _MMIO(0x9888), 0x146c0001 }, - { _MMIO(0x9888), 0x0a623400 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x064f4000 }, - { _MMIO(0x9888), 0x026c3324 }, - { _MMIO(0x9888), 0x046c3422 }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x041bc000 }, - { _MMIO(0x9888), 0x141c8000 }, - { _MMIO(0x9888), 0x161c8000 }, - { _MMIO(0x9888), 0x181c8000 }, - { _MMIO(0x9888), 0x1a1c0800 }, - { _MMIO(0x9888), 0x065b4000 }, - { _MMIO(0x9888), 0x1a5c1000 }, - { _MMIO(0x9888), 0x06614000 }, - { _MMIO(0x9888), 0x0c620044 }, - { _MMIO(0x9888), 0x10620000 }, - { _MMIO(0x9888), 0x06620000 }, - { _MMIO(0x9888), 0x084c8000 }, - { _MMIO(0x9888), 0x0a4c002a }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0f4000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2cc000 }, - { _MMIO(0x9888), 0x1190f800 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x43900000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900000 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_l3_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_2; - lens[n] = ARRAY_SIZE(mux_config_l3_2); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_3[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00028002 }, - { _MMIO(0x277c), 0x000087ff }, - { _MMIO(0x2780), 0x00020002 }, - { _MMIO(0x2784), 0x00008fff }, - { _MMIO(0x2788), 0x00008002 }, - { _MMIO(0x278c), 0x0000a7ff }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_3[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_3[] = { - { _MMIO(0x9888), 0x126c4e80 }, - { _MMIO(0x9888), 0x146c0000 }, - { _MMIO(0x9888), 0x0a633400 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x0c4e8000 }, - { _MMIO(0x9888), 0x026c3321 }, - { _MMIO(0x9888), 0x046c342f }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1a6c2000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x041bc000 }, - { _MMIO(0x9888), 0x061b4000 }, - { _MMIO(0x9888), 0x141c8000 }, - { _MMIO(0x9888), 0x161c8000 }, - { _MMIO(0x9888), 0x181c8000 }, - { _MMIO(0x9888), 0x1a1c1800 }, - { _MMIO(0x9888), 0x06604000 }, - { _MMIO(0x9888), 0x0c630044 }, - { _MMIO(0x9888), 0x10630000 }, - { _MMIO(0x9888), 0x06630000 }, - { _MMIO(0x9888), 0x084c8000 }, - { _MMIO(0x9888), 0x0a4c00aa }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0f4000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x1190f800 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x43900842 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900002 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_l3_3_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_3; - lens[n] = ARRAY_SIZE(mux_config_l3_3); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x30800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000efff }, - { _MMIO(0x2778), 0x00006000 }, - { _MMIO(0x277c), 0x0000f3ff }, -}; - -static const struct i915_oa_reg flex_eu_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x9888), 0x102f3800 }, - { _MMIO(0x9888), 0x144d0500 }, - { _MMIO(0x9888), 0x120d03c0 }, - { _MMIO(0x9888), 0x140d03cf }, - { _MMIO(0x9888), 0x0c0f0004 }, - { _MMIO(0x9888), 0x0c4e4000 }, - { _MMIO(0x9888), 0x042f0480 }, - { _MMIO(0x9888), 0x082f0000 }, - { _MMIO(0x9888), 0x022f0000 }, - { _MMIO(0x9888), 0x0a4c0090 }, - { _MMIO(0x9888), 0x064d0027 }, - { _MMIO(0x9888), 0x004d0000 }, - { _MMIO(0x9888), 0x000d0d40 }, - { _MMIO(0x9888), 0x020d803f }, - { _MMIO(0x9888), 0x040d8023 }, - { _MMIO(0x9888), 0x100d0000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x020f0010 }, - { _MMIO(0x9888), 0x000f0000 }, - { _MMIO(0x9888), 0x0e0f0050 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x1190fc00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41901400 }, - { _MMIO(0x9888), 0x43901485 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900001 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_rasterizer_and_pixel_backend_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_rasterizer_and_pixel_backend; - lens[n] = ARRAY_SIZE(mux_config_rasterizer_and_pixel_backend); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_sampler[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x70800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x0000c000 }, - { _MMIO(0x2774), 0x0000e7ff }, - { _MMIO(0x2778), 0x00003000 }, - { _MMIO(0x277c), 0x0000f9ff }, - { _MMIO(0x2780), 0x00000c00 }, - { _MMIO(0x2784), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_sampler[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_sampler[] = { - { _MMIO(0x9888), 0x14152c00 }, - { _MMIO(0x9888), 0x16150005 }, - { _MMIO(0x9888), 0x121600a0 }, - { _MMIO(0x9888), 0x14352c00 }, - { _MMIO(0x9888), 0x16350005 }, - { _MMIO(0x9888), 0x123600a0 }, - { _MMIO(0x9888), 0x14552c00 }, - { _MMIO(0x9888), 0x16550005 }, - { _MMIO(0x9888), 0x125600a0 }, - { _MMIO(0x9888), 0x062f6000 }, - { _MMIO(0x9888), 0x022f2000 }, - { _MMIO(0x9888), 0x0c4c0050 }, - { _MMIO(0x9888), 0x0a4c0010 }, - { _MMIO(0x9888), 0x0c0d8000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x100f0350 }, - { _MMIO(0x9888), 0x0c0fb000 }, - { _MMIO(0x9888), 0x0e0f00da }, - { _MMIO(0x9888), 0x182c0028 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x022dc000 }, - { _MMIO(0x9888), 0x042d4000 }, - { _MMIO(0x9888), 0x0c138000 }, - { _MMIO(0x9888), 0x0e132000 }, - { _MMIO(0x9888), 0x0413c000 }, - { _MMIO(0x9888), 0x1c140018 }, - { _MMIO(0x9888), 0x0c157000 }, - { _MMIO(0x9888), 0x0e150078 }, - { _MMIO(0x9888), 0x10150000 }, - { _MMIO(0x9888), 0x04162180 }, - { _MMIO(0x9888), 0x02160000 }, - { _MMIO(0x9888), 0x04174000 }, - { _MMIO(0x9888), 0x0233a000 }, - { _MMIO(0x9888), 0x04333000 }, - { _MMIO(0x9888), 0x14348000 }, - { _MMIO(0x9888), 0x16348000 }, - { _MMIO(0x9888), 0x02357870 }, - { _MMIO(0x9888), 0x10350000 }, - { _MMIO(0x9888), 0x04360043 }, - { _MMIO(0x9888), 0x02360000 }, - { _MMIO(0x9888), 0x04371000 }, - { _MMIO(0x9888), 0x0e538000 }, - { _MMIO(0x9888), 0x00538000 }, - { _MMIO(0x9888), 0x06533000 }, - { _MMIO(0x9888), 0x1c540020 }, - { _MMIO(0x9888), 0x12548000 }, - { _MMIO(0x9888), 0x0e557000 }, - { _MMIO(0x9888), 0x00557800 }, - { _MMIO(0x9888), 0x10550000 }, - { _MMIO(0x9888), 0x06560043 }, - { _MMIO(0x9888), 0x02560000 }, - { _MMIO(0x9888), 0x06571000 }, - { _MMIO(0x9888), 0x1190ff80 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900060 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c00 }, - { _MMIO(0x9888), 0x43900842 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900060 }, -}; - -static int -get_sampler_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_sampler; - lens[n] = ARRAY_SIZE(mux_config_sampler); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x00007fff }, - { _MMIO(0x2778), 0x00000000 }, - { _MMIO(0x277c), 0x00009fff }, - { _MMIO(0x2780), 0x00000002 }, - { _MMIO(0x2784), 0x0000efff }, - { _MMIO(0x2788), 0x00000000 }, - { _MMIO(0x278c), 0x0000f3ff }, - { _MMIO(0x2790), 0x00000002 }, - { _MMIO(0x2794), 0x0000fdff }, - { _MMIO(0x2798), 0x00000000 }, - { _MMIO(0x279c), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_1[] = { - { _MMIO(0x9888), 0x12120000 }, - { _MMIO(0x9888), 0x12320000 }, - { _MMIO(0x9888), 0x12520000 }, - { _MMIO(0x9888), 0x002f8000 }, - { _MMIO(0x9888), 0x022f3000 }, - { _MMIO(0x9888), 0x0a4c0015 }, - { _MMIO(0x9888), 0x0c0d8000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x100f03a0 }, - { _MMIO(0x9888), 0x0c0ff000 }, - { _MMIO(0x9888), 0x0e0f0095 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2d8000 }, - { _MMIO(0x9888), 0x0e2d4000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x02108000 }, - { _MMIO(0x9888), 0x0410c000 }, - { _MMIO(0x9888), 0x02118000 }, - { _MMIO(0x9888), 0x0411c000 }, - { _MMIO(0x9888), 0x02121880 }, - { _MMIO(0x9888), 0x041219b5 }, - { _MMIO(0x9888), 0x00120000 }, - { _MMIO(0x9888), 0x02134000 }, - { _MMIO(0x9888), 0x04135000 }, - { _MMIO(0x9888), 0x0c308000 }, - { _MMIO(0x9888), 0x0e304000 }, - { _MMIO(0x9888), 0x06304000 }, - { _MMIO(0x9888), 0x0c318000 }, - { _MMIO(0x9888), 0x0e314000 }, - { _MMIO(0x9888), 0x06314000 }, - { _MMIO(0x9888), 0x0c321a80 }, - { _MMIO(0x9888), 0x0e320033 }, - { _MMIO(0x9888), 0x06320031 }, - { _MMIO(0x9888), 0x00320000 }, - { _MMIO(0x9888), 0x0c334000 }, - { _MMIO(0x9888), 0x0e331000 }, - { _MMIO(0x9888), 0x06331000 }, - { _MMIO(0x9888), 0x0e508000 }, - { _MMIO(0x9888), 0x00508000 }, - { _MMIO(0x9888), 0x02504000 }, - { _MMIO(0x9888), 0x0e518000 }, - { _MMIO(0x9888), 0x00518000 }, - { _MMIO(0x9888), 0x02514000 }, - { _MMIO(0x9888), 0x0e521880 }, - { _MMIO(0x9888), 0x00521a80 }, - { _MMIO(0x9888), 0x02520033 }, - { _MMIO(0x9888), 0x0e534000 }, - { _MMIO(0x9888), 0x00534000 }, - { _MMIO(0x9888), 0x02531000 }, - { _MMIO(0x9888), 0x1190ff80 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900800 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900062 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c00 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900040 }, -}; - -static int -get_tdl_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_1; - lens[n] = ARRAY_SIZE(mux_config_tdl_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_2[] = { - { _MMIO(0x9888), 0x12124d60 }, - { _MMIO(0x9888), 0x12322e60 }, - { _MMIO(0x9888), 0x12524d60 }, - { _MMIO(0x9888), 0x022f3000 }, - { _MMIO(0x9888), 0x0a4c0014 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0fe000 }, - { _MMIO(0x9888), 0x0e0f0097 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x002d8000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x0410c000 }, - { _MMIO(0x9888), 0x0411c000 }, - { _MMIO(0x9888), 0x04121fb7 }, - { _MMIO(0x9888), 0x00120000 }, - { _MMIO(0x9888), 0x04135000 }, - { _MMIO(0x9888), 0x00308000 }, - { _MMIO(0x9888), 0x06304000 }, - { _MMIO(0x9888), 0x00318000 }, - { _MMIO(0x9888), 0x06314000 }, - { _MMIO(0x9888), 0x00321b80 }, - { _MMIO(0x9888), 0x0632003f }, - { _MMIO(0x9888), 0x00334000 }, - { _MMIO(0x9888), 0x06331000 }, - { _MMIO(0x9888), 0x0250c000 }, - { _MMIO(0x9888), 0x0251c000 }, - { _MMIO(0x9888), 0x02521fb7 }, - { _MMIO(0x9888), 0x00520000 }, - { _MMIO(0x9888), 0x02535000 }, - { _MMIO(0x9888), 0x1190fc00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900800 }, - { _MMIO(0x9888), 0x43900063 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900040 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_tdl_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_2; - lens[n] = ARRAY_SIZE(mux_config_tdl_2); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_extra[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_extra[] = { - { _MMIO(0xe458), 0x00001000 }, - { _MMIO(0xe558), 0x00003002 }, - { _MMIO(0xe658), 0x00005004 }, - { _MMIO(0xe758), 0x00011010 }, - { _MMIO(0xe45c), 0x00050012 }, - { _MMIO(0xe55c), 0x00052051 }, - { _MMIO(0xe65c), 0x00000008 }, -}; - -static const struct i915_oa_reg mux_config_compute_extra[] = { - { _MMIO(0x9888), 0x121203e0 }, - { _MMIO(0x9888), 0x123203e0 }, - { _MMIO(0x9888), 0x125203e0 }, - { _MMIO(0x9888), 0x022f4000 }, - { _MMIO(0x9888), 0x0a4c0040 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0e0f006c }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x042d8000 }, - { _MMIO(0x9888), 0x06104000 }, - { _MMIO(0x9888), 0x06114000 }, - { _MMIO(0x9888), 0x06120033 }, - { _MMIO(0x9888), 0x00120000 }, - { _MMIO(0x9888), 0x06131000 }, - { _MMIO(0x9888), 0x04308000 }, - { _MMIO(0x9888), 0x04318000 }, - { _MMIO(0x9888), 0x04321980 }, - { _MMIO(0x9888), 0x00320000 }, - { _MMIO(0x9888), 0x04334000 }, - { _MMIO(0x9888), 0x04504000 }, - { _MMIO(0x9888), 0x04514000 }, - { _MMIO(0x9888), 0x04520033 }, - { _MMIO(0x9888), 0x00520000 }, - { _MMIO(0x9888), 0x04531000 }, - { _MMIO(0x9888), 0x1190e000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43900c00 }, - { _MMIO(0x9888), 0x45900002 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_compute_extra_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_extra; - lens[n] = ARRAY_SIZE(mux_config_compute_extra); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_vme_pipe[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00100030 }, - { _MMIO(0x2774), 0x0000fff9 }, - { _MMIO(0x2778), 0x00000002 }, - { _MMIO(0x277c), 0x0000fffc }, - { _MMIO(0x2780), 0x00000002 }, - { _MMIO(0x2784), 0x0000fff3 }, - { _MMIO(0x2788), 0x00100180 }, - { _MMIO(0x278c), 0x0000ffcf }, - { _MMIO(0x2790), 0x00000002 }, - { _MMIO(0x2794), 0x0000ffcf }, - { _MMIO(0x2798), 0x00000002 }, - { _MMIO(0x279c), 0x0000ff3f }, -}; - -static const struct i915_oa_reg flex_eu_config_vme_pipe[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00008003 }, -}; - -static const struct i915_oa_reg mux_config_vme_pipe[] = { - { _MMIO(0x9888), 0x141a5800 }, - { _MMIO(0x9888), 0x161a00c0 }, - { _MMIO(0x9888), 0x12180240 }, - { _MMIO(0x9888), 0x14180002 }, - { _MMIO(0x9888), 0x143a5800 }, - { _MMIO(0x9888), 0x163a00c0 }, - { _MMIO(0x9888), 0x12380240 }, - { _MMIO(0x9888), 0x14380002 }, - { _MMIO(0x9888), 0x002f1000 }, - { _MMIO(0x9888), 0x022f8000 }, - { _MMIO(0x9888), 0x042f3000 }, - { _MMIO(0x9888), 0x004c4000 }, - { _MMIO(0x9888), 0x0a4c1500 }, - { _MMIO(0x9888), 0x000d2000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0c0f0400 }, - { _MMIO(0x9888), 0x0e0f9500 }, - { _MMIO(0x9888), 0x100f002a }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2c8000 }, - { _MMIO(0x9888), 0x162c0a00 }, - { _MMIO(0x9888), 0x0a2dc000 }, - { _MMIO(0x9888), 0x0c2dc000 }, - { _MMIO(0x9888), 0x04193000 }, - { _MMIO(0x9888), 0x081a28c1 }, - { _MMIO(0x9888), 0x001a0000 }, - { _MMIO(0x9888), 0x00133000 }, - { _MMIO(0x9888), 0x0613c000 }, - { _MMIO(0x9888), 0x0813f000 }, - { _MMIO(0x9888), 0x00172000 }, - { _MMIO(0x9888), 0x06178000 }, - { _MMIO(0x9888), 0x0817a000 }, - { _MMIO(0x9888), 0x00180037 }, - { _MMIO(0x9888), 0x06180940 }, - { _MMIO(0x9888), 0x08180000 }, - { _MMIO(0x9888), 0x02180000 }, - { _MMIO(0x9888), 0x04183000 }, - { _MMIO(0x9888), 0x06393000 }, - { _MMIO(0x9888), 0x0c3a28c1 }, - { _MMIO(0x9888), 0x003a0000 }, - { _MMIO(0x9888), 0x0a33f000 }, - { _MMIO(0x9888), 0x0c33f000 }, - { _MMIO(0x9888), 0x0a37a000 }, - { _MMIO(0x9888), 0x0c37a000 }, - { _MMIO(0x9888), 0x0a380977 }, - { _MMIO(0x9888), 0x08380000 }, - { _MMIO(0x9888), 0x04380000 }, - { _MMIO(0x9888), 0x06383000 }, - { _MMIO(0x9888), 0x119000ff }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900040 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900800 }, - { _MMIO(0x9888), 0x47901000 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900844 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_vme_pipe_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_vme_pipe; - lens[n] = ARRAY_SIZE(mux_config_vme_pipe); - n++; - - return n; -} - static const struct i915_oa_reg b_counter_config_test_oa[] = { { _MMIO(0x2740), 0x00000000 }, { _MMIO(0x2744), 0x00800000 }, @@ -1896,1096 +74,35 @@ static const struct i915_oa_reg mux_config_test_oa[] = { { _MMIO(0x9888), 0x33900000 }, }; -static int -get_test_oa_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_test_oa; - lens[n] = ARRAY_SIZE(mux_config_test_oa); - n++; - - return n; -} - -int i915_oa_select_metric_set_kblgt2(struct drm_i915_private *dev_priv) -{ - dev_priv->perf.oa.n_mux_configs = 0; - dev_priv->perf.oa.b_counter_regs = NULL; - dev_priv->perf.oa.b_counter_regs_len = 0; - dev_priv->perf.oa.flex_regs = NULL; - dev_priv->perf.oa.flex_regs_len = 0; - - switch (dev_priv->perf.oa.metrics_set) { - case METRIC_SET_ID_RENDER_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_render_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_basic); - - return 0; - case METRIC_SET_ID_COMPUTE_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_compute_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_basic); - - return 0; - case METRIC_SET_ID_RENDER_PIPE_PROFILE: - dev_priv->perf.oa.n_mux_configs = - get_render_pipe_profile_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_PIPE_PROFILE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_pipe_profile; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_pipe_profile); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_pipe_profile; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_pipe_profile); - - return 0; - case METRIC_SET_ID_MEMORY_READS: - dev_priv->perf.oa.n_mux_configs = - get_memory_reads_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_READS\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_reads; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_reads); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_reads; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_reads); - - return 0; - case METRIC_SET_ID_MEMORY_WRITES: - dev_priv->perf.oa.n_mux_configs = - get_memory_writes_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_WRITES\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_writes; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_writes); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_writes; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_writes); - - return 0; - case METRIC_SET_ID_COMPUTE_EXTENDED: - dev_priv->perf.oa.n_mux_configs = - get_compute_extended_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTENDED\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_extended; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_extended); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_extended; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_extended); - - return 0; - case METRIC_SET_ID_COMPUTE_L3_CACHE: - dev_priv->perf.oa.n_mux_configs = - get_compute_l3_cache_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_L3_CACHE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_l3_cache; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_l3_cache); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_l3_cache; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_l3_cache); - - return 0; - case METRIC_SET_ID_HDC_AND_SF: - dev_priv->perf.oa.n_mux_configs = - get_hdc_and_sf_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"HDC_AND_SF\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_hdc_and_sf; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_hdc_and_sf); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_hdc_and_sf; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_hdc_and_sf); - - return 0; - case METRIC_SET_ID_L3_1: - dev_priv->perf.oa.n_mux_configs = - get_l3_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_1); - - return 0; - case METRIC_SET_ID_L3_2: - dev_priv->perf.oa.n_mux_configs = - get_l3_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_2); - - return 0; - case METRIC_SET_ID_L3_3: - dev_priv->perf.oa.n_mux_configs = - get_l3_3_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_3\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_3; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_3); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_3; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_3); - - return 0; - case METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND: - dev_priv->perf.oa.n_mux_configs = - get_rasterizer_and_pixel_backend_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RASTERIZER_AND_PIXEL_BACKEND\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_rasterizer_and_pixel_backend); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_rasterizer_and_pixel_backend); - - return 0; - case METRIC_SET_ID_SAMPLER: - dev_priv->perf.oa.n_mux_configs = - get_sampler_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"SAMPLER\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_sampler; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_sampler); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_sampler; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_sampler); - - return 0; - case METRIC_SET_ID_TDL_1: - dev_priv->perf.oa.n_mux_configs = - get_tdl_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_1); - - return 0; - case METRIC_SET_ID_TDL_2: - dev_priv->perf.oa.n_mux_configs = - get_tdl_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_2); - - return 0; - case METRIC_SET_ID_COMPUTE_EXTRA: - dev_priv->perf.oa.n_mux_configs = - get_compute_extra_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTRA\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_extra; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_extra); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_extra; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_extra); - - return 0; - case METRIC_SET_ID_VME_PIPE: - dev_priv->perf.oa.n_mux_configs = - get_vme_pipe_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"VME_PIPE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_vme_pipe; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_vme_pipe); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_vme_pipe; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_vme_pipe); - - return 0; - case METRIC_SET_ID_TEST_OA: - dev_priv->perf.oa.n_mux_configs = - get_test_oa_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TEST_OA\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_test_oa; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_test_oa); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_test_oa; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_test_oa); - - return 0; - default: - return -ENODEV; - } -} - -static ssize_t -show_render_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_BASIC); -} - -static struct device_attribute dev_attr_render_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_render_basic[] = { - &dev_attr_render_basic_id.attr, - NULL, -}; - -static struct attribute_group group_render_basic = { - .name = "f8d677e9-ff6f-4df1-9310-0334c6efacce", - .attrs = attrs_render_basic, -}; - -static ssize_t -show_compute_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_BASIC); -} - -static struct device_attribute dev_attr_compute_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_basic[] = { - &dev_attr_compute_basic_id.attr, - NULL, -}; - -static struct attribute_group group_compute_basic = { - .name = "e17fc42a-e614-41b6-90c4-1074841a6c77", - .attrs = attrs_compute_basic, -}; - -static ssize_t -show_render_pipe_profile_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_PIPE_PROFILE); -} - -static struct device_attribute dev_attr_render_pipe_profile_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_pipe_profile_id, - .store = NULL, -}; - -static struct attribute *attrs_render_pipe_profile[] = { - &dev_attr_render_pipe_profile_id.attr, - NULL, -}; - -static struct attribute_group group_render_pipe_profile = { - .name = "d7a17a3a-ca71-40d2-a919-ace80d50633f", - .attrs = attrs_render_pipe_profile, -}; - -static ssize_t -show_memory_reads_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_READS); -} - -static struct device_attribute dev_attr_memory_reads_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_reads_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_reads[] = { - &dev_attr_memory_reads_id.attr, - NULL, -}; - -static struct attribute_group group_memory_reads = { - .name = "57b59202-172b-477a-87de-33f85572c589", - .attrs = attrs_memory_reads, -}; - -static ssize_t -show_memory_writes_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_WRITES); -} - -static struct device_attribute dev_attr_memory_writes_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_writes_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_writes[] = { - &dev_attr_memory_writes_id.attr, - NULL, -}; - -static struct attribute_group group_memory_writes = { - .name = "3addf8ef-8e9b-40f5-a448-3dbb5d5128b0", - .attrs = attrs_memory_writes, -}; - -static ssize_t -show_compute_extended_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_EXTENDED); -} - -static struct device_attribute dev_attr_compute_extended_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_extended_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_extended[] = { - &dev_attr_compute_extended_id.attr, - NULL, -}; - -static struct attribute_group group_compute_extended = { - .name = "4af0400a-81c3-47db-a6b6-deddbd75680e", - .attrs = attrs_compute_extended, -}; - -static ssize_t -show_compute_l3_cache_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_L3_CACHE); -} - -static struct device_attribute dev_attr_compute_l3_cache_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_l3_cache_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_l3_cache[] = { - &dev_attr_compute_l3_cache_id.attr, - NULL, -}; - -static struct attribute_group group_compute_l3_cache = { - .name = "0e22f995-79ca-4f67-83ab-e9d9772488d8", - .attrs = attrs_compute_l3_cache, -}; - -static ssize_t -show_hdc_and_sf_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_HDC_AND_SF); -} - -static struct device_attribute dev_attr_hdc_and_sf_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_hdc_and_sf_id, - .store = NULL, -}; - -static struct attribute *attrs_hdc_and_sf[] = { - &dev_attr_hdc_and_sf_id.attr, - NULL, -}; - -static struct attribute_group group_hdc_and_sf = { - .name = "bc2a00f7-cb8a-4ff2-8ad0-e241dad16937", - .attrs = attrs_hdc_and_sf, -}; - -static ssize_t -show_l3_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_1); -} - -static struct device_attribute dev_attr_l3_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_1_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_1[] = { - &dev_attr_l3_1_id.attr, - NULL, -}; - -static struct attribute_group group_l3_1 = { - .name = "d2bbe790-f058-42d9-81c6-cdedcf655bc2", - .attrs = attrs_l3_1, -}; - -static ssize_t -show_l3_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_2); -} - -static struct device_attribute dev_attr_l3_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_2_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_2[] = { - &dev_attr_l3_2_id.attr, - NULL, -}; - -static struct attribute_group group_l3_2 = { - .name = "2f8e32e4-5956-46e2-af31-c8ea95887332", - .attrs = attrs_l3_2, -}; - -static ssize_t -show_l3_3_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_3); -} - -static struct device_attribute dev_attr_l3_3_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_3_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_3[] = { - &dev_attr_l3_3_id.attr, - NULL, -}; - -static struct attribute_group group_l3_3 = { - .name = "ca046aad-b5fb-4101-adce-6473ee6e5b14", - .attrs = attrs_l3_3, -}; - -static ssize_t -show_rasterizer_and_pixel_backend_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND); -} - -static struct device_attribute dev_attr_rasterizer_and_pixel_backend_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_rasterizer_and_pixel_backend_id, - .store = NULL, -}; - -static struct attribute *attrs_rasterizer_and_pixel_backend[] = { - &dev_attr_rasterizer_and_pixel_backend_id.attr, - NULL, -}; - -static struct attribute_group group_rasterizer_and_pixel_backend = { - .name = "605f388f-24bb-455c-88e3-8d57ae0d7e9f", - .attrs = attrs_rasterizer_and_pixel_backend, -}; - -static ssize_t -show_sampler_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_SAMPLER); -} - -static struct device_attribute dev_attr_sampler_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_sampler_id, - .store = NULL, -}; - -static struct attribute *attrs_sampler[] = { - &dev_attr_sampler_id.attr, - NULL, -}; - -static struct attribute_group group_sampler = { - .name = "31dd157c-bf4e-4bab-bf2b-f5c8174af1af", - .attrs = attrs_sampler, -}; - -static ssize_t -show_tdl_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_1); -} - -static struct device_attribute dev_attr_tdl_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_1_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_1[] = { - &dev_attr_tdl_1_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_1 = { - .name = "105db928-5542-466b-9128-e1f3c91426cb", - .attrs = attrs_tdl_1, -}; - -static ssize_t -show_tdl_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_2); -} - -static struct device_attribute dev_attr_tdl_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_2_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_2[] = { - &dev_attr_tdl_2_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_2 = { - .name = "03db94d2-b37f-4c58-a791-0d2067b013bb", - .attrs = attrs_tdl_2, -}; - -static ssize_t -show_compute_extra_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_EXTRA); -} - -static struct device_attribute dev_attr_compute_extra_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_extra_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_extra[] = { - &dev_attr_compute_extra_id.attr, - NULL, -}; - -static struct attribute_group group_compute_extra = { - .name = "aa7a3fb9-22fb-43ff-a32d-0ab6c13bbd16", - .attrs = attrs_compute_extra, -}; - -static ssize_t -show_vme_pipe_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_VME_PIPE); -} - -static struct device_attribute dev_attr_vme_pipe_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_vme_pipe_id, - .store = NULL, -}; - -static struct attribute *attrs_vme_pipe[] = { - &dev_attr_vme_pipe_id.attr, - NULL, -}; - -static struct attribute_group group_vme_pipe = { - .name = "398a4268-ef6f-4ffc-b55f-3c7b5363ce61", - .attrs = attrs_vme_pipe, -}; - static ssize_t show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", METRIC_SET_ID_TEST_OA); + return sprintf(buf, "1\n"); } -static struct device_attribute dev_attr_test_oa_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_test_oa_id, - .store = NULL, -}; - -static struct attribute *attrs_test_oa[] = { - &dev_attr_test_oa_id.attr, - NULL, -}; - -static struct attribute_group group_test_oa = { - .name = "baa3c7e4-52b6-4b85-801e-465a94b746dd", - .attrs = attrs_test_oa, -}; - -int -i915_perf_register_sysfs_kblgt2(struct drm_i915_private *dev_priv) +void +i915_perf_load_test_config_kblgt2(struct drm_i915_private *dev_priv) { - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; - int ret = 0; + strncpy(dev_priv->perf.oa.test_config.uuid, + "baa3c7e4-52b6-4b85-801e-465a94b746dd", + UUID_STRING_LEN); + dev_priv->perf.oa.test_config.id = 1; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (ret) - goto error_render_basic; - } - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (ret) - goto error_compute_basic; - } - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (ret) - goto error_render_pipe_profile; - } - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (ret) - goto error_memory_reads; - } - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (ret) - goto error_memory_writes; - } - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (ret) - goto error_compute_extended; - } - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); - if (ret) - goto error_compute_l3_cache; - } - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (ret) - goto error_hdc_and_sf; - } - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (ret) - goto error_l3_1; - } - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_2); - if (ret) - goto error_l3_2; - } - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_3); - if (ret) - goto error_l3_3; - } - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (ret) - goto error_rasterizer_and_pixel_backend; - } - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_sampler); - if (ret) - goto error_sampler; - } - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (ret) - goto error_tdl_1; - } - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (ret) - goto error_tdl_2; - } - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extra); - if (ret) - goto error_compute_extra; - } - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); - if (ret) - goto error_vme_pipe; - } - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_test_oa); - if (ret) - goto error_test_oa; - } + dev_priv->perf.oa.test_config.mux_regs = mux_config_test_oa; + dev_priv->perf.oa.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa); - return 0; + dev_priv->perf.oa.test_config.b_counter_regs = b_counter_config_test_oa; + dev_priv->perf.oa.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa); -error_test_oa: - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); -error_vme_pipe: - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extra); -error_compute_extra: - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); -error_tdl_2: - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); -error_tdl_1: - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler); -error_sampler: - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); -error_rasterizer_and_pixel_backend: - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_3); -error_l3_3: - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_2); -error_l3_2: - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); -error_l3_1: - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); -error_hdc_and_sf: - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); -error_compute_l3_cache: - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); -error_compute_extended: - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); -error_memory_writes: - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); -error_memory_reads: - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); -error_render_pipe_profile: - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); -error_compute_basic: - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); -error_render_basic: - return ret; -} + dev_priv->perf.oa.test_config.flex_regs = flex_eu_config_test_oa; + dev_priv->perf.oa.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa); -void -i915_perf_unregister_sysfs_kblgt2(struct drm_i915_private *dev_priv) -{ - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; + dev_priv->perf.oa.test_config.sysfs_metric.name = "baa3c7e4-52b6-4b85-801e-465a94b746dd"; + dev_priv->perf.oa.test_config.sysfs_metric.attrs = dev_priv->perf.oa.test_config.attrs; + + dev_priv->perf.oa.test_config.attrs[0] = &dev_priv->perf.oa.test_config.sysfs_metric_id.attr; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_2); - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_3); - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler); - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extra); - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_test_oa); + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.name = "id"; + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.mode = 0444; + dev_priv->perf.oa.test_config.sysfs_metric_id.show = show_test_oa_id; } diff --git a/drivers/gpu/drm/i915/i915_oa_kblgt2.h b/drivers/gpu/drm/i915/i915_oa_kblgt2.h index 7e61bfc4f9f5..25b803546dc1 100644 --- a/drivers/gpu/drm/i915/i915_oa_kblgt2.h +++ b/drivers/gpu/drm/i915/i915_oa_kblgt2.h @@ -29,12 +29,6 @@ #ifndef __I915_OA_KBLGT2_H__ #define __I915_OA_KBLGT2_H__ -extern int i915_oa_n_builtin_metric_sets_kblgt2; - -extern int i915_oa_select_metric_set_kblgt2(struct drm_i915_private *dev_priv); - -extern int i915_perf_register_sysfs_kblgt2(struct drm_i915_private *dev_priv); - -extern void i915_perf_unregister_sysfs_kblgt2(struct drm_i915_private *dev_priv); +extern void i915_perf_load_test_config_kblgt2(struct drm_i915_private *dev_priv); #endif diff --git a/drivers/gpu/drm/i915/i915_oa_kblgt3.c b/drivers/gpu/drm/i915/i915_oa_kblgt3.c index 6ed092566a32..ea524e024c72 100644 --- a/drivers/gpu/drm/i915/i915_oa_kblgt3.c +++ b/drivers/gpu/drm/i915/i915_oa_kblgt3.c @@ -31,1877 +31,6 @@ #include "i915_drv.h" #include "i915_oa_kblgt3.h" -enum metric_set_id { - METRIC_SET_ID_RENDER_BASIC = 1, - METRIC_SET_ID_COMPUTE_BASIC, - METRIC_SET_ID_RENDER_PIPE_PROFILE, - METRIC_SET_ID_MEMORY_READS, - METRIC_SET_ID_MEMORY_WRITES, - METRIC_SET_ID_COMPUTE_EXTENDED, - METRIC_SET_ID_COMPUTE_L3_CACHE, - METRIC_SET_ID_HDC_AND_SF, - METRIC_SET_ID_L3_1, - METRIC_SET_ID_L3_2, - METRIC_SET_ID_L3_3, - METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND, - METRIC_SET_ID_SAMPLER, - METRIC_SET_ID_TDL_1, - METRIC_SET_ID_TDL_2, - METRIC_SET_ID_COMPUTE_EXTRA, - METRIC_SET_ID_VME_PIPE, - METRIC_SET_ID_TEST_OA, -}; - -int i915_oa_n_builtin_metric_sets_kblgt3 = 18; - -static const struct i915_oa_reg b_counter_config_render_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2740), 0x00000000 }, -}; - -static const struct i915_oa_reg flex_eu_config_render_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_render_basic[] = { - { _MMIO(0x9888), 0x166c01e0 }, - { _MMIO(0x9888), 0x12170280 }, - { _MMIO(0x9888), 0x12370280 }, - { _MMIO(0x9888), 0x16ec01e0 }, - { _MMIO(0x9888), 0x11930317 }, - { _MMIO(0x9888), 0x159303df }, - { _MMIO(0x9888), 0x3f900003 }, - { _MMIO(0x9888), 0x1a4e0380 }, - { _MMIO(0x9888), 0x0a6c0053 }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x0a1b4000 }, - { _MMIO(0x9888), 0x1c1c0001 }, - { _MMIO(0x9888), 0x002f1000 }, - { _MMIO(0x9888), 0x042f1000 }, - { _MMIO(0x9888), 0x004c4000 }, - { _MMIO(0x9888), 0x0a4c8400 }, - { _MMIO(0x9888), 0x0c4c0002 }, - { _MMIO(0x9888), 0x000d2000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0f0400 }, - { _MMIO(0x9888), 0x0e0f6600 }, - { _MMIO(0x9888), 0x100f0001 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x162ca200 }, - { _MMIO(0x9888), 0x062d8000 }, - { _MMIO(0x9888), 0x082d8000 }, - { _MMIO(0x9888), 0x00133000 }, - { _MMIO(0x9888), 0x08133000 }, - { _MMIO(0x9888), 0x00170020 }, - { _MMIO(0x9888), 0x08170021 }, - { _MMIO(0x9888), 0x10170000 }, - { _MMIO(0x9888), 0x0633c000 }, - { _MMIO(0x9888), 0x0833c000 }, - { _MMIO(0x9888), 0x06370800 }, - { _MMIO(0x9888), 0x08370840 }, - { _MMIO(0x9888), 0x10370000 }, - { _MMIO(0x9888), 0x1ace0200 }, - { _MMIO(0x9888), 0x0aec5300 }, - { _MMIO(0x9888), 0x10ec0000 }, - { _MMIO(0x9888), 0x1cec0000 }, - { _MMIO(0x9888), 0x0a9b8000 }, - { _MMIO(0x9888), 0x1c9c0002 }, - { _MMIO(0x9888), 0x0ccc0002 }, - { _MMIO(0x9888), 0x0a8d8000 }, - { _MMIO(0x9888), 0x108f0001 }, - { _MMIO(0x9888), 0x16ac8000 }, - { _MMIO(0x9888), 0x0d933031 }, - { _MMIO(0x9888), 0x0f933e3f }, - { _MMIO(0x9888), 0x01933d00 }, - { _MMIO(0x9888), 0x0393073c }, - { _MMIO(0x9888), 0x0593000e }, - { _MMIO(0x9888), 0x1d930000 }, - { _MMIO(0x9888), 0x19930000 }, - { _MMIO(0x9888), 0x1b930000 }, - { _MMIO(0x9888), 0x1d900157 }, - { _MMIO(0x9888), 0x1f900158 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x2b908000 }, - { _MMIO(0x9888), 0x2d908000 }, - { _MMIO(0x9888), 0x2f908000 }, - { _MMIO(0x9888), 0x31908000 }, - { _MMIO(0x9888), 0x15908000 }, - { _MMIO(0x9888), 0x17908000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1190003f }, - { _MMIO(0x9888), 0x51902240 }, - { _MMIO(0x9888), 0x41900c00 }, - { _MMIO(0x9888), 0x55900242 }, - { _MMIO(0x9888), 0x45900084 }, - { _MMIO(0x9888), 0x47901400 }, - { _MMIO(0x9888), 0x57902220 }, - { _MMIO(0x9888), 0x49900c60 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900063 }, - { _MMIO(0x9888), 0x59900002 }, - { _MMIO(0x9888), 0x43900c63 }, - { _MMIO(0x9888), 0x53902222 }, -}; - -static int -get_render_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_render_basic; - lens[n] = ARRAY_SIZE(mux_config_render_basic); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2740), 0x00000000 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_compute_basic[] = { - { _MMIO(0x9888), 0x104f00e0 }, - { _MMIO(0x9888), 0x124f1c00 }, - { _MMIO(0x9888), 0x106c00e0 }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f900003 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x1a4e0820 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x064f0900 }, - { _MMIO(0x9888), 0x084f0032 }, - { _MMIO(0x9888), 0x0a4f1891 }, - { _MMIO(0x9888), 0x0c4f0e00 }, - { _MMIO(0x9888), 0x0e4f003c }, - { _MMIO(0x9888), 0x004f0d80 }, - { _MMIO(0x9888), 0x024f003b }, - { _MMIO(0x9888), 0x006c0002 }, - { _MMIO(0x9888), 0x086c0100 }, - { _MMIO(0x9888), 0x0c6c000c }, - { _MMIO(0x9888), 0x0e6c0b00 }, - { _MMIO(0x9888), 0x186c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x001b4000 }, - { _MMIO(0x9888), 0x081b8000 }, - { _MMIO(0x9888), 0x0c1b4000 }, - { _MMIO(0x9888), 0x0e1b8000 }, - { _MMIO(0x9888), 0x101c8000 }, - { _MMIO(0x9888), 0x1a1c8000 }, - { _MMIO(0x9888), 0x1c1c0024 }, - { _MMIO(0x9888), 0x065b8000 }, - { _MMIO(0x9888), 0x085b4000 }, - { _MMIO(0x9888), 0x0a5bc000 }, - { _MMIO(0x9888), 0x0c5b8000 }, - { _MMIO(0x9888), 0x0e5b4000 }, - { _MMIO(0x9888), 0x005b8000 }, - { _MMIO(0x9888), 0x025b4000 }, - { _MMIO(0x9888), 0x1a5c6000 }, - { _MMIO(0x9888), 0x1c5c001b }, - { _MMIO(0x9888), 0x125c8000 }, - { _MMIO(0x9888), 0x145c8000 }, - { _MMIO(0x9888), 0x004c8000 }, - { _MMIO(0x9888), 0x0a4c2000 }, - { _MMIO(0x9888), 0x0c4c0208 }, - { _MMIO(0x9888), 0x000da000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x020d2000 }, - { _MMIO(0x9888), 0x0c0f5400 }, - { _MMIO(0x9888), 0x0e0f5500 }, - { _MMIO(0x9888), 0x100f0155 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2cc000 }, - { _MMIO(0x9888), 0x162cfb00 }, - { _MMIO(0x9888), 0x182c00be }, - { _MMIO(0x9888), 0x022cc000 }, - { _MMIO(0x9888), 0x042cc000 }, - { _MMIO(0x9888), 0x19900157 }, - { _MMIO(0x9888), 0x1b900158 }, - { _MMIO(0x9888), 0x1d900105 }, - { _MMIO(0x9888), 0x1f900103 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x11900fff }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900800 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900821 }, - { _MMIO(0x9888), 0x47900802 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900802 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900002 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900422 }, - { _MMIO(0x9888), 0x53904444 }, -}; - -static int -get_compute_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_basic; - lens[n] = ARRAY_SIZE(mux_config_compute_basic); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_render_pipe_profile[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007ffea }, - { _MMIO(0x2774), 0x00007ffc }, - { _MMIO(0x2778), 0x0007affa }, - { _MMIO(0x277c), 0x0000f5fd }, - { _MMIO(0x2780), 0x00079ffa }, - { _MMIO(0x2784), 0x0000f3fb }, - { _MMIO(0x2788), 0x0007bf7a }, - { _MMIO(0x278c), 0x0000f7e7 }, - { _MMIO(0x2790), 0x0007fefa }, - { _MMIO(0x2794), 0x0000f7cf }, - { _MMIO(0x2798), 0x00077ffa }, - { _MMIO(0x279c), 0x0000efdf }, - { _MMIO(0x27a0), 0x0006fffa }, - { _MMIO(0x27a4), 0x0000cfbf }, - { _MMIO(0x27a8), 0x0003fffa }, - { _MMIO(0x27ac), 0x00005f7f }, -}; - -static const struct i915_oa_reg flex_eu_config_render_pipe_profile[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_render_pipe_profile[] = { - { _MMIO(0x9888), 0x0c0e001f }, - { _MMIO(0x9888), 0x0a0f0000 }, - { _MMIO(0x9888), 0x10116800 }, - { _MMIO(0x9888), 0x178a03e0 }, - { _MMIO(0x9888), 0x11824c00 }, - { _MMIO(0x9888), 0x11830020 }, - { _MMIO(0x9888), 0x13840020 }, - { _MMIO(0x9888), 0x11850019 }, - { _MMIO(0x9888), 0x11860007 }, - { _MMIO(0x9888), 0x01870c40 }, - { _MMIO(0x9888), 0x17880000 }, - { _MMIO(0x9888), 0x022f4000 }, - { _MMIO(0x9888), 0x0a4c0040 }, - { _MMIO(0x9888), 0x0c0d8000 }, - { _MMIO(0x9888), 0x040d4000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x020e5400 }, - { _MMIO(0x9888), 0x000e0000 }, - { _MMIO(0x9888), 0x080f0040 }, - { _MMIO(0x9888), 0x000f0000 }, - { _MMIO(0x9888), 0x100f0000 }, - { _MMIO(0x9888), 0x0e0f0040 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x06104000 }, - { _MMIO(0x9888), 0x06110012 }, - { _MMIO(0x9888), 0x06131000 }, - { _MMIO(0x9888), 0x01898000 }, - { _MMIO(0x9888), 0x0d890100 }, - { _MMIO(0x9888), 0x03898000 }, - { _MMIO(0x9888), 0x09808000 }, - { _MMIO(0x9888), 0x0b808000 }, - { _MMIO(0x9888), 0x0380c000 }, - { _MMIO(0x9888), 0x0f8a0075 }, - { _MMIO(0x9888), 0x1d8a0000 }, - { _MMIO(0x9888), 0x118a8000 }, - { _MMIO(0x9888), 0x1b8a4000 }, - { _MMIO(0x9888), 0x138a8000 }, - { _MMIO(0x9888), 0x1d81a000 }, - { _MMIO(0x9888), 0x15818000 }, - { _MMIO(0x9888), 0x17818000 }, - { _MMIO(0x9888), 0x0b820030 }, - { _MMIO(0x9888), 0x07828000 }, - { _MMIO(0x9888), 0x0d824000 }, - { _MMIO(0x9888), 0x0f828000 }, - { _MMIO(0x9888), 0x05824000 }, - { _MMIO(0x9888), 0x0d830003 }, - { _MMIO(0x9888), 0x0583000c }, - { _MMIO(0x9888), 0x09830000 }, - { _MMIO(0x9888), 0x03838000 }, - { _MMIO(0x9888), 0x07838000 }, - { _MMIO(0x9888), 0x0b840980 }, - { _MMIO(0x9888), 0x03844d80 }, - { _MMIO(0x9888), 0x11840000 }, - { _MMIO(0x9888), 0x09848000 }, - { _MMIO(0x9888), 0x09850080 }, - { _MMIO(0x9888), 0x03850003 }, - { _MMIO(0x9888), 0x01850000 }, - { _MMIO(0x9888), 0x07860000 }, - { _MMIO(0x9888), 0x0f860400 }, - { _MMIO(0x9888), 0x09870032 }, - { _MMIO(0x9888), 0x01888052 }, - { _MMIO(0x9888), 0x11880000 }, - { _MMIO(0x9888), 0x09884000 }, - { _MMIO(0x9888), 0x1b931001 }, - { _MMIO(0x9888), 0x1d930001 }, - { _MMIO(0x9888), 0x19934000 }, - { _MMIO(0x9888), 0x1b958000 }, - { _MMIO(0x9888), 0x1d950094 }, - { _MMIO(0x9888), 0x19958000 }, - { _MMIO(0x9888), 0x09e58000 }, - { _MMIO(0x9888), 0x0be58000 }, - { _MMIO(0x9888), 0x03e5c000 }, - { _MMIO(0x9888), 0x0592c000 }, - { _MMIO(0x9888), 0x0b928000 }, - { _MMIO(0x9888), 0x0d924000 }, - { _MMIO(0x9888), 0x0f924000 }, - { _MMIO(0x9888), 0x11928000 }, - { _MMIO(0x9888), 0x1392c000 }, - { _MMIO(0x9888), 0x09924000 }, - { _MMIO(0x9888), 0x01985000 }, - { _MMIO(0x9888), 0x07988000 }, - { _MMIO(0x9888), 0x09981000 }, - { _MMIO(0x9888), 0x0b982000 }, - { _MMIO(0x9888), 0x0d982000 }, - { _MMIO(0x9888), 0x0f989000 }, - { _MMIO(0x9888), 0x05982000 }, - { _MMIO(0x9888), 0x13904000 }, - { _MMIO(0x9888), 0x21904000 }, - { _MMIO(0x9888), 0x23904000 }, - { _MMIO(0x9888), 0x25908000 }, - { _MMIO(0x9888), 0x27904000 }, - { _MMIO(0x9888), 0x29908000 }, - { _MMIO(0x9888), 0x2b904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17908000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1190c080 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900440 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900400 }, - { _MMIO(0x9888), 0x47900c21 }, - { _MMIO(0x9888), 0x57900400 }, - { _MMIO(0x9888), 0x49900042 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900024 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900841 }, - { _MMIO(0x9888), 0x53900400 }, -}; - -static int -get_render_pipe_profile_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_render_pipe_profile; - lens[n] = ARRAY_SIZE(mux_config_render_pipe_profile); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_reads[] = { - { _MMIO(0x272c), 0xffffffff }, - { _MMIO(0x2728), 0xffffffff }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x271c), 0xffffffff }, - { _MMIO(0x2718), 0xffffffff }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x86543210 }, - { _MMIO(0x2748), 0x86543210 }, - { _MMIO(0x2744), 0x00006667 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0x86543210 }, - { _MMIO(0x2758), 0x86543210 }, - { _MMIO(0x2754), 0x00006465 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fe00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fe00 }, - { _MMIO(0x2780), 0x0007f872 }, - { _MMIO(0x2784), 0x0000fe00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fe00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fe00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fe00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fe00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fe00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_reads[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_memory_reads[] = { - { _MMIO(0x9888), 0x11810c00 }, - { _MMIO(0x9888), 0x1381001a }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f900064 }, - { _MMIO(0x9888), 0x03811300 }, - { _MMIO(0x9888), 0x05811b12 }, - { _MMIO(0x9888), 0x0781001a }, - { _MMIO(0x9888), 0x1f810000 }, - { _MMIO(0x9888), 0x17810000 }, - { _MMIO(0x9888), 0x19810000 }, - { _MMIO(0x9888), 0x1b810000 }, - { _MMIO(0x9888), 0x1d810000 }, - { _MMIO(0x9888), 0x1b930055 }, - { _MMIO(0x9888), 0x03e58000 }, - { _MMIO(0x9888), 0x05e5c000 }, - { _MMIO(0x9888), 0x07e54000 }, - { _MMIO(0x9888), 0x13900150 }, - { _MMIO(0x9888), 0x21900151 }, - { _MMIO(0x9888), 0x23900152 }, - { _MMIO(0x9888), 0x25900153 }, - { _MMIO(0x9888), 0x27900154 }, - { _MMIO(0x9888), 0x29900155 }, - { _MMIO(0x9888), 0x2b900156 }, - { _MMIO(0x9888), 0x2d900157 }, - { _MMIO(0x9888), 0x2f90015f }, - { _MMIO(0x9888), 0x31900105 }, - { _MMIO(0x9888), 0x15900103 }, - { _MMIO(0x9888), 0x17900101 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0x9888), 0x11900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c60 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900c00 }, - { _MMIO(0x9888), 0x47900c63 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900c63 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900063 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static int -get_memory_reads_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_memory_reads; - lens[n] = ARRAY_SIZE(mux_config_memory_reads); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_writes[] = { - { _MMIO(0x272c), 0xffffffff }, - { _MMIO(0x2728), 0xffffffff }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x271c), 0xffffffff }, - { _MMIO(0x2718), 0xffffffff }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x86543210 }, - { _MMIO(0x2748), 0x86543210 }, - { _MMIO(0x2744), 0x00006667 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0x86543210 }, - { _MMIO(0x2758), 0x86543210 }, - { _MMIO(0x2754), 0x00006465 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fe00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fe00 }, - { _MMIO(0x2780), 0x0007f822 }, - { _MMIO(0x2784), 0x0000fe00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fe00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fe00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fe00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fe00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fe00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_writes[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_memory_writes[] = { - { _MMIO(0x9888), 0x11810c00 }, - { _MMIO(0x9888), 0x1381001a }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f901000 }, - { _MMIO(0x9888), 0x03811300 }, - { _MMIO(0x9888), 0x05811b12 }, - { _MMIO(0x9888), 0x0781001a }, - { _MMIO(0x9888), 0x1f810000 }, - { _MMIO(0x9888), 0x17810000 }, - { _MMIO(0x9888), 0x19810000 }, - { _MMIO(0x9888), 0x1b810000 }, - { _MMIO(0x9888), 0x1d810000 }, - { _MMIO(0x9888), 0x1b930055 }, - { _MMIO(0x9888), 0x03e58000 }, - { _MMIO(0x9888), 0x05e5c000 }, - { _MMIO(0x9888), 0x07e54000 }, - { _MMIO(0x9888), 0x13900160 }, - { _MMIO(0x9888), 0x21900161 }, - { _MMIO(0x9888), 0x23900162 }, - { _MMIO(0x9888), 0x25900163 }, - { _MMIO(0x9888), 0x27900164 }, - { _MMIO(0x9888), 0x29900165 }, - { _MMIO(0x9888), 0x2b900166 }, - { _MMIO(0x9888), 0x2d900167 }, - { _MMIO(0x9888), 0x2f900150 }, - { _MMIO(0x9888), 0x31900105 }, - { _MMIO(0x9888), 0x15900103 }, - { _MMIO(0x9888), 0x17900101 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0x9888), 0x11900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c60 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900c00 }, - { _MMIO(0x9888), 0x47900c63 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900c63 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900063 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static int -get_memory_writes_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_memory_writes; - lens[n] = ARRAY_SIZE(mux_config_memory_writes); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_extended[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007fc2a }, - { _MMIO(0x2774), 0x0000bf00 }, - { _MMIO(0x2778), 0x0007fc6a }, - { _MMIO(0x277c), 0x0000bf00 }, - { _MMIO(0x2780), 0x0007fc92 }, - { _MMIO(0x2784), 0x0000bf00 }, - { _MMIO(0x2788), 0x0007fca2 }, - { _MMIO(0x278c), 0x0000bf00 }, - { _MMIO(0x2790), 0x0007fc32 }, - { _MMIO(0x2794), 0x0000bf00 }, - { _MMIO(0x2798), 0x0007fc9a }, - { _MMIO(0x279c), 0x0000bf00 }, - { _MMIO(0x27a0), 0x0007fe6a }, - { _MMIO(0x27a4), 0x0000bf00 }, - { _MMIO(0x27a8), 0x0007fe7a }, - { _MMIO(0x27ac), 0x0000bf00 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_extended[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_compute_extended[] = { - { _MMIO(0x9888), 0x106c00e0 }, - { _MMIO(0x9888), 0x141c8160 }, - { _MMIO(0x9888), 0x161c8015 }, - { _MMIO(0x9888), 0x181c0120 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x0e4e8000 }, - { _MMIO(0x9888), 0x184e8000 }, - { _MMIO(0x9888), 0x1a4eaaa0 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x024e8000 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x0e6c0b01 }, - { _MMIO(0x9888), 0x006c0200 }, - { _MMIO(0x9888), 0x026c000c }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x0e1bc000 }, - { _MMIO(0x9888), 0x001b8000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x001c0041 }, - { _MMIO(0x9888), 0x061c4200 }, - { _MMIO(0x9888), 0x081c4443 }, - { _MMIO(0x9888), 0x0a1c4645 }, - { _MMIO(0x9888), 0x0c1c7647 }, - { _MMIO(0x9888), 0x041c7357 }, - { _MMIO(0x9888), 0x1c1c0030 }, - { _MMIO(0x9888), 0x101c0000 }, - { _MMIO(0x9888), 0x1a1c0000 }, - { _MMIO(0x9888), 0x121c8000 }, - { _MMIO(0x9888), 0x004c8000 }, - { _MMIO(0x9888), 0x0a4caa2a }, - { _MMIO(0x9888), 0x0c4c02aa }, - { _MMIO(0x9888), 0x084ca000 }, - { _MMIO(0x9888), 0x000da000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x0c0f5400 }, - { _MMIO(0x9888), 0x0e0f5515 }, - { _MMIO(0x9888), 0x100f0155 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2c8000 }, - { _MMIO(0x9888), 0x162caa00 }, - { _MMIO(0x9888), 0x182c00aa }, - { _MMIO(0x9888), 0x022c8000 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x11907fff }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900040 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900802 }, - { _MMIO(0x9888), 0x47900842 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900842 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900800 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static int -get_compute_extended_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_extended; - lens[n] = ARRAY_SIZE(mux_config_compute_extended); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_l3_cache[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x30800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007fffa }, - { _MMIO(0x2774), 0x0000fefe }, - { _MMIO(0x2778), 0x0007fffa }, - { _MMIO(0x277c), 0x0000fefd }, - { _MMIO(0x2790), 0x0007fffa }, - { _MMIO(0x2794), 0x0000fbef }, - { _MMIO(0x2798), 0x0007fffa }, - { _MMIO(0x279c), 0x0000fbdf }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_l3_cache[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00101100 }, - { _MMIO(0xe45c), 0x00201200 }, - { _MMIO(0xe55c), 0x00301300 }, - { _MMIO(0xe65c), 0x00401400 }, -}; - -static const struct i915_oa_reg mux_config_compute_l3_cache[] = { - { _MMIO(0x9888), 0x166c0760 }, - { _MMIO(0x9888), 0x1593001e }, - { _MMIO(0x9888), 0x3f900003 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x0e4e8000 }, - { _MMIO(0x9888), 0x184e8000 }, - { _MMIO(0x9888), 0x1a4e8020 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x006c0051 }, - { _MMIO(0x9888), 0x066c5000 }, - { _MMIO(0x9888), 0x086c5c5d }, - { _MMIO(0x9888), 0x0e6c5e5f }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x186c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x001b4000 }, - { _MMIO(0x9888), 0x061b8000 }, - { _MMIO(0x9888), 0x081bc000 }, - { _MMIO(0x9888), 0x0e1bc000 }, - { _MMIO(0x9888), 0x101c8000 }, - { _MMIO(0x9888), 0x1a1ce000 }, - { _MMIO(0x9888), 0x1c1c0030 }, - { _MMIO(0x9888), 0x004c8000 }, - { _MMIO(0x9888), 0x0a4c2a00 }, - { _MMIO(0x9888), 0x0c4c0280 }, - { _MMIO(0x9888), 0x000d2000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x0c0f0400 }, - { _MMIO(0x9888), 0x0e0f1500 }, - { _MMIO(0x9888), 0x100f0140 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2c8000 }, - { _MMIO(0x9888), 0x162c0a00 }, - { _MMIO(0x9888), 0x182c00a0 }, - { _MMIO(0x9888), 0x03933300 }, - { _MMIO(0x9888), 0x05930032 }, - { _MMIO(0x9888), 0x11930000 }, - { _MMIO(0x9888), 0x1b930000 }, - { _MMIO(0x9888), 0x1d900157 }, - { _MMIO(0x9888), 0x1f900158 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1190030f }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900000 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900021 }, - { _MMIO(0x9888), 0x47900000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x53904444 }, - { _MMIO(0x9888), 0x43900000 }, -}; - -static int -get_compute_l3_cache_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_l3_cache; - lens[n] = ARRAY_SIZE(mux_config_compute_l3_cache); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_hdc_and_sf[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x10800000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000fdff }, -}; - -static const struct i915_oa_reg flex_eu_config_hdc_and_sf[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_hdc_and_sf[] = { - { _MMIO(0x9888), 0x104f0232 }, - { _MMIO(0x9888), 0x124f4640 }, - { _MMIO(0x9888), 0x106c0232 }, - { _MMIO(0x9888), 0x11834400 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x0c4e8000 }, - { _MMIO(0x9888), 0x004f1880 }, - { _MMIO(0x9888), 0x024f08bb }, - { _MMIO(0x9888), 0x044f001b }, - { _MMIO(0x9888), 0x046c0100 }, - { _MMIO(0x9888), 0x066c000b }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x041b8000 }, - { _MMIO(0x9888), 0x061b4000 }, - { _MMIO(0x9888), 0x1a1c1800 }, - { _MMIO(0x9888), 0x005b8000 }, - { _MMIO(0x9888), 0x025bc000 }, - { _MMIO(0x9888), 0x045b4000 }, - { _MMIO(0x9888), 0x125c8000 }, - { _MMIO(0x9888), 0x145c8000 }, - { _MMIO(0x9888), 0x165c8000 }, - { _MMIO(0x9888), 0x185c8000 }, - { _MMIO(0x9888), 0x0a4c00a0 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0f5000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x022cc000 }, - { _MMIO(0x9888), 0x042cc000 }, - { _MMIO(0x9888), 0x062cc000 }, - { _MMIO(0x9888), 0x082cc000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x0f828000 }, - { _MMIO(0x9888), 0x0f8305c0 }, - { _MMIO(0x9888), 0x09830000 }, - { _MMIO(0x9888), 0x07830000 }, - { _MMIO(0x9888), 0x1d950080 }, - { _MMIO(0x9888), 0x13928000 }, - { _MMIO(0x9888), 0x0f988000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x1190fc00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b900040 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900800 }, - { _MMIO(0x9888), 0x43900842 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900000 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_hdc_and_sf_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_hdc_and_sf; - lens[n] = ARRAY_SIZE(mux_config_hdc_and_sf); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00014002 }, - { _MMIO(0x277c), 0x0000c3ff }, - { _MMIO(0x2780), 0x00010002 }, - { _MMIO(0x2784), 0x0000c7ff }, - { _MMIO(0x2788), 0x00004002 }, - { _MMIO(0x278c), 0x0000d3ff }, - { _MMIO(0x2790), 0x00100700 }, - { _MMIO(0x2794), 0x0000ff1f }, - { _MMIO(0x2798), 0x00001402 }, - { _MMIO(0x279c), 0x0000fc3f }, - { _MMIO(0x27a0), 0x00001002 }, - { _MMIO(0x27a4), 0x0000fc7f }, - { _MMIO(0x27a8), 0x00000402 }, - { _MMIO(0x27ac), 0x0000fd3f }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_1[] = { - { _MMIO(0x9888), 0x126c7b40 }, - { _MMIO(0x9888), 0x166c0020 }, - { _MMIO(0x9888), 0x0a603444 }, - { _MMIO(0x9888), 0x0a613400 }, - { _MMIO(0x9888), 0x1a4ea800 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x024e8000 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x064f4000 }, - { _MMIO(0x9888), 0x0c6c5327 }, - { _MMIO(0x9888), 0x0e6c5425 }, - { _MMIO(0x9888), 0x006c2a00 }, - { _MMIO(0x9888), 0x026c285b }, - { _MMIO(0x9888), 0x046c005c }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x1a6c0800 }, - { _MMIO(0x9888), 0x0c1bc000 }, - { _MMIO(0x9888), 0x0e1bc000 }, - { _MMIO(0x9888), 0x001b8000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x041bc000 }, - { _MMIO(0x9888), 0x1c1c003c }, - { _MMIO(0x9888), 0x121c8000 }, - { _MMIO(0x9888), 0x141c8000 }, - { _MMIO(0x9888), 0x161c8000 }, - { _MMIO(0x9888), 0x181c8000 }, - { _MMIO(0x9888), 0x1a1c0800 }, - { _MMIO(0x9888), 0x065b4000 }, - { _MMIO(0x9888), 0x1a5c1000 }, - { _MMIO(0x9888), 0x10600000 }, - { _MMIO(0x9888), 0x04600000 }, - { _MMIO(0x9888), 0x0c610044 }, - { _MMIO(0x9888), 0x10610000 }, - { _MMIO(0x9888), 0x06610000 }, - { _MMIO(0x9888), 0x0c4c02a8 }, - { _MMIO(0x9888), 0x084ca000 }, - { _MMIO(0x9888), 0x0a4c002a }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x100f0154 }, - { _MMIO(0x9888), 0x0c0f5000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x182c00aa }, - { _MMIO(0x9888), 0x022c8000 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2cc000 }, - { _MMIO(0x9888), 0x1190ffc0 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900420 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900021 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900400 }, - { _MMIO(0x9888), 0x43900421 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900040 }, -}; - -static int -get_l3_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_1; - lens[n] = ARRAY_SIZE(mux_config_l3_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00028002 }, - { _MMIO(0x277c), 0x000087ff }, - { _MMIO(0x2780), 0x00020002 }, - { _MMIO(0x2784), 0x00008fff }, - { _MMIO(0x2788), 0x00008002 }, - { _MMIO(0x278c), 0x0000a7ff }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_2[] = { - { _MMIO(0x9888), 0x126c02e0 }, - { _MMIO(0x9888), 0x146c0001 }, - { _MMIO(0x9888), 0x0a623400 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x064f4000 }, - { _MMIO(0x9888), 0x026c3324 }, - { _MMIO(0x9888), 0x046c3422 }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x041bc000 }, - { _MMIO(0x9888), 0x141c8000 }, - { _MMIO(0x9888), 0x161c8000 }, - { _MMIO(0x9888), 0x181c8000 }, - { _MMIO(0x9888), 0x1a1c0800 }, - { _MMIO(0x9888), 0x065b4000 }, - { _MMIO(0x9888), 0x1a5c1000 }, - { _MMIO(0x9888), 0x06614000 }, - { _MMIO(0x9888), 0x0c620044 }, - { _MMIO(0x9888), 0x10620000 }, - { _MMIO(0x9888), 0x06620000 }, - { _MMIO(0x9888), 0x084c8000 }, - { _MMIO(0x9888), 0x0a4c002a }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0f4000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2cc000 }, - { _MMIO(0x9888), 0x1190f800 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x43900000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900000 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_l3_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_2; - lens[n] = ARRAY_SIZE(mux_config_l3_2); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_3[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00028002 }, - { _MMIO(0x277c), 0x000087ff }, - { _MMIO(0x2780), 0x00020002 }, - { _MMIO(0x2784), 0x00008fff }, - { _MMIO(0x2788), 0x00008002 }, - { _MMIO(0x278c), 0x0000a7ff }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_3[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_3[] = { - { _MMIO(0x9888), 0x126c4e80 }, - { _MMIO(0x9888), 0x146c0000 }, - { _MMIO(0x9888), 0x0a633400 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x0c4e8000 }, - { _MMIO(0x9888), 0x026c3321 }, - { _MMIO(0x9888), 0x046c342f }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1a6c2000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x041bc000 }, - { _MMIO(0x9888), 0x061b4000 }, - { _MMIO(0x9888), 0x141c8000 }, - { _MMIO(0x9888), 0x161c8000 }, - { _MMIO(0x9888), 0x181c8000 }, - { _MMIO(0x9888), 0x1a1c1800 }, - { _MMIO(0x9888), 0x06604000 }, - { _MMIO(0x9888), 0x0c630044 }, - { _MMIO(0x9888), 0x10630000 }, - { _MMIO(0x9888), 0x06630000 }, - { _MMIO(0x9888), 0x084c8000 }, - { _MMIO(0x9888), 0x0a4c00aa }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0f4000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x1190f800 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x43900842 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900002 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_l3_3_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_3; - lens[n] = ARRAY_SIZE(mux_config_l3_3); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x30800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000efff }, - { _MMIO(0x2778), 0x00006000 }, - { _MMIO(0x277c), 0x0000f3ff }, -}; - -static const struct i915_oa_reg flex_eu_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x9888), 0x102f3800 }, - { _MMIO(0x9888), 0x144d0500 }, - { _MMIO(0x9888), 0x120d03c0 }, - { _MMIO(0x9888), 0x140d03cf }, - { _MMIO(0x9888), 0x0c0f0004 }, - { _MMIO(0x9888), 0x0c4e4000 }, - { _MMIO(0x9888), 0x042f0480 }, - { _MMIO(0x9888), 0x082f0000 }, - { _MMIO(0x9888), 0x022f0000 }, - { _MMIO(0x9888), 0x0a4c0090 }, - { _MMIO(0x9888), 0x064d0027 }, - { _MMIO(0x9888), 0x004d0000 }, - { _MMIO(0x9888), 0x000d0d40 }, - { _MMIO(0x9888), 0x020d803f }, - { _MMIO(0x9888), 0x040d8023 }, - { _MMIO(0x9888), 0x100d0000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x020f0010 }, - { _MMIO(0x9888), 0x000f0000 }, - { _MMIO(0x9888), 0x0e0f0050 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x1190fc00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41901400 }, - { _MMIO(0x9888), 0x43901485 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900001 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_rasterizer_and_pixel_backend_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_rasterizer_and_pixel_backend; - lens[n] = ARRAY_SIZE(mux_config_rasterizer_and_pixel_backend); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_sampler[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x70800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x0000c000 }, - { _MMIO(0x2774), 0x0000e7ff }, - { _MMIO(0x2778), 0x00003000 }, - { _MMIO(0x277c), 0x0000f9ff }, - { _MMIO(0x2780), 0x00000c00 }, - { _MMIO(0x2784), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_sampler[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_sampler[] = { - { _MMIO(0x9888), 0x14152c00 }, - { _MMIO(0x9888), 0x16150005 }, - { _MMIO(0x9888), 0x121600a0 }, - { _MMIO(0x9888), 0x14352c00 }, - { _MMIO(0x9888), 0x16350005 }, - { _MMIO(0x9888), 0x123600a0 }, - { _MMIO(0x9888), 0x14552c00 }, - { _MMIO(0x9888), 0x16550005 }, - { _MMIO(0x9888), 0x125600a0 }, - { _MMIO(0x9888), 0x062f6000 }, - { _MMIO(0x9888), 0x022f2000 }, - { _MMIO(0x9888), 0x0c4c0050 }, - { _MMIO(0x9888), 0x0a4c0010 }, - { _MMIO(0x9888), 0x0c0d8000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x100f0350 }, - { _MMIO(0x9888), 0x0c0fb000 }, - { _MMIO(0x9888), 0x0e0f00da }, - { _MMIO(0x9888), 0x182c0028 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x022dc000 }, - { _MMIO(0x9888), 0x042d4000 }, - { _MMIO(0x9888), 0x0c138000 }, - { _MMIO(0x9888), 0x0e132000 }, - { _MMIO(0x9888), 0x0413c000 }, - { _MMIO(0x9888), 0x1c140018 }, - { _MMIO(0x9888), 0x0c157000 }, - { _MMIO(0x9888), 0x0e150078 }, - { _MMIO(0x9888), 0x10150000 }, - { _MMIO(0x9888), 0x04162180 }, - { _MMIO(0x9888), 0x02160000 }, - { _MMIO(0x9888), 0x04174000 }, - { _MMIO(0x9888), 0x0233a000 }, - { _MMIO(0x9888), 0x04333000 }, - { _MMIO(0x9888), 0x14348000 }, - { _MMIO(0x9888), 0x16348000 }, - { _MMIO(0x9888), 0x02357870 }, - { _MMIO(0x9888), 0x10350000 }, - { _MMIO(0x9888), 0x04360043 }, - { _MMIO(0x9888), 0x02360000 }, - { _MMIO(0x9888), 0x04371000 }, - { _MMIO(0x9888), 0x0e538000 }, - { _MMIO(0x9888), 0x00538000 }, - { _MMIO(0x9888), 0x06533000 }, - { _MMIO(0x9888), 0x1c540020 }, - { _MMIO(0x9888), 0x12548000 }, - { _MMIO(0x9888), 0x0e557000 }, - { _MMIO(0x9888), 0x00557800 }, - { _MMIO(0x9888), 0x10550000 }, - { _MMIO(0x9888), 0x06560043 }, - { _MMIO(0x9888), 0x02560000 }, - { _MMIO(0x9888), 0x06571000 }, - { _MMIO(0x9888), 0x1190ff80 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900060 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c00 }, - { _MMIO(0x9888), 0x43900842 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900060 }, -}; - -static int -get_sampler_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_sampler; - lens[n] = ARRAY_SIZE(mux_config_sampler); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x00007fff }, - { _MMIO(0x2778), 0x00000000 }, - { _MMIO(0x277c), 0x00009fff }, - { _MMIO(0x2780), 0x00000002 }, - { _MMIO(0x2784), 0x0000efff }, - { _MMIO(0x2788), 0x00000000 }, - { _MMIO(0x278c), 0x0000f3ff }, - { _MMIO(0x2790), 0x00000002 }, - { _MMIO(0x2794), 0x0000fdff }, - { _MMIO(0x2798), 0x00000000 }, - { _MMIO(0x279c), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_1[] = { - { _MMIO(0x9888), 0x12120000 }, - { _MMIO(0x9888), 0x12320000 }, - { _MMIO(0x9888), 0x12520000 }, - { _MMIO(0x9888), 0x002f8000 }, - { _MMIO(0x9888), 0x022f3000 }, - { _MMIO(0x9888), 0x0a4c0015 }, - { _MMIO(0x9888), 0x0c0d8000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x100f03a0 }, - { _MMIO(0x9888), 0x0c0ff000 }, - { _MMIO(0x9888), 0x0e0f0095 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2d8000 }, - { _MMIO(0x9888), 0x0e2d4000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x02108000 }, - { _MMIO(0x9888), 0x0410c000 }, - { _MMIO(0x9888), 0x02118000 }, - { _MMIO(0x9888), 0x0411c000 }, - { _MMIO(0x9888), 0x02121880 }, - { _MMIO(0x9888), 0x041219b5 }, - { _MMIO(0x9888), 0x00120000 }, - { _MMIO(0x9888), 0x02134000 }, - { _MMIO(0x9888), 0x04135000 }, - { _MMIO(0x9888), 0x0c308000 }, - { _MMIO(0x9888), 0x0e304000 }, - { _MMIO(0x9888), 0x06304000 }, - { _MMIO(0x9888), 0x0c318000 }, - { _MMIO(0x9888), 0x0e314000 }, - { _MMIO(0x9888), 0x06314000 }, - { _MMIO(0x9888), 0x0c321a80 }, - { _MMIO(0x9888), 0x0e320033 }, - { _MMIO(0x9888), 0x06320031 }, - { _MMIO(0x9888), 0x00320000 }, - { _MMIO(0x9888), 0x0c334000 }, - { _MMIO(0x9888), 0x0e331000 }, - { _MMIO(0x9888), 0x06331000 }, - { _MMIO(0x9888), 0x0e508000 }, - { _MMIO(0x9888), 0x00508000 }, - { _MMIO(0x9888), 0x02504000 }, - { _MMIO(0x9888), 0x0e518000 }, - { _MMIO(0x9888), 0x00518000 }, - { _MMIO(0x9888), 0x02514000 }, - { _MMIO(0x9888), 0x0e521880 }, - { _MMIO(0x9888), 0x00521a80 }, - { _MMIO(0x9888), 0x02520033 }, - { _MMIO(0x9888), 0x0e534000 }, - { _MMIO(0x9888), 0x00534000 }, - { _MMIO(0x9888), 0x02531000 }, - { _MMIO(0x9888), 0x1190ff80 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900800 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900062 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c00 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900040 }, -}; - -static int -get_tdl_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_1; - lens[n] = ARRAY_SIZE(mux_config_tdl_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_2[] = { - { _MMIO(0x9888), 0x12124d60 }, - { _MMIO(0x9888), 0x12322e60 }, - { _MMIO(0x9888), 0x12524d60 }, - { _MMIO(0x9888), 0x022f3000 }, - { _MMIO(0x9888), 0x0a4c0014 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0fe000 }, - { _MMIO(0x9888), 0x0e0f0097 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x002d8000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x0410c000 }, - { _MMIO(0x9888), 0x0411c000 }, - { _MMIO(0x9888), 0x04121fb7 }, - { _MMIO(0x9888), 0x00120000 }, - { _MMIO(0x9888), 0x04135000 }, - { _MMIO(0x9888), 0x00308000 }, - { _MMIO(0x9888), 0x06304000 }, - { _MMIO(0x9888), 0x00318000 }, - { _MMIO(0x9888), 0x06314000 }, - { _MMIO(0x9888), 0x00321b80 }, - { _MMIO(0x9888), 0x0632003f }, - { _MMIO(0x9888), 0x00334000 }, - { _MMIO(0x9888), 0x06331000 }, - { _MMIO(0x9888), 0x0250c000 }, - { _MMIO(0x9888), 0x0251c000 }, - { _MMIO(0x9888), 0x02521fb7 }, - { _MMIO(0x9888), 0x00520000 }, - { _MMIO(0x9888), 0x02535000 }, - { _MMIO(0x9888), 0x1190fc00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900800 }, - { _MMIO(0x9888), 0x43900063 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900040 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_tdl_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_2; - lens[n] = ARRAY_SIZE(mux_config_tdl_2); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_extra[] = { -}; - -static const struct i915_oa_reg flex_eu_config_compute_extra[] = { -}; - -static const struct i915_oa_reg mux_config_compute_extra[] = { - { _MMIO(0x9888), 0x121203e0 }, - { _MMIO(0x9888), 0x123203e0 }, - { _MMIO(0x9888), 0x125203e0 }, - { _MMIO(0x9888), 0x129203e0 }, - { _MMIO(0x9888), 0x12b203e0 }, - { _MMIO(0x9888), 0x12d203e0 }, - { _MMIO(0x9888), 0x024ec000 }, - { _MMIO(0x9888), 0x044ec000 }, - { _MMIO(0x9888), 0x064ec000 }, - { _MMIO(0x9888), 0x022f4000 }, - { _MMIO(0x9888), 0x084ca000 }, - { _MMIO(0x9888), 0x0a4c0042 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0f5000 }, - { _MMIO(0x9888), 0x0e0f006d }, - { _MMIO(0x9888), 0x022c8000 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x042d8000 }, - { _MMIO(0x9888), 0x06104000 }, - { _MMIO(0x9888), 0x06114000 }, - { _MMIO(0x9888), 0x06120033 }, - { _MMIO(0x9888), 0x00120000 }, - { _MMIO(0x9888), 0x06131000 }, - { _MMIO(0x9888), 0x04308000 }, - { _MMIO(0x9888), 0x04318000 }, - { _MMIO(0x9888), 0x04321980 }, - { _MMIO(0x9888), 0x00320000 }, - { _MMIO(0x9888), 0x04334000 }, - { _MMIO(0x9888), 0x04504000 }, - { _MMIO(0x9888), 0x04514000 }, - { _MMIO(0x9888), 0x04520033 }, - { _MMIO(0x9888), 0x00520000 }, - { _MMIO(0x9888), 0x04531000 }, - { _MMIO(0x9888), 0x00af8000 }, - { _MMIO(0x9888), 0x0acc0001 }, - { _MMIO(0x9888), 0x008d8000 }, - { _MMIO(0x9888), 0x028da000 }, - { _MMIO(0x9888), 0x0c8fb000 }, - { _MMIO(0x9888), 0x0e8f0001 }, - { _MMIO(0x9888), 0x06ac8000 }, - { _MMIO(0x9888), 0x02ad4000 }, - { _MMIO(0x9888), 0x02908000 }, - { _MMIO(0x9888), 0x02918000 }, - { _MMIO(0x9888), 0x02921980 }, - { _MMIO(0x9888), 0x00920000 }, - { _MMIO(0x9888), 0x02934000 }, - { _MMIO(0x9888), 0x02b04000 }, - { _MMIO(0x9888), 0x02b14000 }, - { _MMIO(0x9888), 0x02b20033 }, - { _MMIO(0x9888), 0x00b20000 }, - { _MMIO(0x9888), 0x02b31000 }, - { _MMIO(0x9888), 0x00d08000 }, - { _MMIO(0x9888), 0x00d18000 }, - { _MMIO(0x9888), 0x00d21980 }, - { _MMIO(0x9888), 0x00d34000 }, - { _MMIO(0x9888), 0x1190fc00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c00 }, - { _MMIO(0x9888), 0x43900002 }, - { _MMIO(0x9888), 0x53900420 }, - { _MMIO(0x9888), 0x459000a1 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_compute_extra_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_extra; - lens[n] = ARRAY_SIZE(mux_config_compute_extra); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_vme_pipe[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00100030 }, - { _MMIO(0x2774), 0x0000fff9 }, - { _MMIO(0x2778), 0x00000002 }, - { _MMIO(0x277c), 0x0000fffc }, - { _MMIO(0x2780), 0x00000002 }, - { _MMIO(0x2784), 0x0000fff3 }, - { _MMIO(0x2788), 0x00100180 }, - { _MMIO(0x278c), 0x0000ffcf }, - { _MMIO(0x2790), 0x00000002 }, - { _MMIO(0x2794), 0x0000ffcf }, - { _MMIO(0x2798), 0x00000002 }, - { _MMIO(0x279c), 0x0000ff3f }, -}; - -static const struct i915_oa_reg flex_eu_config_vme_pipe[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00008003 }, -}; - -static const struct i915_oa_reg mux_config_vme_pipe[] = { - { _MMIO(0x9888), 0x141a5800 }, - { _MMIO(0x9888), 0x161a00c0 }, - { _MMIO(0x9888), 0x12180240 }, - { _MMIO(0x9888), 0x14180002 }, - { _MMIO(0x9888), 0x149a5800 }, - { _MMIO(0x9888), 0x169a00c0 }, - { _MMIO(0x9888), 0x12980240 }, - { _MMIO(0x9888), 0x14980002 }, - { _MMIO(0x9888), 0x1a4e3fc0 }, - { _MMIO(0x9888), 0x002f1000 }, - { _MMIO(0x9888), 0x022f8000 }, - { _MMIO(0x9888), 0x042f3000 }, - { _MMIO(0x9888), 0x004c4000 }, - { _MMIO(0x9888), 0x0a4c9500 }, - { _MMIO(0x9888), 0x0c4c002a }, - { _MMIO(0x9888), 0x000d2000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0c0f0400 }, - { _MMIO(0x9888), 0x0e0f5500 }, - { _MMIO(0x9888), 0x100f0015 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2c8000 }, - { _MMIO(0x9888), 0x162caa00 }, - { _MMIO(0x9888), 0x182c000a }, - { _MMIO(0x9888), 0x04193000 }, - { _MMIO(0x9888), 0x081a28c1 }, - { _MMIO(0x9888), 0x001a0000 }, - { _MMIO(0x9888), 0x00133000 }, - { _MMIO(0x9888), 0x0613c000 }, - { _MMIO(0x9888), 0x0813f000 }, - { _MMIO(0x9888), 0x00172000 }, - { _MMIO(0x9888), 0x06178000 }, - { _MMIO(0x9888), 0x0817a000 }, - { _MMIO(0x9888), 0x00180037 }, - { _MMIO(0x9888), 0x06180940 }, - { _MMIO(0x9888), 0x08180000 }, - { _MMIO(0x9888), 0x02180000 }, - { _MMIO(0x9888), 0x04183000 }, - { _MMIO(0x9888), 0x04afc000 }, - { _MMIO(0x9888), 0x06af3000 }, - { _MMIO(0x9888), 0x0acc4000 }, - { _MMIO(0x9888), 0x0ccc0015 }, - { _MMIO(0x9888), 0x0a8da000 }, - { _MMIO(0x9888), 0x0c8da000 }, - { _MMIO(0x9888), 0x0e8f4000 }, - { _MMIO(0x9888), 0x108f0015 }, - { _MMIO(0x9888), 0x16aca000 }, - { _MMIO(0x9888), 0x18ac000a }, - { _MMIO(0x9888), 0x06993000 }, - { _MMIO(0x9888), 0x0c9a28c1 }, - { _MMIO(0x9888), 0x009a0000 }, - { _MMIO(0x9888), 0x0a93f000 }, - { _MMIO(0x9888), 0x0c93f000 }, - { _MMIO(0x9888), 0x0a97a000 }, - { _MMIO(0x9888), 0x0c97a000 }, - { _MMIO(0x9888), 0x0a980977 }, - { _MMIO(0x9888), 0x08980000 }, - { _MMIO(0x9888), 0x04980000 }, - { _MMIO(0x9888), 0x06983000 }, - { _MMIO(0x9888), 0x119000ff }, - { _MMIO(0x9888), 0x51900040 }, - { _MMIO(0x9888), 0x41900020 }, - { _MMIO(0x9888), 0x55900004 }, - { _MMIO(0x9888), 0x45900400 }, - { _MMIO(0x9888), 0x479008a5 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900002 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_vme_pipe_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_vme_pipe; - lens[n] = ARRAY_SIZE(mux_config_vme_pipe); - n++; - - return n; -} - static const struct i915_oa_reg b_counter_config_test_oa[] = { { _MMIO(0x2740), 0x00000000 }, { _MMIO(0x2744), 0x00800000 }, @@ -1945,1096 +74,35 @@ static const struct i915_oa_reg mux_config_test_oa[] = { { _MMIO(0x9888), 0x33900000 }, }; -static int -get_test_oa_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_test_oa; - lens[n] = ARRAY_SIZE(mux_config_test_oa); - n++; - - return n; -} - -int i915_oa_select_metric_set_kblgt3(struct drm_i915_private *dev_priv) -{ - dev_priv->perf.oa.n_mux_configs = 0; - dev_priv->perf.oa.b_counter_regs = NULL; - dev_priv->perf.oa.b_counter_regs_len = 0; - dev_priv->perf.oa.flex_regs = NULL; - dev_priv->perf.oa.flex_regs_len = 0; - - switch (dev_priv->perf.oa.metrics_set) { - case METRIC_SET_ID_RENDER_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_render_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_basic); - - return 0; - case METRIC_SET_ID_COMPUTE_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_compute_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_basic); - - return 0; - case METRIC_SET_ID_RENDER_PIPE_PROFILE: - dev_priv->perf.oa.n_mux_configs = - get_render_pipe_profile_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_PIPE_PROFILE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_pipe_profile; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_pipe_profile); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_pipe_profile; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_pipe_profile); - - return 0; - case METRIC_SET_ID_MEMORY_READS: - dev_priv->perf.oa.n_mux_configs = - get_memory_reads_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_READS\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_reads; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_reads); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_reads; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_reads); - - return 0; - case METRIC_SET_ID_MEMORY_WRITES: - dev_priv->perf.oa.n_mux_configs = - get_memory_writes_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_WRITES\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_writes; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_writes); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_writes; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_writes); - - return 0; - case METRIC_SET_ID_COMPUTE_EXTENDED: - dev_priv->perf.oa.n_mux_configs = - get_compute_extended_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTENDED\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_extended; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_extended); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_extended; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_extended); - - return 0; - case METRIC_SET_ID_COMPUTE_L3_CACHE: - dev_priv->perf.oa.n_mux_configs = - get_compute_l3_cache_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_L3_CACHE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_l3_cache; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_l3_cache); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_l3_cache; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_l3_cache); - - return 0; - case METRIC_SET_ID_HDC_AND_SF: - dev_priv->perf.oa.n_mux_configs = - get_hdc_and_sf_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"HDC_AND_SF\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_hdc_and_sf; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_hdc_and_sf); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_hdc_and_sf; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_hdc_and_sf); - - return 0; - case METRIC_SET_ID_L3_1: - dev_priv->perf.oa.n_mux_configs = - get_l3_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_1); - - return 0; - case METRIC_SET_ID_L3_2: - dev_priv->perf.oa.n_mux_configs = - get_l3_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_2); - - return 0; - case METRIC_SET_ID_L3_3: - dev_priv->perf.oa.n_mux_configs = - get_l3_3_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_3\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_3; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_3); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_3; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_3); - - return 0; - case METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND: - dev_priv->perf.oa.n_mux_configs = - get_rasterizer_and_pixel_backend_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RASTERIZER_AND_PIXEL_BACKEND\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_rasterizer_and_pixel_backend); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_rasterizer_and_pixel_backend); - - return 0; - case METRIC_SET_ID_SAMPLER: - dev_priv->perf.oa.n_mux_configs = - get_sampler_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"SAMPLER\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_sampler; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_sampler); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_sampler; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_sampler); - - return 0; - case METRIC_SET_ID_TDL_1: - dev_priv->perf.oa.n_mux_configs = - get_tdl_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_1); - - return 0; - case METRIC_SET_ID_TDL_2: - dev_priv->perf.oa.n_mux_configs = - get_tdl_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_2); - - return 0; - case METRIC_SET_ID_COMPUTE_EXTRA: - dev_priv->perf.oa.n_mux_configs = - get_compute_extra_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTRA\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_extra; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_extra); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_extra; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_extra); - - return 0; - case METRIC_SET_ID_VME_PIPE: - dev_priv->perf.oa.n_mux_configs = - get_vme_pipe_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"VME_PIPE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_vme_pipe; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_vme_pipe); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_vme_pipe; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_vme_pipe); - - return 0; - case METRIC_SET_ID_TEST_OA: - dev_priv->perf.oa.n_mux_configs = - get_test_oa_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TEST_OA\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_test_oa; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_test_oa); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_test_oa; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_test_oa); - - return 0; - default: - return -ENODEV; - } -} - -static ssize_t -show_render_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_BASIC); -} - -static struct device_attribute dev_attr_render_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_render_basic[] = { - &dev_attr_render_basic_id.attr, - NULL, -}; - -static struct attribute_group group_render_basic = { - .name = "0286c920-2f6d-493b-b22d-7a5280df43de", - .attrs = attrs_render_basic, -}; - -static ssize_t -show_compute_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_BASIC); -} - -static struct device_attribute dev_attr_compute_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_basic[] = { - &dev_attr_compute_basic_id.attr, - NULL, -}; - -static struct attribute_group group_compute_basic = { - .name = "9823aaa1-b06f-40ce-884b-cd798c79f0c2", - .attrs = attrs_compute_basic, -}; - -static ssize_t -show_render_pipe_profile_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_PIPE_PROFILE); -} - -static struct device_attribute dev_attr_render_pipe_profile_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_pipe_profile_id, - .store = NULL, -}; - -static struct attribute *attrs_render_pipe_profile[] = { - &dev_attr_render_pipe_profile_id.attr, - NULL, -}; - -static struct attribute_group group_render_pipe_profile = { - .name = "c7c735f3-ce58-45cf-aa04-30b183f1faff", - .attrs = attrs_render_pipe_profile, -}; - -static ssize_t -show_memory_reads_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_READS); -} - -static struct device_attribute dev_attr_memory_reads_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_reads_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_reads[] = { - &dev_attr_memory_reads_id.attr, - NULL, -}; - -static struct attribute_group group_memory_reads = { - .name = "96ec2219-040b-428a-856a-6bc03363a057", - .attrs = attrs_memory_reads, -}; - -static ssize_t -show_memory_writes_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_WRITES); -} - -static struct device_attribute dev_attr_memory_writes_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_writes_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_writes[] = { - &dev_attr_memory_writes_id.attr, - NULL, -}; - -static struct attribute_group group_memory_writes = { - .name = "03372b64-4996-4d3b-aa18-790e75eeb9c2", - .attrs = attrs_memory_writes, -}; - -static ssize_t -show_compute_extended_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_EXTENDED); -} - -static struct device_attribute dev_attr_compute_extended_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_extended_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_extended[] = { - &dev_attr_compute_extended_id.attr, - NULL, -}; - -static struct attribute_group group_compute_extended = { - .name = "31b4ce5a-bd61-4c1f-bb5d-f2e731412150", - .attrs = attrs_compute_extended, -}; - -static ssize_t -show_compute_l3_cache_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_L3_CACHE); -} - -static struct device_attribute dev_attr_compute_l3_cache_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_l3_cache_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_l3_cache[] = { - &dev_attr_compute_l3_cache_id.attr, - NULL, -}; - -static struct attribute_group group_compute_l3_cache = { - .name = "2ce0911a-27fc-4887-96f0-11084fa807c3", - .attrs = attrs_compute_l3_cache, -}; - -static ssize_t -show_hdc_and_sf_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_HDC_AND_SF); -} - -static struct device_attribute dev_attr_hdc_and_sf_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_hdc_and_sf_id, - .store = NULL, -}; - -static struct attribute *attrs_hdc_and_sf[] = { - &dev_attr_hdc_and_sf_id.attr, - NULL, -}; - -static struct attribute_group group_hdc_and_sf = { - .name = "546c4c1d-99b8-42fb-a107-5aaabb5314a8", - .attrs = attrs_hdc_and_sf, -}; - -static ssize_t -show_l3_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_1); -} - -static struct device_attribute dev_attr_l3_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_1_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_1[] = { - &dev_attr_l3_1_id.attr, - NULL, -}; - -static struct attribute_group group_l3_1 = { - .name = "4e93d156-9b39-4268-8544-a8e0480806d7", - .attrs = attrs_l3_1, -}; - -static ssize_t -show_l3_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_2); -} - -static struct device_attribute dev_attr_l3_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_2_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_2[] = { - &dev_attr_l3_2_id.attr, - NULL, -}; - -static struct attribute_group group_l3_2 = { - .name = "de1bec86-ca92-4b43-89fa-147653221cc0", - .attrs = attrs_l3_2, -}; - -static ssize_t -show_l3_3_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_3); -} - -static struct device_attribute dev_attr_l3_3_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_3_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_3[] = { - &dev_attr_l3_3_id.attr, - NULL, -}; - -static struct attribute_group group_l3_3 = { - .name = "e63537bb-10be-4d4a-92c4-c6b0c65e02ef", - .attrs = attrs_l3_3, -}; - -static ssize_t -show_rasterizer_and_pixel_backend_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND); -} - -static struct device_attribute dev_attr_rasterizer_and_pixel_backend_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_rasterizer_and_pixel_backend_id, - .store = NULL, -}; - -static struct attribute *attrs_rasterizer_and_pixel_backend[] = { - &dev_attr_rasterizer_and_pixel_backend_id.attr, - NULL, -}; - -static struct attribute_group group_rasterizer_and_pixel_backend = { - .name = "7a03a9f8-ec5e-46bb-8b67-1f0ff1476281", - .attrs = attrs_rasterizer_and_pixel_backend, -}; - -static ssize_t -show_sampler_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_SAMPLER); -} - -static struct device_attribute dev_attr_sampler_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_sampler_id, - .store = NULL, -}; - -static struct attribute *attrs_sampler[] = { - &dev_attr_sampler_id.attr, - NULL, -}; - -static struct attribute_group group_sampler = { - .name = "b25d2ebf-a6e0-4b29-96be-a9b010edeeda", - .attrs = attrs_sampler, -}; - -static ssize_t -show_tdl_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_1); -} - -static struct device_attribute dev_attr_tdl_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_1_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_1[] = { - &dev_attr_tdl_1_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_1 = { - .name = "469a05e5-e299-46f7-9598-7b05f3c34991", - .attrs = attrs_tdl_1, -}; - -static ssize_t -show_tdl_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_2); -} - -static struct device_attribute dev_attr_tdl_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_2_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_2[] = { - &dev_attr_tdl_2_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_2 = { - .name = "52f925c6-786a-4ec6-86ce-cba85c83453a", - .attrs = attrs_tdl_2, -}; - -static ssize_t -show_compute_extra_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_EXTRA); -} - -static struct device_attribute dev_attr_compute_extra_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_extra_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_extra[] = { - &dev_attr_compute_extra_id.attr, - NULL, -}; - -static struct attribute_group group_compute_extra = { - .name = "efc497ac-884e-4ee4-a4a8-15fba22aaf21", - .attrs = attrs_compute_extra, -}; - -static ssize_t -show_vme_pipe_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_VME_PIPE); -} - -static struct device_attribute dev_attr_vme_pipe_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_vme_pipe_id, - .store = NULL, -}; - -static struct attribute *attrs_vme_pipe[] = { - &dev_attr_vme_pipe_id.attr, - NULL, -}; - -static struct attribute_group group_vme_pipe = { - .name = "bfd9764d-2c5b-4c16-bfc1-89de3ca10917", - .attrs = attrs_vme_pipe, -}; - static ssize_t show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", METRIC_SET_ID_TEST_OA); + return sprintf(buf, "1\n"); } -static struct device_attribute dev_attr_test_oa_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_test_oa_id, - .store = NULL, -}; - -static struct attribute *attrs_test_oa[] = { - &dev_attr_test_oa_id.attr, - NULL, -}; - -static struct attribute_group group_test_oa = { - .name = "f1792f32-6db2-4b50-b4b2-557128f1688d", - .attrs = attrs_test_oa, -}; - -int -i915_perf_register_sysfs_kblgt3(struct drm_i915_private *dev_priv) +void +i915_perf_load_test_config_kblgt3(struct drm_i915_private *dev_priv) { - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; - int ret = 0; + strncpy(dev_priv->perf.oa.test_config.uuid, + "f1792f32-6db2-4b50-b4b2-557128f1688d", + UUID_STRING_LEN); + dev_priv->perf.oa.test_config.id = 1; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (ret) - goto error_render_basic; - } - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (ret) - goto error_compute_basic; - } - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (ret) - goto error_render_pipe_profile; - } - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (ret) - goto error_memory_reads; - } - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (ret) - goto error_memory_writes; - } - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (ret) - goto error_compute_extended; - } - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); - if (ret) - goto error_compute_l3_cache; - } - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (ret) - goto error_hdc_and_sf; - } - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (ret) - goto error_l3_1; - } - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_2); - if (ret) - goto error_l3_2; - } - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_3); - if (ret) - goto error_l3_3; - } - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (ret) - goto error_rasterizer_and_pixel_backend; - } - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_sampler); - if (ret) - goto error_sampler; - } - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (ret) - goto error_tdl_1; - } - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (ret) - goto error_tdl_2; - } - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extra); - if (ret) - goto error_compute_extra; - } - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); - if (ret) - goto error_vme_pipe; - } - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_test_oa); - if (ret) - goto error_test_oa; - } + dev_priv->perf.oa.test_config.mux_regs = mux_config_test_oa; + dev_priv->perf.oa.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa); - return 0; + dev_priv->perf.oa.test_config.b_counter_regs = b_counter_config_test_oa; + dev_priv->perf.oa.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa); -error_test_oa: - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); -error_vme_pipe: - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extra); -error_compute_extra: - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); -error_tdl_2: - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); -error_tdl_1: - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler); -error_sampler: - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); -error_rasterizer_and_pixel_backend: - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_3); -error_l3_3: - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_2); -error_l3_2: - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); -error_l3_1: - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); -error_hdc_and_sf: - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); -error_compute_l3_cache: - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); -error_compute_extended: - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); -error_memory_writes: - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); -error_memory_reads: - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); -error_render_pipe_profile: - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); -error_compute_basic: - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); -error_render_basic: - return ret; -} + dev_priv->perf.oa.test_config.flex_regs = flex_eu_config_test_oa; + dev_priv->perf.oa.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa); -void -i915_perf_unregister_sysfs_kblgt3(struct drm_i915_private *dev_priv) -{ - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; + dev_priv->perf.oa.test_config.sysfs_metric.name = "f1792f32-6db2-4b50-b4b2-557128f1688d"; + dev_priv->perf.oa.test_config.sysfs_metric.attrs = dev_priv->perf.oa.test_config.attrs; + + dev_priv->perf.oa.test_config.attrs[0] = &dev_priv->perf.oa.test_config.sysfs_metric_id.attr; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_2); - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_3); - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler); - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extra); - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_test_oa); + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.name = "id"; + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.mode = 0444; + dev_priv->perf.oa.test_config.sysfs_metric_id.show = show_test_oa_id; } diff --git a/drivers/gpu/drm/i915/i915_oa_kblgt3.h b/drivers/gpu/drm/i915/i915_oa_kblgt3.h index b0ca7f3114d3..d5b5b5c1923e 100644 --- a/drivers/gpu/drm/i915/i915_oa_kblgt3.h +++ b/drivers/gpu/drm/i915/i915_oa_kblgt3.h @@ -29,12 +29,6 @@ #ifndef __I915_OA_KBLGT3_H__ #define __I915_OA_KBLGT3_H__ -extern int i915_oa_n_builtin_metric_sets_kblgt3; - -extern int i915_oa_select_metric_set_kblgt3(struct drm_i915_private *dev_priv); - -extern int i915_perf_register_sysfs_kblgt3(struct drm_i915_private *dev_priv); - -extern void i915_perf_unregister_sysfs_kblgt3(struct drm_i915_private *dev_priv); +extern void i915_perf_load_test_config_kblgt3(struct drm_i915_private *dev_priv); #endif diff --git a/drivers/gpu/drm/i915/i915_oa_sklgt2.c b/drivers/gpu/drm/i915/i915_oa_sklgt2.c index 1268beda212c..93267e55f190 100644 --- a/drivers/gpu/drm/i915/i915_oa_sklgt2.c +++ b/drivers/gpu/drm/i915/i915_oa_sklgt2.c @@ -31,2317 +31,6 @@ #include "i915_drv.h" #include "i915_oa_sklgt2.h" -enum metric_set_id { - METRIC_SET_ID_RENDER_BASIC = 1, - METRIC_SET_ID_COMPUTE_BASIC, - METRIC_SET_ID_RENDER_PIPE_PROFILE, - METRIC_SET_ID_MEMORY_READS, - METRIC_SET_ID_MEMORY_WRITES, - METRIC_SET_ID_COMPUTE_EXTENDED, - METRIC_SET_ID_COMPUTE_L3_CACHE, - METRIC_SET_ID_HDC_AND_SF, - METRIC_SET_ID_L3_1, - METRIC_SET_ID_L3_2, - METRIC_SET_ID_L3_3, - METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND, - METRIC_SET_ID_SAMPLER, - METRIC_SET_ID_TDL_1, - METRIC_SET_ID_TDL_2, - METRIC_SET_ID_COMPUTE_EXTRA, - METRIC_SET_ID_VME_PIPE, - METRIC_SET_ID_TEST_OA, -}; - -int i915_oa_n_builtin_metric_sets_sklgt2 = 18; - -static const struct i915_oa_reg b_counter_config_render_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2740), 0x00000000 }, -}; - -static const struct i915_oa_reg flex_eu_config_render_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_render_basic_1_sku_gte_0x02[] = { - { _MMIO(0x9888), 0x166c01e0 }, - { _MMIO(0x9888), 0x12170280 }, - { _MMIO(0x9888), 0x12370280 }, - { _MMIO(0x9888), 0x11930317 }, - { _MMIO(0x9888), 0x159303df }, - { _MMIO(0x9888), 0x3f900003 }, - { _MMIO(0x9888), 0x1a4e0080 }, - { _MMIO(0x9888), 0x0a6c0053 }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x0a1b4000 }, - { _MMIO(0x9888), 0x1c1c0001 }, - { _MMIO(0x9888), 0x002f1000 }, - { _MMIO(0x9888), 0x042f1000 }, - { _MMIO(0x9888), 0x004c4000 }, - { _MMIO(0x9888), 0x0a4c8400 }, - { _MMIO(0x9888), 0x000d2000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0d2000 }, - { _MMIO(0x9888), 0x0c0f0400 }, - { _MMIO(0x9888), 0x0e0f6600 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x162c2200 }, - { _MMIO(0x9888), 0x062d8000 }, - { _MMIO(0x9888), 0x082d8000 }, - { _MMIO(0x9888), 0x00133000 }, - { _MMIO(0x9888), 0x08133000 }, - { _MMIO(0x9888), 0x00170020 }, - { _MMIO(0x9888), 0x08170021 }, - { _MMIO(0x9888), 0x10170000 }, - { _MMIO(0x9888), 0x0633c000 }, - { _MMIO(0x9888), 0x0833c000 }, - { _MMIO(0x9888), 0x06370800 }, - { _MMIO(0x9888), 0x08370840 }, - { _MMIO(0x9888), 0x10370000 }, - { _MMIO(0x9888), 0x0d933031 }, - { _MMIO(0x9888), 0x0f933e3f }, - { _MMIO(0x9888), 0x01933d00 }, - { _MMIO(0x9888), 0x0393073c }, - { _MMIO(0x9888), 0x0593000e }, - { _MMIO(0x9888), 0x1d930000 }, - { _MMIO(0x9888), 0x19930000 }, - { _MMIO(0x9888), 0x1b930000 }, - { _MMIO(0x9888), 0x1d900157 }, - { _MMIO(0x9888), 0x1f900158 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x2b908000 }, - { _MMIO(0x9888), 0x2d908000 }, - { _MMIO(0x9888), 0x2f908000 }, - { _MMIO(0x9888), 0x31908000 }, - { _MMIO(0x9888), 0x15908000 }, - { _MMIO(0x9888), 0x17908000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1190001f }, - { _MMIO(0x9888), 0x51904400 }, - { _MMIO(0x9888), 0x41900020 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900c21 }, - { _MMIO(0x9888), 0x47900061 }, - { _MMIO(0x9888), 0x57904440 }, - { _MMIO(0x9888), 0x49900000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x59900004 }, - { _MMIO(0x9888), 0x43900000 }, - { _MMIO(0x9888), 0x53904444 }, -}; - -static int -get_render_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - if (dev_priv->drm.pdev->revision >= 0x02) { - regs[n] = mux_config_render_basic_1_sku_gte_0x02; - lens[n] = ARRAY_SIZE(mux_config_render_basic_1_sku_gte_0x02); - n++; - } - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2740), 0x00000000 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_compute_basic_0_slices_0x01_and_sku_lt_0x02[] = { - { _MMIO(0x9888), 0x104f00e0 }, - { _MMIO(0x9888), 0x124f1c00 }, - { _MMIO(0x9888), 0x106c00e0 }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f901403 }, - { _MMIO(0x9888), 0x184e8000 }, - { _MMIO(0x9888), 0x1a4e8200 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x004f0db2 }, - { _MMIO(0x9888), 0x064f0900 }, - { _MMIO(0x9888), 0x084f1880 }, - { _MMIO(0x9888), 0x0a4f0011 }, - { _MMIO(0x9888), 0x0c4f0e3c }, - { _MMIO(0x9888), 0x0e4f1d80 }, - { _MMIO(0x9888), 0x086c0002 }, - { _MMIO(0x9888), 0x0a6c0100 }, - { _MMIO(0x9888), 0x0e6c000c }, - { _MMIO(0x9888), 0x026c000b }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x081b4000 }, - { _MMIO(0x9888), 0x0a1b8000 }, - { _MMIO(0x9888), 0x0e1b4000 }, - { _MMIO(0x9888), 0x021b4000 }, - { _MMIO(0x9888), 0x1a1c4000 }, - { _MMIO(0x9888), 0x1c1c0012 }, - { _MMIO(0x9888), 0x141c8000 }, - { _MMIO(0x9888), 0x005bc000 }, - { _MMIO(0x9888), 0x065b8000 }, - { _MMIO(0x9888), 0x085b8000 }, - { _MMIO(0x9888), 0x0a5b4000 }, - { _MMIO(0x9888), 0x0c5bc000 }, - { _MMIO(0x9888), 0x0e5b8000 }, - { _MMIO(0x9888), 0x105c8000 }, - { _MMIO(0x9888), 0x1a5ca000 }, - { _MMIO(0x9888), 0x1c5c002d }, - { _MMIO(0x9888), 0x125c8000 }, - { _MMIO(0x9888), 0x0a4c0800 }, - { _MMIO(0x9888), 0x0c4c0082 }, - { _MMIO(0x9888), 0x084c8000 }, - { _MMIO(0x9888), 0x000da000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x020d2000 }, - { _MMIO(0x9888), 0x0c0f5400 }, - { _MMIO(0x9888), 0x0e0f5500 }, - { _MMIO(0x9888), 0x100f0155 }, - { _MMIO(0x9888), 0x002cc000 }, - { _MMIO(0x9888), 0x0e2cc000 }, - { _MMIO(0x9888), 0x162cbe00 }, - { _MMIO(0x9888), 0x182c00ef }, - { _MMIO(0x9888), 0x022cc000 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x19900157 }, - { _MMIO(0x9888), 0x1b900167 }, - { _MMIO(0x9888), 0x1d900105 }, - { _MMIO(0x9888), 0x1f900103 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0xd28), 0x00000000 }, - { _MMIO(0x9888), 0x11900fff }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900840 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900842 }, - { _MMIO(0x9888), 0x47900840 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900840 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900040 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900840 }, - { _MMIO(0x9888), 0x53901111 }, -}; - -static const struct i915_oa_reg mux_config_compute_basic_0_slices_0x01_and_sku_gte_0x02[] = { - { _MMIO(0x9888), 0x104f00e0 }, - { _MMIO(0x9888), 0x124f1c00 }, - { _MMIO(0x9888), 0x106c00e0 }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f901403 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x1a4e0820 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x064f0900 }, - { _MMIO(0x9888), 0x084f0032 }, - { _MMIO(0x9888), 0x0a4f1810 }, - { _MMIO(0x9888), 0x0c4f0e00 }, - { _MMIO(0x9888), 0x0e4f003c }, - { _MMIO(0x9888), 0x004f0d80 }, - { _MMIO(0x9888), 0x024f003b }, - { _MMIO(0x9888), 0x006c0002 }, - { _MMIO(0x9888), 0x086c0000 }, - { _MMIO(0x9888), 0x0c6c000c }, - { _MMIO(0x9888), 0x0e6c0b00 }, - { _MMIO(0x9888), 0x186c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x001b4000 }, - { _MMIO(0x9888), 0x081b8000 }, - { _MMIO(0x9888), 0x0c1b4000 }, - { _MMIO(0x9888), 0x0e1b8000 }, - { _MMIO(0x9888), 0x101c8000 }, - { _MMIO(0x9888), 0x1a1c8000 }, - { _MMIO(0x9888), 0x1c1c0024 }, - { _MMIO(0x9888), 0x065b8000 }, - { _MMIO(0x9888), 0x085b4000 }, - { _MMIO(0x9888), 0x0a5bc000 }, - { _MMIO(0x9888), 0x0c5b8000 }, - { _MMIO(0x9888), 0x0e5b4000 }, - { _MMIO(0x9888), 0x005b8000 }, - { _MMIO(0x9888), 0x025b4000 }, - { _MMIO(0x9888), 0x1a5c6000 }, - { _MMIO(0x9888), 0x1c5c001b }, - { _MMIO(0x9888), 0x125c8000 }, - { _MMIO(0x9888), 0x145c8000 }, - { _MMIO(0x9888), 0x004c8000 }, - { _MMIO(0x9888), 0x0a4c2000 }, - { _MMIO(0x9888), 0x0c4c0208 }, - { _MMIO(0x9888), 0x000da000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x020d2000 }, - { _MMIO(0x9888), 0x0c0f5400 }, - { _MMIO(0x9888), 0x0e0f5500 }, - { _MMIO(0x9888), 0x100f0155 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2cc000 }, - { _MMIO(0x9888), 0x162cfb00 }, - { _MMIO(0x9888), 0x182c00be }, - { _MMIO(0x9888), 0x022cc000 }, - { _MMIO(0x9888), 0x042cc000 }, - { _MMIO(0x9888), 0x19900157 }, - { _MMIO(0x9888), 0x1b900167 }, - { _MMIO(0x9888), 0x1d900105 }, - { _MMIO(0x9888), 0x1f900103 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x11900fff }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900800 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900842 }, - { _MMIO(0x9888), 0x47900802 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900802 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900002 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900842 }, - { _MMIO(0x9888), 0x53901111 }, -}; - -static int -get_compute_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 2); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 2); - - if ((INTEL_INFO(dev_priv)->sseu.slice_mask & 0x01) && - (dev_priv->drm.pdev->revision < 0x02)) { - regs[n] = mux_config_compute_basic_0_slices_0x01_and_sku_lt_0x02; - lens[n] = ARRAY_SIZE(mux_config_compute_basic_0_slices_0x01_and_sku_lt_0x02); - n++; - } - if ((INTEL_INFO(dev_priv)->sseu.slice_mask & 0x01) && - (dev_priv->drm.pdev->revision >= 0x02)) { - regs[n] = mux_config_compute_basic_0_slices_0x01_and_sku_gte_0x02; - lens[n] = ARRAY_SIZE(mux_config_compute_basic_0_slices_0x01_and_sku_gte_0x02); - n++; - } - - return n; -} - -static const struct i915_oa_reg b_counter_config_render_pipe_profile[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007ffea }, - { _MMIO(0x2774), 0x00007ffc }, - { _MMIO(0x2778), 0x0007affa }, - { _MMIO(0x277c), 0x0000f5fd }, - { _MMIO(0x2780), 0x00079ffa }, - { _MMIO(0x2784), 0x0000f3fb }, - { _MMIO(0x2788), 0x0007bf7a }, - { _MMIO(0x278c), 0x0000f7e7 }, - { _MMIO(0x2790), 0x0007fefa }, - { _MMIO(0x2794), 0x0000f7cf }, - { _MMIO(0x2798), 0x00077ffa }, - { _MMIO(0x279c), 0x0000efdf }, - { _MMIO(0x27a0), 0x0006fffa }, - { _MMIO(0x27a4), 0x0000cfbf }, - { _MMIO(0x27a8), 0x0003fffa }, - { _MMIO(0x27ac), 0x00005f7f }, -}; - -static const struct i915_oa_reg flex_eu_config_render_pipe_profile[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_render_pipe_profile_0_sku_lt_0x02[] = { - { _MMIO(0x9888), 0x0c0e001f }, - { _MMIO(0x9888), 0x0a0f0000 }, - { _MMIO(0x9888), 0x10116800 }, - { _MMIO(0x9888), 0x178a03e0 }, - { _MMIO(0x9888), 0x11824c00 }, - { _MMIO(0x9888), 0x11830020 }, - { _MMIO(0x9888), 0x13840020 }, - { _MMIO(0x9888), 0x11850019 }, - { _MMIO(0x9888), 0x11860007 }, - { _MMIO(0x9888), 0x01870c40 }, - { _MMIO(0x9888), 0x17880000 }, - { _MMIO(0x9888), 0x022f4000 }, - { _MMIO(0x9888), 0x0a4c0040 }, - { _MMIO(0x9888), 0x0c0d8000 }, - { _MMIO(0x9888), 0x040d4000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x020e5400 }, - { _MMIO(0x9888), 0x000e0000 }, - { _MMIO(0x9888), 0x080f0040 }, - { _MMIO(0x9888), 0x000f0000 }, - { _MMIO(0x9888), 0x100f0000 }, - { _MMIO(0x9888), 0x0e0f0040 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x06104000 }, - { _MMIO(0x9888), 0x06110012 }, - { _MMIO(0x9888), 0x06131000 }, - { _MMIO(0x9888), 0x01898000 }, - { _MMIO(0x9888), 0x0d890100 }, - { _MMIO(0x9888), 0x03898000 }, - { _MMIO(0x9888), 0x09808000 }, - { _MMIO(0x9888), 0x0b808000 }, - { _MMIO(0x9888), 0x0380c000 }, - { _MMIO(0x9888), 0x0f8a0075 }, - { _MMIO(0x9888), 0x1d8a0000 }, - { _MMIO(0x9888), 0x118a8000 }, - { _MMIO(0x9888), 0x1b8a4000 }, - { _MMIO(0x9888), 0x138a8000 }, - { _MMIO(0x9888), 0x1d81a000 }, - { _MMIO(0x9888), 0x15818000 }, - { _MMIO(0x9888), 0x17818000 }, - { _MMIO(0x9888), 0x0b820030 }, - { _MMIO(0x9888), 0x07828000 }, - { _MMIO(0x9888), 0x0d824000 }, - { _MMIO(0x9888), 0x0f828000 }, - { _MMIO(0x9888), 0x05824000 }, - { _MMIO(0x9888), 0x0d830003 }, - { _MMIO(0x9888), 0x0583000c }, - { _MMIO(0x9888), 0x09830000 }, - { _MMIO(0x9888), 0x03838000 }, - { _MMIO(0x9888), 0x07838000 }, - { _MMIO(0x9888), 0x0b840980 }, - { _MMIO(0x9888), 0x03844d80 }, - { _MMIO(0x9888), 0x11840000 }, - { _MMIO(0x9888), 0x09848000 }, - { _MMIO(0x9888), 0x09850080 }, - { _MMIO(0x9888), 0x03850003 }, - { _MMIO(0x9888), 0x01850000 }, - { _MMIO(0x9888), 0x07860000 }, - { _MMIO(0x9888), 0x0f860400 }, - { _MMIO(0x9888), 0x09870032 }, - { _MMIO(0x9888), 0x01888052 }, - { _MMIO(0x9888), 0x11880000 }, - { _MMIO(0x9888), 0x09884000 }, - { _MMIO(0x9888), 0x15968000 }, - { _MMIO(0x9888), 0x17968000 }, - { _MMIO(0x9888), 0x0f96c000 }, - { _MMIO(0x9888), 0x1f950011 }, - { _MMIO(0x9888), 0x1d950014 }, - { _MMIO(0x9888), 0x0592c000 }, - { _MMIO(0x9888), 0x0b928000 }, - { _MMIO(0x9888), 0x0d924000 }, - { _MMIO(0x9888), 0x0f924000 }, - { _MMIO(0x9888), 0x11928000 }, - { _MMIO(0x9888), 0x1392c000 }, - { _MMIO(0x9888), 0x09924000 }, - { _MMIO(0x9888), 0x01985000 }, - { _MMIO(0x9888), 0x07988000 }, - { _MMIO(0x9888), 0x09981000 }, - { _MMIO(0x9888), 0x0b982000 }, - { _MMIO(0x9888), 0x0d982000 }, - { _MMIO(0x9888), 0x0f989000 }, - { _MMIO(0x9888), 0x05982000 }, - { _MMIO(0x9888), 0x13904000 }, - { _MMIO(0x9888), 0x21904000 }, - { _MMIO(0x9888), 0x23904000 }, - { _MMIO(0x9888), 0x25908000 }, - { _MMIO(0x9888), 0x27904000 }, - { _MMIO(0x9888), 0x29908000 }, - { _MMIO(0x9888), 0x2b904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17908000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x0b978000 }, - { _MMIO(0x9888), 0x0f974000 }, - { _MMIO(0x9888), 0x11974000 }, - { _MMIO(0x9888), 0x13978000 }, - { _MMIO(0x9888), 0x09974000 }, - { _MMIO(0xd28), 0x00000000 }, - { _MMIO(0x9888), 0x1190c080 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x419010a0 }, - { _MMIO(0x9888), 0x55904000 }, - { _MMIO(0x9888), 0x45901000 }, - { _MMIO(0x9888), 0x47900084 }, - { _MMIO(0x9888), 0x57904400 }, - { _MMIO(0x9888), 0x499000a5 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900081 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x439014a4 }, - { _MMIO(0x9888), 0x53900400 }, -}; - -static const struct i915_oa_reg mux_config_render_pipe_profile_0_sku_gte_0x02[] = { - { _MMIO(0x9888), 0x0c0e001f }, - { _MMIO(0x9888), 0x0a0f0000 }, - { _MMIO(0x9888), 0x10116800 }, - { _MMIO(0x9888), 0x178a03e0 }, - { _MMIO(0x9888), 0x11824c00 }, - { _MMIO(0x9888), 0x11830020 }, - { _MMIO(0x9888), 0x13840020 }, - { _MMIO(0x9888), 0x11850019 }, - { _MMIO(0x9888), 0x11860007 }, - { _MMIO(0x9888), 0x01870c40 }, - { _MMIO(0x9888), 0x17880000 }, - { _MMIO(0x9888), 0x022f4000 }, - { _MMIO(0x9888), 0x0a4c0040 }, - { _MMIO(0x9888), 0x0c0d8000 }, - { _MMIO(0x9888), 0x040d4000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x020e5400 }, - { _MMIO(0x9888), 0x000e0000 }, - { _MMIO(0x9888), 0x080f0040 }, - { _MMIO(0x9888), 0x000f0000 }, - { _MMIO(0x9888), 0x100f0000 }, - { _MMIO(0x9888), 0x0e0f0040 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x06104000 }, - { _MMIO(0x9888), 0x06110012 }, - { _MMIO(0x9888), 0x06131000 }, - { _MMIO(0x9888), 0x01898000 }, - { _MMIO(0x9888), 0x0d890100 }, - { _MMIO(0x9888), 0x03898000 }, - { _MMIO(0x9888), 0x09808000 }, - { _MMIO(0x9888), 0x0b808000 }, - { _MMIO(0x9888), 0x0380c000 }, - { _MMIO(0x9888), 0x0f8a0075 }, - { _MMIO(0x9888), 0x1d8a0000 }, - { _MMIO(0x9888), 0x118a8000 }, - { _MMIO(0x9888), 0x1b8a4000 }, - { _MMIO(0x9888), 0x138a8000 }, - { _MMIO(0x9888), 0x1d81a000 }, - { _MMIO(0x9888), 0x15818000 }, - { _MMIO(0x9888), 0x17818000 }, - { _MMIO(0x9888), 0x0b820030 }, - { _MMIO(0x9888), 0x07828000 }, - { _MMIO(0x9888), 0x0d824000 }, - { _MMIO(0x9888), 0x0f828000 }, - { _MMIO(0x9888), 0x05824000 }, - { _MMIO(0x9888), 0x0d830003 }, - { _MMIO(0x9888), 0x0583000c }, - { _MMIO(0x9888), 0x09830000 }, - { _MMIO(0x9888), 0x03838000 }, - { _MMIO(0x9888), 0x07838000 }, - { _MMIO(0x9888), 0x0b840980 }, - { _MMIO(0x9888), 0x03844d80 }, - { _MMIO(0x9888), 0x11840000 }, - { _MMIO(0x9888), 0x09848000 }, - { _MMIO(0x9888), 0x09850080 }, - { _MMIO(0x9888), 0x03850003 }, - { _MMIO(0x9888), 0x01850000 }, - { _MMIO(0x9888), 0x07860000 }, - { _MMIO(0x9888), 0x0f860400 }, - { _MMIO(0x9888), 0x09870032 }, - { _MMIO(0x9888), 0x01888052 }, - { _MMIO(0x9888), 0x11880000 }, - { _MMIO(0x9888), 0x09884000 }, - { _MMIO(0x9888), 0x1b931001 }, - { _MMIO(0x9888), 0x1d930001 }, - { _MMIO(0x9888), 0x19934000 }, - { _MMIO(0x9888), 0x1b958000 }, - { _MMIO(0x9888), 0x1d950094 }, - { _MMIO(0x9888), 0x19958000 }, - { _MMIO(0x9888), 0x05e5a000 }, - { _MMIO(0x9888), 0x01e5c000 }, - { _MMIO(0x9888), 0x0592c000 }, - { _MMIO(0x9888), 0x0b928000 }, - { _MMIO(0x9888), 0x0d924000 }, - { _MMIO(0x9888), 0x0f924000 }, - { _MMIO(0x9888), 0x11928000 }, - { _MMIO(0x9888), 0x1392c000 }, - { _MMIO(0x9888), 0x09924000 }, - { _MMIO(0x9888), 0x01985000 }, - { _MMIO(0x9888), 0x07988000 }, - { _MMIO(0x9888), 0x09981000 }, - { _MMIO(0x9888), 0x0b982000 }, - { _MMIO(0x9888), 0x0d982000 }, - { _MMIO(0x9888), 0x0f989000 }, - { _MMIO(0x9888), 0x05982000 }, - { _MMIO(0x9888), 0x13904000 }, - { _MMIO(0x9888), 0x21904000 }, - { _MMIO(0x9888), 0x23904000 }, - { _MMIO(0x9888), 0x25908000 }, - { _MMIO(0x9888), 0x27904000 }, - { _MMIO(0x9888), 0x29908000 }, - { _MMIO(0x9888), 0x2b904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17908000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1190c080 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x419010a0 }, - { _MMIO(0x9888), 0x55904000 }, - { _MMIO(0x9888), 0x45901000 }, - { _MMIO(0x9888), 0x47900084 }, - { _MMIO(0x9888), 0x57904400 }, - { _MMIO(0x9888), 0x499000a5 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900081 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x439014a4 }, - { _MMIO(0x9888), 0x53900400 }, -}; - -static int -get_render_pipe_profile_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 2); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 2); - - if (dev_priv->drm.pdev->revision < 0x02) { - regs[n] = mux_config_render_pipe_profile_0_sku_lt_0x02; - lens[n] = ARRAY_SIZE(mux_config_render_pipe_profile_0_sku_lt_0x02); - n++; - } - if (dev_priv->drm.pdev->revision >= 0x02) { - regs[n] = mux_config_render_pipe_profile_0_sku_gte_0x02; - lens[n] = ARRAY_SIZE(mux_config_render_pipe_profile_0_sku_gte_0x02); - n++; - } - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_reads[] = { - { _MMIO(0x272c), 0xffffffff }, - { _MMIO(0x2728), 0xffffffff }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x271c), 0xffffffff }, - { _MMIO(0x2718), 0xffffffff }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x86543210 }, - { _MMIO(0x2748), 0x86543210 }, - { _MMIO(0x2744), 0x00006667 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0x86543210 }, - { _MMIO(0x2758), 0x86543210 }, - { _MMIO(0x2754), 0x00006465 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fe00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fe00 }, - { _MMIO(0x2780), 0x0007f872 }, - { _MMIO(0x2784), 0x0000fe00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fe00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fe00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fe00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fe00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fe00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_reads[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_memory_reads_0_slices_0x01_and_sku_lt_0x02[] = { - { _MMIO(0x9888), 0x11810c00 }, - { _MMIO(0x9888), 0x1381001a }, - { _MMIO(0x9888), 0x13946000 }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f900003 }, - { _MMIO(0x9888), 0x03811300 }, - { _MMIO(0x9888), 0x05811b12 }, - { _MMIO(0x9888), 0x0781001a }, - { _MMIO(0x9888), 0x1f810000 }, - { _MMIO(0x9888), 0x17810000 }, - { _MMIO(0x9888), 0x19810000 }, - { _MMIO(0x9888), 0x1b810000 }, - { _MMIO(0x9888), 0x1d810000 }, - { _MMIO(0x9888), 0x0f968000 }, - { _MMIO(0x9888), 0x1196c000 }, - { _MMIO(0x9888), 0x13964000 }, - { _MMIO(0x9888), 0x11938000 }, - { _MMIO(0x9888), 0x1b93fe00 }, - { _MMIO(0x9888), 0x01940010 }, - { _MMIO(0x9888), 0x07941100 }, - { _MMIO(0x9888), 0x09941312 }, - { _MMIO(0x9888), 0x0b941514 }, - { _MMIO(0x9888), 0x0d941716 }, - { _MMIO(0x9888), 0x11940000 }, - { _MMIO(0x9888), 0x19940000 }, - { _MMIO(0x9888), 0x1b940000 }, - { _MMIO(0x9888), 0x1d940000 }, - { _MMIO(0x9888), 0x1b954000 }, - { _MMIO(0x9888), 0x1d95a550 }, - { _MMIO(0x9888), 0x1f9502aa }, - { _MMIO(0x9888), 0x2f900157 }, - { _MMIO(0x9888), 0x31900105 }, - { _MMIO(0x9888), 0x15900103 }, - { _MMIO(0x9888), 0x17900101 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x13908000 }, - { _MMIO(0x9888), 0x21908000 }, - { _MMIO(0x9888), 0x23908000 }, - { _MMIO(0x9888), 0x25908000 }, - { _MMIO(0x9888), 0x27908000 }, - { _MMIO(0x9888), 0x29908000 }, - { _MMIO(0x9888), 0x2b908000 }, - { _MMIO(0x9888), 0x2d908000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0xd28), 0x00000000 }, - { _MMIO(0x9888), 0x11900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c00 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900000 }, - { _MMIO(0x9888), 0x47900000 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900063 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static const struct i915_oa_reg mux_config_memory_reads_0_sku_lt_0x05_and_sku_gte_0x02[] = { - { _MMIO(0x9888), 0x11810c00 }, - { _MMIO(0x9888), 0x1381001a }, - { _MMIO(0x9888), 0x13946000 }, - { _MMIO(0x9888), 0x15940016 }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x03811300 }, - { _MMIO(0x9888), 0x05811b12 }, - { _MMIO(0x9888), 0x0781001a }, - { _MMIO(0x9888), 0x1f810000 }, - { _MMIO(0x9888), 0x17810000 }, - { _MMIO(0x9888), 0x19810000 }, - { _MMIO(0x9888), 0x1b810000 }, - { _MMIO(0x9888), 0x1d810000 }, - { _MMIO(0x9888), 0x19930800 }, - { _MMIO(0x9888), 0x1b93aa55 }, - { _MMIO(0x9888), 0x1d9300aa }, - { _MMIO(0x9888), 0x01940010 }, - { _MMIO(0x9888), 0x07941100 }, - { _MMIO(0x9888), 0x09941312 }, - { _MMIO(0x9888), 0x0b941514 }, - { _MMIO(0x9888), 0x0d941716 }, - { _MMIO(0x9888), 0x0f940018 }, - { _MMIO(0x9888), 0x1b940000 }, - { _MMIO(0x9888), 0x11940000 }, - { _MMIO(0x9888), 0x01e58000 }, - { _MMIO(0x9888), 0x03e57000 }, - { _MMIO(0x9888), 0x31900105 }, - { _MMIO(0x9888), 0x15900103 }, - { _MMIO(0x9888), 0x17900101 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x13908000 }, - { _MMIO(0x9888), 0x21908000 }, - { _MMIO(0x9888), 0x23908000 }, - { _MMIO(0x9888), 0x25908000 }, - { _MMIO(0x9888), 0x27908000 }, - { _MMIO(0x9888), 0x29908000 }, - { _MMIO(0x9888), 0x2b908000 }, - { _MMIO(0x9888), 0x2d908000 }, - { _MMIO(0x9888), 0x2f908000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0x9888), 0x11900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c20 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900400 }, - { _MMIO(0x9888), 0x47900421 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900421 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900061 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static const struct i915_oa_reg mux_config_memory_reads_0_sku_gte_0x05[] = { - { _MMIO(0x9888), 0x11810c00 }, - { _MMIO(0x9888), 0x1381001a }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f900064 }, - { _MMIO(0x9888), 0x03811300 }, - { _MMIO(0x9888), 0x05811b12 }, - { _MMIO(0x9888), 0x0781001a }, - { _MMIO(0x9888), 0x1f810000 }, - { _MMIO(0x9888), 0x17810000 }, - { _MMIO(0x9888), 0x19810000 }, - { _MMIO(0x9888), 0x1b810000 }, - { _MMIO(0x9888), 0x1d810000 }, - { _MMIO(0x9888), 0x1b930055 }, - { _MMIO(0x9888), 0x03e58000 }, - { _MMIO(0x9888), 0x05e5c000 }, - { _MMIO(0x9888), 0x07e54000 }, - { _MMIO(0x9888), 0x13900150 }, - { _MMIO(0x9888), 0x21900151 }, - { _MMIO(0x9888), 0x23900152 }, - { _MMIO(0x9888), 0x25900153 }, - { _MMIO(0x9888), 0x27900154 }, - { _MMIO(0x9888), 0x29900155 }, - { _MMIO(0x9888), 0x2b900156 }, - { _MMIO(0x9888), 0x2d900157 }, - { _MMIO(0x9888), 0x2f90015f }, - { _MMIO(0x9888), 0x31900105 }, - { _MMIO(0x9888), 0x15900103 }, - { _MMIO(0x9888), 0x17900101 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0x9888), 0x11900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c60 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900c00 }, - { _MMIO(0x9888), 0x47900c63 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900c63 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900063 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static int -get_memory_reads_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 3); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 3); - - if ((INTEL_INFO(dev_priv)->sseu.slice_mask & 0x01) && - (dev_priv->drm.pdev->revision < 0x02)) { - regs[n] = mux_config_memory_reads_0_slices_0x01_and_sku_lt_0x02; - lens[n] = ARRAY_SIZE(mux_config_memory_reads_0_slices_0x01_and_sku_lt_0x02); - n++; - } - if ((dev_priv->drm.pdev->revision < 0x05) && - (dev_priv->drm.pdev->revision >= 0x02)) { - regs[n] = mux_config_memory_reads_0_sku_lt_0x05_and_sku_gte_0x02; - lens[n] = ARRAY_SIZE(mux_config_memory_reads_0_sku_lt_0x05_and_sku_gte_0x02); - n++; - } - if (dev_priv->drm.pdev->revision >= 0x05) { - regs[n] = mux_config_memory_reads_0_sku_gte_0x05; - lens[n] = ARRAY_SIZE(mux_config_memory_reads_0_sku_gte_0x05); - n++; - } - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_writes[] = { - { _MMIO(0x272c), 0xffffffff }, - { _MMIO(0x2728), 0xffffffff }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x271c), 0xffffffff }, - { _MMIO(0x2718), 0xffffffff }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x86543210 }, - { _MMIO(0x2748), 0x86543210 }, - { _MMIO(0x2744), 0x00006667 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0x86543210 }, - { _MMIO(0x2758), 0x86543210 }, - { _MMIO(0x2754), 0x00006465 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fe00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fe00 }, - { _MMIO(0x2780), 0x0007f822 }, - { _MMIO(0x2784), 0x0000fe00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fe00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fe00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fe00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fe00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fe00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_writes[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_memory_writes_0_slices_0x01_and_sku_lt_0x02[] = { - { _MMIO(0x9888), 0x11810c00 }, - { _MMIO(0x9888), 0x1381001a }, - { _MMIO(0x9888), 0x13945400 }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f901400 }, - { _MMIO(0x9888), 0x03811300 }, - { _MMIO(0x9888), 0x05811b12 }, - { _MMIO(0x9888), 0x0781001a }, - { _MMIO(0x9888), 0x1f810000 }, - { _MMIO(0x9888), 0x17810000 }, - { _MMIO(0x9888), 0x19810000 }, - { _MMIO(0x9888), 0x1b810000 }, - { _MMIO(0x9888), 0x1d810000 }, - { _MMIO(0x9888), 0x0f968000 }, - { _MMIO(0x9888), 0x1196c000 }, - { _MMIO(0x9888), 0x13964000 }, - { _MMIO(0x9888), 0x11938000 }, - { _MMIO(0x9888), 0x1b93fe00 }, - { _MMIO(0x9888), 0x01940010 }, - { _MMIO(0x9888), 0x07941100 }, - { _MMIO(0x9888), 0x09941312 }, - { _MMIO(0x9888), 0x0b941514 }, - { _MMIO(0x9888), 0x0d941716 }, - { _MMIO(0x9888), 0x11940000 }, - { _MMIO(0x9888), 0x19940000 }, - { _MMIO(0x9888), 0x1b940000 }, - { _MMIO(0x9888), 0x1d940000 }, - { _MMIO(0x9888), 0x1b954000 }, - { _MMIO(0x9888), 0x1d95a550 }, - { _MMIO(0x9888), 0x1f9502aa }, - { _MMIO(0x9888), 0x2f900167 }, - { _MMIO(0x9888), 0x31900105 }, - { _MMIO(0x9888), 0x15900103 }, - { _MMIO(0x9888), 0x17900101 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x13908000 }, - { _MMIO(0x9888), 0x21908000 }, - { _MMIO(0x9888), 0x23908000 }, - { _MMIO(0x9888), 0x25908000 }, - { _MMIO(0x9888), 0x27908000 }, - { _MMIO(0x9888), 0x29908000 }, - { _MMIO(0x9888), 0x2b908000 }, - { _MMIO(0x9888), 0x2d908000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0xd28), 0x00000000 }, - { _MMIO(0x9888), 0x11900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c00 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900000 }, - { _MMIO(0x9888), 0x47900000 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900063 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static const struct i915_oa_reg mux_config_memory_writes_0_sku_lt_0x05_and_sku_gte_0x02[] = { - { _MMIO(0x9888), 0x11810c00 }, - { _MMIO(0x9888), 0x1381001a }, - { _MMIO(0x9888), 0x13945400 }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f901400 }, - { _MMIO(0x9888), 0x03811300 }, - { _MMIO(0x9888), 0x05811b12 }, - { _MMIO(0x9888), 0x0781001a }, - { _MMIO(0x9888), 0x1f810000 }, - { _MMIO(0x9888), 0x17810000 }, - { _MMIO(0x9888), 0x19810000 }, - { _MMIO(0x9888), 0x1b810000 }, - { _MMIO(0x9888), 0x1d810000 }, - { _MMIO(0x9888), 0x19930800 }, - { _MMIO(0x9888), 0x1b93aa55 }, - { _MMIO(0x9888), 0x1d93002a }, - { _MMIO(0x9888), 0x01940010 }, - { _MMIO(0x9888), 0x07941100 }, - { _MMIO(0x9888), 0x09941312 }, - { _MMIO(0x9888), 0x0b941514 }, - { _MMIO(0x9888), 0x0d941716 }, - { _MMIO(0x9888), 0x1b940000 }, - { _MMIO(0x9888), 0x11940000 }, - { _MMIO(0x9888), 0x01e58000 }, - { _MMIO(0x9888), 0x03e57000 }, - { _MMIO(0x9888), 0x2f900167 }, - { _MMIO(0x9888), 0x31900105 }, - { _MMIO(0x9888), 0x15900103 }, - { _MMIO(0x9888), 0x17900101 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x13908000 }, - { _MMIO(0x9888), 0x21908000 }, - { _MMIO(0x9888), 0x23908000 }, - { _MMIO(0x9888), 0x25908000 }, - { _MMIO(0x9888), 0x27908000 }, - { _MMIO(0x9888), 0x29908000 }, - { _MMIO(0x9888), 0x2b908000 }, - { _MMIO(0x9888), 0x2d908000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0x9888), 0x11900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c20 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900400 }, - { _MMIO(0x9888), 0x47900421 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900421 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900063 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static const struct i915_oa_reg mux_config_memory_writes_0_sku_gte_0x05[] = { - { _MMIO(0x9888), 0x11810c00 }, - { _MMIO(0x9888), 0x1381001a }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f901000 }, - { _MMIO(0x9888), 0x03811300 }, - { _MMIO(0x9888), 0x05811b12 }, - { _MMIO(0x9888), 0x0781001a }, - { _MMIO(0x9888), 0x1f810000 }, - { _MMIO(0x9888), 0x17810000 }, - { _MMIO(0x9888), 0x19810000 }, - { _MMIO(0x9888), 0x1b810000 }, - { _MMIO(0x9888), 0x1d810000 }, - { _MMIO(0x9888), 0x1b930055 }, - { _MMIO(0x9888), 0x03e58000 }, - { _MMIO(0x9888), 0x05e5c000 }, - { _MMIO(0x9888), 0x07e54000 }, - { _MMIO(0x9888), 0x13900160 }, - { _MMIO(0x9888), 0x21900161 }, - { _MMIO(0x9888), 0x23900162 }, - { _MMIO(0x9888), 0x25900163 }, - { _MMIO(0x9888), 0x27900164 }, - { _MMIO(0x9888), 0x29900165 }, - { _MMIO(0x9888), 0x2b900166 }, - { _MMIO(0x9888), 0x2d900167 }, - { _MMIO(0x9888), 0x2f900150 }, - { _MMIO(0x9888), 0x31900105 }, - { _MMIO(0x9888), 0x15900103 }, - { _MMIO(0x9888), 0x17900101 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0x9888), 0x11900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c60 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900c00 }, - { _MMIO(0x9888), 0x47900c63 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900c63 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900063 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static int -get_memory_writes_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 3); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 3); - - if ((INTEL_INFO(dev_priv)->sseu.slice_mask & 0x01) && - (dev_priv->drm.pdev->revision < 0x02)) { - regs[n] = mux_config_memory_writes_0_slices_0x01_and_sku_lt_0x02; - lens[n] = ARRAY_SIZE(mux_config_memory_writes_0_slices_0x01_and_sku_lt_0x02); - n++; - } - if ((dev_priv->drm.pdev->revision < 0x05) && - (dev_priv->drm.pdev->revision >= 0x02)) { - regs[n] = mux_config_memory_writes_0_sku_lt_0x05_and_sku_gte_0x02; - lens[n] = ARRAY_SIZE(mux_config_memory_writes_0_sku_lt_0x05_and_sku_gte_0x02); - n++; - } - if (dev_priv->drm.pdev->revision >= 0x05) { - regs[n] = mux_config_memory_writes_0_sku_gte_0x05; - lens[n] = ARRAY_SIZE(mux_config_memory_writes_0_sku_gte_0x05); - n++; - } - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_extended[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007fc2a }, - { _MMIO(0x2774), 0x0000bf00 }, - { _MMIO(0x2778), 0x0007fc6a }, - { _MMIO(0x277c), 0x0000bf00 }, - { _MMIO(0x2780), 0x0007fc92 }, - { _MMIO(0x2784), 0x0000bf00 }, - { _MMIO(0x2788), 0x0007fca2 }, - { _MMIO(0x278c), 0x0000bf00 }, - { _MMIO(0x2790), 0x0007fc32 }, - { _MMIO(0x2794), 0x0000bf00 }, - { _MMIO(0x2798), 0x0007fc9a }, - { _MMIO(0x279c), 0x0000bf00 }, - { _MMIO(0x27a0), 0x0007fe6a }, - { _MMIO(0x27a4), 0x0000bf00 }, - { _MMIO(0x27a8), 0x0007fe7a }, - { _MMIO(0x27ac), 0x0000bf00 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_extended[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_compute_extended_0_subslices_0x01[] = { - { _MMIO(0x9888), 0x106c00e0 }, - { _MMIO(0x9888), 0x141c8160 }, - { _MMIO(0x9888), 0x161c8015 }, - { _MMIO(0x9888), 0x181c0120 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x0e4e8000 }, - { _MMIO(0x9888), 0x184e8000 }, - { _MMIO(0x9888), 0x1a4eaaa0 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x024e8000 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x0e6c0b01 }, - { _MMIO(0x9888), 0x006c0200 }, - { _MMIO(0x9888), 0x026c000c }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x0e1bc000 }, - { _MMIO(0x9888), 0x001b8000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x001c0041 }, - { _MMIO(0x9888), 0x061c4200 }, - { _MMIO(0x9888), 0x081c4443 }, - { _MMIO(0x9888), 0x0a1c4645 }, - { _MMIO(0x9888), 0x0c1c7647 }, - { _MMIO(0x9888), 0x041c7357 }, - { _MMIO(0x9888), 0x1c1c0030 }, - { _MMIO(0x9888), 0x101c0000 }, - { _MMIO(0x9888), 0x1a1c0000 }, - { _MMIO(0x9888), 0x121c8000 }, - { _MMIO(0x9888), 0x004c8000 }, - { _MMIO(0x9888), 0x0a4caa2a }, - { _MMIO(0x9888), 0x0c4c02aa }, - { _MMIO(0x9888), 0x084ca000 }, - { _MMIO(0x9888), 0x000da000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x0c0f5400 }, - { _MMIO(0x9888), 0x0e0f5515 }, - { _MMIO(0x9888), 0x100f0155 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2c8000 }, - { _MMIO(0x9888), 0x162caa00 }, - { _MMIO(0x9888), 0x182c00aa }, - { _MMIO(0x9888), 0x022c8000 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0xd28), 0x00000000 }, - { _MMIO(0x9888), 0x11907fff }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900040 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900802 }, - { _MMIO(0x9888), 0x47900842 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900842 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900800 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static int -get_compute_extended_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - if (INTEL_INFO(dev_priv)->sseu.subslice_mask & 0x01) { - regs[n] = mux_config_compute_extended_0_subslices_0x01; - lens[n] = ARRAY_SIZE(mux_config_compute_extended_0_subslices_0x01); - n++; - } - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_l3_cache[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x30800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007fffa }, - { _MMIO(0x2774), 0x0000fefe }, - { _MMIO(0x2778), 0x0007fffa }, - { _MMIO(0x277c), 0x0000fefd }, - { _MMIO(0x2790), 0x0007fffa }, - { _MMIO(0x2794), 0x0000fbef }, - { _MMIO(0x2798), 0x0007fffa }, - { _MMIO(0x279c), 0x0000fbdf }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_l3_cache[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00101100 }, - { _MMIO(0xe45c), 0x00201200 }, - { _MMIO(0xe55c), 0x00301300 }, - { _MMIO(0xe65c), 0x00401400 }, -}; - -static const struct i915_oa_reg mux_config_compute_l3_cache[] = { - { _MMIO(0x9888), 0x166c0760 }, - { _MMIO(0x9888), 0x1593001e }, - { _MMIO(0x9888), 0x3f901403 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x0e4e8000 }, - { _MMIO(0x9888), 0x184e8000 }, - { _MMIO(0x9888), 0x1a4e8020 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x006c0051 }, - { _MMIO(0x9888), 0x066c5000 }, - { _MMIO(0x9888), 0x086c5c5d }, - { _MMIO(0x9888), 0x0e6c5e5f }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x186c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x001b4000 }, - { _MMIO(0x9888), 0x061b8000 }, - { _MMIO(0x9888), 0x081bc000 }, - { _MMIO(0x9888), 0x0e1bc000 }, - { _MMIO(0x9888), 0x101c8000 }, - { _MMIO(0x9888), 0x1a1ce000 }, - { _MMIO(0x9888), 0x1c1c0030 }, - { _MMIO(0x9888), 0x004c8000 }, - { _MMIO(0x9888), 0x0a4c2a00 }, - { _MMIO(0x9888), 0x0c4c0280 }, - { _MMIO(0x9888), 0x000d2000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x0c0f0400 }, - { _MMIO(0x9888), 0x0e0f1500 }, - { _MMIO(0x9888), 0x100f0140 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2c8000 }, - { _MMIO(0x9888), 0x162c0a00 }, - { _MMIO(0x9888), 0x182c00a0 }, - { _MMIO(0x9888), 0x03933300 }, - { _MMIO(0x9888), 0x05930032 }, - { _MMIO(0x9888), 0x11930000 }, - { _MMIO(0x9888), 0x1b930000 }, - { _MMIO(0x9888), 0x1d900157 }, - { _MMIO(0x9888), 0x1f900167 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1190030f }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900000 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900042 }, - { _MMIO(0x9888), 0x47900000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x53901111 }, - { _MMIO(0x9888), 0x43900420 }, -}; - -static int -get_compute_l3_cache_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_l3_cache; - lens[n] = ARRAY_SIZE(mux_config_compute_l3_cache); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_hdc_and_sf[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x10800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000fdff }, -}; - -static const struct i915_oa_reg flex_eu_config_hdc_and_sf[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_hdc_and_sf[] = { - { _MMIO(0x9888), 0x104f0232 }, - { _MMIO(0x9888), 0x124f4640 }, - { _MMIO(0x9888), 0x106c0232 }, - { _MMIO(0x9888), 0x11834400 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x0c4e8000 }, - { _MMIO(0x9888), 0x004f1880 }, - { _MMIO(0x9888), 0x024f08bb }, - { _MMIO(0x9888), 0x044f001b }, - { _MMIO(0x9888), 0x046c0100 }, - { _MMIO(0x9888), 0x066c000b }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x041b8000 }, - { _MMIO(0x9888), 0x061b4000 }, - { _MMIO(0x9888), 0x1a1c1800 }, - { _MMIO(0x9888), 0x005b8000 }, - { _MMIO(0x9888), 0x025bc000 }, - { _MMIO(0x9888), 0x045b4000 }, - { _MMIO(0x9888), 0x125c8000 }, - { _MMIO(0x9888), 0x145c8000 }, - { _MMIO(0x9888), 0x165c8000 }, - { _MMIO(0x9888), 0x185c8000 }, - { _MMIO(0x9888), 0x0a4c00a0 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0f5000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x022cc000 }, - { _MMIO(0x9888), 0x042cc000 }, - { _MMIO(0x9888), 0x062cc000 }, - { _MMIO(0x9888), 0x082cc000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x0f828000 }, - { _MMIO(0x9888), 0x0f8305c0 }, - { _MMIO(0x9888), 0x09830000 }, - { _MMIO(0x9888), 0x07830000 }, - { _MMIO(0x9888), 0x1d950080 }, - { _MMIO(0x9888), 0x13928000 }, - { _MMIO(0x9888), 0x0f988000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x1190fc00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x4b9000a0 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900800 }, - { _MMIO(0x9888), 0x43900842 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900000 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_hdc_and_sf_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_hdc_and_sf; - lens[n] = ARRAY_SIZE(mux_config_hdc_and_sf); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00014002 }, - { _MMIO(0x277c), 0x0000c3ff }, - { _MMIO(0x2780), 0x00010002 }, - { _MMIO(0x2784), 0x0000c7ff }, - { _MMIO(0x2788), 0x00004002 }, - { _MMIO(0x278c), 0x0000d3ff }, - { _MMIO(0x2790), 0x00100700 }, - { _MMIO(0x2794), 0x0000ff1f }, - { _MMIO(0x2798), 0x00001402 }, - { _MMIO(0x279c), 0x0000fc3f }, - { _MMIO(0x27a0), 0x00001002 }, - { _MMIO(0x27a4), 0x0000fc7f }, - { _MMIO(0x27a8), 0x00000402 }, - { _MMIO(0x27ac), 0x0000fd3f }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_1[] = { - { _MMIO(0x9888), 0x126c7b40 }, - { _MMIO(0x9888), 0x166c0020 }, - { _MMIO(0x9888), 0x0a603444 }, - { _MMIO(0x9888), 0x0a613400 }, - { _MMIO(0x9888), 0x1a4ea800 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x024e8000 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x064f4000 }, - { _MMIO(0x9888), 0x0c6c5327 }, - { _MMIO(0x9888), 0x0e6c5425 }, - { _MMIO(0x9888), 0x006c2a00 }, - { _MMIO(0x9888), 0x026c285b }, - { _MMIO(0x9888), 0x046c005c }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x1a6c0800 }, - { _MMIO(0x9888), 0x0c1bc000 }, - { _MMIO(0x9888), 0x0e1bc000 }, - { _MMIO(0x9888), 0x001b8000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x041bc000 }, - { _MMIO(0x9888), 0x1c1c003c }, - { _MMIO(0x9888), 0x121c8000 }, - { _MMIO(0x9888), 0x141c8000 }, - { _MMIO(0x9888), 0x161c8000 }, - { _MMIO(0x9888), 0x181c8000 }, - { _MMIO(0x9888), 0x1a1c0800 }, - { _MMIO(0x9888), 0x065b4000 }, - { _MMIO(0x9888), 0x1a5c1000 }, - { _MMIO(0x9888), 0x10600000 }, - { _MMIO(0x9888), 0x04600000 }, - { _MMIO(0x9888), 0x0c610044 }, - { _MMIO(0x9888), 0x10610000 }, - { _MMIO(0x9888), 0x06610000 }, - { _MMIO(0x9888), 0x0c4c02a8 }, - { _MMIO(0x9888), 0x084ca000 }, - { _MMIO(0x9888), 0x0a4c002a }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x100f0154 }, - { _MMIO(0x9888), 0x0c0f5000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x182c00aa }, - { _MMIO(0x9888), 0x022c8000 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2cc000 }, - { _MMIO(0x9888), 0x1190ffc0 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900420 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900021 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900400 }, - { _MMIO(0x9888), 0x43900421 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900040 }, -}; - -static int -get_l3_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_1; - lens[n] = ARRAY_SIZE(mux_config_l3_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00028002 }, - { _MMIO(0x277c), 0x000087ff }, - { _MMIO(0x2780), 0x00020002 }, - { _MMIO(0x2784), 0x00008fff }, - { _MMIO(0x2788), 0x00008002 }, - { _MMIO(0x278c), 0x0000a7ff }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_2[] = { - { _MMIO(0x9888), 0x126c02e0 }, - { _MMIO(0x9888), 0x146c0001 }, - { _MMIO(0x9888), 0x0a623400 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x064f4000 }, - { _MMIO(0x9888), 0x026c3324 }, - { _MMIO(0x9888), 0x046c3422 }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x041bc000 }, - { _MMIO(0x9888), 0x141c8000 }, - { _MMIO(0x9888), 0x161c8000 }, - { _MMIO(0x9888), 0x181c8000 }, - { _MMIO(0x9888), 0x1a1c0800 }, - { _MMIO(0x9888), 0x065b4000 }, - { _MMIO(0x9888), 0x1a5c1000 }, - { _MMIO(0x9888), 0x06614000 }, - { _MMIO(0x9888), 0x0c620044 }, - { _MMIO(0x9888), 0x10620000 }, - { _MMIO(0x9888), 0x06620000 }, - { _MMIO(0x9888), 0x084c8000 }, - { _MMIO(0x9888), 0x0a4c002a }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0f4000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2cc000 }, - { _MMIO(0x9888), 0x1190f800 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x43900000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900000 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_l3_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_2; - lens[n] = ARRAY_SIZE(mux_config_l3_2); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_3[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00028002 }, - { _MMIO(0x277c), 0x000087ff }, - { _MMIO(0x2780), 0x00020002 }, - { _MMIO(0x2784), 0x00008fff }, - { _MMIO(0x2788), 0x00008002 }, - { _MMIO(0x278c), 0x0000a7ff }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_3[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_3[] = { - { _MMIO(0x9888), 0x126c4e80 }, - { _MMIO(0x9888), 0x146c0000 }, - { _MMIO(0x9888), 0x0a633400 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x0c4e8000 }, - { _MMIO(0x9888), 0x026c3321 }, - { _MMIO(0x9888), 0x046c342f }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1a6c2000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x041bc000 }, - { _MMIO(0x9888), 0x061b4000 }, - { _MMIO(0x9888), 0x141c8000 }, - { _MMIO(0x9888), 0x161c8000 }, - { _MMIO(0x9888), 0x181c8000 }, - { _MMIO(0x9888), 0x1a1c1800 }, - { _MMIO(0x9888), 0x06604000 }, - { _MMIO(0x9888), 0x0c630044 }, - { _MMIO(0x9888), 0x10630000 }, - { _MMIO(0x9888), 0x06630000 }, - { _MMIO(0x9888), 0x084c8000 }, - { _MMIO(0x9888), 0x0a4c00aa }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0f4000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x1190f800 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x43900842 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900002 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_l3_3_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_3; - lens[n] = ARRAY_SIZE(mux_config_l3_3); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x30800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000efff }, - { _MMIO(0x2778), 0x00006000 }, - { _MMIO(0x277c), 0x0000f3ff }, -}; - -static const struct i915_oa_reg flex_eu_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x9888), 0x102f3800 }, - { _MMIO(0x9888), 0x144d0500 }, - { _MMIO(0x9888), 0x120d03c0 }, - { _MMIO(0x9888), 0x140d03cf }, - { _MMIO(0x9888), 0x0c0f0004 }, - { _MMIO(0x9888), 0x0c4e4000 }, - { _MMIO(0x9888), 0x042f0480 }, - { _MMIO(0x9888), 0x082f0000 }, - { _MMIO(0x9888), 0x022f0000 }, - { _MMIO(0x9888), 0x0a4c0090 }, - { _MMIO(0x9888), 0x064d0027 }, - { _MMIO(0x9888), 0x004d0000 }, - { _MMIO(0x9888), 0x000d0d40 }, - { _MMIO(0x9888), 0x020d803f }, - { _MMIO(0x9888), 0x040d8023 }, - { _MMIO(0x9888), 0x100d0000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x020f0010 }, - { _MMIO(0x9888), 0x000f0000 }, - { _MMIO(0x9888), 0x0e0f0050 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x1190fc00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41901400 }, - { _MMIO(0x9888), 0x43901485 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900001 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_rasterizer_and_pixel_backend_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_rasterizer_and_pixel_backend; - lens[n] = ARRAY_SIZE(mux_config_rasterizer_and_pixel_backend); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_sampler[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x70800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x0000c000 }, - { _MMIO(0x2774), 0x0000e7ff }, - { _MMIO(0x2778), 0x00003000 }, - { _MMIO(0x277c), 0x0000f9ff }, - { _MMIO(0x2780), 0x00000c00 }, - { _MMIO(0x2784), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_sampler[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_sampler[] = { - { _MMIO(0x9888), 0x14152c00 }, - { _MMIO(0x9888), 0x16150005 }, - { _MMIO(0x9888), 0x121600a0 }, - { _MMIO(0x9888), 0x14352c00 }, - { _MMIO(0x9888), 0x16350005 }, - { _MMIO(0x9888), 0x123600a0 }, - { _MMIO(0x9888), 0x14552c00 }, - { _MMIO(0x9888), 0x16550005 }, - { _MMIO(0x9888), 0x125600a0 }, - { _MMIO(0x9888), 0x062f6000 }, - { _MMIO(0x9888), 0x022f2000 }, - { _MMIO(0x9888), 0x0c4c0050 }, - { _MMIO(0x9888), 0x0a4c0010 }, - { _MMIO(0x9888), 0x0c0d8000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x100f0350 }, - { _MMIO(0x9888), 0x0c0fb000 }, - { _MMIO(0x9888), 0x0e0f00da }, - { _MMIO(0x9888), 0x182c0028 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x022dc000 }, - { _MMIO(0x9888), 0x042d4000 }, - { _MMIO(0x9888), 0x0c138000 }, - { _MMIO(0x9888), 0x0e132000 }, - { _MMIO(0x9888), 0x0413c000 }, - { _MMIO(0x9888), 0x1c140018 }, - { _MMIO(0x9888), 0x0c157000 }, - { _MMIO(0x9888), 0x0e150078 }, - { _MMIO(0x9888), 0x10150000 }, - { _MMIO(0x9888), 0x04162180 }, - { _MMIO(0x9888), 0x02160000 }, - { _MMIO(0x9888), 0x04174000 }, - { _MMIO(0x9888), 0x0233a000 }, - { _MMIO(0x9888), 0x04333000 }, - { _MMIO(0x9888), 0x14348000 }, - { _MMIO(0x9888), 0x16348000 }, - { _MMIO(0x9888), 0x02357870 }, - { _MMIO(0x9888), 0x10350000 }, - { _MMIO(0x9888), 0x04360043 }, - { _MMIO(0x9888), 0x02360000 }, - { _MMIO(0x9888), 0x04371000 }, - { _MMIO(0x9888), 0x0e538000 }, - { _MMIO(0x9888), 0x00538000 }, - { _MMIO(0x9888), 0x06533000 }, - { _MMIO(0x9888), 0x1c540020 }, - { _MMIO(0x9888), 0x12548000 }, - { _MMIO(0x9888), 0x0e557000 }, - { _MMIO(0x9888), 0x00557800 }, - { _MMIO(0x9888), 0x10550000 }, - { _MMIO(0x9888), 0x06560043 }, - { _MMIO(0x9888), 0x02560000 }, - { _MMIO(0x9888), 0x06571000 }, - { _MMIO(0x9888), 0x1190ff80 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900060 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c00 }, - { _MMIO(0x9888), 0x43900842 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900060 }, -}; - -static int -get_sampler_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_sampler; - lens[n] = ARRAY_SIZE(mux_config_sampler); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x00007fff }, - { _MMIO(0x2778), 0x00000000 }, - { _MMIO(0x277c), 0x00009fff }, - { _MMIO(0x2780), 0x00000002 }, - { _MMIO(0x2784), 0x0000efff }, - { _MMIO(0x2788), 0x00000000 }, - { _MMIO(0x278c), 0x0000f3ff }, - { _MMIO(0x2790), 0x00000002 }, - { _MMIO(0x2794), 0x0000fdff }, - { _MMIO(0x2798), 0x00000000 }, - { _MMIO(0x279c), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_1[] = { - { _MMIO(0x9888), 0x12120000 }, - { _MMIO(0x9888), 0x12320000 }, - { _MMIO(0x9888), 0x12520000 }, - { _MMIO(0x9888), 0x002f8000 }, - { _MMIO(0x9888), 0x022f3000 }, - { _MMIO(0x9888), 0x0a4c0015 }, - { _MMIO(0x9888), 0x0c0d8000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x100f03a0 }, - { _MMIO(0x9888), 0x0c0ff000 }, - { _MMIO(0x9888), 0x0e0f0095 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2d8000 }, - { _MMIO(0x9888), 0x0e2d4000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x02108000 }, - { _MMIO(0x9888), 0x0410c000 }, - { _MMIO(0x9888), 0x02118000 }, - { _MMIO(0x9888), 0x0411c000 }, - { _MMIO(0x9888), 0x02121880 }, - { _MMIO(0x9888), 0x041219b5 }, - { _MMIO(0x9888), 0x00120000 }, - { _MMIO(0x9888), 0x02134000 }, - { _MMIO(0x9888), 0x04135000 }, - { _MMIO(0x9888), 0x0c308000 }, - { _MMIO(0x9888), 0x0e304000 }, - { _MMIO(0x9888), 0x06304000 }, - { _MMIO(0x9888), 0x0c318000 }, - { _MMIO(0x9888), 0x0e314000 }, - { _MMIO(0x9888), 0x06314000 }, - { _MMIO(0x9888), 0x0c321a80 }, - { _MMIO(0x9888), 0x0e320033 }, - { _MMIO(0x9888), 0x06320031 }, - { _MMIO(0x9888), 0x00320000 }, - { _MMIO(0x9888), 0x0c334000 }, - { _MMIO(0x9888), 0x0e331000 }, - { _MMIO(0x9888), 0x06331000 }, - { _MMIO(0x9888), 0x0e508000 }, - { _MMIO(0x9888), 0x00508000 }, - { _MMIO(0x9888), 0x02504000 }, - { _MMIO(0x9888), 0x0e518000 }, - { _MMIO(0x9888), 0x00518000 }, - { _MMIO(0x9888), 0x02514000 }, - { _MMIO(0x9888), 0x0e521880 }, - { _MMIO(0x9888), 0x00521a80 }, - { _MMIO(0x9888), 0x02520033 }, - { _MMIO(0x9888), 0x0e534000 }, - { _MMIO(0x9888), 0x00534000 }, - { _MMIO(0x9888), 0x02531000 }, - { _MMIO(0x9888), 0x1190ff80 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900800 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900062 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c00 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900040 }, -}; - -static int -get_tdl_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_1; - lens[n] = ARRAY_SIZE(mux_config_tdl_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_2[] = { - { _MMIO(0x9888), 0x12124d60 }, - { _MMIO(0x9888), 0x12322e60 }, - { _MMIO(0x9888), 0x12524d60 }, - { _MMIO(0x9888), 0x022f3000 }, - { _MMIO(0x9888), 0x0a4c0014 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0fe000 }, - { _MMIO(0x9888), 0x0e0f0097 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x002d8000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x0410c000 }, - { _MMIO(0x9888), 0x0411c000 }, - { _MMIO(0x9888), 0x04121fb7 }, - { _MMIO(0x9888), 0x00120000 }, - { _MMIO(0x9888), 0x04135000 }, - { _MMIO(0x9888), 0x00308000 }, - { _MMIO(0x9888), 0x06304000 }, - { _MMIO(0x9888), 0x00318000 }, - { _MMIO(0x9888), 0x06314000 }, - { _MMIO(0x9888), 0x00321b80 }, - { _MMIO(0x9888), 0x0632003f }, - { _MMIO(0x9888), 0x00334000 }, - { _MMIO(0x9888), 0x06331000 }, - { _MMIO(0x9888), 0x0250c000 }, - { _MMIO(0x9888), 0x0251c000 }, - { _MMIO(0x9888), 0x02521fb7 }, - { _MMIO(0x9888), 0x00520000 }, - { _MMIO(0x9888), 0x02535000 }, - { _MMIO(0x9888), 0x1190fc00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900800 }, - { _MMIO(0x9888), 0x43900063 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900040 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_tdl_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_2; - lens[n] = ARRAY_SIZE(mux_config_tdl_2); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_extra[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_extra[] = { - { _MMIO(0xe458), 0x00001000 }, - { _MMIO(0xe558), 0x00003002 }, - { _MMIO(0xe658), 0x00005004 }, - { _MMIO(0xe758), 0x00011010 }, - { _MMIO(0xe45c), 0x00050012 }, - { _MMIO(0xe55c), 0x00052051 }, - { _MMIO(0xe65c), 0x00000008 }, -}; - -static const struct i915_oa_reg mux_config_compute_extra[] = { - { _MMIO(0x9888), 0x121203e0 }, - { _MMIO(0x9888), 0x123203e0 }, - { _MMIO(0x9888), 0x125203e0 }, - { _MMIO(0x9888), 0x022f4000 }, - { _MMIO(0x9888), 0x0a4c0040 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0e0f006c }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x042d8000 }, - { _MMIO(0x9888), 0x06104000 }, - { _MMIO(0x9888), 0x06114000 }, - { _MMIO(0x9888), 0x06120033 }, - { _MMIO(0x9888), 0x00120000 }, - { _MMIO(0x9888), 0x06131000 }, - { _MMIO(0x9888), 0x04308000 }, - { _MMIO(0x9888), 0x04318000 }, - { _MMIO(0x9888), 0x04321980 }, - { _MMIO(0x9888), 0x00320000 }, - { _MMIO(0x9888), 0x04334000 }, - { _MMIO(0x9888), 0x04504000 }, - { _MMIO(0x9888), 0x04514000 }, - { _MMIO(0x9888), 0x04520033 }, - { _MMIO(0x9888), 0x00520000 }, - { _MMIO(0x9888), 0x04531000 }, - { _MMIO(0x9888), 0x1190e000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x43900c00 }, - { _MMIO(0x9888), 0x45900002 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_compute_extra_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_extra; - lens[n] = ARRAY_SIZE(mux_config_compute_extra); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_vme_pipe[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00100030 }, - { _MMIO(0x2774), 0x0000fff9 }, - { _MMIO(0x2778), 0x00000002 }, - { _MMIO(0x277c), 0x0000fffc }, - { _MMIO(0x2780), 0x00000002 }, - { _MMIO(0x2784), 0x0000fff3 }, - { _MMIO(0x2788), 0x00100180 }, - { _MMIO(0x278c), 0x0000ffcf }, - { _MMIO(0x2790), 0x00000002 }, - { _MMIO(0x2794), 0x0000ffcf }, - { _MMIO(0x2798), 0x00000002 }, - { _MMIO(0x279c), 0x0000ff3f }, -}; - -static const struct i915_oa_reg flex_eu_config_vme_pipe[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00008003 }, -}; - -static const struct i915_oa_reg mux_config_vme_pipe[] = { - { _MMIO(0x9888), 0x141a5800 }, - { _MMIO(0x9888), 0x161a00c0 }, - { _MMIO(0x9888), 0x12180240 }, - { _MMIO(0x9888), 0x14180002 }, - { _MMIO(0x9888), 0x143a5800 }, - { _MMIO(0x9888), 0x163a00c0 }, - { _MMIO(0x9888), 0x12380240 }, - { _MMIO(0x9888), 0x14380002 }, - { _MMIO(0x9888), 0x002f1000 }, - { _MMIO(0x9888), 0x022f8000 }, - { _MMIO(0x9888), 0x042f3000 }, - { _MMIO(0x9888), 0x004c4000 }, - { _MMIO(0x9888), 0x0a4c1500 }, - { _MMIO(0x9888), 0x000d2000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0c0f0400 }, - { _MMIO(0x9888), 0x0e0f9500 }, - { _MMIO(0x9888), 0x100f002a }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2c8000 }, - { _MMIO(0x9888), 0x162c0a00 }, - { _MMIO(0x9888), 0x0a2dc000 }, - { _MMIO(0x9888), 0x0c2dc000 }, - { _MMIO(0x9888), 0x04193000 }, - { _MMIO(0x9888), 0x081a28c1 }, - { _MMIO(0x9888), 0x001a0000 }, - { _MMIO(0x9888), 0x00133000 }, - { _MMIO(0x9888), 0x0613c000 }, - { _MMIO(0x9888), 0x0813f000 }, - { _MMIO(0x9888), 0x00172000 }, - { _MMIO(0x9888), 0x06178000 }, - { _MMIO(0x9888), 0x0817a000 }, - { _MMIO(0x9888), 0x00180037 }, - { _MMIO(0x9888), 0x06180940 }, - { _MMIO(0x9888), 0x08180000 }, - { _MMIO(0x9888), 0x02180000 }, - { _MMIO(0x9888), 0x04183000 }, - { _MMIO(0x9888), 0x06393000 }, - { _MMIO(0x9888), 0x0c3a28c1 }, - { _MMIO(0x9888), 0x003a0000 }, - { _MMIO(0x9888), 0x0a33f000 }, - { _MMIO(0x9888), 0x0c33f000 }, - { _MMIO(0x9888), 0x0a37a000 }, - { _MMIO(0x9888), 0x0c37a000 }, - { _MMIO(0x9888), 0x0a380977 }, - { _MMIO(0x9888), 0x08380000 }, - { _MMIO(0x9888), 0x04380000 }, - { _MMIO(0x9888), 0x06383000 }, - { _MMIO(0x9888), 0x119000ff }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900040 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900800 }, - { _MMIO(0x9888), 0x47901000 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900844 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_vme_pipe_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_vme_pipe; - lens[n] = ARRAY_SIZE(mux_config_vme_pipe); - n++; - - return n; -} - static const struct i915_oa_reg b_counter_config_test_oa[] = { { _MMIO(0x2740), 0x00000000 }, { _MMIO(0x2714), 0xf0800000 }, @@ -2384,1096 +73,35 @@ static const struct i915_oa_reg mux_config_test_oa[] = { { _MMIO(0x9888), 0x33900000 }, }; -static int -get_test_oa_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_test_oa; - lens[n] = ARRAY_SIZE(mux_config_test_oa); - n++; - - return n; -} - -int i915_oa_select_metric_set_sklgt2(struct drm_i915_private *dev_priv) -{ - dev_priv->perf.oa.n_mux_configs = 0; - dev_priv->perf.oa.b_counter_regs = NULL; - dev_priv->perf.oa.b_counter_regs_len = 0; - dev_priv->perf.oa.flex_regs = NULL; - dev_priv->perf.oa.flex_regs_len = 0; - - switch (dev_priv->perf.oa.metrics_set) { - case METRIC_SET_ID_RENDER_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_render_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_basic); - - return 0; - case METRIC_SET_ID_COMPUTE_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_compute_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_basic); - - return 0; - case METRIC_SET_ID_RENDER_PIPE_PROFILE: - dev_priv->perf.oa.n_mux_configs = - get_render_pipe_profile_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_PIPE_PROFILE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_pipe_profile; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_pipe_profile); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_pipe_profile; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_pipe_profile); - - return 0; - case METRIC_SET_ID_MEMORY_READS: - dev_priv->perf.oa.n_mux_configs = - get_memory_reads_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_READS\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_reads; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_reads); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_reads; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_reads); - - return 0; - case METRIC_SET_ID_MEMORY_WRITES: - dev_priv->perf.oa.n_mux_configs = - get_memory_writes_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_WRITES\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_writes; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_writes); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_writes; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_writes); - - return 0; - case METRIC_SET_ID_COMPUTE_EXTENDED: - dev_priv->perf.oa.n_mux_configs = - get_compute_extended_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTENDED\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_extended; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_extended); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_extended; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_extended); - - return 0; - case METRIC_SET_ID_COMPUTE_L3_CACHE: - dev_priv->perf.oa.n_mux_configs = - get_compute_l3_cache_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_L3_CACHE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_l3_cache; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_l3_cache); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_l3_cache; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_l3_cache); - - return 0; - case METRIC_SET_ID_HDC_AND_SF: - dev_priv->perf.oa.n_mux_configs = - get_hdc_and_sf_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"HDC_AND_SF\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_hdc_and_sf; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_hdc_and_sf); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_hdc_and_sf; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_hdc_and_sf); - - return 0; - case METRIC_SET_ID_L3_1: - dev_priv->perf.oa.n_mux_configs = - get_l3_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_1); - - return 0; - case METRIC_SET_ID_L3_2: - dev_priv->perf.oa.n_mux_configs = - get_l3_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_2); - - return 0; - case METRIC_SET_ID_L3_3: - dev_priv->perf.oa.n_mux_configs = - get_l3_3_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_3\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_3; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_3); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_3; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_3); - - return 0; - case METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND: - dev_priv->perf.oa.n_mux_configs = - get_rasterizer_and_pixel_backend_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RASTERIZER_AND_PIXEL_BACKEND\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_rasterizer_and_pixel_backend); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_rasterizer_and_pixel_backend); - - return 0; - case METRIC_SET_ID_SAMPLER: - dev_priv->perf.oa.n_mux_configs = - get_sampler_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"SAMPLER\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_sampler; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_sampler); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_sampler; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_sampler); - - return 0; - case METRIC_SET_ID_TDL_1: - dev_priv->perf.oa.n_mux_configs = - get_tdl_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_1); - - return 0; - case METRIC_SET_ID_TDL_2: - dev_priv->perf.oa.n_mux_configs = - get_tdl_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_2); - - return 0; - case METRIC_SET_ID_COMPUTE_EXTRA: - dev_priv->perf.oa.n_mux_configs = - get_compute_extra_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTRA\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_extra; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_extra); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_extra; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_extra); - - return 0; - case METRIC_SET_ID_VME_PIPE: - dev_priv->perf.oa.n_mux_configs = - get_vme_pipe_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"VME_PIPE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_vme_pipe; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_vme_pipe); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_vme_pipe; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_vme_pipe); - - return 0; - case METRIC_SET_ID_TEST_OA: - dev_priv->perf.oa.n_mux_configs = - get_test_oa_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TEST_OA\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_test_oa; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_test_oa); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_test_oa; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_test_oa); - - return 0; - default: - return -ENODEV; - } -} - -static ssize_t -show_render_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_BASIC); -} - -static struct device_attribute dev_attr_render_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_render_basic[] = { - &dev_attr_render_basic_id.attr, - NULL, -}; - -static struct attribute_group group_render_basic = { - .name = "f519e481-24d2-4d42-87c9-3fdd12c00202", - .attrs = attrs_render_basic, -}; - -static ssize_t -show_compute_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_BASIC); -} - -static struct device_attribute dev_attr_compute_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_basic[] = { - &dev_attr_compute_basic_id.attr, - NULL, -}; - -static struct attribute_group group_compute_basic = { - .name = "fe47b29d-ae51-423e-bff4-27d965a95b60", - .attrs = attrs_compute_basic, -}; - -static ssize_t -show_render_pipe_profile_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_PIPE_PROFILE); -} - -static struct device_attribute dev_attr_render_pipe_profile_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_pipe_profile_id, - .store = NULL, -}; - -static struct attribute *attrs_render_pipe_profile[] = { - &dev_attr_render_pipe_profile_id.attr, - NULL, -}; - -static struct attribute_group group_render_pipe_profile = { - .name = "e0ad5ae0-84ba-4f29-a723-1906c12cb774", - .attrs = attrs_render_pipe_profile, -}; - -static ssize_t -show_memory_reads_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_READS); -} - -static struct device_attribute dev_attr_memory_reads_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_reads_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_reads[] = { - &dev_attr_memory_reads_id.attr, - NULL, -}; - -static struct attribute_group group_memory_reads = { - .name = "9bc436dd-6130-4add-affc-283eb6eaa864", - .attrs = attrs_memory_reads, -}; - -static ssize_t -show_memory_writes_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_WRITES); -} - -static struct device_attribute dev_attr_memory_writes_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_writes_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_writes[] = { - &dev_attr_memory_writes_id.attr, - NULL, -}; - -static struct attribute_group group_memory_writes = { - .name = "2ea0da8f-3527-4669-9d9d-13099a7435bf", - .attrs = attrs_memory_writes, -}; - -static ssize_t -show_compute_extended_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_EXTENDED); -} - -static struct device_attribute dev_attr_compute_extended_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_extended_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_extended[] = { - &dev_attr_compute_extended_id.attr, - NULL, -}; - -static struct attribute_group group_compute_extended = { - .name = "d97d16af-028b-4cd1-a672-6210cb5513dd", - .attrs = attrs_compute_extended, -}; - -static ssize_t -show_compute_l3_cache_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_L3_CACHE); -} - -static struct device_attribute dev_attr_compute_l3_cache_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_l3_cache_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_l3_cache[] = { - &dev_attr_compute_l3_cache_id.attr, - NULL, -}; - -static struct attribute_group group_compute_l3_cache = { - .name = "9fb22842-e708-43f7-9752-e0e41670c39e", - .attrs = attrs_compute_l3_cache, -}; - -static ssize_t -show_hdc_and_sf_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_HDC_AND_SF); -} - -static struct device_attribute dev_attr_hdc_and_sf_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_hdc_and_sf_id, - .store = NULL, -}; - -static struct attribute *attrs_hdc_and_sf[] = { - &dev_attr_hdc_and_sf_id.attr, - NULL, -}; - -static struct attribute_group group_hdc_and_sf = { - .name = "5378e2a1-4248-4188-a4ae-da25a794c603", - .attrs = attrs_hdc_and_sf, -}; - -static ssize_t -show_l3_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_1); -} - -static struct device_attribute dev_attr_l3_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_1_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_1[] = { - &dev_attr_l3_1_id.attr, - NULL, -}; - -static struct attribute_group group_l3_1 = { - .name = "f42cdd6a-b000-42cb-870f-5eb423a7f514", - .attrs = attrs_l3_1, -}; - -static ssize_t -show_l3_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_2); -} - -static struct device_attribute dev_attr_l3_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_2_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_2[] = { - &dev_attr_l3_2_id.attr, - NULL, -}; - -static struct attribute_group group_l3_2 = { - .name = "b9bf2423-d88c-4a7b-a051-627611d00dcc", - .attrs = attrs_l3_2, -}; - -static ssize_t -show_l3_3_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_3); -} - -static struct device_attribute dev_attr_l3_3_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_3_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_3[] = { - &dev_attr_l3_3_id.attr, - NULL, -}; - -static struct attribute_group group_l3_3 = { - .name = "2414a93d-d84f-406e-99c0-472161194b40", - .attrs = attrs_l3_3, -}; - -static ssize_t -show_rasterizer_and_pixel_backend_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND); -} - -static struct device_attribute dev_attr_rasterizer_and_pixel_backend_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_rasterizer_and_pixel_backend_id, - .store = NULL, -}; - -static struct attribute *attrs_rasterizer_and_pixel_backend[] = { - &dev_attr_rasterizer_and_pixel_backend_id.attr, - NULL, -}; - -static struct attribute_group group_rasterizer_and_pixel_backend = { - .name = "53a45d2d-170b-4cf5-b7bb-585120c8e2f5", - .attrs = attrs_rasterizer_and_pixel_backend, -}; - -static ssize_t -show_sampler_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_SAMPLER); -} - -static struct device_attribute dev_attr_sampler_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_sampler_id, - .store = NULL, -}; - -static struct attribute *attrs_sampler[] = { - &dev_attr_sampler_id.attr, - NULL, -}; - -static struct attribute_group group_sampler = { - .name = "b4cff514-a91e-4798-a0b3-426ca13fc9c1", - .attrs = attrs_sampler, -}; - -static ssize_t -show_tdl_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_1); -} - -static struct device_attribute dev_attr_tdl_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_1_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_1[] = { - &dev_attr_tdl_1_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_1 = { - .name = "7821d13b-9b8b-4405-9618-78cd56b62cce", - .attrs = attrs_tdl_1, -}; - -static ssize_t -show_tdl_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_2); -} - -static struct device_attribute dev_attr_tdl_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_2_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_2[] = { - &dev_attr_tdl_2_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_2 = { - .name = "893f1a4d-919d-4388-8cb7-746d73ea7259", - .attrs = attrs_tdl_2, -}; - -static ssize_t -show_compute_extra_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_EXTRA); -} - -static struct device_attribute dev_attr_compute_extra_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_extra_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_extra[] = { - &dev_attr_compute_extra_id.attr, - NULL, -}; - -static struct attribute_group group_compute_extra = { - .name = "41a24047-7484-4ead-ae37-de907e5ff2b2", - .attrs = attrs_compute_extra, -}; - -static ssize_t -show_vme_pipe_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_VME_PIPE); -} - -static struct device_attribute dev_attr_vme_pipe_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_vme_pipe_id, - .store = NULL, -}; - -static struct attribute *attrs_vme_pipe[] = { - &dev_attr_vme_pipe_id.attr, - NULL, -}; - -static struct attribute_group group_vme_pipe = { - .name = "95910492-943f-44bd-9461-390240f243fd", - .attrs = attrs_vme_pipe, -}; - static ssize_t show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", METRIC_SET_ID_TEST_OA); + return sprintf(buf, "1\n"); } -static struct device_attribute dev_attr_test_oa_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_test_oa_id, - .store = NULL, -}; - -static struct attribute *attrs_test_oa[] = { - &dev_attr_test_oa_id.attr, - NULL, -}; - -static struct attribute_group group_test_oa = { - .name = "1651949f-0ac0-4cb1-a06f-dafd74a407d1", - .attrs = attrs_test_oa, -}; - -int -i915_perf_register_sysfs_sklgt2(struct drm_i915_private *dev_priv) +void +i915_perf_load_test_config_sklgt2(struct drm_i915_private *dev_priv) { - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; - int ret = 0; + strncpy(dev_priv->perf.oa.test_config.uuid, + "1651949f-0ac0-4cb1-a06f-dafd74a407d1", + UUID_STRING_LEN); + dev_priv->perf.oa.test_config.id = 1; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (ret) - goto error_render_basic; - } - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (ret) - goto error_compute_basic; - } - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (ret) - goto error_render_pipe_profile; - } - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (ret) - goto error_memory_reads; - } - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (ret) - goto error_memory_writes; - } - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (ret) - goto error_compute_extended; - } - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); - if (ret) - goto error_compute_l3_cache; - } - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (ret) - goto error_hdc_and_sf; - } - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (ret) - goto error_l3_1; - } - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_2); - if (ret) - goto error_l3_2; - } - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_3); - if (ret) - goto error_l3_3; - } - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (ret) - goto error_rasterizer_and_pixel_backend; - } - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_sampler); - if (ret) - goto error_sampler; - } - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (ret) - goto error_tdl_1; - } - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (ret) - goto error_tdl_2; - } - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extra); - if (ret) - goto error_compute_extra; - } - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); - if (ret) - goto error_vme_pipe; - } - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_test_oa); - if (ret) - goto error_test_oa; - } + dev_priv->perf.oa.test_config.mux_regs = mux_config_test_oa; + dev_priv->perf.oa.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa); - return 0; + dev_priv->perf.oa.test_config.b_counter_regs = b_counter_config_test_oa; + dev_priv->perf.oa.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa); -error_test_oa: - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); -error_vme_pipe: - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extra); -error_compute_extra: - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); -error_tdl_2: - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); -error_tdl_1: - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler); -error_sampler: - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); -error_rasterizer_and_pixel_backend: - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_3); -error_l3_3: - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_2); -error_l3_2: - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); -error_l3_1: - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); -error_hdc_and_sf: - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); -error_compute_l3_cache: - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); -error_compute_extended: - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); -error_memory_writes: - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); -error_memory_reads: - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); -error_render_pipe_profile: - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); -error_compute_basic: - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); -error_render_basic: - return ret; -} + dev_priv->perf.oa.test_config.flex_regs = flex_eu_config_test_oa; + dev_priv->perf.oa.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa); -void -i915_perf_unregister_sysfs_sklgt2(struct drm_i915_private *dev_priv) -{ - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; + dev_priv->perf.oa.test_config.sysfs_metric.name = "1651949f-0ac0-4cb1-a06f-dafd74a407d1"; + dev_priv->perf.oa.test_config.sysfs_metric.attrs = dev_priv->perf.oa.test_config.attrs; + + dev_priv->perf.oa.test_config.attrs[0] = &dev_priv->perf.oa.test_config.sysfs_metric_id.attr; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_2); - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_3); - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler); - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extra); - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_test_oa); + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.name = "id"; + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.mode = 0444; + dev_priv->perf.oa.test_config.sysfs_metric_id.show = show_test_oa_id; } diff --git a/drivers/gpu/drm/i915/i915_oa_sklgt2.h b/drivers/gpu/drm/i915/i915_oa_sklgt2.h index f4397baf3328..fe1aa2c03958 100644 --- a/drivers/gpu/drm/i915/i915_oa_sklgt2.h +++ b/drivers/gpu/drm/i915/i915_oa_sklgt2.h @@ -29,12 +29,6 @@ #ifndef __I915_OA_SKLGT2_H__ #define __I915_OA_SKLGT2_H__ -extern int i915_oa_n_builtin_metric_sets_sklgt2; - -extern int i915_oa_select_metric_set_sklgt2(struct drm_i915_private *dev_priv); - -extern int i915_perf_register_sysfs_sklgt2(struct drm_i915_private *dev_priv); - -extern void i915_perf_unregister_sysfs_sklgt2(struct drm_i915_private *dev_priv); +extern void i915_perf_load_test_config_sklgt2(struct drm_i915_private *dev_priv); #endif diff --git a/drivers/gpu/drm/i915/i915_oa_sklgt3.c b/drivers/gpu/drm/i915/i915_oa_sklgt3.c index 7765e22dfa17..2e342b4bc3a5 100644 --- a/drivers/gpu/drm/i915/i915_oa_sklgt3.c +++ b/drivers/gpu/drm/i915/i915_oa_sklgt3.c @@ -31,1876 +31,6 @@ #include "i915_drv.h" #include "i915_oa_sklgt3.h" -enum metric_set_id { - METRIC_SET_ID_RENDER_BASIC = 1, - METRIC_SET_ID_COMPUTE_BASIC, - METRIC_SET_ID_RENDER_PIPE_PROFILE, - METRIC_SET_ID_MEMORY_READS, - METRIC_SET_ID_MEMORY_WRITES, - METRIC_SET_ID_COMPUTE_EXTENDED, - METRIC_SET_ID_COMPUTE_L3_CACHE, - METRIC_SET_ID_HDC_AND_SF, - METRIC_SET_ID_L3_1, - METRIC_SET_ID_L3_2, - METRIC_SET_ID_L3_3, - METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND, - METRIC_SET_ID_SAMPLER, - METRIC_SET_ID_TDL_1, - METRIC_SET_ID_TDL_2, - METRIC_SET_ID_COMPUTE_EXTRA, - METRIC_SET_ID_VME_PIPE, - METRIC_SET_ID_TEST_OA, -}; - -int i915_oa_n_builtin_metric_sets_sklgt3 = 18; - -static const struct i915_oa_reg b_counter_config_render_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2740), 0x00000000 }, -}; - -static const struct i915_oa_reg flex_eu_config_render_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_render_basic[] = { - { _MMIO(0x9888), 0x166c01e0 }, - { _MMIO(0x9888), 0x12170280 }, - { _MMIO(0x9888), 0x12370280 }, - { _MMIO(0x9888), 0x16ec01e0 }, - { _MMIO(0x9888), 0x11930317 }, - { _MMIO(0x9888), 0x159303df }, - { _MMIO(0x9888), 0x3f900003 }, - { _MMIO(0x9888), 0x1a4e0380 }, - { _MMIO(0x9888), 0x0a6c0053 }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x0a1b4000 }, - { _MMIO(0x9888), 0x1c1c0001 }, - { _MMIO(0x9888), 0x002f1000 }, - { _MMIO(0x9888), 0x042f1000 }, - { _MMIO(0x9888), 0x004c4000 }, - { _MMIO(0x9888), 0x0a4c8400 }, - { _MMIO(0x9888), 0x0c4c0002 }, - { _MMIO(0x9888), 0x000d2000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0f0400 }, - { _MMIO(0x9888), 0x0e0f6600 }, - { _MMIO(0x9888), 0x100f0001 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x162ca200 }, - { _MMIO(0x9888), 0x062d8000 }, - { _MMIO(0x9888), 0x082d8000 }, - { _MMIO(0x9888), 0x00133000 }, - { _MMIO(0x9888), 0x08133000 }, - { _MMIO(0x9888), 0x00170020 }, - { _MMIO(0x9888), 0x08170021 }, - { _MMIO(0x9888), 0x10170000 }, - { _MMIO(0x9888), 0x0633c000 }, - { _MMIO(0x9888), 0x0833c000 }, - { _MMIO(0x9888), 0x06370800 }, - { _MMIO(0x9888), 0x08370840 }, - { _MMIO(0x9888), 0x10370000 }, - { _MMIO(0x9888), 0x1ace0200 }, - { _MMIO(0x9888), 0x0aec5300 }, - { _MMIO(0x9888), 0x10ec0000 }, - { _MMIO(0x9888), 0x1cec0000 }, - { _MMIO(0x9888), 0x0a9b8000 }, - { _MMIO(0x9888), 0x1c9c0002 }, - { _MMIO(0x9888), 0x0ccc0002 }, - { _MMIO(0x9888), 0x0a8d8000 }, - { _MMIO(0x9888), 0x108f0001 }, - { _MMIO(0x9888), 0x16ac8000 }, - { _MMIO(0x9888), 0x0d933031 }, - { _MMIO(0x9888), 0x0f933e3f }, - { _MMIO(0x9888), 0x01933d00 }, - { _MMIO(0x9888), 0x0393073c }, - { _MMIO(0x9888), 0x0593000e }, - { _MMIO(0x9888), 0x1d930000 }, - { _MMIO(0x9888), 0x19930000 }, - { _MMIO(0x9888), 0x1b930000 }, - { _MMIO(0x9888), 0x1d900157 }, - { _MMIO(0x9888), 0x1f900158 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x2b908000 }, - { _MMIO(0x9888), 0x2d908000 }, - { _MMIO(0x9888), 0x2f908000 }, - { _MMIO(0x9888), 0x31908000 }, - { _MMIO(0x9888), 0x15908000 }, - { _MMIO(0x9888), 0x17908000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1190003f }, - { _MMIO(0x9888), 0x51907710 }, - { _MMIO(0x9888), 0x419020a0 }, - { _MMIO(0x9888), 0x55901515 }, - { _MMIO(0x9888), 0x45900529 }, - { _MMIO(0x9888), 0x47901025 }, - { _MMIO(0x9888), 0x57907770 }, - { _MMIO(0x9888), 0x49902100 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900108 }, - { _MMIO(0x9888), 0x59900007 }, - { _MMIO(0x9888), 0x43902108 }, - { _MMIO(0x9888), 0x53907777 }, -}; - -static int -get_render_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_render_basic; - lens[n] = ARRAY_SIZE(mux_config_render_basic); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2740), 0x00000000 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_compute_basic[] = { - { _MMIO(0x9888), 0x104f00e0 }, - { _MMIO(0x9888), 0x124f1c00 }, - { _MMIO(0x9888), 0x106c00e0 }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f900003 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x1a4e0820 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x064f0900 }, - { _MMIO(0x9888), 0x084f0032 }, - { _MMIO(0x9888), 0x0a4f1891 }, - { _MMIO(0x9888), 0x0c4f0e00 }, - { _MMIO(0x9888), 0x0e4f003c }, - { _MMIO(0x9888), 0x004f0d80 }, - { _MMIO(0x9888), 0x024f003b }, - { _MMIO(0x9888), 0x006c0002 }, - { _MMIO(0x9888), 0x086c0100 }, - { _MMIO(0x9888), 0x0c6c000c }, - { _MMIO(0x9888), 0x0e6c0b00 }, - { _MMIO(0x9888), 0x186c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x001b4000 }, - { _MMIO(0x9888), 0x081b8000 }, - { _MMIO(0x9888), 0x0c1b4000 }, - { _MMIO(0x9888), 0x0e1b8000 }, - { _MMIO(0x9888), 0x101c8000 }, - { _MMIO(0x9888), 0x1a1c8000 }, - { _MMIO(0x9888), 0x1c1c0024 }, - { _MMIO(0x9888), 0x065b8000 }, - { _MMIO(0x9888), 0x085b4000 }, - { _MMIO(0x9888), 0x0a5bc000 }, - { _MMIO(0x9888), 0x0c5b8000 }, - { _MMIO(0x9888), 0x0e5b4000 }, - { _MMIO(0x9888), 0x005b8000 }, - { _MMIO(0x9888), 0x025b4000 }, - { _MMIO(0x9888), 0x1a5c6000 }, - { _MMIO(0x9888), 0x1c5c001b }, - { _MMIO(0x9888), 0x125c8000 }, - { _MMIO(0x9888), 0x145c8000 }, - { _MMIO(0x9888), 0x004c8000 }, - { _MMIO(0x9888), 0x0a4c2000 }, - { _MMIO(0x9888), 0x0c4c0208 }, - { _MMIO(0x9888), 0x000da000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x020d2000 }, - { _MMIO(0x9888), 0x0c0f5400 }, - { _MMIO(0x9888), 0x0e0f5500 }, - { _MMIO(0x9888), 0x100f0155 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2cc000 }, - { _MMIO(0x9888), 0x162cfb00 }, - { _MMIO(0x9888), 0x182c00be }, - { _MMIO(0x9888), 0x022cc000 }, - { _MMIO(0x9888), 0x042cc000 }, - { _MMIO(0x9888), 0x19900157 }, - { _MMIO(0x9888), 0x1b900158 }, - { _MMIO(0x9888), 0x1d900105 }, - { _MMIO(0x9888), 0x1f900103 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x11900fff }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900800 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900863 }, - { _MMIO(0x9888), 0x47900802 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900802 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900002 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900c62 }, - { _MMIO(0x9888), 0x53903333 }, -}; - -static int -get_compute_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_basic; - lens[n] = ARRAY_SIZE(mux_config_compute_basic); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_render_pipe_profile[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007ffea }, - { _MMIO(0x2774), 0x00007ffc }, - { _MMIO(0x2778), 0x0007affa }, - { _MMIO(0x277c), 0x0000f5fd }, - { _MMIO(0x2780), 0x00079ffa }, - { _MMIO(0x2784), 0x0000f3fb }, - { _MMIO(0x2788), 0x0007bf7a }, - { _MMIO(0x278c), 0x0000f7e7 }, - { _MMIO(0x2790), 0x0007fefa }, - { _MMIO(0x2794), 0x0000f7cf }, - { _MMIO(0x2798), 0x00077ffa }, - { _MMIO(0x279c), 0x0000efdf }, - { _MMIO(0x27a0), 0x0006fffa }, - { _MMIO(0x27a4), 0x0000cfbf }, - { _MMIO(0x27a8), 0x0003fffa }, - { _MMIO(0x27ac), 0x00005f7f }, -}; - -static const struct i915_oa_reg flex_eu_config_render_pipe_profile[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_render_pipe_profile[] = { - { _MMIO(0x9888), 0x0c0e001f }, - { _MMIO(0x9888), 0x0a0f0000 }, - { _MMIO(0x9888), 0x10116800 }, - { _MMIO(0x9888), 0x178a03e0 }, - { _MMIO(0x9888), 0x11824c00 }, - { _MMIO(0x9888), 0x11830020 }, - { _MMIO(0x9888), 0x13840020 }, - { _MMIO(0x9888), 0x11850019 }, - { _MMIO(0x9888), 0x11860007 }, - { _MMIO(0x9888), 0x01870c40 }, - { _MMIO(0x9888), 0x17880000 }, - { _MMIO(0x9888), 0x022f4000 }, - { _MMIO(0x9888), 0x0a4c0040 }, - { _MMIO(0x9888), 0x0c0d8000 }, - { _MMIO(0x9888), 0x040d4000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x020e5400 }, - { _MMIO(0x9888), 0x000e0000 }, - { _MMIO(0x9888), 0x080f0040 }, - { _MMIO(0x9888), 0x000f0000 }, - { _MMIO(0x9888), 0x100f0000 }, - { _MMIO(0x9888), 0x0e0f0040 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x06104000 }, - { _MMIO(0x9888), 0x06110012 }, - { _MMIO(0x9888), 0x06131000 }, - { _MMIO(0x9888), 0x01898000 }, - { _MMIO(0x9888), 0x0d890100 }, - { _MMIO(0x9888), 0x03898000 }, - { _MMIO(0x9888), 0x09808000 }, - { _MMIO(0x9888), 0x0b808000 }, - { _MMIO(0x9888), 0x0380c000 }, - { _MMIO(0x9888), 0x0f8a0075 }, - { _MMIO(0x9888), 0x1d8a0000 }, - { _MMIO(0x9888), 0x118a8000 }, - { _MMIO(0x9888), 0x1b8a4000 }, - { _MMIO(0x9888), 0x138a8000 }, - { _MMIO(0x9888), 0x1d81a000 }, - { _MMIO(0x9888), 0x15818000 }, - { _MMIO(0x9888), 0x17818000 }, - { _MMIO(0x9888), 0x0b820030 }, - { _MMIO(0x9888), 0x07828000 }, - { _MMIO(0x9888), 0x0d824000 }, - { _MMIO(0x9888), 0x0f828000 }, - { _MMIO(0x9888), 0x05824000 }, - { _MMIO(0x9888), 0x0d830003 }, - { _MMIO(0x9888), 0x0583000c }, - { _MMIO(0x9888), 0x09830000 }, - { _MMIO(0x9888), 0x03838000 }, - { _MMIO(0x9888), 0x07838000 }, - { _MMIO(0x9888), 0x0b840980 }, - { _MMIO(0x9888), 0x03844d80 }, - { _MMIO(0x9888), 0x11840000 }, - { _MMIO(0x9888), 0x09848000 }, - { _MMIO(0x9888), 0x09850080 }, - { _MMIO(0x9888), 0x03850003 }, - { _MMIO(0x9888), 0x01850000 }, - { _MMIO(0x9888), 0x07860000 }, - { _MMIO(0x9888), 0x0f860400 }, - { _MMIO(0x9888), 0x09870032 }, - { _MMIO(0x9888), 0x01888052 }, - { _MMIO(0x9888), 0x11880000 }, - { _MMIO(0x9888), 0x09884000 }, - { _MMIO(0x9888), 0x1b931001 }, - { _MMIO(0x9888), 0x1d930001 }, - { _MMIO(0x9888), 0x19934000 }, - { _MMIO(0x9888), 0x1b958000 }, - { _MMIO(0x9888), 0x1d950094 }, - { _MMIO(0x9888), 0x19958000 }, - { _MMIO(0x9888), 0x09e58000 }, - { _MMIO(0x9888), 0x0be58000 }, - { _MMIO(0x9888), 0x03e5c000 }, - { _MMIO(0x9888), 0x0592c000 }, - { _MMIO(0x9888), 0x0b928000 }, - { _MMIO(0x9888), 0x0d924000 }, - { _MMIO(0x9888), 0x0f924000 }, - { _MMIO(0x9888), 0x11928000 }, - { _MMIO(0x9888), 0x1392c000 }, - { _MMIO(0x9888), 0x09924000 }, - { _MMIO(0x9888), 0x01985000 }, - { _MMIO(0x9888), 0x07988000 }, - { _MMIO(0x9888), 0x09981000 }, - { _MMIO(0x9888), 0x0b982000 }, - { _MMIO(0x9888), 0x0d982000 }, - { _MMIO(0x9888), 0x0f989000 }, - { _MMIO(0x9888), 0x05982000 }, - { _MMIO(0x9888), 0x13904000 }, - { _MMIO(0x9888), 0x21904000 }, - { _MMIO(0x9888), 0x23904000 }, - { _MMIO(0x9888), 0x25908000 }, - { _MMIO(0x9888), 0x27904000 }, - { _MMIO(0x9888), 0x29908000 }, - { _MMIO(0x9888), 0x2b904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17908000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1190c080 }, - { _MMIO(0x9888), 0x51901150 }, - { _MMIO(0x9888), 0x41901400 }, - { _MMIO(0x9888), 0x55905111 }, - { _MMIO(0x9888), 0x45901400 }, - { _MMIO(0x9888), 0x479004a5 }, - { _MMIO(0x9888), 0x57903455 }, - { _MMIO(0x9888), 0x49900000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b9000a0 }, - { _MMIO(0x9888), 0x59900001 }, - { _MMIO(0x9888), 0x43900005 }, - { _MMIO(0x9888), 0x53900455 }, -}; - -static int -get_render_pipe_profile_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_render_pipe_profile; - lens[n] = ARRAY_SIZE(mux_config_render_pipe_profile); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_reads[] = { - { _MMIO(0x272c), 0xffffffff }, - { _MMIO(0x2728), 0xffffffff }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x271c), 0xffffffff }, - { _MMIO(0x2718), 0xffffffff }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x86543210 }, - { _MMIO(0x2748), 0x86543210 }, - { _MMIO(0x2744), 0x00006667 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0x86543210 }, - { _MMIO(0x2758), 0x86543210 }, - { _MMIO(0x2754), 0x00006465 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fe00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fe00 }, - { _MMIO(0x2780), 0x0007f872 }, - { _MMIO(0x2784), 0x0000fe00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fe00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fe00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fe00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fe00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fe00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_reads[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_memory_reads[] = { - { _MMIO(0x9888), 0x11810c00 }, - { _MMIO(0x9888), 0x1381001a }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f900064 }, - { _MMIO(0x9888), 0x03811300 }, - { _MMIO(0x9888), 0x05811b12 }, - { _MMIO(0x9888), 0x0781001a }, - { _MMIO(0x9888), 0x1f810000 }, - { _MMIO(0x9888), 0x17810000 }, - { _MMIO(0x9888), 0x19810000 }, - { _MMIO(0x9888), 0x1b810000 }, - { _MMIO(0x9888), 0x1d810000 }, - { _MMIO(0x9888), 0x1b930055 }, - { _MMIO(0x9888), 0x03e58000 }, - { _MMIO(0x9888), 0x05e5c000 }, - { _MMIO(0x9888), 0x07e54000 }, - { _MMIO(0x9888), 0x13900150 }, - { _MMIO(0x9888), 0x21900151 }, - { _MMIO(0x9888), 0x23900152 }, - { _MMIO(0x9888), 0x25900153 }, - { _MMIO(0x9888), 0x27900154 }, - { _MMIO(0x9888), 0x29900155 }, - { _MMIO(0x9888), 0x2b900156 }, - { _MMIO(0x9888), 0x2d900157 }, - { _MMIO(0x9888), 0x2f90015f }, - { _MMIO(0x9888), 0x31900105 }, - { _MMIO(0x9888), 0x15900103 }, - { _MMIO(0x9888), 0x17900101 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0x9888), 0x11900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c60 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900c00 }, - { _MMIO(0x9888), 0x47900c63 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900c63 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900063 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static int -get_memory_reads_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_memory_reads; - lens[n] = ARRAY_SIZE(mux_config_memory_reads); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_writes[] = { - { _MMIO(0x272c), 0xffffffff }, - { _MMIO(0x2728), 0xffffffff }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x271c), 0xffffffff }, - { _MMIO(0x2718), 0xffffffff }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x86543210 }, - { _MMIO(0x2748), 0x86543210 }, - { _MMIO(0x2744), 0x00006667 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0x86543210 }, - { _MMIO(0x2758), 0x86543210 }, - { _MMIO(0x2754), 0x00006465 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fe00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fe00 }, - { _MMIO(0x2780), 0x0007f822 }, - { _MMIO(0x2784), 0x0000fe00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fe00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fe00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fe00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fe00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fe00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_writes[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_memory_writes[] = { - { _MMIO(0x9888), 0x11810c00 }, - { _MMIO(0x9888), 0x1381001a }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f901000 }, - { _MMIO(0x9888), 0x03811300 }, - { _MMIO(0x9888), 0x05811b12 }, - { _MMIO(0x9888), 0x0781001a }, - { _MMIO(0x9888), 0x1f810000 }, - { _MMIO(0x9888), 0x17810000 }, - { _MMIO(0x9888), 0x19810000 }, - { _MMIO(0x9888), 0x1b810000 }, - { _MMIO(0x9888), 0x1d810000 }, - { _MMIO(0x9888), 0x1b930055 }, - { _MMIO(0x9888), 0x03e58000 }, - { _MMIO(0x9888), 0x05e5c000 }, - { _MMIO(0x9888), 0x07e54000 }, - { _MMIO(0x9888), 0x13900160 }, - { _MMIO(0x9888), 0x21900161 }, - { _MMIO(0x9888), 0x23900162 }, - { _MMIO(0x9888), 0x25900163 }, - { _MMIO(0x9888), 0x27900164 }, - { _MMIO(0x9888), 0x29900165 }, - { _MMIO(0x9888), 0x2b900166 }, - { _MMIO(0x9888), 0x2d900167 }, - { _MMIO(0x9888), 0x2f900150 }, - { _MMIO(0x9888), 0x31900105 }, - { _MMIO(0x9888), 0x15900103 }, - { _MMIO(0x9888), 0x17900101 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0x9888), 0x11900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c60 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900c00 }, - { _MMIO(0x9888), 0x47900c63 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900c63 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900063 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static int -get_memory_writes_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_memory_writes; - lens[n] = ARRAY_SIZE(mux_config_memory_writes); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_extended[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007fc2a }, - { _MMIO(0x2774), 0x0000bf00 }, - { _MMIO(0x2778), 0x0007fc6a }, - { _MMIO(0x277c), 0x0000bf00 }, - { _MMIO(0x2780), 0x0007fc92 }, - { _MMIO(0x2784), 0x0000bf00 }, - { _MMIO(0x2788), 0x0007fca2 }, - { _MMIO(0x278c), 0x0000bf00 }, - { _MMIO(0x2790), 0x0007fc32 }, - { _MMIO(0x2794), 0x0000bf00 }, - { _MMIO(0x2798), 0x0007fc9a }, - { _MMIO(0x279c), 0x0000bf00 }, - { _MMIO(0x27a0), 0x0007fe6a }, - { _MMIO(0x27a4), 0x0000bf00 }, - { _MMIO(0x27a8), 0x0007fe7a }, - { _MMIO(0x27ac), 0x0000bf00 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_extended[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_compute_extended[] = { - { _MMIO(0x9888), 0x106c00e0 }, - { _MMIO(0x9888), 0x141c8160 }, - { _MMIO(0x9888), 0x161c8015 }, - { _MMIO(0x9888), 0x181c0120 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x0e4e8000 }, - { _MMIO(0x9888), 0x184e8000 }, - { _MMIO(0x9888), 0x1a4eaaa0 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x024e8000 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x0e6c0b01 }, - { _MMIO(0x9888), 0x006c0200 }, - { _MMIO(0x9888), 0x026c000c }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x0e1bc000 }, - { _MMIO(0x9888), 0x001b8000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x001c0041 }, - { _MMIO(0x9888), 0x061c4200 }, - { _MMIO(0x9888), 0x081c4443 }, - { _MMIO(0x9888), 0x0a1c4645 }, - { _MMIO(0x9888), 0x0c1c7647 }, - { _MMIO(0x9888), 0x041c7357 }, - { _MMIO(0x9888), 0x1c1c0030 }, - { _MMIO(0x9888), 0x101c0000 }, - { _MMIO(0x9888), 0x1a1c0000 }, - { _MMIO(0x9888), 0x121c8000 }, - { _MMIO(0x9888), 0x004c8000 }, - { _MMIO(0x9888), 0x0a4caa2a }, - { _MMIO(0x9888), 0x0c4c02aa }, - { _MMIO(0x9888), 0x084ca000 }, - { _MMIO(0x9888), 0x000da000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x0c0f5400 }, - { _MMIO(0x9888), 0x0e0f5515 }, - { _MMIO(0x9888), 0x100f0155 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2c8000 }, - { _MMIO(0x9888), 0x162caa00 }, - { _MMIO(0x9888), 0x182c00aa }, - { _MMIO(0x9888), 0x022c8000 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x11907fff }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900040 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900802 }, - { _MMIO(0x9888), 0x47900842 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900842 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900800 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static int -get_compute_extended_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_extended; - lens[n] = ARRAY_SIZE(mux_config_compute_extended); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_l3_cache[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x30800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007fffa }, - { _MMIO(0x2774), 0x0000fefe }, - { _MMIO(0x2778), 0x0007fffa }, - { _MMIO(0x277c), 0x0000fefd }, - { _MMIO(0x2790), 0x0007fffa }, - { _MMIO(0x2794), 0x0000fbef }, - { _MMIO(0x2798), 0x0007fffa }, - { _MMIO(0x279c), 0x0000fbdf }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_l3_cache[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00101100 }, - { _MMIO(0xe45c), 0x00201200 }, - { _MMIO(0xe55c), 0x00301300 }, - { _MMIO(0xe65c), 0x00401400 }, -}; - -static const struct i915_oa_reg mux_config_compute_l3_cache[] = { - { _MMIO(0x9888), 0x166c0760 }, - { _MMIO(0x9888), 0x1593001e }, - { _MMIO(0x9888), 0x3f900003 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x0e4e8000 }, - { _MMIO(0x9888), 0x184e8000 }, - { _MMIO(0x9888), 0x1a4e8020 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x006c0051 }, - { _MMIO(0x9888), 0x066c5000 }, - { _MMIO(0x9888), 0x086c5c5d }, - { _MMIO(0x9888), 0x0e6c5e5f }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x186c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x001b4000 }, - { _MMIO(0x9888), 0x061b8000 }, - { _MMIO(0x9888), 0x081bc000 }, - { _MMIO(0x9888), 0x0e1bc000 }, - { _MMIO(0x9888), 0x101c8000 }, - { _MMIO(0x9888), 0x1a1ce000 }, - { _MMIO(0x9888), 0x1c1c0030 }, - { _MMIO(0x9888), 0x004c8000 }, - { _MMIO(0x9888), 0x0a4c2a00 }, - { _MMIO(0x9888), 0x0c4c0280 }, - { _MMIO(0x9888), 0x000d2000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x0c0f0400 }, - { _MMIO(0x9888), 0x0e0f1500 }, - { _MMIO(0x9888), 0x100f0140 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2c8000 }, - { _MMIO(0x9888), 0x162c0a00 }, - { _MMIO(0x9888), 0x182c00a0 }, - { _MMIO(0x9888), 0x03933300 }, - { _MMIO(0x9888), 0x05930032 }, - { _MMIO(0x9888), 0x11930000 }, - { _MMIO(0x9888), 0x1b930000 }, - { _MMIO(0x9888), 0x1d900157 }, - { _MMIO(0x9888), 0x1f900158 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1190030f }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900000 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900063 }, - { _MMIO(0x9888), 0x47900000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x53903333 }, - { _MMIO(0x9888), 0x43900840 }, -}; - -static int -get_compute_l3_cache_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_l3_cache; - lens[n] = ARRAY_SIZE(mux_config_compute_l3_cache); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_hdc_and_sf[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x10800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000fdff }, -}; - -static const struct i915_oa_reg flex_eu_config_hdc_and_sf[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_hdc_and_sf[] = { - { _MMIO(0x9888), 0x104f0232 }, - { _MMIO(0x9888), 0x124f4640 }, - { _MMIO(0x9888), 0x106c0232 }, - { _MMIO(0x9888), 0x11834400 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x0c4e8000 }, - { _MMIO(0x9888), 0x004f1880 }, - { _MMIO(0x9888), 0x024f08bb }, - { _MMIO(0x9888), 0x044f001b }, - { _MMIO(0x9888), 0x046c0100 }, - { _MMIO(0x9888), 0x066c000b }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x041b8000 }, - { _MMIO(0x9888), 0x061b4000 }, - { _MMIO(0x9888), 0x1a1c1800 }, - { _MMIO(0x9888), 0x005b8000 }, - { _MMIO(0x9888), 0x025bc000 }, - { _MMIO(0x9888), 0x045b4000 }, - { _MMIO(0x9888), 0x125c8000 }, - { _MMIO(0x9888), 0x145c8000 }, - { _MMIO(0x9888), 0x165c8000 }, - { _MMIO(0x9888), 0x185c8000 }, - { _MMIO(0x9888), 0x0a4c00a0 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0f5000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x022cc000 }, - { _MMIO(0x9888), 0x042cc000 }, - { _MMIO(0x9888), 0x062cc000 }, - { _MMIO(0x9888), 0x082cc000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x0f828000 }, - { _MMIO(0x9888), 0x0f8305c0 }, - { _MMIO(0x9888), 0x09830000 }, - { _MMIO(0x9888), 0x07830000 }, - { _MMIO(0x9888), 0x1d950080 }, - { _MMIO(0x9888), 0x13928000 }, - { _MMIO(0x9888), 0x0f988000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x1190fc00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x59900005 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900800 }, - { _MMIO(0x9888), 0x43900842 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900000 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_hdc_and_sf_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_hdc_and_sf; - lens[n] = ARRAY_SIZE(mux_config_hdc_and_sf); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00014002 }, - { _MMIO(0x277c), 0x0000c3ff }, - { _MMIO(0x2780), 0x00010002 }, - { _MMIO(0x2784), 0x0000c7ff }, - { _MMIO(0x2788), 0x00004002 }, - { _MMIO(0x278c), 0x0000d3ff }, - { _MMIO(0x2790), 0x00100700 }, - { _MMIO(0x2794), 0x0000ff1f }, - { _MMIO(0x2798), 0x00001402 }, - { _MMIO(0x279c), 0x0000fc3f }, - { _MMIO(0x27a0), 0x00001002 }, - { _MMIO(0x27a4), 0x0000fc7f }, - { _MMIO(0x27a8), 0x00000402 }, - { _MMIO(0x27ac), 0x0000fd3f }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_1[] = { - { _MMIO(0x9888), 0x126c7b40 }, - { _MMIO(0x9888), 0x166c0020 }, - { _MMIO(0x9888), 0x0a603444 }, - { _MMIO(0x9888), 0x0a613400 }, - { _MMIO(0x9888), 0x1a4ea800 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x024e8000 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x064f4000 }, - { _MMIO(0x9888), 0x0c6c5327 }, - { _MMIO(0x9888), 0x0e6c5425 }, - { _MMIO(0x9888), 0x006c2a00 }, - { _MMIO(0x9888), 0x026c285b }, - { _MMIO(0x9888), 0x046c005c }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x1a6c0800 }, - { _MMIO(0x9888), 0x0c1bc000 }, - { _MMIO(0x9888), 0x0e1bc000 }, - { _MMIO(0x9888), 0x001b8000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x041bc000 }, - { _MMIO(0x9888), 0x1c1c003c }, - { _MMIO(0x9888), 0x121c8000 }, - { _MMIO(0x9888), 0x141c8000 }, - { _MMIO(0x9888), 0x161c8000 }, - { _MMIO(0x9888), 0x181c8000 }, - { _MMIO(0x9888), 0x1a1c0800 }, - { _MMIO(0x9888), 0x065b4000 }, - { _MMIO(0x9888), 0x1a5c1000 }, - { _MMIO(0x9888), 0x10600000 }, - { _MMIO(0x9888), 0x04600000 }, - { _MMIO(0x9888), 0x0c610044 }, - { _MMIO(0x9888), 0x10610000 }, - { _MMIO(0x9888), 0x06610000 }, - { _MMIO(0x9888), 0x0c4c02a8 }, - { _MMIO(0x9888), 0x084ca000 }, - { _MMIO(0x9888), 0x0a4c002a }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x100f0154 }, - { _MMIO(0x9888), 0x0c0f5000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x182c00aa }, - { _MMIO(0x9888), 0x022c8000 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2cc000 }, - { _MMIO(0x9888), 0x1190ffc0 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900420 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900021 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900400 }, - { _MMIO(0x9888), 0x43900421 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900040 }, -}; - -static int -get_l3_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_1; - lens[n] = ARRAY_SIZE(mux_config_l3_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00028002 }, - { _MMIO(0x277c), 0x000087ff }, - { _MMIO(0x2780), 0x00020002 }, - { _MMIO(0x2784), 0x00008fff }, - { _MMIO(0x2788), 0x00008002 }, - { _MMIO(0x278c), 0x0000a7ff }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_2[] = { - { _MMIO(0x9888), 0x126c02e0 }, - { _MMIO(0x9888), 0x146c0001 }, - { _MMIO(0x9888), 0x0a623400 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x064f4000 }, - { _MMIO(0x9888), 0x026c3324 }, - { _MMIO(0x9888), 0x046c3422 }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x041bc000 }, - { _MMIO(0x9888), 0x141c8000 }, - { _MMIO(0x9888), 0x161c8000 }, - { _MMIO(0x9888), 0x181c8000 }, - { _MMIO(0x9888), 0x1a1c0800 }, - { _MMIO(0x9888), 0x065b4000 }, - { _MMIO(0x9888), 0x1a5c1000 }, - { _MMIO(0x9888), 0x06614000 }, - { _MMIO(0x9888), 0x0c620044 }, - { _MMIO(0x9888), 0x10620000 }, - { _MMIO(0x9888), 0x06620000 }, - { _MMIO(0x9888), 0x084c8000 }, - { _MMIO(0x9888), 0x0a4c002a }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0f4000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2cc000 }, - { _MMIO(0x9888), 0x1190f800 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x43900000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900000 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_l3_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_2; - lens[n] = ARRAY_SIZE(mux_config_l3_2); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_3[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00028002 }, - { _MMIO(0x277c), 0x000087ff }, - { _MMIO(0x2780), 0x00020002 }, - { _MMIO(0x2784), 0x00008fff }, - { _MMIO(0x2788), 0x00008002 }, - { _MMIO(0x278c), 0x0000a7ff }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_3[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_3[] = { - { _MMIO(0x9888), 0x126c4e80 }, - { _MMIO(0x9888), 0x146c0000 }, - { _MMIO(0x9888), 0x0a633400 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x0c4e8000 }, - { _MMIO(0x9888), 0x026c3321 }, - { _MMIO(0x9888), 0x046c342f }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1a6c2000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x041bc000 }, - { _MMIO(0x9888), 0x061b4000 }, - { _MMIO(0x9888), 0x141c8000 }, - { _MMIO(0x9888), 0x161c8000 }, - { _MMIO(0x9888), 0x181c8000 }, - { _MMIO(0x9888), 0x1a1c1800 }, - { _MMIO(0x9888), 0x06604000 }, - { _MMIO(0x9888), 0x0c630044 }, - { _MMIO(0x9888), 0x10630000 }, - { _MMIO(0x9888), 0x06630000 }, - { _MMIO(0x9888), 0x084c8000 }, - { _MMIO(0x9888), 0x0a4c00aa }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0f4000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x1190f800 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x43900842 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900002 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_l3_3_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_3; - lens[n] = ARRAY_SIZE(mux_config_l3_3); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x30800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000efff }, - { _MMIO(0x2778), 0x00006000 }, - { _MMIO(0x277c), 0x0000f3ff }, -}; - -static const struct i915_oa_reg flex_eu_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x9888), 0x102f3800 }, - { _MMIO(0x9888), 0x144d0500 }, - { _MMIO(0x9888), 0x120d03c0 }, - { _MMIO(0x9888), 0x140d03cf }, - { _MMIO(0x9888), 0x0c0f0004 }, - { _MMIO(0x9888), 0x0c4e4000 }, - { _MMIO(0x9888), 0x042f0480 }, - { _MMIO(0x9888), 0x082f0000 }, - { _MMIO(0x9888), 0x022f0000 }, - { _MMIO(0x9888), 0x0a4c0090 }, - { _MMIO(0x9888), 0x064d0027 }, - { _MMIO(0x9888), 0x004d0000 }, - { _MMIO(0x9888), 0x000d0d40 }, - { _MMIO(0x9888), 0x020d803f }, - { _MMIO(0x9888), 0x040d8023 }, - { _MMIO(0x9888), 0x100d0000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x020f0010 }, - { _MMIO(0x9888), 0x000f0000 }, - { _MMIO(0x9888), 0x0e0f0050 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x1190fc00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41901400 }, - { _MMIO(0x9888), 0x43901485 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900001 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_rasterizer_and_pixel_backend_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_rasterizer_and_pixel_backend; - lens[n] = ARRAY_SIZE(mux_config_rasterizer_and_pixel_backend); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_sampler[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x70800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x0000c000 }, - { _MMIO(0x2774), 0x0000e7ff }, - { _MMIO(0x2778), 0x00003000 }, - { _MMIO(0x277c), 0x0000f9ff }, - { _MMIO(0x2780), 0x00000c00 }, - { _MMIO(0x2784), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_sampler[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_sampler[] = { - { _MMIO(0x9888), 0x14152c00 }, - { _MMIO(0x9888), 0x16150005 }, - { _MMIO(0x9888), 0x121600a0 }, - { _MMIO(0x9888), 0x14352c00 }, - { _MMIO(0x9888), 0x16350005 }, - { _MMIO(0x9888), 0x123600a0 }, - { _MMIO(0x9888), 0x14552c00 }, - { _MMIO(0x9888), 0x16550005 }, - { _MMIO(0x9888), 0x125600a0 }, - { _MMIO(0x9888), 0x062f6000 }, - { _MMIO(0x9888), 0x022f2000 }, - { _MMIO(0x9888), 0x0c4c0050 }, - { _MMIO(0x9888), 0x0a4c0010 }, - { _MMIO(0x9888), 0x0c0d8000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x100f0350 }, - { _MMIO(0x9888), 0x0c0fb000 }, - { _MMIO(0x9888), 0x0e0f00da }, - { _MMIO(0x9888), 0x182c0028 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x022dc000 }, - { _MMIO(0x9888), 0x042d4000 }, - { _MMIO(0x9888), 0x0c138000 }, - { _MMIO(0x9888), 0x0e132000 }, - { _MMIO(0x9888), 0x0413c000 }, - { _MMIO(0x9888), 0x1c140018 }, - { _MMIO(0x9888), 0x0c157000 }, - { _MMIO(0x9888), 0x0e150078 }, - { _MMIO(0x9888), 0x10150000 }, - { _MMIO(0x9888), 0x04162180 }, - { _MMIO(0x9888), 0x02160000 }, - { _MMIO(0x9888), 0x04174000 }, - { _MMIO(0x9888), 0x0233a000 }, - { _MMIO(0x9888), 0x04333000 }, - { _MMIO(0x9888), 0x14348000 }, - { _MMIO(0x9888), 0x16348000 }, - { _MMIO(0x9888), 0x02357870 }, - { _MMIO(0x9888), 0x10350000 }, - { _MMIO(0x9888), 0x04360043 }, - { _MMIO(0x9888), 0x02360000 }, - { _MMIO(0x9888), 0x04371000 }, - { _MMIO(0x9888), 0x0e538000 }, - { _MMIO(0x9888), 0x00538000 }, - { _MMIO(0x9888), 0x06533000 }, - { _MMIO(0x9888), 0x1c540020 }, - { _MMIO(0x9888), 0x12548000 }, - { _MMIO(0x9888), 0x0e557000 }, - { _MMIO(0x9888), 0x00557800 }, - { _MMIO(0x9888), 0x10550000 }, - { _MMIO(0x9888), 0x06560043 }, - { _MMIO(0x9888), 0x02560000 }, - { _MMIO(0x9888), 0x06571000 }, - { _MMIO(0x9888), 0x1190ff80 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900060 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c00 }, - { _MMIO(0x9888), 0x43900842 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900060 }, -}; - -static int -get_sampler_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_sampler; - lens[n] = ARRAY_SIZE(mux_config_sampler); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x00007fff }, - { _MMIO(0x2778), 0x00000000 }, - { _MMIO(0x277c), 0x00009fff }, - { _MMIO(0x2780), 0x00000002 }, - { _MMIO(0x2784), 0x0000efff }, - { _MMIO(0x2788), 0x00000000 }, - { _MMIO(0x278c), 0x0000f3ff }, - { _MMIO(0x2790), 0x00000002 }, - { _MMIO(0x2794), 0x0000fdff }, - { _MMIO(0x2798), 0x00000000 }, - { _MMIO(0x279c), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_1[] = { - { _MMIO(0x9888), 0x12120000 }, - { _MMIO(0x9888), 0x12320000 }, - { _MMIO(0x9888), 0x12520000 }, - { _MMIO(0x9888), 0x002f8000 }, - { _MMIO(0x9888), 0x022f3000 }, - { _MMIO(0x9888), 0x0a4c0015 }, - { _MMIO(0x9888), 0x0c0d8000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x100f03a0 }, - { _MMIO(0x9888), 0x0c0ff000 }, - { _MMIO(0x9888), 0x0e0f0095 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2d8000 }, - { _MMIO(0x9888), 0x0e2d4000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x02108000 }, - { _MMIO(0x9888), 0x0410c000 }, - { _MMIO(0x9888), 0x02118000 }, - { _MMIO(0x9888), 0x0411c000 }, - { _MMIO(0x9888), 0x02121880 }, - { _MMIO(0x9888), 0x041219b5 }, - { _MMIO(0x9888), 0x00120000 }, - { _MMIO(0x9888), 0x02134000 }, - { _MMIO(0x9888), 0x04135000 }, - { _MMIO(0x9888), 0x0c308000 }, - { _MMIO(0x9888), 0x0e304000 }, - { _MMIO(0x9888), 0x06304000 }, - { _MMIO(0x9888), 0x0c318000 }, - { _MMIO(0x9888), 0x0e314000 }, - { _MMIO(0x9888), 0x06314000 }, - { _MMIO(0x9888), 0x0c321a80 }, - { _MMIO(0x9888), 0x0e320033 }, - { _MMIO(0x9888), 0x06320031 }, - { _MMIO(0x9888), 0x00320000 }, - { _MMIO(0x9888), 0x0c334000 }, - { _MMIO(0x9888), 0x0e331000 }, - { _MMIO(0x9888), 0x06331000 }, - { _MMIO(0x9888), 0x0e508000 }, - { _MMIO(0x9888), 0x00508000 }, - { _MMIO(0x9888), 0x02504000 }, - { _MMIO(0x9888), 0x0e518000 }, - { _MMIO(0x9888), 0x00518000 }, - { _MMIO(0x9888), 0x02514000 }, - { _MMIO(0x9888), 0x0e521880 }, - { _MMIO(0x9888), 0x00521a80 }, - { _MMIO(0x9888), 0x02520033 }, - { _MMIO(0x9888), 0x0e534000 }, - { _MMIO(0x9888), 0x00534000 }, - { _MMIO(0x9888), 0x02531000 }, - { _MMIO(0x9888), 0x1190ff80 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900800 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900062 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c00 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900040 }, -}; - -static int -get_tdl_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_1; - lens[n] = ARRAY_SIZE(mux_config_tdl_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_2[] = { - { _MMIO(0x9888), 0x12124d60 }, - { _MMIO(0x9888), 0x12322e60 }, - { _MMIO(0x9888), 0x12524d60 }, - { _MMIO(0x9888), 0x022f3000 }, - { _MMIO(0x9888), 0x0a4c0014 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0fe000 }, - { _MMIO(0x9888), 0x0e0f0097 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x002d8000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x0410c000 }, - { _MMIO(0x9888), 0x0411c000 }, - { _MMIO(0x9888), 0x04121fb7 }, - { _MMIO(0x9888), 0x00120000 }, - { _MMIO(0x9888), 0x04135000 }, - { _MMIO(0x9888), 0x00308000 }, - { _MMIO(0x9888), 0x06304000 }, - { _MMIO(0x9888), 0x00318000 }, - { _MMIO(0x9888), 0x06314000 }, - { _MMIO(0x9888), 0x00321b80 }, - { _MMIO(0x9888), 0x0632003f }, - { _MMIO(0x9888), 0x00334000 }, - { _MMIO(0x9888), 0x06331000 }, - { _MMIO(0x9888), 0x0250c000 }, - { _MMIO(0x9888), 0x0251c000 }, - { _MMIO(0x9888), 0x02521fb7 }, - { _MMIO(0x9888), 0x00520000 }, - { _MMIO(0x9888), 0x02535000 }, - { _MMIO(0x9888), 0x1190fc00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900800 }, - { _MMIO(0x9888), 0x43900063 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900040 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_tdl_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_2; - lens[n] = ARRAY_SIZE(mux_config_tdl_2); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_extra[] = { -}; - -static const struct i915_oa_reg flex_eu_config_compute_extra[] = { -}; - -static const struct i915_oa_reg mux_config_compute_extra[] = { - { _MMIO(0x9888), 0x121203e0 }, - { _MMIO(0x9888), 0x123203e0 }, - { _MMIO(0x9888), 0x125203e0 }, - { _MMIO(0x9888), 0x129203e0 }, - { _MMIO(0x9888), 0x12b203e0 }, - { _MMIO(0x9888), 0x12d203e0 }, - { _MMIO(0x9888), 0x024ec000 }, - { _MMIO(0x9888), 0x044ec000 }, - { _MMIO(0x9888), 0x064ec000 }, - { _MMIO(0x9888), 0x022f4000 }, - { _MMIO(0x9888), 0x084ca000 }, - { _MMIO(0x9888), 0x0a4c0042 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0f5000 }, - { _MMIO(0x9888), 0x0e0f006d }, - { _MMIO(0x9888), 0x022c8000 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x042d8000 }, - { _MMIO(0x9888), 0x06104000 }, - { _MMIO(0x9888), 0x06114000 }, - { _MMIO(0x9888), 0x06120033 }, - { _MMIO(0x9888), 0x00120000 }, - { _MMIO(0x9888), 0x06131000 }, - { _MMIO(0x9888), 0x04308000 }, - { _MMIO(0x9888), 0x04318000 }, - { _MMIO(0x9888), 0x04321980 }, - { _MMIO(0x9888), 0x00320000 }, - { _MMIO(0x9888), 0x04334000 }, - { _MMIO(0x9888), 0x04504000 }, - { _MMIO(0x9888), 0x04514000 }, - { _MMIO(0x9888), 0x04520033 }, - { _MMIO(0x9888), 0x00520000 }, - { _MMIO(0x9888), 0x04531000 }, - { _MMIO(0x9888), 0x00af8000 }, - { _MMIO(0x9888), 0x0acc0001 }, - { _MMIO(0x9888), 0x008d8000 }, - { _MMIO(0x9888), 0x028da000 }, - { _MMIO(0x9888), 0x0c8fb000 }, - { _MMIO(0x9888), 0x0e8f0001 }, - { _MMIO(0x9888), 0x06ac8000 }, - { _MMIO(0x9888), 0x02ad4000 }, - { _MMIO(0x9888), 0x02908000 }, - { _MMIO(0x9888), 0x02918000 }, - { _MMIO(0x9888), 0x02921980 }, - { _MMIO(0x9888), 0x00920000 }, - { _MMIO(0x9888), 0x02934000 }, - { _MMIO(0x9888), 0x02b04000 }, - { _MMIO(0x9888), 0x02b14000 }, - { _MMIO(0x9888), 0x02b20033 }, - { _MMIO(0x9888), 0x00b20000 }, - { _MMIO(0x9888), 0x02b31000 }, - { _MMIO(0x9888), 0x00d08000 }, - { _MMIO(0x9888), 0x00d18000 }, - { _MMIO(0x9888), 0x00d21980 }, - { _MMIO(0x9888), 0x00d34000 }, - { _MMIO(0x9888), 0x1190fc00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c00 }, - { _MMIO(0x9888), 0x43900402 }, - { _MMIO(0x9888), 0x53901550 }, - { _MMIO(0x9888), 0x45900080 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_compute_extra_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_extra; - lens[n] = ARRAY_SIZE(mux_config_compute_extra); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_vme_pipe[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00100030 }, - { _MMIO(0x2774), 0x0000fff9 }, - { _MMIO(0x2778), 0x00000002 }, - { _MMIO(0x277c), 0x0000fffc }, - { _MMIO(0x2780), 0x00000002 }, - { _MMIO(0x2784), 0x0000fff3 }, - { _MMIO(0x2788), 0x00100180 }, - { _MMIO(0x278c), 0x0000ffcf }, - { _MMIO(0x2790), 0x00000002 }, - { _MMIO(0x2794), 0x0000ffcf }, - { _MMIO(0x2798), 0x00000002 }, - { _MMIO(0x279c), 0x0000ff3f }, -}; - -static const struct i915_oa_reg flex_eu_config_vme_pipe[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00008003 }, -}; - -static const struct i915_oa_reg mux_config_vme_pipe[] = { - { _MMIO(0x9888), 0x141a5800 }, - { _MMIO(0x9888), 0x161a00c0 }, - { _MMIO(0x9888), 0x12180240 }, - { _MMIO(0x9888), 0x14180002 }, - { _MMIO(0x9888), 0x149a5800 }, - { _MMIO(0x9888), 0x169a00c0 }, - { _MMIO(0x9888), 0x12980240 }, - { _MMIO(0x9888), 0x14980002 }, - { _MMIO(0x9888), 0x1a4e3fc0 }, - { _MMIO(0x9888), 0x002f1000 }, - { _MMIO(0x9888), 0x022f8000 }, - { _MMIO(0x9888), 0x042f3000 }, - { _MMIO(0x9888), 0x004c4000 }, - { _MMIO(0x9888), 0x0a4c9500 }, - { _MMIO(0x9888), 0x0c4c002a }, - { _MMIO(0x9888), 0x000d2000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0c0f0400 }, - { _MMIO(0x9888), 0x0e0f5500 }, - { _MMIO(0x9888), 0x100f0015 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2c8000 }, - { _MMIO(0x9888), 0x162caa00 }, - { _MMIO(0x9888), 0x182c000a }, - { _MMIO(0x9888), 0x04193000 }, - { _MMIO(0x9888), 0x081a28c1 }, - { _MMIO(0x9888), 0x001a0000 }, - { _MMIO(0x9888), 0x00133000 }, - { _MMIO(0x9888), 0x0613c000 }, - { _MMIO(0x9888), 0x0813f000 }, - { _MMIO(0x9888), 0x00172000 }, - { _MMIO(0x9888), 0x06178000 }, - { _MMIO(0x9888), 0x0817a000 }, - { _MMIO(0x9888), 0x00180037 }, - { _MMIO(0x9888), 0x06180940 }, - { _MMIO(0x9888), 0x08180000 }, - { _MMIO(0x9888), 0x02180000 }, - { _MMIO(0x9888), 0x04183000 }, - { _MMIO(0x9888), 0x04afc000 }, - { _MMIO(0x9888), 0x06af3000 }, - { _MMIO(0x9888), 0x0acc4000 }, - { _MMIO(0x9888), 0x0ccc0015 }, - { _MMIO(0x9888), 0x0a8da000 }, - { _MMIO(0x9888), 0x0c8da000 }, - { _MMIO(0x9888), 0x0e8f4000 }, - { _MMIO(0x9888), 0x108f0015 }, - { _MMIO(0x9888), 0x16aca000 }, - { _MMIO(0x9888), 0x18ac000a }, - { _MMIO(0x9888), 0x06993000 }, - { _MMIO(0x9888), 0x0c9a28c1 }, - { _MMIO(0x9888), 0x009a0000 }, - { _MMIO(0x9888), 0x0a93f000 }, - { _MMIO(0x9888), 0x0c93f000 }, - { _MMIO(0x9888), 0x0a97a000 }, - { _MMIO(0x9888), 0x0c97a000 }, - { _MMIO(0x9888), 0x0a980977 }, - { _MMIO(0x9888), 0x08980000 }, - { _MMIO(0x9888), 0x04980000 }, - { _MMIO(0x9888), 0x06983000 }, - { _MMIO(0x9888), 0x119000ff }, - { _MMIO(0x9888), 0x51900050 }, - { _MMIO(0x9888), 0x41900000 }, - { _MMIO(0x9888), 0x55900115 }, - { _MMIO(0x9888), 0x45900000 }, - { _MMIO(0x9888), 0x47900884 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900002 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_vme_pipe_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_vme_pipe; - lens[n] = ARRAY_SIZE(mux_config_vme_pipe); - n++; - - return n; -} - static const struct i915_oa_reg b_counter_config_test_oa[] = { { _MMIO(0x2740), 0x00000000 }, { _MMIO(0x2744), 0x00800000 }, @@ -1944,1096 +74,35 @@ static const struct i915_oa_reg mux_config_test_oa[] = { { _MMIO(0x9888), 0x33900000 }, }; -static int -get_test_oa_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_test_oa; - lens[n] = ARRAY_SIZE(mux_config_test_oa); - n++; - - return n; -} - -int i915_oa_select_metric_set_sklgt3(struct drm_i915_private *dev_priv) -{ - dev_priv->perf.oa.n_mux_configs = 0; - dev_priv->perf.oa.b_counter_regs = NULL; - dev_priv->perf.oa.b_counter_regs_len = 0; - dev_priv->perf.oa.flex_regs = NULL; - dev_priv->perf.oa.flex_regs_len = 0; - - switch (dev_priv->perf.oa.metrics_set) { - case METRIC_SET_ID_RENDER_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_render_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_basic); - - return 0; - case METRIC_SET_ID_COMPUTE_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_compute_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_basic); - - return 0; - case METRIC_SET_ID_RENDER_PIPE_PROFILE: - dev_priv->perf.oa.n_mux_configs = - get_render_pipe_profile_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_PIPE_PROFILE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_pipe_profile; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_pipe_profile); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_pipe_profile; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_pipe_profile); - - return 0; - case METRIC_SET_ID_MEMORY_READS: - dev_priv->perf.oa.n_mux_configs = - get_memory_reads_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_READS\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_reads; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_reads); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_reads; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_reads); - - return 0; - case METRIC_SET_ID_MEMORY_WRITES: - dev_priv->perf.oa.n_mux_configs = - get_memory_writes_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_WRITES\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_writes; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_writes); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_writes; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_writes); - - return 0; - case METRIC_SET_ID_COMPUTE_EXTENDED: - dev_priv->perf.oa.n_mux_configs = - get_compute_extended_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTENDED\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_extended; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_extended); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_extended; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_extended); - - return 0; - case METRIC_SET_ID_COMPUTE_L3_CACHE: - dev_priv->perf.oa.n_mux_configs = - get_compute_l3_cache_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_L3_CACHE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_l3_cache; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_l3_cache); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_l3_cache; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_l3_cache); - - return 0; - case METRIC_SET_ID_HDC_AND_SF: - dev_priv->perf.oa.n_mux_configs = - get_hdc_and_sf_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"HDC_AND_SF\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_hdc_and_sf; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_hdc_and_sf); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_hdc_and_sf; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_hdc_and_sf); - - return 0; - case METRIC_SET_ID_L3_1: - dev_priv->perf.oa.n_mux_configs = - get_l3_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_1); - - return 0; - case METRIC_SET_ID_L3_2: - dev_priv->perf.oa.n_mux_configs = - get_l3_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_2); - - return 0; - case METRIC_SET_ID_L3_3: - dev_priv->perf.oa.n_mux_configs = - get_l3_3_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_3\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_3; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_3); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_3; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_3); - - return 0; - case METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND: - dev_priv->perf.oa.n_mux_configs = - get_rasterizer_and_pixel_backend_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RASTERIZER_AND_PIXEL_BACKEND\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_rasterizer_and_pixel_backend); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_rasterizer_and_pixel_backend); - - return 0; - case METRIC_SET_ID_SAMPLER: - dev_priv->perf.oa.n_mux_configs = - get_sampler_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"SAMPLER\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_sampler; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_sampler); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_sampler; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_sampler); - - return 0; - case METRIC_SET_ID_TDL_1: - dev_priv->perf.oa.n_mux_configs = - get_tdl_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_1); - - return 0; - case METRIC_SET_ID_TDL_2: - dev_priv->perf.oa.n_mux_configs = - get_tdl_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_2); - - return 0; - case METRIC_SET_ID_COMPUTE_EXTRA: - dev_priv->perf.oa.n_mux_configs = - get_compute_extra_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTRA\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_extra; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_extra); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_extra; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_extra); - - return 0; - case METRIC_SET_ID_VME_PIPE: - dev_priv->perf.oa.n_mux_configs = - get_vme_pipe_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"VME_PIPE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_vme_pipe; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_vme_pipe); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_vme_pipe; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_vme_pipe); - - return 0; - case METRIC_SET_ID_TEST_OA: - dev_priv->perf.oa.n_mux_configs = - get_test_oa_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TEST_OA\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_test_oa; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_test_oa); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_test_oa; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_test_oa); - - return 0; - default: - return -ENODEV; - } -} - -static ssize_t -show_render_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_BASIC); -} - -static struct device_attribute dev_attr_render_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_render_basic[] = { - &dev_attr_render_basic_id.attr, - NULL, -}; - -static struct attribute_group group_render_basic = { - .name = "4616d450-2393-4836-8146-53c5ed84d359", - .attrs = attrs_render_basic, -}; - -static ssize_t -show_compute_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_BASIC); -} - -static struct device_attribute dev_attr_compute_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_basic[] = { - &dev_attr_compute_basic_id.attr, - NULL, -}; - -static struct attribute_group group_compute_basic = { - .name = "4320492b-fd03-42ac-922f-dbe1ef3b7b58", - .attrs = attrs_compute_basic, -}; - -static ssize_t -show_render_pipe_profile_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_PIPE_PROFILE); -} - -static struct device_attribute dev_attr_render_pipe_profile_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_pipe_profile_id, - .store = NULL, -}; - -static struct attribute *attrs_render_pipe_profile[] = { - &dev_attr_render_pipe_profile_id.attr, - NULL, -}; - -static struct attribute_group group_render_pipe_profile = { - .name = "bd2d9cae-b9ec-4f5b-9d2f-934bed398a2d", - .attrs = attrs_render_pipe_profile, -}; - -static ssize_t -show_memory_reads_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_READS); -} - -static struct device_attribute dev_attr_memory_reads_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_reads_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_reads[] = { - &dev_attr_memory_reads_id.attr, - NULL, -}; - -static struct attribute_group group_memory_reads = { - .name = "4ca0f3fe-7fd3-4924-98cb-1807d9879767", - .attrs = attrs_memory_reads, -}; - -static ssize_t -show_memory_writes_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_WRITES); -} - -static struct device_attribute dev_attr_memory_writes_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_writes_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_writes[] = { - &dev_attr_memory_writes_id.attr, - NULL, -}; - -static struct attribute_group group_memory_writes = { - .name = "a0c0172c-ee13-403d-99ff-2bdf6936cf14", - .attrs = attrs_memory_writes, -}; - -static ssize_t -show_compute_extended_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_EXTENDED); -} - -static struct device_attribute dev_attr_compute_extended_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_extended_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_extended[] = { - &dev_attr_compute_extended_id.attr, - NULL, -}; - -static struct attribute_group group_compute_extended = { - .name = "52435e0b-f188-42ea-8680-21a56ee20dee", - .attrs = attrs_compute_extended, -}; - -static ssize_t -show_compute_l3_cache_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_L3_CACHE); -} - -static struct device_attribute dev_attr_compute_l3_cache_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_l3_cache_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_l3_cache[] = { - &dev_attr_compute_l3_cache_id.attr, - NULL, -}; - -static struct attribute_group group_compute_l3_cache = { - .name = "27076eeb-49f3-4fed-8423-c66506005c63", - .attrs = attrs_compute_l3_cache, -}; - -static ssize_t -show_hdc_and_sf_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_HDC_AND_SF); -} - -static struct device_attribute dev_attr_hdc_and_sf_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_hdc_and_sf_id, - .store = NULL, -}; - -static struct attribute *attrs_hdc_and_sf[] = { - &dev_attr_hdc_and_sf_id.attr, - NULL, -}; - -static struct attribute_group group_hdc_and_sf = { - .name = "8071b409-c39a-4674-94d7-32962ecfb512", - .attrs = attrs_hdc_and_sf, -}; - -static ssize_t -show_l3_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_1); -} - -static struct device_attribute dev_attr_l3_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_1_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_1[] = { - &dev_attr_l3_1_id.attr, - NULL, -}; - -static struct attribute_group group_l3_1 = { - .name = "5e0b391e-9ea8-4901-b2ff-b64ff616c7ed", - .attrs = attrs_l3_1, -}; - -static ssize_t -show_l3_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_2); -} - -static struct device_attribute dev_attr_l3_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_2_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_2[] = { - &dev_attr_l3_2_id.attr, - NULL, -}; - -static struct attribute_group group_l3_2 = { - .name = "25dc828e-1d2d-426e-9546-a1d4233cdf16", - .attrs = attrs_l3_2, -}; - -static ssize_t -show_l3_3_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_3); -} - -static struct device_attribute dev_attr_l3_3_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_3_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_3[] = { - &dev_attr_l3_3_id.attr, - NULL, -}; - -static struct attribute_group group_l3_3 = { - .name = "3dba9405-2d7e-4d70-8199-e734e82fd6bf", - .attrs = attrs_l3_3, -}; - -static ssize_t -show_rasterizer_and_pixel_backend_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND); -} - -static struct device_attribute dev_attr_rasterizer_and_pixel_backend_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_rasterizer_and_pixel_backend_id, - .store = NULL, -}; - -static struct attribute *attrs_rasterizer_and_pixel_backend[] = { - &dev_attr_rasterizer_and_pixel_backend_id.attr, - NULL, -}; - -static struct attribute_group group_rasterizer_and_pixel_backend = { - .name = "76935d7b-09c9-46bf-87f1-c18b4a86ebe5", - .attrs = attrs_rasterizer_and_pixel_backend, -}; - -static ssize_t -show_sampler_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_SAMPLER); -} - -static struct device_attribute dev_attr_sampler_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_sampler_id, - .store = NULL, -}; - -static struct attribute *attrs_sampler[] = { - &dev_attr_sampler_id.attr, - NULL, -}; - -static struct attribute_group group_sampler = { - .name = "1b34c0d6-4f4c-4d7b-833f-4aaf236d87a6", - .attrs = attrs_sampler, -}; - -static ssize_t -show_tdl_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_1); -} - -static struct device_attribute dev_attr_tdl_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_1_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_1[] = { - &dev_attr_tdl_1_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_1 = { - .name = "b375c985-9953-455b-bda2-b03f7594e9db", - .attrs = attrs_tdl_1, -}; - -static ssize_t -show_tdl_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_2); -} - -static struct device_attribute dev_attr_tdl_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_2_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_2[] = { - &dev_attr_tdl_2_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_2 = { - .name = "3e2be2bb-884a-49bb-82c5-2358e6bd5f2d", - .attrs = attrs_tdl_2, -}; - -static ssize_t -show_compute_extra_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_EXTRA); -} - -static struct device_attribute dev_attr_compute_extra_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_extra_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_extra[] = { - &dev_attr_compute_extra_id.attr, - NULL, -}; - -static struct attribute_group group_compute_extra = { - .name = "2d80a648-7b5a-4e92-bbe7-3b5c76f2e221", - .attrs = attrs_compute_extra, -}; - -static ssize_t -show_vme_pipe_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_VME_PIPE); -} - -static struct device_attribute dev_attr_vme_pipe_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_vme_pipe_id, - .store = NULL, -}; - -static struct attribute *attrs_vme_pipe[] = { - &dev_attr_vme_pipe_id.attr, - NULL, -}; - -static struct attribute_group group_vme_pipe = { - .name = "cfae9232-6ffc-42cc-a703-9790016925f0", - .attrs = attrs_vme_pipe, -}; - static ssize_t show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", METRIC_SET_ID_TEST_OA); + return sprintf(buf, "1\n"); } -static struct device_attribute dev_attr_test_oa_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_test_oa_id, - .store = NULL, -}; - -static struct attribute *attrs_test_oa[] = { - &dev_attr_test_oa_id.attr, - NULL, -}; - -static struct attribute_group group_test_oa = { - .name = "2b985803-d3c9-4629-8a4f-634bfecba0e8", - .attrs = attrs_test_oa, -}; - -int -i915_perf_register_sysfs_sklgt3(struct drm_i915_private *dev_priv) +void +i915_perf_load_test_config_sklgt3(struct drm_i915_private *dev_priv) { - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; - int ret = 0; + strncpy(dev_priv->perf.oa.test_config.uuid, + "2b985803-d3c9-4629-8a4f-634bfecba0e8", + UUID_STRING_LEN); + dev_priv->perf.oa.test_config.id = 1; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (ret) - goto error_render_basic; - } - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (ret) - goto error_compute_basic; - } - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (ret) - goto error_render_pipe_profile; - } - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (ret) - goto error_memory_reads; - } - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (ret) - goto error_memory_writes; - } - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (ret) - goto error_compute_extended; - } - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); - if (ret) - goto error_compute_l3_cache; - } - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (ret) - goto error_hdc_and_sf; - } - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (ret) - goto error_l3_1; - } - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_2); - if (ret) - goto error_l3_2; - } - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_3); - if (ret) - goto error_l3_3; - } - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (ret) - goto error_rasterizer_and_pixel_backend; - } - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_sampler); - if (ret) - goto error_sampler; - } - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (ret) - goto error_tdl_1; - } - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (ret) - goto error_tdl_2; - } - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extra); - if (ret) - goto error_compute_extra; - } - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); - if (ret) - goto error_vme_pipe; - } - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_test_oa); - if (ret) - goto error_test_oa; - } + dev_priv->perf.oa.test_config.mux_regs = mux_config_test_oa; + dev_priv->perf.oa.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa); - return 0; + dev_priv->perf.oa.test_config.b_counter_regs = b_counter_config_test_oa; + dev_priv->perf.oa.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa); -error_test_oa: - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); -error_vme_pipe: - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extra); -error_compute_extra: - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); -error_tdl_2: - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); -error_tdl_1: - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler); -error_sampler: - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); -error_rasterizer_and_pixel_backend: - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_3); -error_l3_3: - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_2); -error_l3_2: - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); -error_l3_1: - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); -error_hdc_and_sf: - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); -error_compute_l3_cache: - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); -error_compute_extended: - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); -error_memory_writes: - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); -error_memory_reads: - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); -error_render_pipe_profile: - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); -error_compute_basic: - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); -error_render_basic: - return ret; -} + dev_priv->perf.oa.test_config.flex_regs = flex_eu_config_test_oa; + dev_priv->perf.oa.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa); -void -i915_perf_unregister_sysfs_sklgt3(struct drm_i915_private *dev_priv) -{ - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; + dev_priv->perf.oa.test_config.sysfs_metric.name = "2b985803-d3c9-4629-8a4f-634bfecba0e8"; + dev_priv->perf.oa.test_config.sysfs_metric.attrs = dev_priv->perf.oa.test_config.attrs; + + dev_priv->perf.oa.test_config.attrs[0] = &dev_priv->perf.oa.test_config.sysfs_metric_id.attr; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_2); - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_3); - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler); - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extra); - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_test_oa); + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.name = "id"; + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.mode = 0444; + dev_priv->perf.oa.test_config.sysfs_metric_id.show = show_test_oa_id; } diff --git a/drivers/gpu/drm/i915/i915_oa_sklgt3.h b/drivers/gpu/drm/i915/i915_oa_sklgt3.h index c0accb1f9b74..06746b2616c8 100644 --- a/drivers/gpu/drm/i915/i915_oa_sklgt3.h +++ b/drivers/gpu/drm/i915/i915_oa_sklgt3.h @@ -29,12 +29,6 @@ #ifndef __I915_OA_SKLGT3_H__ #define __I915_OA_SKLGT3_H__ -extern int i915_oa_n_builtin_metric_sets_sklgt3; - -extern int i915_oa_select_metric_set_sklgt3(struct drm_i915_private *dev_priv); - -extern int i915_perf_register_sysfs_sklgt3(struct drm_i915_private *dev_priv); - -extern void i915_perf_unregister_sysfs_sklgt3(struct drm_i915_private *dev_priv); +extern void i915_perf_load_test_config_sklgt3(struct drm_i915_private *dev_priv); #endif diff --git a/drivers/gpu/drm/i915/i915_oa_sklgt4.c b/drivers/gpu/drm/i915/i915_oa_sklgt4.c index 9ddab43a2176..f933f497c15a 100644 --- a/drivers/gpu/drm/i915/i915_oa_sklgt4.c +++ b/drivers/gpu/drm/i915/i915_oa_sklgt4.c @@ -31,1930 +31,6 @@ #include "i915_drv.h" #include "i915_oa_sklgt4.h" -enum metric_set_id { - METRIC_SET_ID_RENDER_BASIC = 1, - METRIC_SET_ID_COMPUTE_BASIC, - METRIC_SET_ID_RENDER_PIPE_PROFILE, - METRIC_SET_ID_MEMORY_READS, - METRIC_SET_ID_MEMORY_WRITES, - METRIC_SET_ID_COMPUTE_EXTENDED, - METRIC_SET_ID_COMPUTE_L3_CACHE, - METRIC_SET_ID_HDC_AND_SF, - METRIC_SET_ID_L3_1, - METRIC_SET_ID_L3_2, - METRIC_SET_ID_L3_3, - METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND, - METRIC_SET_ID_SAMPLER, - METRIC_SET_ID_TDL_1, - METRIC_SET_ID_TDL_2, - METRIC_SET_ID_COMPUTE_EXTRA, - METRIC_SET_ID_VME_PIPE, - METRIC_SET_ID_TEST_OA, -}; - -int i915_oa_n_builtin_metric_sets_sklgt4 = 18; - -static const struct i915_oa_reg b_counter_config_render_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2740), 0x00000000 }, -}; - -static const struct i915_oa_reg flex_eu_config_render_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_render_basic[] = { - { _MMIO(0x9888), 0x166c01e0 }, - { _MMIO(0x9888), 0x12170280 }, - { _MMIO(0x9888), 0x12370280 }, - { _MMIO(0x9888), 0x16ec01e0 }, - { _MMIO(0x9888), 0x176c01e0 }, - { _MMIO(0x9888), 0x11930317 }, - { _MMIO(0x9888), 0x159303df }, - { _MMIO(0x9888), 0x3f900003 }, - { _MMIO(0x9888), 0x1a4e03b0 }, - { _MMIO(0x9888), 0x0a6c0053 }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x0a1b4000 }, - { _MMIO(0x9888), 0x1c1c0001 }, - { _MMIO(0x9888), 0x002f1000 }, - { _MMIO(0x9888), 0x042f1000 }, - { _MMIO(0x9888), 0x004c4000 }, - { _MMIO(0x9888), 0x0a4ca400 }, - { _MMIO(0x9888), 0x0c4c0002 }, - { _MMIO(0x9888), 0x000d2000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0f0400 }, - { _MMIO(0x9888), 0x0e0f5600 }, - { _MMIO(0x9888), 0x100f0001 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x162caa00 }, - { _MMIO(0x9888), 0x062d8000 }, - { _MMIO(0x9888), 0x00133000 }, - { _MMIO(0x9888), 0x08133000 }, - { _MMIO(0x9888), 0x00170020 }, - { _MMIO(0x9888), 0x08170021 }, - { _MMIO(0x9888), 0x10170000 }, - { _MMIO(0x9888), 0x0633c000 }, - { _MMIO(0x9888), 0x06370800 }, - { _MMIO(0x9888), 0x10370000 }, - { _MMIO(0x9888), 0x1ace0230 }, - { _MMIO(0x9888), 0x0aec5300 }, - { _MMIO(0x9888), 0x10ec0000 }, - { _MMIO(0x9888), 0x1cec0000 }, - { _MMIO(0x9888), 0x0a9b8000 }, - { _MMIO(0x9888), 0x1c9c0002 }, - { _MMIO(0x9888), 0x0acc2000 }, - { _MMIO(0x9888), 0x0ccc0002 }, - { _MMIO(0x9888), 0x088d8000 }, - { _MMIO(0x9888), 0x0a8d8000 }, - { _MMIO(0x9888), 0x0e8f1000 }, - { _MMIO(0x9888), 0x108f0001 }, - { _MMIO(0x9888), 0x16ac8800 }, - { _MMIO(0x9888), 0x1b4e0020 }, - { _MMIO(0x9888), 0x096c5300 }, - { _MMIO(0x9888), 0x116c0000 }, - { _MMIO(0x9888), 0x1d6c0000 }, - { _MMIO(0x9888), 0x091b8000 }, - { _MMIO(0x9888), 0x1b1c8000 }, - { _MMIO(0x9888), 0x0b4c2000 }, - { _MMIO(0x9888), 0x090d8000 }, - { _MMIO(0x9888), 0x0f0f1000 }, - { _MMIO(0x9888), 0x172c0800 }, - { _MMIO(0x9888), 0x0d933031 }, - { _MMIO(0x9888), 0x0f933e3f }, - { _MMIO(0x9888), 0x01933d00 }, - { _MMIO(0x9888), 0x0393073c }, - { _MMIO(0x9888), 0x0593000e }, - { _MMIO(0x9888), 0x1d930000 }, - { _MMIO(0x9888), 0x19930000 }, - { _MMIO(0x9888), 0x1b930000 }, - { _MMIO(0x9888), 0x1d900157 }, - { _MMIO(0x9888), 0x1f900158 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x2b908000 }, - { _MMIO(0x9888), 0x2d908000 }, - { _MMIO(0x9888), 0x2f908000 }, - { _MMIO(0x9888), 0x31908000 }, - { _MMIO(0x9888), 0x15908000 }, - { _MMIO(0x9888), 0x17908000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1190003f }, - { _MMIO(0x9888), 0x5190ff30 }, - { _MMIO(0x9888), 0x41900060 }, - { _MMIO(0x9888), 0x55903033 }, - { _MMIO(0x9888), 0x45901421 }, - { _MMIO(0x9888), 0x47900803 }, - { _MMIO(0x9888), 0x5790fff1 }, - { _MMIO(0x9888), 0x49900001 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x5990000f }, - { _MMIO(0x9888), 0x43900000 }, - { _MMIO(0x9888), 0x5390ffff }, -}; - -static int -get_render_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_render_basic; - lens[n] = ARRAY_SIZE(mux_config_render_basic); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_basic[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2740), 0x00000000 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_basic[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_compute_basic[] = { - { _MMIO(0x9888), 0x104f00e0 }, - { _MMIO(0x9888), 0x124f1c00 }, - { _MMIO(0x9888), 0x106c00e0 }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f900003 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x1a4e0820 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x064f0900 }, - { _MMIO(0x9888), 0x084f0032 }, - { _MMIO(0x9888), 0x0a4f1891 }, - { _MMIO(0x9888), 0x0c4f0e00 }, - { _MMIO(0x9888), 0x0e4f003c }, - { _MMIO(0x9888), 0x004f0d80 }, - { _MMIO(0x9888), 0x024f003b }, - { _MMIO(0x9888), 0x006c0002 }, - { _MMIO(0x9888), 0x086c0100 }, - { _MMIO(0x9888), 0x0c6c000c }, - { _MMIO(0x9888), 0x0e6c0b00 }, - { _MMIO(0x9888), 0x186c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x001b4000 }, - { _MMIO(0x9888), 0x081b8000 }, - { _MMIO(0x9888), 0x0c1b4000 }, - { _MMIO(0x9888), 0x0e1b8000 }, - { _MMIO(0x9888), 0x101c8000 }, - { _MMIO(0x9888), 0x1a1c8000 }, - { _MMIO(0x9888), 0x1c1c0024 }, - { _MMIO(0x9888), 0x065b8000 }, - { _MMIO(0x9888), 0x085b4000 }, - { _MMIO(0x9888), 0x0a5bc000 }, - { _MMIO(0x9888), 0x0c5b8000 }, - { _MMIO(0x9888), 0x0e5b4000 }, - { _MMIO(0x9888), 0x005b8000 }, - { _MMIO(0x9888), 0x025b4000 }, - { _MMIO(0x9888), 0x1a5c6000 }, - { _MMIO(0x9888), 0x1c5c001b }, - { _MMIO(0x9888), 0x125c8000 }, - { _MMIO(0x9888), 0x145c8000 }, - { _MMIO(0x9888), 0x004c8000 }, - { _MMIO(0x9888), 0x0a4c2000 }, - { _MMIO(0x9888), 0x0c4c0208 }, - { _MMIO(0x9888), 0x000da000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x020d2000 }, - { _MMIO(0x9888), 0x0c0f5400 }, - { _MMIO(0x9888), 0x0e0f5500 }, - { _MMIO(0x9888), 0x100f0155 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2cc000 }, - { _MMIO(0x9888), 0x162cfb00 }, - { _MMIO(0x9888), 0x182c00be }, - { _MMIO(0x9888), 0x022cc000 }, - { _MMIO(0x9888), 0x042cc000 }, - { _MMIO(0x9888), 0x19900157 }, - { _MMIO(0x9888), 0x1b900158 }, - { _MMIO(0x9888), 0x1d900105 }, - { _MMIO(0x9888), 0x1f900103 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x11900fff }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900800 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900821 }, - { _MMIO(0x9888), 0x47900802 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900802 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900002 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900422 }, - { _MMIO(0x9888), 0x53905555 }, -}; - -static int -get_compute_basic_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_basic; - lens[n] = ARRAY_SIZE(mux_config_compute_basic); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_render_pipe_profile[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007ffea }, - { _MMIO(0x2774), 0x00007ffc }, - { _MMIO(0x2778), 0x0007affa }, - { _MMIO(0x277c), 0x0000f5fd }, - { _MMIO(0x2780), 0x00079ffa }, - { _MMIO(0x2784), 0x0000f3fb }, - { _MMIO(0x2788), 0x0007bf7a }, - { _MMIO(0x278c), 0x0000f7e7 }, - { _MMIO(0x2790), 0x0007fefa }, - { _MMIO(0x2794), 0x0000f7cf }, - { _MMIO(0x2798), 0x00077ffa }, - { _MMIO(0x279c), 0x0000efdf }, - { _MMIO(0x27a0), 0x0006fffa }, - { _MMIO(0x27a4), 0x0000cfbf }, - { _MMIO(0x27a8), 0x0003fffa }, - { _MMIO(0x27ac), 0x00005f7f }, -}; - -static const struct i915_oa_reg flex_eu_config_render_pipe_profile[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_render_pipe_profile[] = { - { _MMIO(0x9888), 0x0c0e001f }, - { _MMIO(0x9888), 0x0a0f0000 }, - { _MMIO(0x9888), 0x10116800 }, - { _MMIO(0x9888), 0x178a03e0 }, - { _MMIO(0x9888), 0x11824c00 }, - { _MMIO(0x9888), 0x11830020 }, - { _MMIO(0x9888), 0x13840020 }, - { _MMIO(0x9888), 0x11850019 }, - { _MMIO(0x9888), 0x11860007 }, - { _MMIO(0x9888), 0x01870c40 }, - { _MMIO(0x9888), 0x17880000 }, - { _MMIO(0x9888), 0x022f4000 }, - { _MMIO(0x9888), 0x0a4c0040 }, - { _MMIO(0x9888), 0x0c0d8000 }, - { _MMIO(0x9888), 0x040d4000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x020e5400 }, - { _MMIO(0x9888), 0x000e0000 }, - { _MMIO(0x9888), 0x080f0040 }, - { _MMIO(0x9888), 0x000f0000 }, - { _MMIO(0x9888), 0x100f0000 }, - { _MMIO(0x9888), 0x0e0f0040 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x06104000 }, - { _MMIO(0x9888), 0x06110012 }, - { _MMIO(0x9888), 0x06131000 }, - { _MMIO(0x9888), 0x01898000 }, - { _MMIO(0x9888), 0x0d890100 }, - { _MMIO(0x9888), 0x03898000 }, - { _MMIO(0x9888), 0x09808000 }, - { _MMIO(0x9888), 0x0b808000 }, - { _MMIO(0x9888), 0x0380c000 }, - { _MMIO(0x9888), 0x0f8a0075 }, - { _MMIO(0x9888), 0x1d8a0000 }, - { _MMIO(0x9888), 0x118a8000 }, - { _MMIO(0x9888), 0x1b8a4000 }, - { _MMIO(0x9888), 0x138a8000 }, - { _MMIO(0x9888), 0x1d81a000 }, - { _MMIO(0x9888), 0x15818000 }, - { _MMIO(0x9888), 0x17818000 }, - { _MMIO(0x9888), 0x0b820030 }, - { _MMIO(0x9888), 0x07828000 }, - { _MMIO(0x9888), 0x0d824000 }, - { _MMIO(0x9888), 0x0f828000 }, - { _MMIO(0x9888), 0x05824000 }, - { _MMIO(0x9888), 0x0d830003 }, - { _MMIO(0x9888), 0x0583000c }, - { _MMIO(0x9888), 0x09830000 }, - { _MMIO(0x9888), 0x03838000 }, - { _MMIO(0x9888), 0x07838000 }, - { _MMIO(0x9888), 0x0b840980 }, - { _MMIO(0x9888), 0x03844d80 }, - { _MMIO(0x9888), 0x11840000 }, - { _MMIO(0x9888), 0x09848000 }, - { _MMIO(0x9888), 0x09850080 }, - { _MMIO(0x9888), 0x03850003 }, - { _MMIO(0x9888), 0x01850000 }, - { _MMIO(0x9888), 0x07860000 }, - { _MMIO(0x9888), 0x0f860400 }, - { _MMIO(0x9888), 0x09870032 }, - { _MMIO(0x9888), 0x01888052 }, - { _MMIO(0x9888), 0x11880000 }, - { _MMIO(0x9888), 0x09884000 }, - { _MMIO(0x9888), 0x1b931001 }, - { _MMIO(0x9888), 0x1d930001 }, - { _MMIO(0x9888), 0x19934000 }, - { _MMIO(0x9888), 0x1b958000 }, - { _MMIO(0x9888), 0x1d950094 }, - { _MMIO(0x9888), 0x19958000 }, - { _MMIO(0x9888), 0x09e58000 }, - { _MMIO(0x9888), 0x0be58000 }, - { _MMIO(0x9888), 0x03e5c000 }, - { _MMIO(0x9888), 0x0592c000 }, - { _MMIO(0x9888), 0x0b928000 }, - { _MMIO(0x9888), 0x0d924000 }, - { _MMIO(0x9888), 0x0f924000 }, - { _MMIO(0x9888), 0x11928000 }, - { _MMIO(0x9888), 0x1392c000 }, - { _MMIO(0x9888), 0x09924000 }, - { _MMIO(0x9888), 0x01985000 }, - { _MMIO(0x9888), 0x07988000 }, - { _MMIO(0x9888), 0x09981000 }, - { _MMIO(0x9888), 0x0b982000 }, - { _MMIO(0x9888), 0x0d982000 }, - { _MMIO(0x9888), 0x0f989000 }, - { _MMIO(0x9888), 0x05982000 }, - { _MMIO(0x9888), 0x13904000 }, - { _MMIO(0x9888), 0x21904000 }, - { _MMIO(0x9888), 0x23904000 }, - { _MMIO(0x9888), 0x25908000 }, - { _MMIO(0x9888), 0x27904000 }, - { _MMIO(0x9888), 0x29908000 }, - { _MMIO(0x9888), 0x2b904000 }, - { _MMIO(0x9888), 0x2f904000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x15904000 }, - { _MMIO(0x9888), 0x17908000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b904000 }, - { _MMIO(0x9888), 0x1190c080 }, - { _MMIO(0x9888), 0x51901110 }, - { _MMIO(0x9888), 0x41900440 }, - { _MMIO(0x9888), 0x55901111 }, - { _MMIO(0x9888), 0x45900400 }, - { _MMIO(0x9888), 0x47900c21 }, - { _MMIO(0x9888), 0x57901411 }, - { _MMIO(0x9888), 0x49900042 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900024 }, - { _MMIO(0x9888), 0x59900001 }, - { _MMIO(0x9888), 0x43900841 }, - { _MMIO(0x9888), 0x53900411 }, -}; - -static int -get_render_pipe_profile_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_render_pipe_profile; - lens[n] = ARRAY_SIZE(mux_config_render_pipe_profile); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_reads[] = { - { _MMIO(0x272c), 0xffffffff }, - { _MMIO(0x2728), 0xffffffff }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x271c), 0xffffffff }, - { _MMIO(0x2718), 0xffffffff }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x86543210 }, - { _MMIO(0x2748), 0x86543210 }, - { _MMIO(0x2744), 0x00006667 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0x86543210 }, - { _MMIO(0x2758), 0x86543210 }, - { _MMIO(0x2754), 0x00006465 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fe00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fe00 }, - { _MMIO(0x2780), 0x0007f872 }, - { _MMIO(0x2784), 0x0000fe00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fe00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fe00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fe00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fe00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fe00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_reads[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_memory_reads[] = { - { _MMIO(0x9888), 0x11810c00 }, - { _MMIO(0x9888), 0x1381001a }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f900064 }, - { _MMIO(0x9888), 0x03811300 }, - { _MMIO(0x9888), 0x05811b12 }, - { _MMIO(0x9888), 0x0781001a }, - { _MMIO(0x9888), 0x1f810000 }, - { _MMIO(0x9888), 0x17810000 }, - { _MMIO(0x9888), 0x19810000 }, - { _MMIO(0x9888), 0x1b810000 }, - { _MMIO(0x9888), 0x1d810000 }, - { _MMIO(0x9888), 0x1b930055 }, - { _MMIO(0x9888), 0x03e58000 }, - { _MMIO(0x9888), 0x05e5c000 }, - { _MMIO(0x9888), 0x07e54000 }, - { _MMIO(0x9888), 0x13900150 }, - { _MMIO(0x9888), 0x21900151 }, - { _MMIO(0x9888), 0x23900152 }, - { _MMIO(0x9888), 0x25900153 }, - { _MMIO(0x9888), 0x27900154 }, - { _MMIO(0x9888), 0x29900155 }, - { _MMIO(0x9888), 0x2b900156 }, - { _MMIO(0x9888), 0x2d900157 }, - { _MMIO(0x9888), 0x2f90015f }, - { _MMIO(0x9888), 0x31900105 }, - { _MMIO(0x9888), 0x15900103 }, - { _MMIO(0x9888), 0x17900101 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0x9888), 0x11900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c60 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900c00 }, - { _MMIO(0x9888), 0x47900c63 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900c63 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900063 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static int -get_memory_reads_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_memory_reads; - lens[n] = ARRAY_SIZE(mux_config_memory_reads); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_memory_writes[] = { - { _MMIO(0x272c), 0xffffffff }, - { _MMIO(0x2728), 0xffffffff }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x271c), 0xffffffff }, - { _MMIO(0x2718), 0xffffffff }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x274c), 0x86543210 }, - { _MMIO(0x2748), 0x86543210 }, - { _MMIO(0x2744), 0x00006667 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x275c), 0x86543210 }, - { _MMIO(0x2758), 0x86543210 }, - { _MMIO(0x2754), 0x00006465 }, - { _MMIO(0x2750), 0x00000000 }, - { _MMIO(0x2770), 0x0007f81a }, - { _MMIO(0x2774), 0x0000fe00 }, - { _MMIO(0x2778), 0x0007f82a }, - { _MMIO(0x277c), 0x0000fe00 }, - { _MMIO(0x2780), 0x0007f822 }, - { _MMIO(0x2784), 0x0000fe00 }, - { _MMIO(0x2788), 0x0007f8ba }, - { _MMIO(0x278c), 0x0000fe00 }, - { _MMIO(0x2790), 0x0007f87a }, - { _MMIO(0x2794), 0x0000fe00 }, - { _MMIO(0x2798), 0x0007f8ea }, - { _MMIO(0x279c), 0x0000fe00 }, - { _MMIO(0x27a0), 0x0007f8e2 }, - { _MMIO(0x27a4), 0x0000fe00 }, - { _MMIO(0x27a8), 0x0007f8f2 }, - { _MMIO(0x27ac), 0x0000fe00 }, -}; - -static const struct i915_oa_reg flex_eu_config_memory_writes[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00015014 }, - { _MMIO(0xe658), 0x00025024 }, - { _MMIO(0xe758), 0x00035034 }, - { _MMIO(0xe45c), 0x00045044 }, - { _MMIO(0xe55c), 0x00055054 }, - { _MMIO(0xe65c), 0x00065064 }, -}; - -static const struct i915_oa_reg mux_config_memory_writes[] = { - { _MMIO(0x9888), 0x11810c00 }, - { _MMIO(0x9888), 0x1381001a }, - { _MMIO(0x9888), 0x37906800 }, - { _MMIO(0x9888), 0x3f901000 }, - { _MMIO(0x9888), 0x03811300 }, - { _MMIO(0x9888), 0x05811b12 }, - { _MMIO(0x9888), 0x0781001a }, - { _MMIO(0x9888), 0x1f810000 }, - { _MMIO(0x9888), 0x17810000 }, - { _MMIO(0x9888), 0x19810000 }, - { _MMIO(0x9888), 0x1b810000 }, - { _MMIO(0x9888), 0x1d810000 }, - { _MMIO(0x9888), 0x1b930055 }, - { _MMIO(0x9888), 0x03e58000 }, - { _MMIO(0x9888), 0x05e5c000 }, - { _MMIO(0x9888), 0x07e54000 }, - { _MMIO(0x9888), 0x13900160 }, - { _MMIO(0x9888), 0x21900161 }, - { _MMIO(0x9888), 0x23900162 }, - { _MMIO(0x9888), 0x25900163 }, - { _MMIO(0x9888), 0x27900164 }, - { _MMIO(0x9888), 0x29900165 }, - { _MMIO(0x9888), 0x2b900166 }, - { _MMIO(0x9888), 0x2d900167 }, - { _MMIO(0x9888), 0x2f900150 }, - { _MMIO(0x9888), 0x31900105 }, - { _MMIO(0x9888), 0x15900103 }, - { _MMIO(0x9888), 0x17900101 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1d908000 }, - { _MMIO(0x9888), 0x1f908000 }, - { _MMIO(0x9888), 0x11900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c60 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900c00 }, - { _MMIO(0x9888), 0x47900c63 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900c63 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900063 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static int -get_memory_writes_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_memory_writes; - lens[n] = ARRAY_SIZE(mux_config_memory_writes); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_extended[] = { - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007fc2a }, - { _MMIO(0x2774), 0x0000bf00 }, - { _MMIO(0x2778), 0x0007fc6a }, - { _MMIO(0x277c), 0x0000bf00 }, - { _MMIO(0x2780), 0x0007fc92 }, - { _MMIO(0x2784), 0x0000bf00 }, - { _MMIO(0x2788), 0x0007fca2 }, - { _MMIO(0x278c), 0x0000bf00 }, - { _MMIO(0x2790), 0x0007fc32 }, - { _MMIO(0x2794), 0x0000bf00 }, - { _MMIO(0x2798), 0x0007fc9a }, - { _MMIO(0x279c), 0x0000bf00 }, - { _MMIO(0x27a0), 0x0007fe6a }, - { _MMIO(0x27a4), 0x0000bf00 }, - { _MMIO(0x27a8), 0x0007fe7a }, - { _MMIO(0x27ac), 0x0000bf00 }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_extended[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00778008 }, - { _MMIO(0xe45c), 0x00088078 }, - { _MMIO(0xe55c), 0x00808708 }, - { _MMIO(0xe65c), 0x00a08908 }, -}; - -static const struct i915_oa_reg mux_config_compute_extended[] = { - { _MMIO(0x9888), 0x106c00e0 }, - { _MMIO(0x9888), 0x141c8160 }, - { _MMIO(0x9888), 0x161c8015 }, - { _MMIO(0x9888), 0x181c0120 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x0e4e8000 }, - { _MMIO(0x9888), 0x184e8000 }, - { _MMIO(0x9888), 0x1a4eaaa0 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x024e8000 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x0e6c0b01 }, - { _MMIO(0x9888), 0x006c0200 }, - { _MMIO(0x9888), 0x026c000c }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x0e1bc000 }, - { _MMIO(0x9888), 0x001b8000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x001c0041 }, - { _MMIO(0x9888), 0x061c4200 }, - { _MMIO(0x9888), 0x081c4443 }, - { _MMIO(0x9888), 0x0a1c4645 }, - { _MMIO(0x9888), 0x0c1c7647 }, - { _MMIO(0x9888), 0x041c7357 }, - { _MMIO(0x9888), 0x1c1c0030 }, - { _MMIO(0x9888), 0x101c0000 }, - { _MMIO(0x9888), 0x1a1c0000 }, - { _MMIO(0x9888), 0x121c8000 }, - { _MMIO(0x9888), 0x004c8000 }, - { _MMIO(0x9888), 0x0a4caa2a }, - { _MMIO(0x9888), 0x0c4c02aa }, - { _MMIO(0x9888), 0x084ca000 }, - { _MMIO(0x9888), 0x000da000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x0c0f5400 }, - { _MMIO(0x9888), 0x0e0f5515 }, - { _MMIO(0x9888), 0x100f0155 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2c8000 }, - { _MMIO(0x9888), 0x162caa00 }, - { _MMIO(0x9888), 0x182c00aa }, - { _MMIO(0x9888), 0x022c8000 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x11907fff }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900040 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900802 }, - { _MMIO(0x9888), 0x47900842 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900842 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x43900800 }, - { _MMIO(0x9888), 0x53900000 }, -}; - -static int -get_compute_extended_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_extended; - lens[n] = ARRAY_SIZE(mux_config_compute_extended); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_l3_cache[] = { - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x30800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2770), 0x0007fffa }, - { _MMIO(0x2774), 0x0000fefe }, - { _MMIO(0x2778), 0x0007fffa }, - { _MMIO(0x277c), 0x0000fefd }, - { _MMIO(0x2790), 0x0007fffa }, - { _MMIO(0x2794), 0x0000fbef }, - { _MMIO(0x2798), 0x0007fffa }, - { _MMIO(0x279c), 0x0000fbdf }, -}; - -static const struct i915_oa_reg flex_eu_config_compute_l3_cache[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00000003 }, - { _MMIO(0xe658), 0x00002001 }, - { _MMIO(0xe758), 0x00101100 }, - { _MMIO(0xe45c), 0x00201200 }, - { _MMIO(0xe55c), 0x00301300 }, - { _MMIO(0xe65c), 0x00401400 }, -}; - -static const struct i915_oa_reg mux_config_compute_l3_cache[] = { - { _MMIO(0x9888), 0x166c0760 }, - { _MMIO(0x9888), 0x1593001e }, - { _MMIO(0x9888), 0x3f900003 }, - { _MMIO(0x9888), 0x004e8000 }, - { _MMIO(0x9888), 0x0e4e8000 }, - { _MMIO(0x9888), 0x184e8000 }, - { _MMIO(0x9888), 0x1a4e8020 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x006c0051 }, - { _MMIO(0x9888), 0x066c5000 }, - { _MMIO(0x9888), 0x086c5c5d }, - { _MMIO(0x9888), 0x0e6c5e5f }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x186c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x001b4000 }, - { _MMIO(0x9888), 0x061b8000 }, - { _MMIO(0x9888), 0x081bc000 }, - { _MMIO(0x9888), 0x0e1bc000 }, - { _MMIO(0x9888), 0x101c8000 }, - { _MMIO(0x9888), 0x1a1ce000 }, - { _MMIO(0x9888), 0x1c1c0030 }, - { _MMIO(0x9888), 0x004c8000 }, - { _MMIO(0x9888), 0x0a4c2a00 }, - { _MMIO(0x9888), 0x0c4c0280 }, - { _MMIO(0x9888), 0x000d2000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x0c0f0400 }, - { _MMIO(0x9888), 0x0e0f1500 }, - { _MMIO(0x9888), 0x100f0140 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2c8000 }, - { _MMIO(0x9888), 0x162c0a00 }, - { _MMIO(0x9888), 0x182c00a0 }, - { _MMIO(0x9888), 0x03933300 }, - { _MMIO(0x9888), 0x05930032 }, - { _MMIO(0x9888), 0x11930000 }, - { _MMIO(0x9888), 0x1b930000 }, - { _MMIO(0x9888), 0x1d900157 }, - { _MMIO(0x9888), 0x1f900158 }, - { _MMIO(0x9888), 0x35900000 }, - { _MMIO(0x9888), 0x19908000 }, - { _MMIO(0x9888), 0x1b908000 }, - { _MMIO(0x9888), 0x1190030f }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900000 }, - { _MMIO(0x9888), 0x55900000 }, - { _MMIO(0x9888), 0x45900021 }, - { _MMIO(0x9888), 0x47900000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x4b900000 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x53905555 }, - { _MMIO(0x9888), 0x43900000 }, -}; - -static int -get_compute_l3_cache_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_l3_cache; - lens[n] = ARRAY_SIZE(mux_config_compute_l3_cache); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_hdc_and_sf[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x10800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000fdff }, -}; - -static const struct i915_oa_reg flex_eu_config_hdc_and_sf[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_hdc_and_sf[] = { - { _MMIO(0x9888), 0x104f0232 }, - { _MMIO(0x9888), 0x124f4640 }, - { _MMIO(0x9888), 0x106c0232 }, - { _MMIO(0x9888), 0x11834400 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x0c4e8000 }, - { _MMIO(0x9888), 0x004f1880 }, - { _MMIO(0x9888), 0x024f08bb }, - { _MMIO(0x9888), 0x044f001b }, - { _MMIO(0x9888), 0x046c0100 }, - { _MMIO(0x9888), 0x066c000b }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x041b8000 }, - { _MMIO(0x9888), 0x061b4000 }, - { _MMIO(0x9888), 0x1a1c1800 }, - { _MMIO(0x9888), 0x005b8000 }, - { _MMIO(0x9888), 0x025bc000 }, - { _MMIO(0x9888), 0x045b4000 }, - { _MMIO(0x9888), 0x125c8000 }, - { _MMIO(0x9888), 0x145c8000 }, - { _MMIO(0x9888), 0x165c8000 }, - { _MMIO(0x9888), 0x185c8000 }, - { _MMIO(0x9888), 0x0a4c00a0 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0f5000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x022cc000 }, - { _MMIO(0x9888), 0x042cc000 }, - { _MMIO(0x9888), 0x062cc000 }, - { _MMIO(0x9888), 0x082cc000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x0f828000 }, - { _MMIO(0x9888), 0x0f8305c0 }, - { _MMIO(0x9888), 0x09830000 }, - { _MMIO(0x9888), 0x07830000 }, - { _MMIO(0x9888), 0x1d950080 }, - { _MMIO(0x9888), 0x13928000 }, - { _MMIO(0x9888), 0x0f988000 }, - { _MMIO(0x9888), 0x31904000 }, - { _MMIO(0x9888), 0x1190fc00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x59900001 }, - { _MMIO(0x9888), 0x4b900040 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900800 }, - { _MMIO(0x9888), 0x43900842 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900000 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_hdc_and_sf_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_hdc_and_sf; - lens[n] = ARRAY_SIZE(mux_config_hdc_and_sf); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0xf0800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00014002 }, - { _MMIO(0x277c), 0x0000c3ff }, - { _MMIO(0x2780), 0x00010002 }, - { _MMIO(0x2784), 0x0000c7ff }, - { _MMIO(0x2788), 0x00004002 }, - { _MMIO(0x278c), 0x0000d3ff }, - { _MMIO(0x2790), 0x00100700 }, - { _MMIO(0x2794), 0x0000ff1f }, - { _MMIO(0x2798), 0x00001402 }, - { _MMIO(0x279c), 0x0000fc3f }, - { _MMIO(0x27a0), 0x00001002 }, - { _MMIO(0x27a4), 0x0000fc7f }, - { _MMIO(0x27a8), 0x00000402 }, - { _MMIO(0x27ac), 0x0000fd3f }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_1[] = { - { _MMIO(0x9888), 0x126c7b40 }, - { _MMIO(0x9888), 0x166c0020 }, - { _MMIO(0x9888), 0x0a603444 }, - { _MMIO(0x9888), 0x0a613400 }, - { _MMIO(0x9888), 0x1a4ea800 }, - { _MMIO(0x9888), 0x1c4e0002 }, - { _MMIO(0x9888), 0x024e8000 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x064f4000 }, - { _MMIO(0x9888), 0x0c6c5327 }, - { _MMIO(0x9888), 0x0e6c5425 }, - { _MMIO(0x9888), 0x006c2a00 }, - { _MMIO(0x9888), 0x026c285b }, - { _MMIO(0x9888), 0x046c005c }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1c6c0000 }, - { _MMIO(0x9888), 0x1e6c0000 }, - { _MMIO(0x9888), 0x1a6c0800 }, - { _MMIO(0x9888), 0x0c1bc000 }, - { _MMIO(0x9888), 0x0e1bc000 }, - { _MMIO(0x9888), 0x001b8000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x041bc000 }, - { _MMIO(0x9888), 0x1c1c003c }, - { _MMIO(0x9888), 0x121c8000 }, - { _MMIO(0x9888), 0x141c8000 }, - { _MMIO(0x9888), 0x161c8000 }, - { _MMIO(0x9888), 0x181c8000 }, - { _MMIO(0x9888), 0x1a1c0800 }, - { _MMIO(0x9888), 0x065b4000 }, - { _MMIO(0x9888), 0x1a5c1000 }, - { _MMIO(0x9888), 0x10600000 }, - { _MMIO(0x9888), 0x04600000 }, - { _MMIO(0x9888), 0x0c610044 }, - { _MMIO(0x9888), 0x10610000 }, - { _MMIO(0x9888), 0x06610000 }, - { _MMIO(0x9888), 0x0c4c02a8 }, - { _MMIO(0x9888), 0x084ca000 }, - { _MMIO(0x9888), 0x0a4c002a }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x100f0154 }, - { _MMIO(0x9888), 0x0c0f5000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x182c00aa }, - { _MMIO(0x9888), 0x022c8000 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2cc000 }, - { _MMIO(0x9888), 0x1190ffc0 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900420 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900021 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900400 }, - { _MMIO(0x9888), 0x43900421 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900040 }, -}; - -static int -get_l3_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_1; - lens[n] = ARRAY_SIZE(mux_config_l3_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00028002 }, - { _MMIO(0x277c), 0x000087ff }, - { _MMIO(0x2780), 0x00020002 }, - { _MMIO(0x2784), 0x00008fff }, - { _MMIO(0x2788), 0x00008002 }, - { _MMIO(0x278c), 0x0000a7ff }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_2[] = { - { _MMIO(0x9888), 0x126c02e0 }, - { _MMIO(0x9888), 0x146c0001 }, - { _MMIO(0x9888), 0x0a623400 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x064f4000 }, - { _MMIO(0x9888), 0x026c3324 }, - { _MMIO(0x9888), 0x046c3422 }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1a6c0000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x041bc000 }, - { _MMIO(0x9888), 0x141c8000 }, - { _MMIO(0x9888), 0x161c8000 }, - { _MMIO(0x9888), 0x181c8000 }, - { _MMIO(0x9888), 0x1a1c0800 }, - { _MMIO(0x9888), 0x065b4000 }, - { _MMIO(0x9888), 0x1a5c1000 }, - { _MMIO(0x9888), 0x06614000 }, - { _MMIO(0x9888), 0x0c620044 }, - { _MMIO(0x9888), 0x10620000 }, - { _MMIO(0x9888), 0x06620000 }, - { _MMIO(0x9888), 0x084c8000 }, - { _MMIO(0x9888), 0x0a4c002a }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0f4000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2cc000 }, - { _MMIO(0x9888), 0x1190f800 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x43900000 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900000 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_l3_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_2; - lens[n] = ARRAY_SIZE(mux_config_l3_2); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_l3_3[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00100070 }, - { _MMIO(0x2774), 0x0000fff1 }, - { _MMIO(0x2778), 0x00028002 }, - { _MMIO(0x277c), 0x000087ff }, - { _MMIO(0x2780), 0x00020002 }, - { _MMIO(0x2784), 0x00008fff }, - { _MMIO(0x2788), 0x00008002 }, - { _MMIO(0x278c), 0x0000a7ff }, -}; - -static const struct i915_oa_reg flex_eu_config_l3_3[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_l3_3[] = { - { _MMIO(0x9888), 0x126c4e80 }, - { _MMIO(0x9888), 0x146c0000 }, - { _MMIO(0x9888), 0x0a633400 }, - { _MMIO(0x9888), 0x044e8000 }, - { _MMIO(0x9888), 0x064e8000 }, - { _MMIO(0x9888), 0x084e8000 }, - { _MMIO(0x9888), 0x0a4e8000 }, - { _MMIO(0x9888), 0x0c4e8000 }, - { _MMIO(0x9888), 0x026c3321 }, - { _MMIO(0x9888), 0x046c342f }, - { _MMIO(0x9888), 0x106c0000 }, - { _MMIO(0x9888), 0x1a6c2000 }, - { _MMIO(0x9888), 0x021bc000 }, - { _MMIO(0x9888), 0x041bc000 }, - { _MMIO(0x9888), 0x061b4000 }, - { _MMIO(0x9888), 0x141c8000 }, - { _MMIO(0x9888), 0x161c8000 }, - { _MMIO(0x9888), 0x181c8000 }, - { _MMIO(0x9888), 0x1a1c1800 }, - { _MMIO(0x9888), 0x06604000 }, - { _MMIO(0x9888), 0x0c630044 }, - { _MMIO(0x9888), 0x10630000 }, - { _MMIO(0x9888), 0x06630000 }, - { _MMIO(0x9888), 0x084c8000 }, - { _MMIO(0x9888), 0x0a4c00aa }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0f4000 }, - { _MMIO(0x9888), 0x0e0f0055 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x1190f800 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x43900842 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900002 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_l3_3_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_l3_3; - lens[n] = ARRAY_SIZE(mux_config_l3_3); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x30800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x0000efff }, - { _MMIO(0x2778), 0x00006000 }, - { _MMIO(0x277c), 0x0000f3ff }, -}; - -static const struct i915_oa_reg flex_eu_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_rasterizer_and_pixel_backend[] = { - { _MMIO(0x9888), 0x102f3800 }, - { _MMIO(0x9888), 0x144d0500 }, - { _MMIO(0x9888), 0x120d03c0 }, - { _MMIO(0x9888), 0x140d03cf }, - { _MMIO(0x9888), 0x0c0f0004 }, - { _MMIO(0x9888), 0x0c4e4000 }, - { _MMIO(0x9888), 0x042f0480 }, - { _MMIO(0x9888), 0x082f0000 }, - { _MMIO(0x9888), 0x022f0000 }, - { _MMIO(0x9888), 0x0a4c0090 }, - { _MMIO(0x9888), 0x064d0027 }, - { _MMIO(0x9888), 0x004d0000 }, - { _MMIO(0x9888), 0x000d0d40 }, - { _MMIO(0x9888), 0x020d803f }, - { _MMIO(0x9888), 0x040d8023 }, - { _MMIO(0x9888), 0x100d0000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x020f0010 }, - { _MMIO(0x9888), 0x000f0000 }, - { _MMIO(0x9888), 0x0e0f0050 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x1190fc00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41901400 }, - { _MMIO(0x9888), 0x43901485 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900001 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_rasterizer_and_pixel_backend_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_rasterizer_and_pixel_backend; - lens[n] = ARRAY_SIZE(mux_config_rasterizer_and_pixel_backend); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_sampler[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x70800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, - { _MMIO(0x2770), 0x0000c000 }, - { _MMIO(0x2774), 0x0000e7ff }, - { _MMIO(0x2778), 0x00003000 }, - { _MMIO(0x277c), 0x0000f9ff }, - { _MMIO(0x2780), 0x00000c00 }, - { _MMIO(0x2784), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_sampler[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_sampler[] = { - { _MMIO(0x9888), 0x14152c00 }, - { _MMIO(0x9888), 0x16150005 }, - { _MMIO(0x9888), 0x121600a0 }, - { _MMIO(0x9888), 0x14352c00 }, - { _MMIO(0x9888), 0x16350005 }, - { _MMIO(0x9888), 0x123600a0 }, - { _MMIO(0x9888), 0x14552c00 }, - { _MMIO(0x9888), 0x16550005 }, - { _MMIO(0x9888), 0x125600a0 }, - { _MMIO(0x9888), 0x062f6000 }, - { _MMIO(0x9888), 0x022f2000 }, - { _MMIO(0x9888), 0x0c4c0050 }, - { _MMIO(0x9888), 0x0a4c0010 }, - { _MMIO(0x9888), 0x0c0d8000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x100f0350 }, - { _MMIO(0x9888), 0x0c0fb000 }, - { _MMIO(0x9888), 0x0e0f00da }, - { _MMIO(0x9888), 0x182c0028 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x022dc000 }, - { _MMIO(0x9888), 0x042d4000 }, - { _MMIO(0x9888), 0x0c138000 }, - { _MMIO(0x9888), 0x0e132000 }, - { _MMIO(0x9888), 0x0413c000 }, - { _MMIO(0x9888), 0x1c140018 }, - { _MMIO(0x9888), 0x0c157000 }, - { _MMIO(0x9888), 0x0e150078 }, - { _MMIO(0x9888), 0x10150000 }, - { _MMIO(0x9888), 0x04162180 }, - { _MMIO(0x9888), 0x02160000 }, - { _MMIO(0x9888), 0x04174000 }, - { _MMIO(0x9888), 0x0233a000 }, - { _MMIO(0x9888), 0x04333000 }, - { _MMIO(0x9888), 0x14348000 }, - { _MMIO(0x9888), 0x16348000 }, - { _MMIO(0x9888), 0x02357870 }, - { _MMIO(0x9888), 0x10350000 }, - { _MMIO(0x9888), 0x04360043 }, - { _MMIO(0x9888), 0x02360000 }, - { _MMIO(0x9888), 0x04371000 }, - { _MMIO(0x9888), 0x0e538000 }, - { _MMIO(0x9888), 0x00538000 }, - { _MMIO(0x9888), 0x06533000 }, - { _MMIO(0x9888), 0x1c540020 }, - { _MMIO(0x9888), 0x12548000 }, - { _MMIO(0x9888), 0x0e557000 }, - { _MMIO(0x9888), 0x00557800 }, - { _MMIO(0x9888), 0x10550000 }, - { _MMIO(0x9888), 0x06560043 }, - { _MMIO(0x9888), 0x02560000 }, - { _MMIO(0x9888), 0x06571000 }, - { _MMIO(0x9888), 0x1190ff80 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900000 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900060 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c00 }, - { _MMIO(0x9888), 0x43900842 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900060 }, -}; - -static int -get_sampler_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_sampler; - lens[n] = ARRAY_SIZE(mux_config_sampler); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_1[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00000002 }, - { _MMIO(0x2774), 0x00007fff }, - { _MMIO(0x2778), 0x00000000 }, - { _MMIO(0x277c), 0x00009fff }, - { _MMIO(0x2780), 0x00000002 }, - { _MMIO(0x2784), 0x0000efff }, - { _MMIO(0x2788), 0x00000000 }, - { _MMIO(0x278c), 0x0000f3ff }, - { _MMIO(0x2790), 0x00000002 }, - { _MMIO(0x2794), 0x0000fdff }, - { _MMIO(0x2798), 0x00000000 }, - { _MMIO(0x279c), 0x0000fe7f }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_1[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_1[] = { - { _MMIO(0x9888), 0x12120000 }, - { _MMIO(0x9888), 0x12320000 }, - { _MMIO(0x9888), 0x12520000 }, - { _MMIO(0x9888), 0x002f8000 }, - { _MMIO(0x9888), 0x022f3000 }, - { _MMIO(0x9888), 0x0a4c0015 }, - { _MMIO(0x9888), 0x0c0d8000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x100f03a0 }, - { _MMIO(0x9888), 0x0c0ff000 }, - { _MMIO(0x9888), 0x0e0f0095 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x0c2d8000 }, - { _MMIO(0x9888), 0x0e2d4000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x02108000 }, - { _MMIO(0x9888), 0x0410c000 }, - { _MMIO(0x9888), 0x02118000 }, - { _MMIO(0x9888), 0x0411c000 }, - { _MMIO(0x9888), 0x02121880 }, - { _MMIO(0x9888), 0x041219b5 }, - { _MMIO(0x9888), 0x00120000 }, - { _MMIO(0x9888), 0x02134000 }, - { _MMIO(0x9888), 0x04135000 }, - { _MMIO(0x9888), 0x0c308000 }, - { _MMIO(0x9888), 0x0e304000 }, - { _MMIO(0x9888), 0x06304000 }, - { _MMIO(0x9888), 0x0c318000 }, - { _MMIO(0x9888), 0x0e314000 }, - { _MMIO(0x9888), 0x06314000 }, - { _MMIO(0x9888), 0x0c321a80 }, - { _MMIO(0x9888), 0x0e320033 }, - { _MMIO(0x9888), 0x06320031 }, - { _MMIO(0x9888), 0x00320000 }, - { _MMIO(0x9888), 0x0c334000 }, - { _MMIO(0x9888), 0x0e331000 }, - { _MMIO(0x9888), 0x06331000 }, - { _MMIO(0x9888), 0x0e508000 }, - { _MMIO(0x9888), 0x00508000 }, - { _MMIO(0x9888), 0x02504000 }, - { _MMIO(0x9888), 0x0e518000 }, - { _MMIO(0x9888), 0x00518000 }, - { _MMIO(0x9888), 0x02514000 }, - { _MMIO(0x9888), 0x0e521880 }, - { _MMIO(0x9888), 0x00521a80 }, - { _MMIO(0x9888), 0x02520033 }, - { _MMIO(0x9888), 0x0e534000 }, - { _MMIO(0x9888), 0x00534000 }, - { _MMIO(0x9888), 0x02531000 }, - { _MMIO(0x9888), 0x1190ff80 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900800 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900062 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900c00 }, - { _MMIO(0x9888), 0x43900003 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900040 }, -}; - -static int -get_tdl_1_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_1; - lens[n] = ARRAY_SIZE(mux_config_tdl_1); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_tdl_2[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2744), 0x00800000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0x00800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x00800000 }, -}; - -static const struct i915_oa_reg flex_eu_config_tdl_2[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00010003 }, - { _MMIO(0xe658), 0x00012011 }, - { _MMIO(0xe758), 0x00015014 }, - { _MMIO(0xe45c), 0x00051050 }, - { _MMIO(0xe55c), 0x00053052 }, - { _MMIO(0xe65c), 0x00055054 }, -}; - -static const struct i915_oa_reg mux_config_tdl_2[] = { - { _MMIO(0x9888), 0x12124d60 }, - { _MMIO(0x9888), 0x12322e60 }, - { _MMIO(0x9888), 0x12524d60 }, - { _MMIO(0x9888), 0x022f3000 }, - { _MMIO(0x9888), 0x0a4c0014 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x0c0fe000 }, - { _MMIO(0x9888), 0x0e0f0097 }, - { _MMIO(0x9888), 0x082c8000 }, - { _MMIO(0x9888), 0x0a2c8000 }, - { _MMIO(0x9888), 0x002d8000 }, - { _MMIO(0x9888), 0x062d4000 }, - { _MMIO(0x9888), 0x0410c000 }, - { _MMIO(0x9888), 0x0411c000 }, - { _MMIO(0x9888), 0x04121fb7 }, - { _MMIO(0x9888), 0x00120000 }, - { _MMIO(0x9888), 0x04135000 }, - { _MMIO(0x9888), 0x00308000 }, - { _MMIO(0x9888), 0x06304000 }, - { _MMIO(0x9888), 0x00318000 }, - { _MMIO(0x9888), 0x06314000 }, - { _MMIO(0x9888), 0x00321b80 }, - { _MMIO(0x9888), 0x0632003f }, - { _MMIO(0x9888), 0x00334000 }, - { _MMIO(0x9888), 0x06331000 }, - { _MMIO(0x9888), 0x0250c000 }, - { _MMIO(0x9888), 0x0251c000 }, - { _MMIO(0x9888), 0x02521fb7 }, - { _MMIO(0x9888), 0x00520000 }, - { _MMIO(0x9888), 0x02535000 }, - { _MMIO(0x9888), 0x1190fc00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x51900000 }, - { _MMIO(0x9888), 0x41900800 }, - { _MMIO(0x9888), 0x43900063 }, - { _MMIO(0x9888), 0x53900000 }, - { _MMIO(0x9888), 0x45900040 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_tdl_2_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_tdl_2; - lens[n] = ARRAY_SIZE(mux_config_tdl_2); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_compute_extra[] = { -}; - -static const struct i915_oa_reg flex_eu_config_compute_extra[] = { -}; - -static const struct i915_oa_reg mux_config_compute_extra[] = { - { _MMIO(0x9888), 0x121203e0 }, - { _MMIO(0x9888), 0x123203e0 }, - { _MMIO(0x9888), 0x125203e0 }, - { _MMIO(0x9888), 0x129203e0 }, - { _MMIO(0x9888), 0x12b203e0 }, - { _MMIO(0x9888), 0x12d203e0 }, - { _MMIO(0x9888), 0x131203e0 }, - { _MMIO(0x9888), 0x133203e0 }, - { _MMIO(0x9888), 0x135203e0 }, - { _MMIO(0x9888), 0x1a4ef000 }, - { _MMIO(0x9888), 0x1c4e0003 }, - { _MMIO(0x9888), 0x024ec000 }, - { _MMIO(0x9888), 0x044ec000 }, - { _MMIO(0x9888), 0x064ec000 }, - { _MMIO(0x9888), 0x022f4000 }, - { _MMIO(0x9888), 0x0c4c02a0 }, - { _MMIO(0x9888), 0x084ca000 }, - { _MMIO(0x9888), 0x0a4c0042 }, - { _MMIO(0x9888), 0x0c0d8000 }, - { _MMIO(0x9888), 0x0e0da000 }, - { _MMIO(0x9888), 0x000d8000 }, - { _MMIO(0x9888), 0x020da000 }, - { _MMIO(0x9888), 0x040da000 }, - { _MMIO(0x9888), 0x060d2000 }, - { _MMIO(0x9888), 0x100f0150 }, - { _MMIO(0x9888), 0x0c0f5000 }, - { _MMIO(0x9888), 0x0e0f006d }, - { _MMIO(0x9888), 0x182c00a8 }, - { _MMIO(0x9888), 0x022c8000 }, - { _MMIO(0x9888), 0x042c8000 }, - { _MMIO(0x9888), 0x062c8000 }, - { _MMIO(0x9888), 0x0c2c8000 }, - { _MMIO(0x9888), 0x042d8000 }, - { _MMIO(0x9888), 0x06104000 }, - { _MMIO(0x9888), 0x06114000 }, - { _MMIO(0x9888), 0x06120033 }, - { _MMIO(0x9888), 0x00120000 }, - { _MMIO(0x9888), 0x06131000 }, - { _MMIO(0x9888), 0x04308000 }, - { _MMIO(0x9888), 0x04318000 }, - { _MMIO(0x9888), 0x04321980 }, - { _MMIO(0x9888), 0x00320000 }, - { _MMIO(0x9888), 0x04334000 }, - { _MMIO(0x9888), 0x04504000 }, - { _MMIO(0x9888), 0x04514000 }, - { _MMIO(0x9888), 0x04520033 }, - { _MMIO(0x9888), 0x00520000 }, - { _MMIO(0x9888), 0x04531000 }, - { _MMIO(0x9888), 0x1acef000 }, - { _MMIO(0x9888), 0x1cce0003 }, - { _MMIO(0x9888), 0x00af8000 }, - { _MMIO(0x9888), 0x0ccc02a0 }, - { _MMIO(0x9888), 0x0acc0001 }, - { _MMIO(0x9888), 0x0c8d8000 }, - { _MMIO(0x9888), 0x0e8da000 }, - { _MMIO(0x9888), 0x008d8000 }, - { _MMIO(0x9888), 0x028da000 }, - { _MMIO(0x9888), 0x108f0150 }, - { _MMIO(0x9888), 0x0c8fb000 }, - { _MMIO(0x9888), 0x0e8f0001 }, - { _MMIO(0x9888), 0x18ac00a8 }, - { _MMIO(0x9888), 0x06ac8000 }, - { _MMIO(0x9888), 0x02ad4000 }, - { _MMIO(0x9888), 0x02908000 }, - { _MMIO(0x9888), 0x02918000 }, - { _MMIO(0x9888), 0x02921980 }, - { _MMIO(0x9888), 0x00920000 }, - { _MMIO(0x9888), 0x02934000 }, - { _MMIO(0x9888), 0x02b04000 }, - { _MMIO(0x9888), 0x02b14000 }, - { _MMIO(0x9888), 0x02b20033 }, - { _MMIO(0x9888), 0x00b20000 }, - { _MMIO(0x9888), 0x02b31000 }, - { _MMIO(0x9888), 0x00d08000 }, - { _MMIO(0x9888), 0x00d18000 }, - { _MMIO(0x9888), 0x00d21980 }, - { _MMIO(0x9888), 0x00d34000 }, - { _MMIO(0x9888), 0x072f8000 }, - { _MMIO(0x9888), 0x0d4c0100 }, - { _MMIO(0x9888), 0x0d0d8000 }, - { _MMIO(0x9888), 0x0f0da000 }, - { _MMIO(0x9888), 0x110f01b0 }, - { _MMIO(0x9888), 0x192c0080 }, - { _MMIO(0x9888), 0x0f2d4000 }, - { _MMIO(0x9888), 0x0f108000 }, - { _MMIO(0x9888), 0x0f118000 }, - { _MMIO(0x9888), 0x0f121980 }, - { _MMIO(0x9888), 0x01120000 }, - { _MMIO(0x9888), 0x0f134000 }, - { _MMIO(0x9888), 0x0f304000 }, - { _MMIO(0x9888), 0x0f314000 }, - { _MMIO(0x9888), 0x0f320033 }, - { _MMIO(0x9888), 0x01320000 }, - { _MMIO(0x9888), 0x0f331000 }, - { _MMIO(0x9888), 0x0d508000 }, - { _MMIO(0x9888), 0x0d518000 }, - { _MMIO(0x9888), 0x0d521980 }, - { _MMIO(0x9888), 0x01520000 }, - { _MMIO(0x9888), 0x0d534000 }, - { _MMIO(0x9888), 0x1190ff80 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900c00 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, - { _MMIO(0x9888), 0x4b900002 }, - { _MMIO(0x9888), 0x59900000 }, - { _MMIO(0x9888), 0x51901100 }, - { _MMIO(0x9888), 0x41901000 }, - { _MMIO(0x9888), 0x43901423 }, - { _MMIO(0x9888), 0x53903331 }, - { _MMIO(0x9888), 0x45900044 }, -}; - -static int -get_compute_extra_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_compute_extra; - lens[n] = ARRAY_SIZE(mux_config_compute_extra); - n++; - - return n; -} - -static const struct i915_oa_reg b_counter_config_vme_pipe[] = { - { _MMIO(0x2740), 0x00000000 }, - { _MMIO(0x2710), 0x00000000 }, - { _MMIO(0x2714), 0xf0800000 }, - { _MMIO(0x2720), 0x00000000 }, - { _MMIO(0x2724), 0x30800000 }, - { _MMIO(0x2770), 0x00100030 }, - { _MMIO(0x2774), 0x0000fff9 }, - { _MMIO(0x2778), 0x00000002 }, - { _MMIO(0x277c), 0x0000fffc }, - { _MMIO(0x2780), 0x00000002 }, - { _MMIO(0x2784), 0x0000fff3 }, - { _MMIO(0x2788), 0x00100180 }, - { _MMIO(0x278c), 0x0000ffcf }, - { _MMIO(0x2790), 0x00000002 }, - { _MMIO(0x2794), 0x0000ffcf }, - { _MMIO(0x2798), 0x00000002 }, - { _MMIO(0x279c), 0x0000ff3f }, -}; - -static const struct i915_oa_reg flex_eu_config_vme_pipe[] = { - { _MMIO(0xe458), 0x00005004 }, - { _MMIO(0xe558), 0x00008003 }, -}; - -static const struct i915_oa_reg mux_config_vme_pipe[] = { - { _MMIO(0x9888), 0x141a5800 }, - { _MMIO(0x9888), 0x161a00c0 }, - { _MMIO(0x9888), 0x12180240 }, - { _MMIO(0x9888), 0x14180002 }, - { _MMIO(0x9888), 0x149a5800 }, - { _MMIO(0x9888), 0x169a00c0 }, - { _MMIO(0x9888), 0x12980240 }, - { _MMIO(0x9888), 0x14980002 }, - { _MMIO(0x9888), 0x1a4e3fc0 }, - { _MMIO(0x9888), 0x002f1000 }, - { _MMIO(0x9888), 0x022f8000 }, - { _MMIO(0x9888), 0x042f3000 }, - { _MMIO(0x9888), 0x004c4000 }, - { _MMIO(0x9888), 0x0a4c9500 }, - { _MMIO(0x9888), 0x0c4c002a }, - { _MMIO(0x9888), 0x000d2000 }, - { _MMIO(0x9888), 0x060d8000 }, - { _MMIO(0x9888), 0x080da000 }, - { _MMIO(0x9888), 0x0a0da000 }, - { _MMIO(0x9888), 0x0c0da000 }, - { _MMIO(0x9888), 0x0c0f0400 }, - { _MMIO(0x9888), 0x0e0f5500 }, - { _MMIO(0x9888), 0x100f0015 }, - { _MMIO(0x9888), 0x002c8000 }, - { _MMIO(0x9888), 0x0e2c8000 }, - { _MMIO(0x9888), 0x162caa00 }, - { _MMIO(0x9888), 0x182c000a }, - { _MMIO(0x9888), 0x04193000 }, - { _MMIO(0x9888), 0x081a28c1 }, - { _MMIO(0x9888), 0x001a0000 }, - { _MMIO(0x9888), 0x00133000 }, - { _MMIO(0x9888), 0x0613c000 }, - { _MMIO(0x9888), 0x0813f000 }, - { _MMIO(0x9888), 0x00172000 }, - { _MMIO(0x9888), 0x06178000 }, - { _MMIO(0x9888), 0x0817a000 }, - { _MMIO(0x9888), 0x00180037 }, - { _MMIO(0x9888), 0x06180940 }, - { _MMIO(0x9888), 0x08180000 }, - { _MMIO(0x9888), 0x02180000 }, - { _MMIO(0x9888), 0x04183000 }, - { _MMIO(0x9888), 0x04afc000 }, - { _MMIO(0x9888), 0x06af3000 }, - { _MMIO(0x9888), 0x0acc4000 }, - { _MMIO(0x9888), 0x0ccc0015 }, - { _MMIO(0x9888), 0x0a8da000 }, - { _MMIO(0x9888), 0x0c8da000 }, - { _MMIO(0x9888), 0x0e8f4000 }, - { _MMIO(0x9888), 0x108f0015 }, - { _MMIO(0x9888), 0x16aca000 }, - { _MMIO(0x9888), 0x18ac000a }, - { _MMIO(0x9888), 0x06993000 }, - { _MMIO(0x9888), 0x0c9a28c1 }, - { _MMIO(0x9888), 0x009a0000 }, - { _MMIO(0x9888), 0x0a93f000 }, - { _MMIO(0x9888), 0x0c93f000 }, - { _MMIO(0x9888), 0x0a97a000 }, - { _MMIO(0x9888), 0x0c97a000 }, - { _MMIO(0x9888), 0x0a980977 }, - { _MMIO(0x9888), 0x08980000 }, - { _MMIO(0x9888), 0x04980000 }, - { _MMIO(0x9888), 0x06983000 }, - { _MMIO(0x9888), 0x119000ff }, - { _MMIO(0x9888), 0x51900010 }, - { _MMIO(0x9888), 0x41900060 }, - { _MMIO(0x9888), 0x55900111 }, - { _MMIO(0x9888), 0x45900c00 }, - { _MMIO(0x9888), 0x47900821 }, - { _MMIO(0x9888), 0x57900000 }, - { _MMIO(0x9888), 0x49900002 }, - { _MMIO(0x9888), 0x37900000 }, - { _MMIO(0x9888), 0x33900000 }, -}; - -static int -get_vme_pipe_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_vme_pipe; - lens[n] = ARRAY_SIZE(mux_config_vme_pipe); - n++; - - return n; -} - static const struct i915_oa_reg b_counter_config_test_oa[] = { { _MMIO(0x2740), 0x00000000 }, { _MMIO(0x2744), 0x00800000 }, @@ -1998,1096 +74,35 @@ static const struct i915_oa_reg mux_config_test_oa[] = { { _MMIO(0x9888), 0x33900000 }, }; -static int -get_test_oa_mux_config(struct drm_i915_private *dev_priv, - const struct i915_oa_reg **regs, - int *lens) -{ - int n = 0; - - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs) < 1); - BUILD_BUG_ON(ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens) < 1); - - regs[n] = mux_config_test_oa; - lens[n] = ARRAY_SIZE(mux_config_test_oa); - n++; - - return n; -} - -int i915_oa_select_metric_set_sklgt4(struct drm_i915_private *dev_priv) -{ - dev_priv->perf.oa.n_mux_configs = 0; - dev_priv->perf.oa.b_counter_regs = NULL; - dev_priv->perf.oa.b_counter_regs_len = 0; - dev_priv->perf.oa.flex_regs = NULL; - dev_priv->perf.oa.flex_regs_len = 0; - - switch (dev_priv->perf.oa.metrics_set) { - case METRIC_SET_ID_RENDER_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_render_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_basic); - - return 0; - case METRIC_SET_ID_COMPUTE_BASIC: - dev_priv->perf.oa.n_mux_configs = - get_compute_basic_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_BASIC\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_basic; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_basic); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_basic; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_basic); - - return 0; - case METRIC_SET_ID_RENDER_PIPE_PROFILE: - dev_priv->perf.oa.n_mux_configs = - get_render_pipe_profile_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_PIPE_PROFILE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_render_pipe_profile; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_render_pipe_profile); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_render_pipe_profile; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_render_pipe_profile); - - return 0; - case METRIC_SET_ID_MEMORY_READS: - dev_priv->perf.oa.n_mux_configs = - get_memory_reads_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_READS\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_reads; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_reads); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_reads; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_reads); - - return 0; - case METRIC_SET_ID_MEMORY_WRITES: - dev_priv->perf.oa.n_mux_configs = - get_memory_writes_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"MEMORY_WRITES\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_memory_writes; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_memory_writes); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_memory_writes; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_memory_writes); - - return 0; - case METRIC_SET_ID_COMPUTE_EXTENDED: - dev_priv->perf.oa.n_mux_configs = - get_compute_extended_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTENDED\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_extended; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_extended); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_extended; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_extended); - - return 0; - case METRIC_SET_ID_COMPUTE_L3_CACHE: - dev_priv->perf.oa.n_mux_configs = - get_compute_l3_cache_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_L3_CACHE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_l3_cache; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_l3_cache); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_l3_cache; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_l3_cache); - - return 0; - case METRIC_SET_ID_HDC_AND_SF: - dev_priv->perf.oa.n_mux_configs = - get_hdc_and_sf_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"HDC_AND_SF\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_hdc_and_sf; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_hdc_and_sf); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_hdc_and_sf; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_hdc_and_sf); - - return 0; - case METRIC_SET_ID_L3_1: - dev_priv->perf.oa.n_mux_configs = - get_l3_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_1); - - return 0; - case METRIC_SET_ID_L3_2: - dev_priv->perf.oa.n_mux_configs = - get_l3_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_2); - - return 0; - case METRIC_SET_ID_L3_3: - dev_priv->perf.oa.n_mux_configs = - get_l3_3_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"L3_3\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_l3_3; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_l3_3); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_l3_3; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_l3_3); - - return 0; - case METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND: - dev_priv->perf.oa.n_mux_configs = - get_rasterizer_and_pixel_backend_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"RASTERIZER_AND_PIXEL_BACKEND\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_rasterizer_and_pixel_backend); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_rasterizer_and_pixel_backend; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_rasterizer_and_pixel_backend); - - return 0; - case METRIC_SET_ID_SAMPLER: - dev_priv->perf.oa.n_mux_configs = - get_sampler_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"SAMPLER\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_sampler; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_sampler); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_sampler; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_sampler); - - return 0; - case METRIC_SET_ID_TDL_1: - dev_priv->perf.oa.n_mux_configs = - get_tdl_1_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_1\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_1; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_1); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_1; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_1); - - return 0; - case METRIC_SET_ID_TDL_2: - dev_priv->perf.oa.n_mux_configs = - get_tdl_2_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TDL_2\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_tdl_2; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_tdl_2); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_tdl_2; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_tdl_2); - - return 0; - case METRIC_SET_ID_COMPUTE_EXTRA: - dev_priv->perf.oa.n_mux_configs = - get_compute_extra_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"COMPUTE_EXTRA\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_compute_extra; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_compute_extra); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_compute_extra; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_compute_extra); - - return 0; - case METRIC_SET_ID_VME_PIPE: - dev_priv->perf.oa.n_mux_configs = - get_vme_pipe_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"VME_PIPE\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_vme_pipe; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_vme_pipe); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_vme_pipe; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_vme_pipe); - - return 0; - case METRIC_SET_ID_TEST_OA: - dev_priv->perf.oa.n_mux_configs = - get_test_oa_mux_config(dev_priv, - dev_priv->perf.oa.mux_regs, - dev_priv->perf.oa.mux_regs_lens); - if (dev_priv->perf.oa.n_mux_configs == 0) { - DRM_DEBUG_DRIVER("No suitable MUX config for \"TEST_OA\" metric set\n"); - - /* EINVAL because *_register_sysfs already checked this - * and so it wouldn't have been advertised to userspace and - * so shouldn't have been requested - */ - return -EINVAL; - } - - dev_priv->perf.oa.b_counter_regs = - b_counter_config_test_oa; - dev_priv->perf.oa.b_counter_regs_len = - ARRAY_SIZE(b_counter_config_test_oa); - - dev_priv->perf.oa.flex_regs = - flex_eu_config_test_oa; - dev_priv->perf.oa.flex_regs_len = - ARRAY_SIZE(flex_eu_config_test_oa); - - return 0; - default: - return -ENODEV; - } -} - -static ssize_t -show_render_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_BASIC); -} - -static struct device_attribute dev_attr_render_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_render_basic[] = { - &dev_attr_render_basic_id.attr, - NULL, -}; - -static struct attribute_group group_render_basic = { - .name = "bad77c24-cc64-480d-99bf-e7b740713800", - .attrs = attrs_render_basic, -}; - -static ssize_t -show_compute_basic_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_BASIC); -} - -static struct device_attribute dev_attr_compute_basic_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_basic_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_basic[] = { - &dev_attr_compute_basic_id.attr, - NULL, -}; - -static struct attribute_group group_compute_basic = { - .name = "7277228f-e7f3-4743-945a-6a2049d11377", - .attrs = attrs_compute_basic, -}; - -static ssize_t -show_render_pipe_profile_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RENDER_PIPE_PROFILE); -} - -static struct device_attribute dev_attr_render_pipe_profile_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_render_pipe_profile_id, - .store = NULL, -}; - -static struct attribute *attrs_render_pipe_profile[] = { - &dev_attr_render_pipe_profile_id.attr, - NULL, -}; - -static struct attribute_group group_render_pipe_profile = { - .name = "463c668c-3f60-49b6-8f85-d995b635b3b2", - .attrs = attrs_render_pipe_profile, -}; - -static ssize_t -show_memory_reads_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_READS); -} - -static struct device_attribute dev_attr_memory_reads_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_reads_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_reads[] = { - &dev_attr_memory_reads_id.attr, - NULL, -}; - -static struct attribute_group group_memory_reads = { - .name = "3ae6e74c-72c3-4040-9bd0-7961430b8cc8", - .attrs = attrs_memory_reads, -}; - -static ssize_t -show_memory_writes_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_MEMORY_WRITES); -} - -static struct device_attribute dev_attr_memory_writes_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_memory_writes_id, - .store = NULL, -}; - -static struct attribute *attrs_memory_writes[] = { - &dev_attr_memory_writes_id.attr, - NULL, -}; - -static struct attribute_group group_memory_writes = { - .name = "055f256d-4052-467c-8dec-6064a4806433", - .attrs = attrs_memory_writes, -}; - -static ssize_t -show_compute_extended_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_EXTENDED); -} - -static struct device_attribute dev_attr_compute_extended_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_extended_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_extended[] = { - &dev_attr_compute_extended_id.attr, - NULL, -}; - -static struct attribute_group group_compute_extended = { - .name = "753972d4-87cd-4460-824d-754463ac5054", - .attrs = attrs_compute_extended, -}; - -static ssize_t -show_compute_l3_cache_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_L3_CACHE); -} - -static struct device_attribute dev_attr_compute_l3_cache_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_l3_cache_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_l3_cache[] = { - &dev_attr_compute_l3_cache_id.attr, - NULL, -}; - -static struct attribute_group group_compute_l3_cache = { - .name = "4e4392e9-8f73-457b-ab44-b49f7a0c733b", - .attrs = attrs_compute_l3_cache, -}; - -static ssize_t -show_hdc_and_sf_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_HDC_AND_SF); -} - -static struct device_attribute dev_attr_hdc_and_sf_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_hdc_and_sf_id, - .store = NULL, -}; - -static struct attribute *attrs_hdc_and_sf[] = { - &dev_attr_hdc_and_sf_id.attr, - NULL, -}; - -static struct attribute_group group_hdc_and_sf = { - .name = "730d95dd-7da8-4e1c-ab8d-c0eb1e4c1805", - .attrs = attrs_hdc_and_sf, -}; - -static ssize_t -show_l3_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_1); -} - -static struct device_attribute dev_attr_l3_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_1_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_1[] = { - &dev_attr_l3_1_id.attr, - NULL, -}; - -static struct attribute_group group_l3_1 = { - .name = "d9e86d70-462b-462a-851e-fd63e8c13d63", - .attrs = attrs_l3_1, -}; - -static ssize_t -show_l3_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_2); -} - -static struct device_attribute dev_attr_l3_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_2_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_2[] = { - &dev_attr_l3_2_id.attr, - NULL, -}; - -static struct attribute_group group_l3_2 = { - .name = "52200424-6ee9-48b3-b7fa-0afcf1975e4d", - .attrs = attrs_l3_2, -}; - -static ssize_t -show_l3_3_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_L3_3); -} - -static struct device_attribute dev_attr_l3_3_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_l3_3_id, - .store = NULL, -}; - -static struct attribute *attrs_l3_3[] = { - &dev_attr_l3_3_id.attr, - NULL, -}; - -static struct attribute_group group_l3_3 = { - .name = "1988315f-0a26-44df-acb0-df7ec86b1456", - .attrs = attrs_l3_3, -}; - -static ssize_t -show_rasterizer_and_pixel_backend_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_RASTERIZER_AND_PIXEL_BACKEND); -} - -static struct device_attribute dev_attr_rasterizer_and_pixel_backend_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_rasterizer_and_pixel_backend_id, - .store = NULL, -}; - -static struct attribute *attrs_rasterizer_and_pixel_backend[] = { - &dev_attr_rasterizer_and_pixel_backend_id.attr, - NULL, -}; - -static struct attribute_group group_rasterizer_and_pixel_backend = { - .name = "f1f17ca7-286e-4ae5-9d15-9fccad6c665d", - .attrs = attrs_rasterizer_and_pixel_backend, -}; - -static ssize_t -show_sampler_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_SAMPLER); -} - -static struct device_attribute dev_attr_sampler_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_sampler_id, - .store = NULL, -}; - -static struct attribute *attrs_sampler[] = { - &dev_attr_sampler_id.attr, - NULL, -}; - -static struct attribute_group group_sampler = { - .name = "00a9e0fb-3d2e-4405-852c-dce6334ffb3b", - .attrs = attrs_sampler, -}; - -static ssize_t -show_tdl_1_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_1); -} - -static struct device_attribute dev_attr_tdl_1_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_1_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_1[] = { - &dev_attr_tdl_1_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_1 = { - .name = "13dcc50a-7ec0-409b-99d6-a3f932cedcb3", - .attrs = attrs_tdl_1, -}; - -static ssize_t -show_tdl_2_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_TDL_2); -} - -static struct device_attribute dev_attr_tdl_2_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_tdl_2_id, - .store = NULL, -}; - -static struct attribute *attrs_tdl_2[] = { - &dev_attr_tdl_2_id.attr, - NULL, -}; - -static struct attribute_group group_tdl_2 = { - .name = "97875e21-6624-4aee-9191-682feb3eae21", - .attrs = attrs_tdl_2, -}; - -static ssize_t -show_compute_extra_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_COMPUTE_EXTRA); -} - -static struct device_attribute dev_attr_compute_extra_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_compute_extra_id, - .store = NULL, -}; - -static struct attribute *attrs_compute_extra[] = { - &dev_attr_compute_extra_id.attr, - NULL, -}; - -static struct attribute_group group_compute_extra = { - .name = "a5aa857d-e8f0-4dfa-8981-ce340fa748fd", - .attrs = attrs_compute_extra, -}; - -static ssize_t -show_vme_pipe_id(struct device *kdev, struct device_attribute *attr, char *buf) -{ - return sprintf(buf, "%d\n", METRIC_SET_ID_VME_PIPE); -} - -static struct device_attribute dev_attr_vme_pipe_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_vme_pipe_id, - .store = NULL, -}; - -static struct attribute *attrs_vme_pipe[] = { - &dev_attr_vme_pipe_id.attr, - NULL, -}; - -static struct attribute_group group_vme_pipe = { - .name = "0e8d8b86-4ee7-4cdd-aaaa-58adc92cb29e", - .attrs = attrs_vme_pipe, -}; - static ssize_t show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%d\n", METRIC_SET_ID_TEST_OA); + return sprintf(buf, "1\n"); } -static struct device_attribute dev_attr_test_oa_id = { - .attr = { .name = "id", .mode = 0444 }, - .show = show_test_oa_id, - .store = NULL, -}; - -static struct attribute *attrs_test_oa[] = { - &dev_attr_test_oa_id.attr, - NULL, -}; - -static struct attribute_group group_test_oa = { - .name = "882fa433-1f4a-4a67-a962-c741888fe5f5", - .attrs = attrs_test_oa, -}; - -int -i915_perf_register_sysfs_sklgt4(struct drm_i915_private *dev_priv) +void +i915_perf_load_test_config_sklgt4(struct drm_i915_private *dev_priv) { - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; - int ret = 0; + strncpy(dev_priv->perf.oa.test_config.uuid, + "882fa433-1f4a-4a67-a962-c741888fe5f5", + UUID_STRING_LEN); + dev_priv->perf.oa.test_config.id = 1; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (ret) - goto error_render_basic; - } - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (ret) - goto error_compute_basic; - } - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (ret) - goto error_render_pipe_profile; - } - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (ret) - goto error_memory_reads; - } - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (ret) - goto error_memory_writes; - } - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (ret) - goto error_compute_extended; - } - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); - if (ret) - goto error_compute_l3_cache; - } - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (ret) - goto error_hdc_and_sf; - } - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (ret) - goto error_l3_1; - } - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_2); - if (ret) - goto error_l3_2; - } - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_l3_3); - if (ret) - goto error_l3_3; - } - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (ret) - goto error_rasterizer_and_pixel_backend; - } - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_sampler); - if (ret) - goto error_sampler; - } - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (ret) - goto error_tdl_1; - } - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (ret) - goto error_tdl_2; - } - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_compute_extra); - if (ret) - goto error_compute_extra; - } - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); - if (ret) - goto error_vme_pipe; - } - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) { - ret = sysfs_create_group(dev_priv->perf.metrics_kobj, &group_test_oa); - if (ret) - goto error_test_oa; - } + dev_priv->perf.oa.test_config.mux_regs = mux_config_test_oa; + dev_priv->perf.oa.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa); - return 0; + dev_priv->perf.oa.test_config.b_counter_regs = b_counter_config_test_oa; + dev_priv->perf.oa.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa); -error_test_oa: - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); -error_vme_pipe: - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extra); -error_compute_extra: - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); -error_tdl_2: - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); -error_tdl_1: - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler); -error_sampler: - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); -error_rasterizer_and_pixel_backend: - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_3); -error_l3_3: - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_2); -error_l3_2: - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); -error_l3_1: - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); -error_hdc_and_sf: - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); -error_compute_l3_cache: - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); -error_compute_extended: - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); -error_memory_writes: - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); -error_memory_reads: - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); -error_render_pipe_profile: - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); -error_compute_basic: - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); -error_render_basic: - return ret; -} + dev_priv->perf.oa.test_config.flex_regs = flex_eu_config_test_oa; + dev_priv->perf.oa.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa); -void -i915_perf_unregister_sysfs_sklgt4(struct drm_i915_private *dev_priv) -{ - const struct i915_oa_reg *mux_regs[ARRAY_SIZE(dev_priv->perf.oa.mux_regs)]; - int mux_lens[ARRAY_SIZE(dev_priv->perf.oa.mux_regs_lens)]; + dev_priv->perf.oa.test_config.sysfs_metric.name = "882fa433-1f4a-4a67-a962-c741888fe5f5"; + dev_priv->perf.oa.test_config.sysfs_metric.attrs = dev_priv->perf.oa.test_config.attrs; + + dev_priv->perf.oa.test_config.attrs[0] = &dev_priv->perf.oa.test_config.sysfs_metric_id.attr; - if (get_render_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_basic); - if (get_compute_basic_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_basic); - if (get_render_pipe_profile_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_render_pipe_profile); - if (get_memory_reads_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_reads); - if (get_memory_writes_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_memory_writes); - if (get_compute_extended_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extended); - if (get_compute_l3_cache_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_l3_cache); - if (get_hdc_and_sf_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_hdc_and_sf); - if (get_l3_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_1); - if (get_l3_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_2); - if (get_l3_3_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_l3_3); - if (get_rasterizer_and_pixel_backend_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_rasterizer_and_pixel_backend); - if (get_sampler_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_sampler); - if (get_tdl_1_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_1); - if (get_tdl_2_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_tdl_2); - if (get_compute_extra_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_compute_extra); - if (get_vme_pipe_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_vme_pipe); - if (get_test_oa_mux_config(dev_priv, mux_regs, mux_lens)) - sysfs_remove_group(dev_priv->perf.metrics_kobj, &group_test_oa); + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.name = "id"; + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.mode = 0444; + dev_priv->perf.oa.test_config.sysfs_metric_id.show = show_test_oa_id; } diff --git a/drivers/gpu/drm/i915/i915_oa_sklgt4.h b/drivers/gpu/drm/i915/i915_oa_sklgt4.h index 1b718f15f62e..944fd525c8b1 100644 --- a/drivers/gpu/drm/i915/i915_oa_sklgt4.h +++ b/drivers/gpu/drm/i915/i915_oa_sklgt4.h @@ -29,12 +29,6 @@ #ifndef __I915_OA_SKLGT4_H__ #define __I915_OA_SKLGT4_H__ -extern int i915_oa_n_builtin_metric_sets_sklgt4; - -extern int i915_oa_select_metric_set_sklgt4(struct drm_i915_private *dev_priv); - -extern int i915_perf_register_sysfs_sklgt4(struct drm_i915_private *dev_priv); - -extern void i915_perf_unregister_sysfs_sklgt4(struct drm_i915_private *dev_priv); +extern void i915_perf_load_test_config_sklgt4(struct drm_i915_private *dev_priv); #endif diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index df78bfa9e574..7ca03351f5bc 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c @@ -1249,7 +1249,9 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream) * Unset exclusive_stream first, it might be checked while * disabling the metric set on gen8+. */ + mutex_lock(&dev_priv->drm.struct_mutex); dev_priv->perf.oa.exclusive_stream = NULL; + mutex_unlock(&dev_priv->drm.struct_mutex); dev_priv->perf.oa.ops.disable_metric_set(dev_priv); @@ -1440,9 +1442,9 @@ unlock: static void config_oa_regs(struct drm_i915_private *dev_priv, const struct i915_oa_reg *regs, - int n_regs) + u32 n_regs) { - int i; + u32 i; for (i = 0; i < n_regs; i++) { const struct i915_oa_reg *reg = regs + i; @@ -1451,14 +1453,9 @@ static void config_oa_regs(struct drm_i915_private *dev_priv, } } -static int hsw_enable_metric_set(struct drm_i915_private *dev_priv) +static int hsw_enable_metric_set(struct drm_i915_private *dev_priv, + const struct i915_oa_config *oa_config) { - int ret = i915_oa_select_metric_set_hsw(dev_priv); - int i; - - if (ret) - return ret; - I915_WRITE(GDT_CHICKEN_BITS, (I915_READ(GDT_CHICKEN_BITS) | GT_NOA_ENABLE)); @@ -1476,10 +1473,7 @@ static int hsw_enable_metric_set(struct drm_i915_private *dev_priv) I915_WRITE(GEN6_UCGCTL1, (I915_READ(GEN6_UCGCTL1) | GEN6_CSUNIT_CLOCK_GATE_DISABLE)); - for (i = 0; i < dev_priv->perf.oa.n_mux_configs; i++) { - config_oa_regs(dev_priv, dev_priv->perf.oa.mux_regs[i], - dev_priv->perf.oa.mux_regs_lens[i]); - } + config_oa_regs(dev_priv, oa_config->mux_regs, oa_config->mux_regs_len); /* It apparently takes a fairly long time for a new MUX * configuration to be be applied after these register writes. @@ -1504,8 +1498,8 @@ static int hsw_enable_metric_set(struct drm_i915_private *dev_priv) */ usleep_range(15000, 20000); - config_oa_regs(dev_priv, dev_priv->perf.oa.b_counter_regs, - dev_priv->perf.oa.b_counter_regs_len); + config_oa_regs(dev_priv, oa_config->b_counter_regs, + oa_config->b_counter_regs_len); return 0; } @@ -1529,11 +1523,10 @@ static void hsw_disable_metric_set(struct drm_i915_private *dev_priv) * in the case that the OA unit has been disabled. */ static void gen8_update_reg_state_unlocked(struct i915_gem_context *ctx, - u32 *reg_state) + u32 *reg_state, + const struct i915_oa_config *oa_config) { struct drm_i915_private *dev_priv = ctx->i915; - const struct i915_oa_reg *flex_regs = dev_priv->perf.oa.flex_regs; - int n_flex_regs = dev_priv->perf.oa.flex_regs_len; u32 ctx_oactxctrl = dev_priv->perf.oa.ctx_oactxctrl_offset; u32 ctx_flexeu0 = dev_priv->perf.oa.ctx_flexeu0_offset; /* The MMIO offsets for Flex EU registers aren't contiguous */ @@ -1565,12 +1558,15 @@ static void gen8_update_reg_state_unlocked(struct i915_gem_context *ctx, * will be an explicit 'No Event' we can select, but not yet... */ u32 value = 0; - int j; - for (j = 0; j < n_flex_regs; j++) { - if (i915_mmio_reg_offset(flex_regs[j].addr) == mmio) { - value = flex_regs[j].value; - break; + if (oa_config) { + u32 j; + + for (j = 0; j < oa_config->flex_regs_len; j++) { + if (i915_mmio_reg_offset(oa_config->flex_regs[j].addr) == mmio) { + value = oa_config->flex_regs[j].value; + break; + } } } @@ -1583,11 +1579,10 @@ static void gen8_update_reg_state_unlocked(struct i915_gem_context *ctx, * Same as gen8_update_reg_state_unlocked only through the batchbuffer. This * is only used by the kernel context. */ -static int gen8_emit_oa_config(struct drm_i915_gem_request *req) +static int gen8_emit_oa_config(struct drm_i915_gem_request *req, + const struct i915_oa_config *oa_config) { struct drm_i915_private *dev_priv = req->i915; - const struct i915_oa_reg *flex_regs = dev_priv->perf.oa.flex_regs; - int n_flex_regs = dev_priv->perf.oa.flex_regs_len; /* The MMIO offsets for Flex EU registers aren't contiguous */ u32 flex_mmio[] = { i915_mmio_reg_offset(EU_PERF_CNTL0), @@ -1622,12 +1617,15 @@ static int gen8_emit_oa_config(struct drm_i915_gem_request *req) * yet... */ u32 value = 0; - int j; - for (j = 0; j < n_flex_regs; j++) { - if (i915_mmio_reg_offset(flex_regs[j].addr) == mmio) { - value = flex_regs[j].value; - break; + if (oa_config) { + u32 j; + + for (j = 0; j < oa_config->flex_regs_len; j++) { + if (i915_mmio_reg_offset(oa_config->flex_regs[j].addr) == mmio) { + value = oa_config->flex_regs[j].value; + break; + } } } @@ -1641,7 +1639,8 @@ static int gen8_emit_oa_config(struct drm_i915_gem_request *req) return 0; } -static int gen8_switch_to_updated_kernel_context(struct drm_i915_private *dev_priv) +static int gen8_switch_to_updated_kernel_context(struct drm_i915_private *dev_priv, + const struct i915_oa_config *oa_config) { struct intel_engine_cs *engine = dev_priv->engine[RCS]; struct i915_gem_timeline *timeline; @@ -1656,7 +1655,7 @@ static int gen8_switch_to_updated_kernel_context(struct drm_i915_private *dev_pr if (IS_ERR(req)) return PTR_ERR(req); - ret = gen8_emit_oa_config(req); + ret = gen8_emit_oa_config(req, oa_config); if (ret) { i915_add_request(req); return ret; @@ -1707,6 +1706,7 @@ static int gen8_switch_to_updated_kernel_context(struct drm_i915_private *dev_pr * Note: it's only the RCS/Render context that has any OA state. */ static int gen8_configure_all_contexts(struct drm_i915_private *dev_priv, + const struct i915_oa_config *oa_config, bool interruptible) { struct i915_gem_context *ctx; @@ -1724,7 +1724,7 @@ static int gen8_configure_all_contexts(struct drm_i915_private *dev_priv, } /* Switch away from any user context. */ - ret = gen8_switch_to_updated_kernel_context(dev_priv); + ret = gen8_switch_to_updated_kernel_context(dev_priv, oa_config); if (ret) goto out; @@ -1763,7 +1763,7 @@ static int gen8_configure_all_contexts(struct drm_i915_private *dev_priv, ce->state->obj->mm.dirty = true; regs += LRC_STATE_PN * PAGE_SIZE / sizeof(*regs); - gen8_update_reg_state_unlocked(ctx, regs); + gen8_update_reg_state_unlocked(ctx, regs, oa_config); i915_gem_object_unpin_map(ce->state->obj); } @@ -1774,13 +1774,10 @@ static int gen8_configure_all_contexts(struct drm_i915_private *dev_priv, return ret; } -static int gen8_enable_metric_set(struct drm_i915_private *dev_priv) +static int gen8_enable_metric_set(struct drm_i915_private *dev_priv, + const struct i915_oa_config *oa_config) { - int ret = dev_priv->perf.oa.ops.select_metric_set(dev_priv); - int i; - - if (ret) - return ret; + int ret; /* * We disable slice/unslice clock ratio change reports on SKL since @@ -1817,19 +1814,18 @@ static int gen8_enable_metric_set(struct drm_i915_private *dev_priv) * to make sure all slices/subslices are ON before writing to NOA * registers. */ - ret = gen8_configure_all_contexts(dev_priv, true); + ret = gen8_configure_all_contexts(dev_priv, oa_config, true); if (ret) return ret; I915_WRITE(GDT_CHICKEN_BITS, 0xA0); - for (i = 0; i < dev_priv->perf.oa.n_mux_configs; i++) { - config_oa_regs(dev_priv, dev_priv->perf.oa.mux_regs[i], - dev_priv->perf.oa.mux_regs_lens[i]); - } + + config_oa_regs(dev_priv, oa_config->mux_regs, oa_config->mux_regs_len); + I915_WRITE(GDT_CHICKEN_BITS, 0x80); - config_oa_regs(dev_priv, dev_priv->perf.oa.b_counter_regs, - dev_priv->perf.oa.b_counter_regs_len); + config_oa_regs(dev_priv, oa_config->b_counter_regs, + oa_config->b_counter_regs_len); return 0; } @@ -1837,7 +1833,7 @@ static int gen8_enable_metric_set(struct drm_i915_private *dev_priv) static void gen8_disable_metric_set(struct drm_i915_private *dev_priv) { /* Reset all contexts' slices/subslices configurations. */ - gen8_configure_all_contexts(dev_priv, false); + gen8_configure_all_contexts(dev_priv, NULL, false); } static void gen7_oa_enable(struct drm_i915_private *dev_priv) @@ -1957,6 +1953,15 @@ static const struct i915_perf_stream_ops i915_oa_stream_ops = { .read = i915_oa_read, }; +static struct i915_oa_config *get_oa_config(struct drm_i915_private *dev_priv, + int metrics_set) +{ + if (metrics_set == 1) + return &dev_priv->perf.oa.test_config; + + return NULL; +} + /** * i915_oa_stream_init - validate combined props for OA stream and init * @stream: An i915 perf stream @@ -2011,11 +2016,6 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, return -EBUSY; } - if (!props->metrics_set) { - DRM_DEBUG("OA metric set not specified\n"); - return -EINVAL; - } - if (!props->oa_format) { DRM_DEBUG("OA report format not specified\n"); return -EINVAL; @@ -2055,8 +2055,6 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, dev_priv->perf.oa.oa_buffer.format = dev_priv->perf.oa.oa_formats[props->oa_format].format; - dev_priv->perf.oa.metrics_set = props->metrics_set; - dev_priv->perf.oa.periodic = props->oa_periodic; if (dev_priv->perf.oa.periodic) dev_priv->perf.oa.period_exponent = props->oa_period_exponent; @@ -2067,6 +2065,10 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, return ret; } + stream->oa_config = get_oa_config(dev_priv, props->metrics_set); + if (!stream->oa_config) + return -EINVAL; + /* PRM - observability performance counters: * * OACONTROL, performance counter enable, note: @@ -2086,16 +2088,29 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream, if (ret) goto err_oa_buf_alloc; - ret = dev_priv->perf.oa.ops.enable_metric_set(dev_priv); + ret = dev_priv->perf.oa.ops.enable_metric_set(dev_priv, + stream->oa_config); if (ret) goto err_enable; stream->ops = &i915_oa_stream_ops; + /* Lock device for exclusive_stream access late because + * enable_metric_set() might lock as well on gen8+. + */ + ret = i915_mutex_lock_interruptible(&dev_priv->drm); + if (ret) + goto err_lock; + dev_priv->perf.oa.exclusive_stream = stream; + mutex_unlock(&dev_priv->drm.struct_mutex); + return 0; +err_lock: + dev_priv->perf.oa.ops.disable_metric_set(dev_priv); + err_enable: free_oa_buffer(dev_priv); @@ -2113,6 +2128,7 @@ void i915_oa_init_reg_state(struct intel_engine_cs *engine, u32 *reg_state) { struct drm_i915_private *dev_priv = engine->i915; + struct i915_perf_stream *stream = dev_priv->perf.oa.exclusive_stream; if (engine->id != RCS) return; @@ -2120,7 +2136,8 @@ void i915_oa_init_reg_state(struct intel_engine_cs *engine, if (!dev_priv->perf.initialized) return; - gen8_update_reg_state_unlocked(ctx, reg_state); + if (stream) + gen8_update_reg_state_unlocked(ctx, reg_state, stream->oa_config); } /** @@ -2643,7 +2660,7 @@ static int read_properties_unlocked(struct drm_i915_private *dev_priv, struct perf_open_properties *props) { u64 __user *uprop = uprops; - int i; + u32 i; memset(props, 0, sizeof(struct perf_open_properties)); @@ -2690,8 +2707,7 @@ static int read_properties_unlocked(struct drm_i915_private *dev_priv, props->sample_flags |= SAMPLE_OA_REPORT; break; case DRM_I915_PERF_PROP_OA_METRICS_SET: - if (value == 0 || - value > dev_priv->perf.oa.n_builtin_sets) { + if (value == 0) { DRM_DEBUG("Unknown OA metric set ID\n"); return -EINVAL; } @@ -2830,6 +2846,8 @@ int i915_perf_open_ioctl(struct drm_device *dev, void *data, */ void i915_perf_register(struct drm_i915_private *dev_priv) { + int ret; + if (!dev_priv->perf.initialized) return; @@ -2845,44 +2863,40 @@ void i915_perf_register(struct drm_i915_private *dev_priv) if (!dev_priv->perf.metrics_kobj) goto exit; + memset(&dev_priv->perf.oa.test_config, 0, + sizeof(dev_priv->perf.oa.test_config)); + if (IS_HASWELL(dev_priv)) { - if (i915_perf_register_sysfs_hsw(dev_priv)) - goto sysfs_error; + i915_perf_load_test_config_hsw(dev_priv); } else if (IS_BROADWELL(dev_priv)) { - if (i915_perf_register_sysfs_bdw(dev_priv)) - goto sysfs_error; + i915_perf_load_test_config_bdw(dev_priv); } else if (IS_CHERRYVIEW(dev_priv)) { - if (i915_perf_register_sysfs_chv(dev_priv)) - goto sysfs_error; + i915_perf_load_test_config_chv(dev_priv); } else if (IS_SKYLAKE(dev_priv)) { - if (IS_SKL_GT2(dev_priv)) { - if (i915_perf_register_sysfs_sklgt2(dev_priv)) - goto sysfs_error; - } else if (IS_SKL_GT3(dev_priv)) { - if (i915_perf_register_sysfs_sklgt3(dev_priv)) - goto sysfs_error; - } else if (IS_SKL_GT4(dev_priv)) { - if (i915_perf_register_sysfs_sklgt4(dev_priv)) - goto sysfs_error; - } else - goto sysfs_error; + if (IS_SKL_GT2(dev_priv)) + i915_perf_load_test_config_sklgt2(dev_priv); + else if (IS_SKL_GT3(dev_priv)) + i915_perf_load_test_config_sklgt3(dev_priv); + else if (IS_SKL_GT4(dev_priv)) + i915_perf_load_test_config_sklgt4(dev_priv); } else if (IS_BROXTON(dev_priv)) { - if (i915_perf_register_sysfs_bxt(dev_priv)) - goto sysfs_error; + i915_perf_load_test_config_bxt(dev_priv); } else if (IS_KABYLAKE(dev_priv)) { - if (IS_KBL_GT2(dev_priv)) { - if (i915_perf_register_sysfs_kblgt2(dev_priv)) - goto sysfs_error; - } else if (IS_KBL_GT3(dev_priv)) { - if (i915_perf_register_sysfs_kblgt3(dev_priv)) - goto sysfs_error; - } else - goto sysfs_error; + if (IS_KBL_GT2(dev_priv)) + i915_perf_load_test_config_kblgt2(dev_priv); + else if (IS_KBL_GT3(dev_priv)) + i915_perf_load_test_config_kblgt3(dev_priv); } else if (IS_GEMINILAKE(dev_priv)) { - if (i915_perf_register_sysfs_glk(dev_priv)) - goto sysfs_error; + i915_perf_load_test_config_glk(dev_priv); } + if (dev_priv->perf.oa.test_config.id == 0) + goto sysfs_error; + + ret = sysfs_create_group(dev_priv->perf.metrics_kobj, + &dev_priv->perf.oa.test_config.sysfs_metric); + if (ret) + goto sysfs_error; goto exit; sysfs_error: @@ -2907,29 +2921,8 @@ void i915_perf_unregister(struct drm_i915_private *dev_priv) if (!dev_priv->perf.metrics_kobj) return; - if (IS_HASWELL(dev_priv)) - i915_perf_unregister_sysfs_hsw(dev_priv); - else if (IS_BROADWELL(dev_priv)) - i915_perf_unregister_sysfs_bdw(dev_priv); - else if (IS_CHERRYVIEW(dev_priv)) - i915_perf_unregister_sysfs_chv(dev_priv); - else if (IS_SKYLAKE(dev_priv)) { - if (IS_SKL_GT2(dev_priv)) - i915_perf_unregister_sysfs_sklgt2(dev_priv); - else if (IS_SKL_GT3(dev_priv)) - i915_perf_unregister_sysfs_sklgt3(dev_priv); - else if (IS_SKL_GT4(dev_priv)) - i915_perf_unregister_sysfs_sklgt4(dev_priv); - } else if (IS_BROXTON(dev_priv)) - i915_perf_unregister_sysfs_bxt(dev_priv); - else if (IS_KABYLAKE(dev_priv)) { - if (IS_KBL_GT2(dev_priv)) - i915_perf_unregister_sysfs_kblgt2(dev_priv); - else if (IS_KBL_GT3(dev_priv)) - i915_perf_unregister_sysfs_kblgt3(dev_priv); - } else if (IS_GEMINILAKE(dev_priv)) - i915_perf_unregister_sysfs_glk(dev_priv); - + sysfs_remove_group(dev_priv->perf.metrics_kobj, + &dev_priv->perf.oa.test_config.sysfs_metric); kobject_put(dev_priv->perf.metrics_kobj); dev_priv->perf.metrics_kobj = NULL; @@ -2988,7 +2981,7 @@ static struct ctl_table dev_root[] = { */ void i915_perf_init(struct drm_i915_private *dev_priv) { - dev_priv->perf.oa.n_builtin_sets = 0; + dev_priv->perf.oa.timestamp_frequency = 0; if (IS_HASWELL(dev_priv)) { dev_priv->perf.oa.ops.init_oa_buffer = gen7_init_oa_buffer; @@ -3003,9 +2996,6 @@ void i915_perf_init(struct drm_i915_private *dev_priv) dev_priv->perf.oa.timestamp_frequency = 12500000; dev_priv->perf.oa.oa_formats = hsw_oa_formats; - - dev_priv->perf.oa.n_builtin_sets = - i915_oa_n_builtin_metric_sets_hsw; } else if (i915.enable_execlists) { /* Note: that although we could theoretically also support the * legacy ringbuffer mode on BDW (and earlier iterations of @@ -3014,6 +3004,16 @@ void i915_perf_init(struct drm_i915_private *dev_priv) * execlist mode by default. */ + dev_priv->perf.oa.ops.init_oa_buffer = gen8_init_oa_buffer; + dev_priv->perf.oa.ops.enable_metric_set = gen8_enable_metric_set; + dev_priv->perf.oa.ops.disable_metric_set = gen8_disable_metric_set; + dev_priv->perf.oa.ops.oa_enable = gen8_oa_enable; + dev_priv->perf.oa.ops.oa_disable = gen8_oa_disable; + dev_priv->perf.oa.ops.read = gen8_oa_read; + dev_priv->perf.oa.ops.oa_hw_tail_read = gen8_oa_hw_tail_read; + + dev_priv->perf.oa.oa_formats = gen8_plus_oa_formats; + if (IS_GEN8(dev_priv)) { dev_priv->perf.oa.ctx_oactxctrl_offset = 0x120; dev_priv->perf.oa.ctx_flexeu0_offset = 0x2ce; @@ -3021,85 +3021,31 @@ void i915_perf_init(struct drm_i915_private *dev_priv) dev_priv->perf.oa.timestamp_frequency = 12500000; dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<25); - - if (IS_BROADWELL(dev_priv)) { - dev_priv->perf.oa.n_builtin_sets = - i915_oa_n_builtin_metric_sets_bdw; - dev_priv->perf.oa.ops.select_metric_set = - i915_oa_select_metric_set_bdw; - } else if (IS_CHERRYVIEW(dev_priv)) { - dev_priv->perf.oa.n_builtin_sets = - i915_oa_n_builtin_metric_sets_chv; - dev_priv->perf.oa.ops.select_metric_set = - i915_oa_select_metric_set_chv; - } } else if (IS_GEN9(dev_priv)) { dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128; dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de; - dev_priv->perf.oa.timestamp_frequency = 12000000; - dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<16); - if (IS_SKL_GT2(dev_priv)) { - dev_priv->perf.oa.n_builtin_sets = - i915_oa_n_builtin_metric_sets_sklgt2; - dev_priv->perf.oa.ops.select_metric_set = - i915_oa_select_metric_set_sklgt2; - } else if (IS_SKL_GT3(dev_priv)) { - dev_priv->perf.oa.n_builtin_sets = - i915_oa_n_builtin_metric_sets_sklgt3; - dev_priv->perf.oa.ops.select_metric_set = - i915_oa_select_metric_set_sklgt3; - } else if (IS_SKL_GT4(dev_priv)) { - dev_priv->perf.oa.n_builtin_sets = - i915_oa_n_builtin_metric_sets_sklgt4; - dev_priv->perf.oa.ops.select_metric_set = - i915_oa_select_metric_set_sklgt4; - } else if (IS_BROXTON(dev_priv)) { + switch (dev_priv->info.platform) { + case INTEL_BROXTON: + case INTEL_GEMINILAKE: dev_priv->perf.oa.timestamp_frequency = 19200000; - - dev_priv->perf.oa.n_builtin_sets = - i915_oa_n_builtin_metric_sets_bxt; - dev_priv->perf.oa.ops.select_metric_set = - i915_oa_select_metric_set_bxt; - } else if (IS_KBL_GT2(dev_priv)) { - dev_priv->perf.oa.n_builtin_sets = - i915_oa_n_builtin_metric_sets_kblgt2; - dev_priv->perf.oa.ops.select_metric_set = - i915_oa_select_metric_set_kblgt2; - } else if (IS_KBL_GT3(dev_priv)) { - dev_priv->perf.oa.n_builtin_sets = - i915_oa_n_builtin_metric_sets_kblgt3; - dev_priv->perf.oa.ops.select_metric_set = - i915_oa_select_metric_set_kblgt3; - } else if (IS_GEMINILAKE(dev_priv)) { - dev_priv->perf.oa.timestamp_frequency = 19200000; - - dev_priv->perf.oa.n_builtin_sets = - i915_oa_n_builtin_metric_sets_glk; - dev_priv->perf.oa.ops.select_metric_set = - i915_oa_select_metric_set_glk; + break; + case INTEL_SKYLAKE: + case INTEL_KABYLAKE: + dev_priv->perf.oa.timestamp_frequency = 12000000; + break; + default: + /* Leave timestamp_frequency to 0 so we can + * detect unsupported platforms. + */ + break; } } - - if (dev_priv->perf.oa.n_builtin_sets) { - dev_priv->perf.oa.ops.init_oa_buffer = gen8_init_oa_buffer; - dev_priv->perf.oa.ops.enable_metric_set = - gen8_enable_metric_set; - dev_priv->perf.oa.ops.disable_metric_set = - gen8_disable_metric_set; - dev_priv->perf.oa.ops.oa_enable = gen8_oa_enable; - dev_priv->perf.oa.ops.oa_disable = gen8_oa_disable; - dev_priv->perf.oa.ops.read = gen8_oa_read; - dev_priv->perf.oa.ops.oa_hw_tail_read = - gen8_oa_hw_tail_read; - - dev_priv->perf.oa.oa_formats = gen8_plus_oa_formats; - } } - if (dev_priv->perf.oa.n_builtin_sets) { + if (dev_priv->perf.oa.timestamp_frequency) { hrtimer_init(&dev_priv->perf.oa.poll_check_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); dev_priv->perf.oa.poll_check_timer.function = oa_poll_check_timer_cb; |