diff options
| -rw-r--r-- | drivers/gpu/drm/mediatek/mtk_dpi.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index ed9aa928f517..91f3eb796219 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -145,6 +145,8 @@ struct mtk_dpi_factor { * If present, implies that the feature must be enabled. * @pixels_per_iter: Quantity of transferred pixels per iteration. * @edge_cfg_in_mmsys: If the edge configuration for DPI's output needs to be set in MMSYS. + * @clocked_by_hdmi: HDMI IP outputs clock to dpi_pixel_clk input clock, needed + * for DPI registers access. */ struct mtk_dpi_conf { const struct mtk_dpi_factor *dpi_factor; @@ -165,6 +167,7 @@ struct mtk_dpi_conf { u32 input_2p_en_bit; u32 pixels_per_iter; bool edge_cfg_in_mmsys; + bool clocked_by_hdmi; }; static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask) @@ -585,7 +588,9 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, struct videomode vm = { 0 }; drm_display_mode_to_videomode(mode, &vm); - mtk_dpi_set_pixel_clk(dpi, &vm, mode->clock); + + if (!dpi->conf->clocked_by_hdmi) + mtk_dpi_set_pixel_clk(dpi, &vm, mode->clock); dpi_pol.ck_pol = MTK_DPI_POLARITY_FALLING; dpi_pol.de_pol = MTK_DPI_POLARITY_RISING; @@ -920,14 +925,16 @@ void mtk_dpi_start(struct device *dev) { struct mtk_dpi *dpi = dev_get_drvdata(dev); - mtk_dpi_power_on(dpi); + if (!dpi->conf->clocked_by_hdmi) + mtk_dpi_power_on(dpi); } void mtk_dpi_stop(struct device *dev) { struct mtk_dpi *dpi = dev_get_drvdata(dev); - mtk_dpi_power_off(dpi); + if (!dpi->conf->clocked_by_hdmi) + mtk_dpi_power_off(dpi); } unsigned int mtk_dpi_encoder_index(struct device *dev) |