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-rw-r--r--Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml5
1 files changed, 3 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
index 3f4a1939554d..2ece8630dc68 100644
--- a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
+++ b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
@@ -25,8 +25,8 @@ select:
properties:
compatible:
items:
- - enum:
- - sifive,fu540-c000-ccache
+ - enum:
+ - sifive,fu540-c000-ccache
required:
- compatible
@@ -63,6 +63,7 @@ properties:
next-level-cache: true
memory-region:
+ maxItems: 1
description: |
The reference to the reserved-memory for the L2 Loosely Integrated Memory region.
The reserved memory node should be defined as per the bindings in reserved-memory.txt.