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diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c
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+/* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Code Aurora Forum nor
+ * the names of its contributors may be used to endorse or promote
+ * products derived from this software without specific prior written
+ * permission.
+ *
+ * Alternatively, provided that this notice is retained in full, this software
+ * may be relicensed by the recipient under the terms of the GNU General Public
+ * License version 2 ("GPL") and only version 2, in which case the provisions of
+ * the GPL apply INSTEAD OF those given above. If the recipient relicenses the
+ * software under the GPL, then the identification text in the MODULE_LICENSE
+ * macro must be changed to reflect "GPLv2" instead of "Dual BSD/GPL". Once a
+ * recipient changes the license terms to the GPL, subsequent recipients shall
+ * not relicense under alternate licensing terms, including the BSD or dual
+ * BSD/GPL terms. In addition, the following license statement immediately
+ * below and between the words START and END shall also then apply when this
+ * software is relicensed under the GPL:
+ *
+ * START
+ *
+ * This program is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License version 2 and only version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ * FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ *
+ * END
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/bootmem.h>
+#include <linux/i2c.h>
+#include <linux/spi/spi.h>
+#include <linux/delay.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/mmc.h>
+#include <mach/vreg.h>
+#include <mach/mpp.h>
+#include <mach/gpio.h>
+#include <mach/board.h>
+#include <mach/sirc.h>
+#include <mach/msm_touchpad.h>
+#include <mach/msm_i2ckbd.h>
+#include <mach/pmic.h>
+#include <mach/memory.h>
+
+#include "devices.h"
+#include "timer.h"
+#include "socinfo.h"
+#include "msm-keypad-devices.h"
+#include "pm.h"
+
+#define TOUCHPAD_SUSPEND 34
+#define TOUCHPAD_IRQ 38
+
+#define MSM_PMEM_MDP_SIZE 0x800000
+#define MSM_PMEM_CAMERA_SIZE 0xa00000
+#define MSM_PMEM_ADSP_SIZE 0x1100000
+#define MSM_PMEM_GPU1_SIZE 0x800000
+#define MSM_FB_SIZE 0x500000
+#define MSM_AUDIO_SIZE 0x200000
+#define MSM_GPU_PHYS_SIZE SZ_2M
+
+#define MSM_SMI_BASE 0x2b00000
+#define MSM_SMI_SIZE 0x1500000
+
+#define MSM_FB_BASE MSM_SMI_BASE
+#define MSM_GPU_PHYS_BASE (MSM_FB_BASE + MSM_FB_SIZE)
+#define MSM_PMEM_GPU0_BASE (MSM_GPU_PHYS_BASE + MSM_GPU_PHYS_SIZE)
+#define MSM_PMEM_GPU0_SIZE (MSM_SMI_SIZE - MSM_FB_SIZE - MSM_GPU_PHYS_SIZE)
+
+static struct resource smc91x_resources[] = {
+ [0] = {
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device smc91x_device = {
+ .name = "smc91x",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(smc91x_resources),
+ .resource = smc91x_resources,
+};
+
+
+static struct platform_device *devices[] __initdata = {
+ &smc91x_device,
+ &msm_device_smd,
+ &msm_device_dmov,
+ &msm_device_nand,
+#if !defined(CONFIG_MSM_SERIAL_DEBUGGER)
+ &msm_device_uart3,
+#endif
+};
+
+#define KBD_RST 35
+#define KBD_IRQ 36
+
+static void kbd_gpio_release(void)
+{
+ gpio_free(KBD_IRQ);
+ gpio_free(KBD_RST);
+}
+
+static int kbd_gpio_setup(void)
+{
+ int rc;
+ int respin = KBD_RST;
+ int irqpin = KBD_IRQ;
+ unsigned rescfg =
+ GPIO_CFG(respin, 0, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA);
+ unsigned irqcfg =
+ GPIO_CFG(irqpin, 0, GPIO_INPUT, GPIO_NO_PULL, GPIO_2MA);
+
+ rc = gpio_request(irqpin, "gpio_keybd_irq");
+ if (rc) {
+ pr_err("gpio_request failed on pin %d (rc=%d)\n",
+ irqpin, rc);
+ goto err_gpioconfig;
+ }
+ rc = gpio_request(respin, "gpio_keybd_reset");
+ if (rc) {
+ pr_err("gpio_request failed on pin %d (rc=%d)\n",
+ respin, rc);
+ goto err_gpioconfig;
+ }
+ rc = gpio_tlmm_config(rescfg, GPIO_ENABLE);
+ if (rc) {
+ pr_err("gpio_tlmm_config failed on pin %d (rc=%d)\n",
+ respin, rc);
+ goto err_gpioconfig;
+ }
+ rc = gpio_tlmm_config(irqcfg, GPIO_ENABLE);
+ if (rc) {
+ pr_err("gpio_tlmm_config failed on pin %d (rc=%d)\n",
+ irqpin, rc);
+ goto err_gpioconfig;
+ }
+ return rc;
+
+err_gpioconfig:
+ kbd_gpio_release();
+ return rc;
+}
+
+static struct msm_i2ckbd_platform_data msm_kybd_data = {
+ .hwrepeat = 0,
+ .scanset1 = 1,
+ .gpioreset = KBD_RST,
+ .gpioirq = KBD_IRQ,
+ .gpio_setup = kbd_gpio_setup,
+ .gpio_shutdown = kbd_gpio_release,
+};
+static void config_gpio_table(uint32_t *table, int len)
+{
+ int n, rc;
+ for (n = 0; n < len; n++) {
+ rc = gpio_tlmm_config(table[n], GPIO_ENABLE);
+ if (rc) {
+ printk(KERN_ERR "%s: gpio_tlmm_config(%#x)=%d\n",
+ __func__, table[n], rc);
+ break;
+ }
+ }
+}
+
+static void __init qsd8x50_init_irq(void)
+{
+ msm_init_irq();
+ msm_init_sirc();
+}
+
+static void sdcc_gpio_init(void)
+{
+ /* SDC1 GPIOs */
+#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
+ if (gpio_request(51, "sdc1_data_3"))
+ pr_err("failed to request gpio sdc1_data_3\n");
+ if (gpio_request(52, "sdc1_data_2"))
+ pr_err("failed to request gpio sdc1_data_2\n");
+ if (gpio_request(53, "sdc1_data_1"))
+ pr_err("failed to request gpio sdc1_data_1\n");
+ if (gpio_request(54, "sdc1_data_0"))
+ pr_err("failed to request gpio sdc1_data_0\n");
+ if (gpio_request(55, "sdc1_cmd"))
+ pr_err("failed to request gpio sdc1_cmd\n");
+ if (gpio_request(56, "sdc1_clk"))
+ pr_err("failed to request gpio sdc1_clk\n");
+#endif
+
+ if (machine_is_qsd8x50_ffa())
+ return;
+
+ /* SDC2 GPIOs */
+#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
+ if (gpio_request(62, "sdc2_clk"))
+ pr_err("failed to request gpio sdc2_clk\n");
+ if (gpio_request(63, "sdc2_cmd"))
+ pr_err("failed to request gpio sdc2_cmd\n");
+ if (gpio_request(64, "sdc2_data_3"))
+ pr_err("failed to request gpio sdc2_data_3\n");
+ if (gpio_request(65, "sdc2_data_2"))
+ pr_err("failed to request gpio sdc2_data_2\n");
+ if (gpio_request(66, "sdc2_data_1"))
+ pr_err("failed to request gpio sdc2_data_1\n");
+ if (gpio_request(67, "sdc2_data_0"))
+ pr_err("failed to request gpio sdc2_data_0\n");
+#endif
+
+ /* SDC3 GPIOs */
+#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
+ if (gpio_request(88, "sdc3_clk"))
+ pr_err("failed to request gpio sdc3_clk\n");
+ if (gpio_request(89, "sdc3_cmd"))
+ pr_err("failed to request gpio sdc3_cmd\n");
+ if (gpio_request(90, "sdc3_data_3"))
+ pr_err("failed to request gpio sdc3_data_3\n");
+ if (gpio_request(91, "sdc3_data_2"))
+ pr_err("failed to request gpio sdc3_data_2\n");
+ if (gpio_request(92, "sdc3_data_1"))
+ pr_err("failed to request gpio sdc3_data_1\n");
+ if (gpio_request(93, "sdc3_data_0"))
+ pr_err("failed to request gpio sdc3_data_0\n");
+#endif
+
+ /* SDC4 GPIOs */
+#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
+ if (gpio_request(142, "sdc4_clk"))
+ pr_err("failed to request gpio sdc4_clk\n");
+ if (gpio_request(143, "sdc4_cmd"))
+ pr_err("failed to request gpio sdc4_cmd\n");
+ if (gpio_request(144, "sdc4_data_0"))
+ pr_err("failed to request gpio sdc4_data_0\n");
+ if (gpio_request(145, "sdc4_data_1"))
+ pr_err("failed to request gpio sdc4_data_1\n");
+ if (gpio_request(146, "sdc4_data_2"))
+ pr_err("failed to request gpio sdc4_data_2\n");
+ if (gpio_request(147, "sdc4_data_3"))
+ pr_err("failed to request gpio sdc4_data_3\n");
+#endif
+}
+
+static unsigned sdcc_cfg_data[][6] = {
+ /* SDC1 configs */
+ {
+ GPIO_CFG(51, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ GPIO_CFG(52, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ GPIO_CFG(53, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ GPIO_CFG(54, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ GPIO_CFG(55, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ GPIO_CFG(56, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA),
+ },
+ /* SDC2 configs */
+ {
+ GPIO_CFG(62, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA),
+ GPIO_CFG(63, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ GPIO_CFG(64, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ GPIO_CFG(65, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ GPIO_CFG(66, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ GPIO_CFG(67, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ },
+ /* SDC3 configs */
+ {
+ GPIO_CFG(88, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA),
+ GPIO_CFG(89, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ GPIO_CFG(90, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ GPIO_CFG(91, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ GPIO_CFG(92, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ GPIO_CFG(93, 1, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ },
+ /* SDC4 configs */
+ {
+ GPIO_CFG(142, 3, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_8MA),
+ GPIO_CFG(143, 3, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ GPIO_CFG(144, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ GPIO_CFG(145, 2, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ GPIO_CFG(146, 3, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ GPIO_CFG(147, 3, GPIO_OUTPUT, GPIO_PULL_UP, GPIO_8MA),
+ }
+};
+
+static unsigned long vreg_sts, gpio_sts;
+static struct vreg *vreg_mmc;
+
+static void msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
+{
+ int i, rc;
+
+ if (!(test_bit(dev_id, &gpio_sts)^enable))
+ return;
+
+ if (enable)
+ set_bit(dev_id, &gpio_sts);
+ else
+ clear_bit(dev_id, &gpio_sts);
+
+ for (i = 0; i < ARRAY_SIZE(sdcc_cfg_data[dev_id - 1]); i++) {
+ rc = gpio_tlmm_config(sdcc_cfg_data[dev_id - 1][i],
+ enable ? GPIO_ENABLE : GPIO_DISABLE);
+ if (rc)
+ printk(KERN_ERR "%s: gpio_tlmm_config(%#x)=%d\n",
+ __func__, sdcc_cfg_data[dev_id - 1][i], rc);
+ }
+}
+
+static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
+{
+ int rc = 0;
+ struct platform_device *pdev;
+
+ pdev = container_of(dv, struct platform_device, dev);
+ msm_sdcc_setup_gpio(pdev->id, !!vdd);
+
+ if (vdd == 0) {
+ if (!vreg_sts)
+ return 0;
+
+ clear_bit(pdev->id, &vreg_sts);
+
+ if (!vreg_sts && !machine_is_qsd8x50_ffa()) {
+ rc = vreg_disable(vreg_mmc);
+ if (rc)
+ printk(KERN_ERR "%s: return val: %d \n",
+ __func__, rc);
+ }
+ return 0;
+ }
+
+ if (!vreg_sts && !machine_is_qsd8x50_ffa()) {
+ rc = vreg_set_level(vreg_mmc, 2850);
+ if (!rc)
+ rc = vreg_enable(vreg_mmc);
+ if (rc)
+ printk(KERN_ERR "%s: return val: %d \n",
+ __func__, rc);
+ }
+ set_bit(pdev->id, &vreg_sts);
+ return 0;
+}
+
+static struct mmc_platform_data qsd8x50_sdcc_data = {
+ .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
+ .translate_vdd = msm_sdcc_setup_power,
+};
+
+static void __init qsd8x50_cfg_smc91x(void)
+{
+ int rc = 0;
+
+ if (machine_is_qsd8x50_surf()) {
+ smc91x_resources[0].start = 0x70000300;
+ smc91x_resources[0].end = 0x700003ff;
+ smc91x_resources[1].start = MSM_GPIO_TO_INT(156);
+ smc91x_resources[1].end = MSM_GPIO_TO_INT(156);
+ } else if (machine_is_qsd8x50_ffa()) {
+ smc91x_resources[0].start = 0x84000300;
+ smc91x_resources[0].end = 0x840003ff;
+ smc91x_resources[1].start = MSM_GPIO_TO_INT(87);
+ smc91x_resources[1].end = MSM_GPIO_TO_INT(87);
+
+ rc = gpio_tlmm_config(GPIO_CFG(87, 0, GPIO_INPUT,
+ GPIO_PULL_DOWN, GPIO_2MA),
+ GPIO_ENABLE);
+ if (rc) {
+ printk(KERN_ERR "%s: gpio_tlmm_config=%d\n",
+ __func__, rc);
+ }
+ } else
+ printk(KERN_ERR "%s: invalid machine type\n", __func__);
+}
+
+static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR] = {
+ [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].supported = 1,
+ [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].suspend_enabled = 1,
+ [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].idle_enabled = 1,
+ [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].latency = 8594,
+ [MSM_PM_SLEEP_MODE_POWER_COLLAPSE].residency = 23740,
+
+ [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].supported = 1,
+ [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].suspend_enabled = 1,
+ [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].idle_enabled = 1,
+ [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].latency = 4594,
+ [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN].residency = 23740,
+
+ [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].supported = 1,
+ [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].suspend_enabled
+ = 1,
+ [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].idle_enabled = 0,
+ [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency = 443,
+ [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].residency = 1098,
+
+ [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].supported = 1,
+ [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].suspend_enabled = 1,
+ [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].idle_enabled = 1,
+ [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].latency = 2,
+ [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT].residency = 0,
+};
+
+static void __init gp6_init(void)
+{
+ struct vreg *vreg;
+ int rc;
+
+ vreg = vreg_get(NULL, "gp6");
+ if (IS_ERR(vreg)) {
+ printk(KERN_ERR "%s: vreg get failed (%ld)\n",
+ __func__, PTR_ERR(vreg));
+ return;
+ }
+
+ /* units of mV, steps of 50 mV */
+ rc = vreg_set_level(vreg, 2850);
+ if (rc) {
+ printk(KERN_ERR "%s: vreg set level failed (%d)\n",
+ __func__, rc);
+ return;
+ }
+
+ rc = vreg_enable(vreg);
+ if (rc) {
+ printk(KERN_ERR "%s: vreg enable failed (%d)\n",
+ __func__, rc);
+ return;
+ }
+
+ if (machine_is_qsd8x50_ffa())
+ vreg_mmc = vreg;
+}
+
+static void __init qsd8x50_init(void)
+{
+ if (socinfo_init() < 0)
+ printk(KERN_ERR "%s: socinfo_init() failed!\n",
+ __func__);
+ qsd8x50_cfg_smc91x();
+ platform_add_devices(devices, ARRAY_SIZE(devices));
+ gp6_init();
+ msm_pm_set_platform_data(msm_pm_data);
+
+#ifdef CONFIG_SURF_FFA_GPIO_KEYPAD
+ if (machine_is_qsd8x50_ffa())
+ platform_device_register(&keypad_device_8k_ffa);
+ else
+ platform_device_register(&keypad_device_surf);
+#endif
+}
+
+
+static void __init qsd8x50_map_io(void)
+{
+ msm_map_qsd8x50_io();
+ msm_clock_init(msm_clocks_8x50, msm_num_clocks_8x50);
+}
+
+MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
+#ifdef CONFIG_MSM_DEBUG_UART
+ .phys_io = MSM_DEBUG_UART_PHYS,
+ .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
+#endif
+ .boot_params = 0x20000100,
+ .map_io = qsd8x50_map_io,
+ .init_irq = qsd8x50_init_irq,
+ .init_machine = qsd8x50_init,
+ .timer = &msm_timer,
+MACHINE_END
+
+MACHINE_START(QSD8X50_GRAPEFRUIT, "QCT QSD8X50 GRAPEFRUIT")
+#ifdef CONFIG_MSM_DEBUG_UART
+ .phys_io = MSM_DEBUG_UART_PHYS,
+ .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
+#endif
+ .boot_params = 0x20000100,
+ .map_io = qsd8x50_map_io,
+ .init_irq = qsd8x50_init_irq,
+ .init_machine = qsd8x50_init,
+ .timer = &msm_timer,
+MACHINE_END
+
+MACHINE_START(QSD8X50_FFA, "QCT QSD8X50 FFA")
+#ifdef CONFIG_MSM_DEBUG_UART
+ .phys_io = MSM_DEBUG_UART_PHYS,
+ .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
+#endif
+ .boot_params = 0x20000100,
+ .map_io = qsd8x50_map_io,
+ .init_irq = qsd8x50_init_irq,
+ .init_machine = qsd8x50_init,
+ .timer = &msm_timer,
+MACHINE_END
+
+MACHINE_START(QSD8X50_ST1, "QCT QSD8X50 ST1")
+#ifdef CONFIG_MSM_DEBUG_UART
+ .phys_io = MSM_DEBUG_UART_PHYS,
+ .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc,
+#endif
+ .boot_params = 0x20000100,
+ .map_io = qsd8x50_map_io,
+ .init_irq = qsd8x50_init_irq,
+ .init_machine = qsd8x50_init,
+ .timer = &msm_timer,
+MACHINE_END