summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm64/boot/dts/qcom/qrb5165-rb5.dts')
-rw-r--r--arch/arm64/boot/dts/qcom/qrb5165-rb5.dts98
1 files changed, 10 insertions, 88 deletions
diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
index 5f41de20aa22..8ac96f8e79d4 100644
--- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
+++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
@@ -5,7 +5,6 @@
/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/sound/qcom,q6afe.h>
#include <dt-bindings/sound/qcom,q6asm.h>
@@ -552,7 +551,13 @@
vdds-supply = <&vreg_l5a_0p88>;
};
+&gmu {
+ status = "okay";
+};
+
&gpu {
+ status = "okay";
+
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sm8250/a650_zap.mbn";
@@ -664,10 +669,6 @@
&pcie0 {
status = "okay";
- perst-gpio = <&tlmm 79 GPIO_ACTIVE_LOW>;
- wake-gpio = <&tlmm 81 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie0_default_state>;
};
&pcie0_phy {
@@ -678,10 +679,6 @@
&pcie1 {
status = "okay";
- perst-gpio = <&tlmm 82 GPIO_ACTIVE_LOW>;
- wake-gpio = <&tlmm 84 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie1_default_state>;
};
&pcie1_phy {
@@ -692,10 +689,6 @@
&pcie2 {
status = "okay";
- perst-gpio = <&tlmm 85 GPIO_ACTIVE_LOW>;
- wake-gpio = <&tlmm 87 GPIO_ACTIVE_HIGH>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie2_default_state>;
};
&pcie2_phy {
@@ -1173,81 +1166,6 @@
bias-disable;
};
- pcie0_default_state: pcie0-default {
- clkreq {
- pins = "gpio80";
- function = "pci_e0";
- bias-pull-up;
- };
-
- reset-n {
- pins = "gpio79";
- function = "gpio";
-
- drive-strength = <2>;
- output-low;
- bias-pull-down;
- };
-
- wake-n {
- pins = "gpio81";
- function = "gpio";
-
- drive-strength = <2>;
- bias-pull-up;
- };
- };
-
- pcie1_default_state: pcie1-default {
- clkreq {
- pins = "gpio83";
- function = "pci_e1";
- bias-pull-up;
- };
-
- reset-n {
- pins = "gpio82";
- function = "gpio";
-
- drive-strength = <2>;
- output-low;
- bias-pull-down;
- };
-
- wake-n {
- pins = "gpio84";
- function = "gpio";
-
- drive-strength = <2>;
- bias-pull-up;
- };
- };
-
- pcie2_default_state: pcie2-default {
- clkreq {
- pins = "gpio86";
- function = "pci_e2";
- bias-pull-up;
- };
-
- reset-n {
- pins = "gpio85";
- function = "gpio";
-
- drive-strength = <2>;
- output-low;
- bias-pull-down;
- };
-
- wake-n {
- pins = "gpio87";
- function = "gpio";
-
- drive-strength = <2>;
- bias-pull-up;
- };
- };
-
sdc2_default_state: sdc2-default {
clk {
pins = "sdc2_clk";
@@ -1352,6 +1270,10 @@
qcom,dmic-sample-rate = <600000>;
};
+&venus {
+ status = "okay";
+};
+
/* PINCTRL - additions to nodes defined in sm8250.dtsi */
&qup_spi0_cs_gpio {
drive-strength = <6>;