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Diffstat (limited to 'arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi')
-rw-r--r--arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi23
1 files changed, 21 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
index a663115f5aae..cf3b3d118ef1 100644
--- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
@@ -24,7 +24,7 @@
reg = <0x0 0x48000000 0x0 0x38000000>;
};
- reg_1p8v: regulator0 {
+ reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
@@ -33,7 +33,7 @@
regulator-always-on;
};
- reg_3p3v: regulator1 {
+ reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
@@ -57,6 +57,14 @@
#endif
};
+#if (SW_SW0_DEV_SEL)
+&adc {
+ pinctrl-0 = <&adc_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+#endif
+
#if (!SW_ET0_EN_N)
&eth0 {
pinctrl-0 = <&eth0_pins>;
@@ -124,6 +132,10 @@
};
&pinctrl {
+ adc_pins: adc {
+ pinmux = <RZG2L_PORT_PINMUX(6, 2, 1)>; /* ADC_TRG */
+ };
+
eth0_pins: eth0 {
pinmux = <RZG2L_PORT_PINMUX(4, 5, 1)>, /* ET0_LINKSTA */
<RZG2L_PORT_PINMUX(4, 3, 1)>, /* ET0_MDC */
@@ -209,6 +221,13 @@
pinmux = <RZG2L_PORT_PINMUX(0, 0, 1)>; /* SD0_CD */
};
};
+
+ spi1_pins: rspi1 {
+ pinmux = <RZG2L_PORT_PINMUX(4, 0, 2)>, /* CK */
+ <RZG2L_PORT_PINMUX(4, 1, 2)>, /* MOSI */
+ <RZG2L_PORT_PINMUX(4, 2, 2)>, /* MISO */
+ <RZG2L_PORT_PINMUX(4, 3, 2)>; /* SSL */
+ };
};
#if (SW_SW0_DEV_SEL)