diff options
Diffstat (limited to 'drivers/clk/microchip')
| -rw-r--r-- | drivers/clk/microchip/Kconfig | 3 | ||||
| -rw-r--r-- | drivers/clk/microchip/clk-mpfs-ccc.c | 6 |
2 files changed, 8 insertions, 1 deletions
diff --git a/drivers/clk/microchip/Kconfig b/drivers/clk/microchip/Kconfig index b46e864b3bd8..e33e51978938 100644 --- a/drivers/clk/microchip/Kconfig +++ b/drivers/clk/microchip/Kconfig @@ -5,7 +5,8 @@ config COMMON_CLK_PIC32 config MCHP_CLK_MPFS bool "Clk driver for PolarFire SoC" - depends on (RISCV && SOC_MICROCHIP_POLARFIRE) || COMPILE_TEST + depends on SOC_MICROCHIP_POLARFIRE || COMPILE_TEST + default SOC_MICROCHIP_POLARFIRE select AUXILIARY_BUS help Supports Clock Configuration for PolarFire SoC diff --git a/drivers/clk/microchip/clk-mpfs-ccc.c b/drivers/clk/microchip/clk-mpfs-ccc.c index 7be028dced63..32aae880a14f 100644 --- a/drivers/clk/microchip/clk-mpfs-ccc.c +++ b/drivers/clk/microchip/clk-mpfs-ccc.c @@ -166,6 +166,9 @@ static int mpfs_ccc_register_outputs(struct device *dev, struct mpfs_ccc_out_hw_ struct mpfs_ccc_out_hw_clock *out_hw = &out_hws[i]; char *name = devm_kzalloc(dev, 23, GFP_KERNEL); + if (!name) + return -ENOMEM; + snprintf(name, 23, "%s_out%u", parent->name, i); out_hw->divider.hw.init = CLK_HW_INIT_HW(name, &parent->hw, &clk_divider_ops, 0); out_hw->divider.reg = data->pll_base[i / MPFS_CCC_OUTPUTS_PER_PLL] + @@ -200,6 +203,9 @@ static int mpfs_ccc_register_plls(struct device *dev, struct mpfs_ccc_pll_hw_clo struct mpfs_ccc_pll_hw_clock *pll_hw = &pll_hws[i]; char *name = devm_kzalloc(dev, 18, GFP_KERNEL); + if (!name) + return -ENOMEM; + pll_hw->base = data->pll_base[i]; snprintf(name, 18, "ccc%s_pll%u", strchrnul(dev->of_node->full_name, '@'), i); pll_hw->name = (const char *)name; |