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path: root/drivers/gpu/drm/i915/gt/intel_gt_types.h
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Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_gt_types.h')
-rw-r--r--drivers/gpu/drm/i915/gt/intel_gt_types.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
index edd7a3cf5f5f..df708802889d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
@@ -59,6 +59,13 @@ enum intel_steering_type {
MSLICE,
LNCF,
+ /*
+ * On some platforms there are multiple types of MCR registers that
+ * will always return a non-terminated value at instance (0, 0). We'll
+ * lump those all into a single category to keep things simple.
+ */
+ INSTANCE0,
+
NUM_STEERING_TYPES
};
@@ -221,6 +228,7 @@ struct intel_gt {
struct {
u8 uc_index;
+ u8 wb_index; /* Only used on HAS_L3_CCS_READ() platforms */
} mocs;
struct intel_pxp pxp;