diff options
Diffstat (limited to 'drivers/staging/r8188eu/include')
| -rw-r--r-- | drivers/staging/r8188eu/include/Hal8188EPwrSeq.h | 13 | ||||
| -rw-r--r-- | drivers/staging/r8188eu/include/Hal8188ERateAdaptive.h | 13 | ||||
| -rw-r--r-- | drivers/staging/r8188eu/include/HalPwrSeqCmd.h | 51 | ||||
| -rw-r--r-- | drivers/staging/r8188eu/include/basic_types.h | 52 | ||||
| -rw-r--r-- | drivers/staging/r8188eu/include/hal_com.h | 3 | ||||
| -rw-r--r-- | drivers/staging/r8188eu/include/hal_intf.h | 20 | ||||
| -rw-r--r-- | drivers/staging/r8188eu/include/ieee80211.h | 7 | ||||
| -rw-r--r-- | drivers/staging/r8188eu/include/osdep_service.h | 3 | ||||
| -rw-r--r-- | drivers/staging/r8188eu/include/rtl8188e_hal.h | 5 | ||||
| -rw-r--r-- | drivers/staging/r8188eu/include/rtl8188e_spec.h | 143 | ||||
| -rw-r--r-- | drivers/staging/r8188eu/include/rtw_eeprom.h | 10 | ||||
| -rw-r--r-- | drivers/staging/r8188eu/include/rtw_efuse.h | 2 | ||||
| -rw-r--r-- | drivers/staging/r8188eu/include/rtw_io.h | 8 | ||||
| -rw-r--r-- | drivers/staging/r8188eu/include/rtw_iol.h | 24 | ||||
| -rw-r--r-- | drivers/staging/r8188eu/include/rtw_led.h | 9 | ||||
| -rw-r--r-- | drivers/staging/r8188eu/include/rtw_mlme_ext.h | 19 | ||||
| -rw-r--r-- | drivers/staging/r8188eu/include/usb_ops_linux.h | 2 |
17 files changed, 29 insertions, 355 deletions
diff --git a/drivers/staging/r8188eu/include/Hal8188EPwrSeq.h b/drivers/staging/r8188eu/include/Hal8188EPwrSeq.h deleted file mode 100644 index e4c5b5d23cb4..000000000000 --- a/drivers/staging/r8188eu/include/Hal8188EPwrSeq.h +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -/* Copyright(c) 2007 - 2011 Realtek Corporation. */ - -#ifndef __HAL8188EPWRSEQ_H__ -#define __HAL8188EPWRSEQ_H__ - -#include "HalPwrSeqCmd.h" - -extern struct wl_pwr_cfg rtl8188E_power_on_flow[]; -extern struct wl_pwr_cfg rtl8188E_card_disable_flow[]; -extern struct wl_pwr_cfg rtl8188E_enter_lps_flow[]; - -#endif /* __HAL8188EPWRSEQ_H__ */ diff --git a/drivers/staging/r8188eu/include/Hal8188ERateAdaptive.h b/drivers/staging/r8188eu/include/Hal8188ERateAdaptive.h index 20d73ca781e8..c571ad9478ea 100644 --- a/drivers/staging/r8188eu/include/Hal8188ERateAdaptive.h +++ b/drivers/staging/r8188eu/include/Hal8188ERateAdaptive.h @@ -22,19 +22,6 @@ le32_to_cpu((*(__le32 *)(__rxstatusdesc + 16)) #define GET_TX_RPT2_DESC_MACID_VALID_2_88E(__rxstatusdesc) \ le32_to_cpu((*(__le32 *)(__rxstatusdesc + 20)) - -#define GET_TX_REPORT_TYPE1_RERTY_0(__paddr) \ - le16_get_bits(*(__le16 *)__paddr, GENMASK(15, 0)) -#define GET_TX_REPORT_TYPE1_RERTY_1(__paddr) \ - LE_BITS_TO_1BYTE(__paddr + 2, 0, 8) -#define GET_TX_REPORT_TYPE1_RERTY_2(__paddr) \ - LE_BITS_TO_1BYTE(__paddr + 3, 0, 8) -#define GET_TX_REPORT_TYPE1_RERTY_3(__paddr) \ - LE_BITS_TO_1BYTE(__paddr + 4, 0, 8) -#define GET_TX_REPORT_TYPE1_RERTY_4(__paddr) \ - LE_BITS_TO_1BYTE(__paddr + 5, 0, 8) -#define GET_TX_REPORT_TYPE1_DROP_0(__paddr) \ - LE_BITS_TO_1BYTE(__paddr + 6, 0, 8) /* End rate adaptive define */ int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm); diff --git a/drivers/staging/r8188eu/include/HalPwrSeqCmd.h b/drivers/staging/r8188eu/include/HalPwrSeqCmd.h index 49c02cce569e..0886300d26bf 100644 --- a/drivers/staging/r8188eu/include/HalPwrSeqCmd.h +++ b/drivers/staging/r8188eu/include/HalPwrSeqCmd.h @@ -6,54 +6,13 @@ #include "drv_types.h" -/*---------------------------------------------*/ -/* 3 The value of cmd: 4 bits */ -/*---------------------------------------------*/ - -#define PWR_CMD_WRITE 0x01 - /* offset: the read register offset */ - /* msk: the mask of the write bits */ - /* value: write value */ - /* note: driver shall implement this cmd by read & msk after write */ - -#define PWR_CMD_POLLING 0x02 - /* offset: the read register offset */ - /* msk: the mask of the polled value */ - /* value: the value to be polled, masked by the msd field. */ - /* note: driver shall implement this cmd by */ - /* do{ */ - /* if ( (Read(offset) & msk) == (value & msk) ) */ - /* break; */ - /* } while (not timeout); */ - -#define PWR_CMD_DELAY 0x03 - /* offset: the value to delay */ - /* msk: N/A */ - /* value: the unit of delay, 0: us, 1: ms */ - -#define PWR_CMD_END 0x04 - /* offset: N/A */ - /* msk: N/A */ - /* value: N/A */ - -enum pwrseq_cmd_delat_unit { - PWRSEQ_DELAY_US, - PWRSEQ_DELAY_MS, -}; - -struct wl_pwr_cfg { - u16 offset; - u8 cmd:4; - u8 msk; - u8 value; +enum r8188eu_pwr_seq { + PWR_ON_FLOW, + DISABLE_FLOW, + LPS_ENTER_FLOW, }; -#define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset -#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd -#define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk -#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value - /* Prototype of protected function. */ -u8 HalPwrSeqCmdParsing(struct adapter *padapter, struct wl_pwr_cfg PwrCfgCmd[]); +u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq); #endif diff --git a/drivers/staging/r8188eu/include/basic_types.h b/drivers/staging/r8188eu/include/basic_types.h deleted file mode 100644 index ffb21170e898..000000000000 --- a/drivers/staging/r8188eu/include/basic_types.h +++ /dev/null @@ -1,52 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -/* Copyright(c) 2007 - 2011 Realtek Corporation. */ - -#ifndef __BASIC_TYPES_H__ -#define __BASIC_TYPES_H__ - -#include <linux/types.h> -#define NDIS_OID uint - -typedef void (*proc_t)(void *); - -#define FIELD_OFFSET(s, field) ((ssize_t)&((s *)(0))->field) - -/* port from fw */ -/* TODO: Macros Below are Sync from SD7-Driver. It is necessary - * to check correctness */ - -/* - * Call endian free function when - * 1. Read/write packet content. - * 2. Before write integer to IO. - * 3. After read integer from IO. -*/ - -/* Convert little data endian to host ordering */ -#define EF1BYTE(_val) \ - ((u8)(_val)) - -/* Create a bit mask */ -#define BIT_LEN_MASK_8(__bitlen) \ - (0xFF >> (8 - (__bitlen))) - -/*Description: - * Return 4-byte value in host byte ordering from - * 4-byte pointer in little-endian system. - */ -#define LE_P1BYTE_TO_HOST_1BYTE(__pstart) \ - (EF1BYTE(*((u8 *)(__pstart)))) - -/*Description: -Translate subfield (continuous bits in little-endian) of 4-byte -value to host byte ordering.*/ -#define LE_BITS_TO_1BYTE(__pstart, __bitoffset, __bitlen) \ - ( \ - (LE_P1BYTE_TO_HOST_1BYTE(__pstart) >> (__bitoffset)) & \ - BIT_LEN_MASK_8(__bitlen) \ - ) - -#define N_BYTE_ALIGMENT(__value, __aligment) ((__aligment == 1) ? \ - (__value) : (((__value + __aligment - 1) / __aligment) * __aligment)) - -#endif /* __BASIC_TYPES_H__ */ diff --git a/drivers/staging/r8188eu/include/hal_com.h b/drivers/staging/r8188eu/include/hal_com.h index 56ba356b5371..d7e333f6ce39 100644 --- a/drivers/staging/r8188eu/include/hal_com.h +++ b/drivers/staging/r8188eu/include/hal_com.h @@ -131,9 +131,6 @@ #define REG_NOA_DESC_START 0x05E8 #define REG_NOA_DESC_COUNT 0x05EC -#include "HalVerDef.h" -void dump_chip_info(struct HAL_VERSION ChipVersion); - /* return the final channel plan decision */ u8 hal_com_get_channel_plan(struct adapter *padapter, u8 hw_channel_plan, diff --git a/drivers/staging/r8188eu/include/hal_intf.h b/drivers/staging/r8188eu/include/hal_intf.h index a56f3d6ca399..ab6856d8a090 100644 --- a/drivers/staging/r8188eu/include/hal_intf.h +++ b/drivers/staging/r8188eu/include/hal_intf.h @@ -8,31 +8,15 @@ #include "drv_types.h" #include "Hal8188EPhyCfg.h" -enum hw_variables { - HW_VAR_SET_OPMODE, - HW_VAR_BASIC_RATE, - HW_VAR_CORRECT_TSF, - HW_VAR_MLME_SITESURVEY, - HW_VAR_SLOT_TIME, - HW_VAR_DM_FLAG, - HW_VAR_DM_FUNC_OP, - HW_VAR_DM_FUNC_RESET, - HW_VAR_DM_FUNC_CLR, - HW_VAR_AMPDU_FACTOR, - HW_VAR_H2C_MEDIA_STATUS_RPT, -}; - typedef s32 (*c2h_id_filter)(u8 id); -#define is_boot_from_eeprom(adapter) (adapter->eeprompriv.EepromOrEfuse) - void rtl8188eu_interface_configure(struct adapter *adapt); void ReadAdapterInfo8188EU(struct adapter *Adapter); void rtl8188eu_init_default_value(struct adapter *adapt); void rtl8188e_SetHalODMVar(struct adapter *Adapter, void *pValue1, bool bSet); u32 rtl8188eu_InitPowerOn(struct adapter *adapt); void rtl8188e_EfusePowerSwitch(struct adapter *pAdapter, u8 PwrState); -void rtl8188e_ReadEFuse(struct adapter *Adapter, u16 _offset, u16 _size_byte, u8 *pbuf); +void rtl8188e_ReadEFuse(struct adapter *Adapter, u16 _size_byte, u8 *pbuf); void hal_notch_filter_8188e(struct adapter *adapter, bool enable); @@ -44,8 +28,6 @@ int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter, unsigned int rtl8188eu_inirp_init(struct adapter *Adapter); -void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val); - uint rtw_hal_init(struct adapter *padapter); uint rtw_hal_deinit(struct adapter *padapter); void rtw_hal_stop(struct adapter *padapter); diff --git a/drivers/staging/r8188eu/include/ieee80211.h b/drivers/staging/r8188eu/include/ieee80211.h index 15636a808f52..e7a4f8af497a 100644 --- a/drivers/staging/r8188eu/include/ieee80211.h +++ b/drivers/staging/r8188eu/include/ieee80211.h @@ -624,13 +624,6 @@ enum _PUBLIC_ACTION { ACT_PUBLIC_MAX }; -/* BACK action code */ -enum rtw_ieee80211_back_actioncode { - RTW_WLAN_ACTION_ADDBA_REQ = 0, - RTW_WLAN_ACTION_ADDBA_RESP = 1, - RTW_WLAN_ACTION_DELBA = 2, -}; - #define OUI_MICROSOFT 0x0050f2 /* Microsoft (also used in Wi-Fi specs) * 00:50:F2 */ #define WME_OUI_TYPE 2 diff --git a/drivers/staging/r8188eu/include/osdep_service.h b/drivers/staging/r8188eu/include/osdep_service.h index f1a703643e74..72990a1cdc66 100644 --- a/drivers/staging/r8188eu/include/osdep_service.h +++ b/drivers/staging/r8188eu/include/osdep_service.h @@ -5,7 +5,6 @@ #define __OSDEP_SERVICE_H_ #include <linux/sched/signal.h> -#include "basic_types.h" #define _FAIL 0 #define _SUCCESS 1 @@ -77,8 +76,6 @@ void *rtw_malloc2d(int h, int w, int size); spin_lock_init(&((q)->lock)); \ } while (0) -void rtw_usleep_os(int us); - static inline unsigned char _cancel_timer_ex(struct timer_list *ptimer) { return del_timer_sync(ptimer); diff --git a/drivers/staging/r8188eu/include/rtl8188e_hal.h b/drivers/staging/r8188eu/include/rtl8188e_hal.h index d2a069d4e1cc..5cd62b216720 100644 --- a/drivers/staging/r8188eu/include/rtl8188e_hal.h +++ b/drivers/staging/r8188eu/include/rtl8188e_hal.h @@ -26,11 +26,6 @@ #include "odm_RegConfig8188E.h" #include "odm_RTL8188E.h" -/* RTL8188E Power Configuration CMDs for USB/SDIO interfaces */ -#define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow -#define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow -#define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow - #define DRVINFO_SZ 4 /* unit is 8bytes */ #define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len) & 0x7F ? 1 : 0)) diff --git a/drivers/staging/r8188eu/include/rtl8188e_spec.h b/drivers/staging/r8188eu/include/rtl8188e_spec.h index ef42c4b2f20c..9e7b1f89037c 100644 --- a/drivers/staging/r8188eu/include/rtl8188e_spec.h +++ b/drivers/staging/r8188eu/include/rtl8188e_spec.h @@ -9,7 +9,6 @@ #define HAL_PS_TIMER_INT_DELAY 50 /* 50 microseconds */ #define HAL_92C_NAV_UPPER_UNIT 128 /* micro-second */ -#define MAC_ADDR_LEN 6 /* 8188E PKT_BUFF_ACCESS_CTRL value */ #define TXPKT_BUF_SELECT 0x69 #define RXPKT_BUF_SELECT 0xA5 @@ -427,12 +426,6 @@ #define MAX_MSS_DENSITY_2T 0x13 #define MAX_MSS_DENSITY_1T 0x0A -/* EEPROM enable when set 1 */ -#define CmdEEPROM_En BIT(5) -/* System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is 9346 */ -#define CmdEERPOMSEL BIT(4) -#define Cmd9346CR_9356SEL BIT(4) - /* 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) */ #define GPIOSEL_GPIO 0 #define GPIOSEL_ENBT BIT(5) @@ -1059,142 +1052,6 @@ Current IOREG MAP #define SCR_TXBCUSEDK BIT(6) /* Force Tx Bcast pkt Use Default Key */ #define SCR_RXBCUSEDK BIT(7) /* Force Rx Bcast pkt Use Default Key */ -/* RTL8188E SDIO Configuration */ - -/* I/O bus domain address mapping */ -#define SDIO_LOCAL_BASE 0x10250000 -#define WLAN_IOREG_BASE 0x10260000 -#define FIRMWARE_FIFO_BASE 0x10270000 -#define TX_HIQ_BASE 0x10310000 -#define TX_MIQ_BASE 0x10320000 -#define TX_LOQ_BASE 0x10330000 -#define RX_RX0FF_BASE 0x10340000 - -/* SDIO host local register space mapping. */ -#define SDIO_LOCAL_MSK 0x0FFF -#define WLAN_IOREG_MSK 0x7FFF -#define WLAN_FIFO_MSK 0x1FFF /* Aggregation Length[12:0] */ -#define WLAN_RX0FF_MSK 0x0003 - -/* Without ref to the SDIO Device ID */ -#define SDIO_WITHOUT_REF_DEVICE_ID 0 -#define SDIO_LOCAL_DEVICE_ID 0 /* 0b[16], 000b[15:13] */ -#define WLAN_TX_HIQ_DEVICE_ID 4 /* 0b[16], 100b[15:13] */ -#define WLAN_TX_MIQ_DEVICE_ID 5 /* 0b[16], 101b[15:13] */ -#define WLAN_TX_LOQ_DEVICE_ID 6 /* 0b[16], 110b[15:13] */ -#define WLAN_RX0FF_DEVICE_ID 7 /* 0b[16], 111b[15:13] */ -#define WLAN_IOREG_DEVICE_ID 8 /* 1b[16] */ - -/* SDIO Tx Free Page Index */ -#define HI_QUEUE_IDX 0 -#define MID_QUEUE_IDX 1 -#define LOW_QUEUE_IDX 2 -#define PUBLIC_QUEUE_IDX 3 - -#define SDIO_MAX_TX_QUEUE 3 /* HIQ, MIQ and LOQ */ -#define SDIO_MAX_RX_QUEUE 1 - -/* SDIO Tx Control */ -#define SDIO_REG_TX_CTRL 0x0000 -/* SDIO Host Interrupt Mask */ -#define SDIO_REG_HIMR 0x0014 -/* SDIO Host Interrupt Service Routine */ -#define SDIO_REG_HISR 0x0018 -/* HCI Current Power Mode */ -#define SDIO_REG_HCPWM 0x0019 -/* RXDMA Request Length */ -#define SDIO_REG_RX0_REQ_LEN 0x001C -/* Free Tx Buffer Page */ -#define SDIO_REG_FREE_TXPG 0x0020 -/* HCI Current Power Mode 1 */ -#define SDIO_REG_HCPWM1 0x0024 -/* HCI Current Power Mode 2 */ -#define SDIO_REG_HCPWM2 0x0026 -/* HTSF Informaion */ -#define SDIO_REG_HTSFR_INFO 0x0030 -/* HCI Request Power Mode 1 */ -#define SDIO_REG_HRPWM1 0x0080 -/* HCI Request Power Mode 2 */ -#define SDIO_REG_HRPWM2 0x0082 -/* HCI Power Save Clock */ -#define SDIO_REG_HPS_CLKR 0x0084 -/* SDIO HCI Suspend Control */ -#define SDIO_REG_HSUS_CTRL 0x0086 -/* SDIO Host Extension Interrupt Mask Always */ -#define SDIO_REG_HIMR_ON 0x0090 -/* SDIO Host Extension Interrupt Status Always */ -#define SDIO_REG_HISR_ON 0x0091 - -#define SDIO_HIMR_DISABLED 0 - -/* RTL8188E SDIO Host Interrupt Mask Register */ -#define SDIO_HIMR_RX_REQUEST_MSK BIT(0) -#define SDIO_HIMR_AVAL_MSK BIT(1) -#define SDIO_HIMR_TXERR_MSK BIT(2) -#define SDIO_HIMR_RXERR_MSK BIT(3) -#define SDIO_HIMR_TXFOVW_MSK BIT(4) -#define SDIO_HIMR_RXFOVW_MSK BIT(5) -#define SDIO_HIMR_TXBCNOK_MSK BIT(6) -#define SDIO_HIMR_TXBCNERR_MSK BIT(7) -#define SDIO_HIMR_BCNERLY_INT_MSK BIT(16) -#define SDIO_HIMR_C2HCMD_MSK BIT(17) -#define SDIO_HIMR_CPWM1_MSK BIT(18) -#define SDIO_HIMR_CPWM2_MSK BIT(19) -#define SDIO_HIMR_HSISR_IND_MSK BIT(20) -#define SDIO_HIMR_GTINT3_IND_MSK BIT(21) -#define SDIO_HIMR_GTINT4_IND_MSK BIT(22) -#define SDIO_HIMR_PSTIMEOUT_MSK BIT(23) -#define SDIO_HIMR_OCPINT_MSK BIT(24) -#define SDIO_HIMR_ATIMEND_MSK BIT(25) -#define SDIO_HIMR_ATIMEND_E_MSK BIT(26) -#define SDIO_HIMR_CTWEND_MSK BIT(27) - -/* RTL8188E SDIO Specific */ -#define SDIO_HIMR_MCU_ERR_MSK BIT(28) -#define SDIO_HIMR_TSF_BIT32_TOGGLE_MSK BIT(29) - -/* SDIO Host Interrupt Service Routine */ -#define SDIO_HISR_RX_REQUEST BIT(0) -#define SDIO_HISR_AVAL BIT(1) -#define SDIO_HISR_TXERR BIT(2) -#define SDIO_HISR_RXERR BIT(3) -#define SDIO_HISR_TXFOVW BIT(4) -#define SDIO_HISR_RXFOVW BIT(5) -#define SDIO_HISR_TXBCNOK BIT(6) -#define SDIO_HISR_TXBCNERR BIT(7) -#define SDIO_HISR_BCNERLY_INT BIT(16) -#define SDIO_HISR_C2HCMD BIT(17) -#define SDIO_HISR_CPWM1 BIT(18) -#define SDIO_HISR_CPWM2 BIT(19) -#define SDIO_HISR_HSISR_IND BIT(20) -#define SDIO_HISR_GTINT3_IND BIT(21) -#define SDIO_HISR_GTINT4_IND BIT(22) -#define SDIO_HISR_PSTIME BIT(23) -#define SDIO_HISR_OCPINT BIT(24) -#define SDIO_HISR_ATIMEND BIT(25) -#define SDIO_HISR_ATIMEND_E BIT(26) -#define SDIO_HISR_CTWEND BIT(27) - -/* RTL8188E SDIO Specific */ -#define SDIO_HISR_MCU_ERR BIT(28) -#define SDIO_HISR_TSF_BIT32_TOGGLE BIT(29) - -#define MASK_SDIO_HISR_CLEAR \ - (SDIO_HISR_TXERR | SDIO_HISR_RXERR | SDIO_HISR_TXFOVW |\ - SDIO_HISR_RXFOVW | SDIO_HISR_TXBCNOK | SDIO_HISR_TXBCNERR |\ - SDIO_HISR_C2HCMD | SDIO_HISR_CPWM1 | SDIO_HISR_CPWM2 |\ - SDIO_HISR_HSISR_IND | SDIO_HISR_GTINT3_IND | SDIO_HISR_GTINT4_IND |\ - SDIO_HISR_PSTIMEOUT | SDIO_HISR_OCPINT) - -/* SDIO HCI Suspend Control Register */ -#define HCI_RESUME_PWR_RDY BIT(1) -#define HCI_SUS_CTRL BIT(0) - -/* SDIO Tx FIFO related */ -/* The number of Tx FIFO free page */ -#define SDIO_TX_FREE_PG_QUEUE 4 -#define SDIO_TX_FIFO_PAGE_SZ 128 - /* 0xFE00h ~ 0xFE55h USB Configuration */ /* 2 USB Information (0xFE17) */ diff --git a/drivers/staging/r8188eu/include/rtw_eeprom.h b/drivers/staging/r8188eu/include/rtw_eeprom.h index d8d48ace356c..94d735b1d0db 100644 --- a/drivers/staging/r8188eu/include/rtw_eeprom.h +++ b/drivers/staging/r8188eu/include/rtw_eeprom.h @@ -7,19 +7,9 @@ #include "osdep_service.h" #include "drv_types.h" -#define HWSET_MAX_SIZE_512 512 - struct eeprom_priv { u8 bautoload_fail_flag; u8 mac_addr[ETH_ALEN] __aligned(2); /* PermanentAddress */ - u8 EepromOrEfuse; - u8 efuse_eeprom_data[HWSET_MAX_SIZE_512] __aligned(4); }; -void eeprom_write16(struct adapter *padapter, u16 reg, u16 data); -u16 eeprom_read16(struct adapter *padapter, u16 reg); -void read_eeprom_content(struct adapter *padapter); -void eeprom_read_sz(struct adapter *adapt, u16 reg, u8 *data, u32 sz); -void read_eeprom_content_by_attrib(struct adapter *padapter); - #endif /* __RTL871X_EEPROM_H__ */ diff --git a/drivers/staging/r8188eu/include/rtw_efuse.h b/drivers/staging/r8188eu/include/rtw_efuse.h index 2daf69f554d5..3d688a0e6dfb 100644 --- a/drivers/staging/r8188eu/include/rtw_efuse.h +++ b/drivers/staging/r8188eu/include/rtw_efuse.h @@ -8,6 +8,4 @@ void ReadEFuseByte(struct adapter *adapter, u16 _offset, u8 *pbuf); -void EFUSE_ShadowMapUpdate(struct adapter *adapter); - #endif diff --git a/drivers/staging/r8188eu/include/rtw_io.h b/drivers/staging/r8188eu/include/rtw_io.h index 6910e2b430e2..925c7967ac04 100644 --- a/drivers/staging/r8188eu/include/rtw_io.h +++ b/drivers/staging/r8188eu/include/rtw_io.h @@ -220,9 +220,9 @@ void unregister_intf_hdl(struct intf_hdl *pintfhdl); void _rtw_attrib_read(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem); void _rtw_attrib_write(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem); -u8 rtw_read8(struct adapter *adapter, u32 addr); -u16 rtw_read16(struct adapter *adapter, u32 addr); -u32 rtw_read32(struct adapter *adapter, u32 addr); +int __must_check rtw_read8(struct adapter *adapter, u32 addr, u8 *data); +int __must_check rtw_read16(struct adapter *adapter, u32 addr, u16 *data); +int __must_check rtw_read32(struct adapter *adapter, u32 addr, u32 *data); void _rtw_read_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem); u32 rtw_read_port(struct adapter *adapter, u8 *pmem); void rtw_read_port_cancel(struct adapter *adapter); @@ -283,7 +283,7 @@ void free_io_queue(struct adapter *adapter); void async_bus_io(struct io_queue *pio_q); void bus_sync_io(struct io_queue *pio_q); u32 _ioreq2rwmem(struct io_queue *pio_q); -void dev_power_down(struct adapter * Adapter, u8 bpwrup); +void dev_power_down(struct adapter *Adapter, u8 bpwrup); #define PlatformEFIOWrite1Byte(_a,_b,_c) \ rtw_write8(_a,_b,_c) diff --git a/drivers/staging/r8188eu/include/rtw_iol.h b/drivers/staging/r8188eu/include/rtw_iol.h index fb88ebc1dabb..099f5a075274 100644 --- a/drivers/staging/r8188eu/include/rtw_iol.h +++ b/drivers/staging/r8188eu/include/rtw_iol.h @@ -41,22 +41,14 @@ int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame); void read_efuse_from_txpktbuf(struct adapter *adapter, int bcnhead, u8 *content, u16 *size); -int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, - u8 value, u8 mask); -int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, - u16 value, u16 mask); -int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, - u32 value, u32 mask); -int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path, - u16 addr, u32 value, u32 mask); -#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value, mask) \ - _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value) ,(mask)) -#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value, mask) \ - _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value),(mask)) -#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value, mask) \ - _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value), (mask)) -#define rtw_IOL_append_WRF_cmd(xmit_frame, rf_path, addr, value, mask) \ - _rtw_IOL_append_WRF_cmd((xmit_frame),(rf_path), (addr), (value), (mask)) +int rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, + u8 value, u8 mask); +int rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, + u16 value, u16 mask); +int rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, + u32 value, u32 mask); +int rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path, + u16 addr, u32 value, u32 mask); u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame); diff --git a/drivers/staging/r8188eu/include/rtw_led.h b/drivers/staging/r8188eu/include/rtw_led.h index 2c14cb23d9ad..d6b0c1c2f9a2 100644 --- a/drivers/staging/r8188eu/include/rtw_led.h +++ b/drivers/staging/r8188eu/include/rtw_led.h @@ -37,9 +37,11 @@ enum LED_STATE_871x { LED_BLINK_RUNTOP = 13, /* Customized for RunTop */ }; -struct LED_871x { +struct led_priv { struct adapter *padapter; + bool bRegUseLed; + enum LED_STATE_871x CurrLedState; /* Current LED state. */ enum LED_STATE_871x BlinkingLedState; /* Next state for blinking, * either RTW_LED_ON or RTW_LED_OFF are. */ @@ -58,11 +60,6 @@ struct LED_871x { struct delayed_work blink_work; }; -struct led_priv{ - struct LED_871x SwLed0; - bool bRegUseLed; -}; - void rtl8188eu_InitSwLeds(struct adapter *padapter); void rtl8188eu_DeInitSwLeds(struct adapter *padapter); diff --git a/drivers/staging/r8188eu/include/rtw_mlme_ext.h b/drivers/staging/r8188eu/include/rtw_mlme_ext.h index 573d65b175cc..343ce1ce4b3d 100644 --- a/drivers/staging/r8188eu/include/rtw_mlme_ext.h +++ b/drivers/staging/r8188eu/include/rtw_mlme_ext.h @@ -424,6 +424,9 @@ void invalidate_cam_all(struct adapter *padapter); int allocate_fw_sta_entry(struct adapter *padapter); void flush_all_cam_entry(struct adapter *padapter); +void rtw_mlme_under_site_survey(struct adapter *adapter); +void rtw_mlme_site_survey_done(struct adapter *adapter); + void site_survey(struct adapter *padapter); u8 collect_bss_info(struct adapter *padapter, struct recv_frame *precv_frame, struct wlan_bssid_ex *bssid); @@ -455,6 +458,7 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len); void update_IOT_info(struct adapter *padapter); void update_capinfo(struct adapter *adapter, u16 updatecap); void update_wireless_mode(struct adapter *padapter); +void rtw_set_basic_rate(struct adapter *adapter, u8 *rates); void update_tx_basic_rate(struct adapter *padapter, u8 modulation); void update_bmc_sta_support_rate(struct adapter *padapter, u32 mac_id); int update_sta_support_rate(struct adapter *padapter, u8 *pvar_ie, @@ -468,8 +472,7 @@ unsigned int update_MSC_rate(struct HT_caps_element *pHT_caps); void Update_RA_Entry(struct adapter *padapter, u32 mac_id); void set_sta_rate(struct adapter *padapter, struct sta_info *psta); -unsigned int receive_disconnect(struct adapter *padapter, - unsigned char *macaddr, unsigned short reason); +void receive_disconnect(struct adapter *padapter, unsigned char *macaddr, unsigned short reason); unsigned char get_highest_rate_idx(u32 mask); int support_short_GI(struct adapter *padapter, struct HT_caps_element *caps); @@ -524,12 +527,13 @@ int issue_deauth(struct adapter *padapter, unsigned char *da, unsigned short reason); int issue_deauth_ex(struct adapter *padapter, u8 *da, unsigned short reason, int try_cnt, int wait_ms); -void issue_action_BA(struct adapter *padapter, unsigned char *raddr, - unsigned char action, unsigned short status); +void issue_action_BA(struct adapter *padapter, unsigned char *raddr, u8 action, u16 status); unsigned int send_delba(struct adapter *padapter, u8 initiator, u8 *addr); unsigned int send_beacon(struct adapter *padapter); bool get_beacon_valid_bit(struct adapter *adapter); void clear_beacon_valid_bit(struct adapter *adapter); +void rtw_resume_tx_beacon(struct adapter *adapt); +void rtw_stop_tx_beacon(struct adapter *adapt); void start_clnt_assoc(struct adapter *padapter); void start_clnt_auth(struct adapter *padapter); @@ -544,12 +548,8 @@ unsigned int OnProbeReq(struct adapter *padapter, struct recv_frame *precv_frame); unsigned int OnProbeRsp(struct adapter *padapter, struct recv_frame *precv_frame); -unsigned int DoReserved(struct adapter *padapter, - struct recv_frame *precv_frame); unsigned int OnBeacon(struct adapter *padapter, struct recv_frame *precv_frame); -unsigned int OnAtim(struct adapter *padapter, - struct recv_frame *precv_frame); unsigned int OnDisassoc(struct adapter *padapter, struct recv_frame *precv_frame); unsigned int OnAuth(struct adapter *padapter, @@ -592,9 +592,6 @@ void addba_timer_hdl(struct sta_info *psta); bool cckrates_included(unsigned char *rate, int ratelen); bool cckratesonly_included(unsigned char *rate, int ratelen); -void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len); -void correct_TSF(struct adapter *padapter, struct mlme_ext_priv *pmlmeext); - struct cmd_hdl { uint parmsize; u8 (*h2cfuns)(struct adapter *padapter, u8 *pbuf); diff --git a/drivers/staging/r8188eu/include/usb_ops_linux.h b/drivers/staging/r8188eu/include/usb_ops_linux.h index 641f059ffaf7..966688eedf66 100644 --- a/drivers/staging/r8188eu/include/usb_ops_linux.h +++ b/drivers/staging/r8188eu/include/usb_ops_linux.h @@ -26,6 +26,4 @@ #define usb_read_interrupt_complete(purb, regs) \ usb_read_interrupt_complete(purb) -unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr); - #endif |