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-rw-r--r--include/media/tvp7002.h46
1 files changed, 22 insertions, 24 deletions
diff --git a/include/media/tvp7002.h b/include/media/tvp7002.h
index ee4353459ef5..fadb6afe9ef0 100644
--- a/include/media/tvp7002.h
+++ b/include/media/tvp7002.h
@@ -26,31 +26,29 @@
#ifndef _TVP7002_H_
#define _TVP7002_H_
-/* Platform-dependent data
- *
- * clk_polarity:
- * 0 -> data clocked out on rising edge of DATACLK signal
- * 1 -> data clocked out on falling edge of DATACLK signal
- * hs_polarity:
- * 0 -> active low HSYNC output
- * 1 -> active high HSYNC output
- * sog_polarity:
- * 0 -> normal operation
- * 1 -> operation with polarity inverted
- * vs_polarity:
- * 0 -> active low VSYNC output
- * 1 -> active high VSYNC output
- * fid_polarity:
- * 0 -> the field ID output is set to logic 1 for an odd
- * field (field 1) and set to logic 0 for an even
- * field (field 0).
- * 1 -> operation with polarity inverted.
+#define TVP7002_MODULE_NAME "tvp7002"
+
+/**
+ * struct tvp7002_config - Platform dependent data
+ *@clk_polarity: Clock polarity
+ * 0 - Data clocked out on rising edge of DATACLK signal
+ * 1 - Data clocked out on falling edge of DATACLK signal
+ *@hs_polarity: HSYNC polarity
+ * 0 - Active low HSYNC output, 1 - Active high HSYNC output
+ *@vs_polarity: VSYNC Polarity
+ * 0 - Active low VSYNC output, 1 - Active high VSYNC output
+ *@fid_polarity: Active-high Field ID polarity.
+ * 0 - The field ID output is set to logic 1 for an odd field
+ * (field 1) and set to logic 0 for an even field (field 0).
+ * 1 - Operation with polarity inverted.
+ *@sog_polarity: Active high Sync on Green output polarity.
+ * 0 - Normal operation, 1 - Operation with polarity inverted
*/
struct tvp7002_config {
- u8 clk_polarity;
- u8 hs_polarity;
- u8 vs_polarity;
- u8 fid_polarity;
- u8 sog_polarity;
+ bool clk_polarity;
+ bool hs_polarity;
+ bool vs_polarity;
+ bool fid_polarity;
+ bool sog_polarity;
};
#endif