diff options
Diffstat (limited to 'sound/soc')
58 files changed, 40399 insertions, 420 deletions
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 1743d565e996..eb1d7b3e49a2 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -34,6 +34,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_TPA6130A2 if I2C select SND_SOC_TLV320DAC33 if I2C select SND_SOC_TWL4030 if TWL4030_CORE + select SND_SOC_ABE_TWL6040 if TWL4030_CORE select SND_SOC_UDA134X select SND_SOC_UDA1380 if I2C select SND_SOC_WM2000 if I2C @@ -164,6 +165,9 @@ config SND_SOC_TWL4030 select TWL4030_CODEC tristate +config SND_SOC_ABE_TWL6040 + tristate + config SND_SOC_UDA134X tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index dd5ce6df6292..c1491b769d4a 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -21,6 +21,7 @@ snd-soc-tlv320aic26-objs := tlv320aic26.o snd-soc-tlv320aic3x-objs := tlv320aic3x.o snd-soc-tlv320dac33-objs := tlv320dac33.o snd-soc-twl4030-objs := twl4030.o +snd-soc-abe-twl6040-objs := abe-twl6040.o snd-soc-uda134x-objs := uda134x.o snd-soc-uda1380-objs := uda1380.o snd-soc-wm8350-objs := wm8350.o @@ -83,6 +84,7 @@ obj-$(CONFIG_SND_SOC_TLV320AIC26) += snd-soc-tlv320aic26.o obj-$(CONFIG_SND_SOC_TLV320AIC3X) += snd-soc-tlv320aic3x.o obj-$(CONFIG_SND_SOC_TLV320DAC33) += snd-soc-tlv320dac33.o obj-$(CONFIG_SND_SOC_TWL4030) += snd-soc-twl4030.o +obj-$(CONFIG_SND_SOC_ABE_TWL6040) += snd-soc-abe-twl6040.o abe/ obj-$(CONFIG_SND_SOC_UDA134X) += snd-soc-uda134x.o obj-$(CONFIG_SND_SOC_UDA1380) += snd-soc-uda1380.o obj-$(CONFIG_SND_SOC_WM8350) += snd-soc-wm8350.o diff --git a/sound/soc/codecs/abe-twl6040.c b/sound/soc/codecs/abe-twl6040.c new file mode 100644 index 000000000000..65027d43c9c4 --- /dev/null +++ b/sound/soc/codecs/abe-twl6040.c @@ -0,0 +1,2130 @@ +/* + * ALSA SoC ABE-TWL6040 codec driver + * + * Author: Misael Lopez Cruz <x0052729@ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/pm.h> +#include <linux/i2c.h> +#include <linux/gpio.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/i2c/twl.h> +#include <linux/clk.h> +#include <linux/pm_runtime.h> + +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/initval.h> +#include <sound/tlv.h> + +#include "twl6040.h" +#include "abe-twl6040.h" +#include "abe/abe_main.h" + +#define ABE_FORMATS (SNDRV_PCM_FMTBIT_S32_LE) + +struct twl6040_jack_data { + struct snd_soc_jack *jack; + int report; +}; + +/* codec private data */ +struct twl6040_data { + struct snd_soc_codec codec; + int audpwron; + int naudint; + struct twl6040_jack_data hs_jack; + int codec_powered; + int pll; + int non_lp; + unsigned int sysclk; + struct snd_pcm_hw_constraint_list *sysclk_constraints; + struct completion ready; + int configure; + int mcpdm_dl_enable; + int mcpdm_ul_enable; + struct clk *clk; +}; + +/* + * twl6040 register cache & default register settings + */ +static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = { + 0x00, /* not used 0x00 */ + 0x4B, /* TWL6040_ASICID (ro) 0x01 */ + 0x00, /* TWL6040_ASICREV (ro) 0x02 */ + 0x00, /* TWL6040_INTID 0x03 */ + 0x00, /* TWL6040_INTMR 0x04 */ + 0x00, /* TWL6040_NCPCTRL 0x05 */ + 0x00, /* TWL6040_LDOCTL 0x06 */ + 0x60, /* TWL6040_HPPLLCTL 0x07 */ + 0x00, /* TWL6040_LPPLLCTL 0x08 */ + 0x4A, /* TWL6040_LPPLLDIV 0x09 */ + 0x00, /* TWL6040_AMICBCTL 0x0A */ + 0x00, /* TWL6040_DMICBCTL 0x0B */ + 0x18, /* TWL6040_MICLCTL 0x0C - No input selected on Left Mic */ + 0x18, /* TWL6040_MICRCTL 0x0D - No input selected on Right Mic */ + 0x00, /* TWL6040_MICGAIN 0x0E */ + 0x1B, /* TWL6040_LINEGAIN 0x0F */ + 0x00, /* TWL6040_HSLCTL 0x10 */ + 0x00, /* TWL6040_HSRCTL 0x11 */ + 0xFF, /* TWL6040_HSGAIN 0x12 */ + 0x1E, /* TWL6040_EARCTL 0x13 */ + 0x00, /* TWL6040_HFLCTL 0x14 */ + 0x1D, /* TWL6040_HFLGAIN 0x15 */ + 0x00, /* TWL6040_HFRCTL 0x16 */ + 0x1D, /* TWL6040_HFRGAIN 0x17 */ + 0x00, /* TWL6040_VIBCTLL 0x18 */ + 0x00, /* TWL6040_VIBDATL 0x19 */ + 0x00, /* TWL6040_VIBCTLR 0x1A */ + 0x00, /* TWL6040_VIBDATR 0x1B */ + 0x00, /* TWL6040_HKCTL1 0x1C */ + 0x00, /* TWL6040_HKCTL2 0x1D */ + 0x02, /* TWL6040_GPOCTL 0x1E */ + 0x00, /* TWL6040_ALB 0x1F */ + 0x00, /* TWL6040_DLB 0x20 */ + 0x00, /* not used 0x21 */ + 0x00, /* not used 0x22 */ + 0x00, /* not used 0x23 */ + 0x00, /* not used 0x24 */ + 0x00, /* not used 0x25 */ + 0x00, /* not used 0x26 */ + 0x00, /* not used 0x27 */ + 0x00, /* TWL6040_TRIM1 0x28 */ + 0x00, /* TWL6040_TRIM2 0x29 */ + 0x00, /* TWL6040_TRIM3 0x2A */ + 0x00, /* TWL6040_HSOTRIM 0x2B */ + 0x00, /* TWL6040_HFOTRIM 0x2C */ + 0x09, /* TWL6040_ACCCTL 0x2D */ + 0x00, /* TWL6040_STATUS (ro) 0x2E */ + 0x00, /* TWL6040_SHADOW 0x2F */ +}; + +/* + * twl6040 vio/gnd registers: + * registers under vio/gnd supply can be accessed + * before the power-up sequence, after NRESPWRON goes high + */ +static const int twl6040_vio_reg[TWL6040_VIOREGNUM] = { + TWL6040_REG_ASICID, + TWL6040_REG_ASICREV, + TWL6040_REG_INTID, + TWL6040_REG_INTMR, + TWL6040_REG_NCPCTL, + TWL6040_REG_LDOCTL, + TWL6040_REG_AMICBCTL, + TWL6040_REG_DMICBCTL, + TWL6040_REG_HKCTL1, + TWL6040_REG_HKCTL2, + TWL6040_REG_GPOCTL, + TWL6040_REG_TRIM1, + TWL6040_REG_TRIM2, + TWL6040_REG_TRIM3, + TWL6040_REG_HSOTRIM, + TWL6040_REG_HFOTRIM, + TWL6040_REG_ACCCTL, + TWL6040_REG_STATUS, +}; + +/* + * twl6040 vdd/vss registers: + * registers under vdd/vss supplies can only be accessed + * after the power-up sequence + */ +static const int twl6040_vdd_reg[TWL6040_VDDREGNUM] = { + TWL6040_REG_HPPLLCTL, + TWL6040_REG_LPPLLCTL, + TWL6040_REG_LPPLLDIV, + TWL6040_REG_MICLCTL, + TWL6040_REG_MICRCTL, + TWL6040_REG_MICGAIN, + TWL6040_REG_LINEGAIN, + TWL6040_REG_HSLCTL, + TWL6040_REG_HSRCTL, + TWL6040_REG_HSGAIN, + TWL6040_REG_EARCTL, + TWL6040_REG_HFLCTL, + TWL6040_REG_HFLGAIN, + TWL6040_REG_HFRCTL, + TWL6040_REG_HFRGAIN, + TWL6040_REG_VIBCTLL, + TWL6040_REG_VIBDATL, + TWL6040_REG_VIBCTLR, + TWL6040_REG_VIBDATR, + TWL6040_REG_ALB, + TWL6040_REG_DLB, +}; + +/* + * read twl6040 register cache + */ +static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec, + unsigned int reg) +{ + u8 *cache = codec->reg_cache; + + if (reg >= TWL6040_CACHEREGNUM) + return -EIO; + + return cache[reg]; +} + +/* + * write twl6040 register cache + */ +static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec, + u8 reg, u8 value) +{ + u8 *cache = codec->reg_cache; + + if (reg >= TWL6040_CACHEREGNUM) + return; + cache[reg] = value; +} + +/* + * read from twl6040 hardware register + */ +static int twl6040_read_reg_volatile(struct snd_soc_codec *codec, + unsigned int reg) +{ + u8 value; + + if (reg >= TWL6040_CACHEREGNUM) + return -EIO; + + if (likely(reg < TWL6040_REG_SHADOW)) { + twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &value, reg); + twl6040_write_reg_cache(codec, reg, value); + return value; + } else { + return twl6040_read_reg_cache(codec, reg); + } +} + +/* + * write to the twl6040 register space + */ +static int twl6040_write(struct snd_soc_codec *codec, + unsigned int reg, unsigned int value) +{ + if (reg >= TWL6040_CACHEREGNUM) + return -EIO; + + twl6040_write_reg_cache(codec, reg, value); + if (likely(reg < TWL6040_REG_SHADOW)) + return twl_i2c_write_u8(TWL_MODULE_AUDIO_VOICE, value, reg); + else + return 0; +} + +static void twl6040_init_vio_regs(struct snd_soc_codec *codec) +{ + u8 *cache = codec->reg_cache; + int reg, i; + + /* allow registers to be accessed by i2c */ + twl6040_write(codec, TWL6040_REG_ACCCTL, cache[TWL6040_REG_ACCCTL]); + + for (i = 0; i < TWL6040_VIOREGNUM; i++) { + reg = twl6040_vio_reg[i]; + /* skip read-only registers (ASICID, ASICREV, STATUS) */ + switch (reg) { + case TWL6040_REG_ASICID: + case TWL6040_REG_ASICREV: + case TWL6040_REG_STATUS: + continue; + default: + break; + } + twl6040_write(codec, reg, cache[reg]); + } +} + +static void twl6040_init_vdd_regs(struct snd_soc_codec *codec) +{ + u8 *cache = codec->reg_cache; + int reg, i; + + for (i = 0; i < TWL6040_VDDREGNUM; i++) { + reg = twl6040_vdd_reg[i]; + twl6040_write(codec, reg, cache[reg]); + } +} + +static void abe_init_chip(struct snd_soc_codec *codec, + struct platform_device *pdev) +{ + struct twl4030_codec_data *pdata = codec->dev->platform_data; + abe_opp_t OPP = ABE_OPP100; + abe_equ_t dl2_eq; + const abe_int32 DL2_COEF [25] = { + -7554223, 708210, -708206, 7554225, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 6802833, -682266, 731554 + }; + dl2_eq.equ_length = 25; + + /* build the coefficient parameter for the equalizer api */ + memcpy(dl2_eq.coef.type1, DL2_COEF, sizeof(DL2_COEF)); + + abe_init_mem(); + /* aess_clk has to be enabled to access hal register. + * Disabel the clk after it has been used. + */ + pm_runtime_get_sync(&pdev->dev); +#ifndef CONFIG_PM_RUNTIME + if (pdata->device_enable) + pdata->device_enable(pdev); +#endif + + abe_reset_hal(); + abe_load_fw(); + /* Config OPP 100 for now */ + abe_set_opp_processing(OPP); + /* "tick" of the audio engine */ + abe_write_event_generator(EVENT_TIMER); + + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_0MS, MIX_DL1_INPUT_MM_DL); + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_0MS, MIX_DL1_INPUT_MM_UL2); + abe_write_mixer(MIXDL1, GAIN_M6dB, RAMP_0MS, MIX_DL1_INPUT_VX_DL); + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_0MS, MIX_DL1_INPUT_TONES); + + abe_write_mixer(MIXDL2, GAIN_M6dB, RAMP_0MS, MIX_DL2_INPUT_TONES); + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_0MS, MIX_DL2_INPUT_VX_DL); + abe_write_mixer(MIXDL2, GAIN_M6dB, RAMP_0MS, MIX_DL2_INPUT_MM_DL); + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_0MS, MIX_DL2_INPUT_MM_UL2); + + abe_write_mixer(MIXSDT, MUTE_GAIN, RAMP_0MS, MIX_SDT_INPUT_UP_MIXER); + abe_write_mixer(MIXSDT, GAIN_M6dB, RAMP_0MS, MIX_SDT_INPUT_DL1_MIXER); + + abe_write_mixer(MIXECHO, MUTE_GAIN, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_mixer(MIXECHO, MUTE_GAIN, RAMP_0MS, GAIN_RIGHT_OFFSET); + + abe_write_mixer(MIXAUDUL, MUTE_GAIN, RAMP_0MS, MIX_AUDUL_INPUT_TONES); + abe_write_mixer(MIXAUDUL, GAIN_M6dB, RAMP_0MS, MIX_AUDUL_INPUT_UPLINK); + abe_write_mixer(MIXAUDUL, MUTE_GAIN, RAMP_0MS, MIX_AUDUL_INPUT_MM_DL); + abe_write_mixer(MIXAUDUL, MUTE_GAIN, RAMP_0MS, MIX_AUDUL_INPUT_VX_DL); + + abe_write_mixer(MIXVXREC, MUTE_GAIN, RAMP_0MS, MIX_VXREC_INPUT_TONES); + abe_write_mixer(MIXVXREC, MUTE_GAIN, RAMP_0MS, MIX_VXREC_INPUT_VX_DL); + abe_write_mixer(MIXVXREC, MUTE_GAIN, RAMP_0MS, MIX_VXREC_INPUT_MM_DL); + abe_write_mixer(MIXVXREC, MUTE_GAIN, RAMP_0MS, MIX_VXREC_INPUT_VX_UL); + + /* load the high-pass coefficient of IHF-Right */ + abe_write_equalizer(EQ2L, &dl2_eq); + /* load the high-pass coefficient of IHF-Left */ + abe_write_equalizer(EQ2R, &dl2_eq); + + /* Vx in HS, MM in HF and Tones in HF */ + twl6040_write(codec, TWL6040_REG_SHADOW, 0x92); + + pm_runtime_put_sync(&pdev->dev); +#ifndef CONFIG_PM_RUNTIME + if (pdata->device_idle) + pdata->device_idle(pdev); +#endif +} + +/* twl6040 codec manual power-up sequence */ +static void twl6040_power_up(struct snd_soc_codec *codec) +{ + u8 ncpctl, ldoctl, lppllctl, accctl; + + ncpctl = twl6040_read_reg_cache(codec, TWL6040_REG_NCPCTL); + ldoctl = twl6040_read_reg_cache(codec, TWL6040_REG_LDOCTL); + lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL); + accctl = twl6040_read_reg_cache(codec, TWL6040_REG_ACCCTL); + + /* enable reference system */ + ldoctl |= TWL6040_REFENA; + twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); + msleep(10); + /* enable internal oscillator */ + ldoctl |= TWL6040_OSCENA; + twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); + udelay(10); + /* enable high-side ldo */ + ldoctl |= TWL6040_HSLDOENA; + twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); + udelay(244); + /* enable negative charge pump */ + ncpctl |= TWL6040_NCPENA | TWL6040_NCPOPEN; + twl6040_write(codec, TWL6040_REG_NCPCTL, ncpctl); + udelay(488); + /* enable low-side ldo */ + ldoctl |= TWL6040_LSLDOENA; + twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); + udelay(244); + /* enable low-power pll */ + lppllctl |= TWL6040_LPLLENA; + twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); + /* reset state machine */ + accctl |= TWL6040_RESETSPLIT; + twl6040_write(codec, TWL6040_REG_ACCCTL, accctl); + mdelay(5); + accctl &= ~TWL6040_RESETSPLIT; + twl6040_write(codec, TWL6040_REG_ACCCTL, accctl); + /* disable internal oscillator */ + ldoctl &= ~TWL6040_OSCENA; + twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); +} + +/* twl6040 codec manual power-down sequence */ +static void twl6040_power_down(struct snd_soc_codec *codec) +{ + u8 ncpctl, ldoctl, lppllctl, accctl; + + ncpctl = twl6040_read_reg_cache(codec, TWL6040_REG_NCPCTL); + ldoctl = twl6040_read_reg_cache(codec, TWL6040_REG_LDOCTL); + lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL); + accctl = twl6040_read_reg_cache(codec, TWL6040_REG_ACCCTL); + + /* enable internal oscillator */ + ldoctl |= TWL6040_OSCENA; + twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); + udelay(10); + /* disable low-power pll */ + lppllctl &= ~TWL6040_LPLLENA; + twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); + /* disable low-side ldo */ + ldoctl &= ~TWL6040_LSLDOENA; + twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); + udelay(244); + /* disable negative charge pump */ + ncpctl &= ~(TWL6040_NCPENA | TWL6040_NCPOPEN); + twl6040_write(codec, TWL6040_REG_NCPCTL, ncpctl); + udelay(488); + /* disable high-side ldo */ + ldoctl &= ~TWL6040_HSLDOENA; + twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); + udelay(244); + /* disable internal oscillator */ + ldoctl &= ~TWL6040_OSCENA; + twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); + /* disable reference system */ + ldoctl &= ~TWL6040_REFENA; + twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); + msleep(10); +} + +/* set headset dac and driver power mode */ +static int headset_power_mode(struct snd_soc_codec *codec, int high_perf) +{ + int hslctl, hsrctl; + int mask = TWL6040_HSDRVMODEL | TWL6040_HSDACMODEL; + + hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL); + hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL); + + if (high_perf) { + hslctl &= ~mask; + hsrctl &= ~mask; + } else { + hslctl |= mask; + hsrctl |= mask; + } + + twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl); + twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl); + + return 0; +} + +static int twl6040_hs_power_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + msleep(1); + return 0; +} + +static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_codec *codec = w->codec; + struct twl6040_data *priv = codec->private_data; + + if (SND_SOC_DAPM_EVENT_ON(event)) + priv->non_lp++; + else + priv->non_lp--; + + msleep(1); + + return 0; +} + +/* audio interrupt handler */ +static irqreturn_t twl6040_naudint_handler(int irq, void *data) +{ + struct snd_soc_codec *codec = data; + struct twl6040_data *priv = codec->private_data; + struct twl6040_jack_data *jack = &priv->hs_jack; + int report = 0; + u8 intid; + + twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &intid, TWL6040_REG_INTID); + + switch (intid) { + case TWL6040_THINT: + dev_alert(codec->dev, "die temp over-limit detection\n"); + break; + case TWL6040_PLUGINT: + /* Debounce */ + msleep(200); + report = jack->report; + case TWL6040_UNPLUGINT: + snd_soc_jack_report(jack->jack, report, jack->report); + break; + case TWL6040_HOOKINT: + break; + case TWL6040_HFINT: + dev_alert(codec->dev, "hf drivers over current detection\n"); + break; + case TWL6040_VIBINT: + dev_alert(codec->dev, "vib drivers over current detection\n"); + break; + case TWL6040_READYINT: + complete(&priv->ready); + break; + default: + dev_err(codec->dev, "unknown audio interrupt %d\n", intid); + break; + } + + return IRQ_HANDLED; +} + +static int snd_soc_put_dl1_mixer(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + struct snd_soc_dapm_widget *widget = snd_kcontrol_chip(kcontrol); + unsigned int shift = mc->shift; + int mask; + int err; + unsigned short val; + char *name = kcontrol->id.name; + + mask = 1 << shift; + val = (ucontrol->value.integer.value[0] << shift); + + if (strcmp(name, "DL1 Mixer Tones") == 0) { + if (val) + abe_write_mixer(MIXDL1, GAIN_M6dB, + RAMP_0MS, MIX_DL1_INPUT_TONES); + else + abe_write_mixer(MIXDL1, MUTE_GAIN, + RAMP_0MS, MIX_DL1_INPUT_TONES); + } else if (strcmp(name, "DL1 Mixer Voice") == 0) { + if (val) + abe_write_mixer(MIXDL1, GAIN_M6dB, + RAMP_1MS, MIX_DL1_INPUT_VX_DL); + else + abe_write_mixer(MIXDL1, MUTE_GAIN, + RAMP_0MS, MIX_DL1_INPUT_VX_DL); + } else if (strcmp(name, "DL1 Mixer Multimedia") == 0) { + if (val) + abe_write_mixer(MIXDL1, GAIN_M6dB, + RAMP_2MS, MIX_DL1_INPUT_MM_DL); + else + abe_write_mixer(MIXDL1, MUTE_GAIN, + RAMP_0MS, MIX_DL1_INPUT_MM_DL); + } else if (strcmp(name, "DL1 Mixer Multimedia Uplink") == 0) { + if (val) + abe_write_mixer(MIXDL1, GAIN_M6dB, + RAMP_5MS, MIX_DL1_INPUT_MM_UL2); + else + abe_write_mixer(MIXDL1, MUTE_GAIN, + RAMP_0MS, MIX_DL1_INPUT_MM_UL2); + } + + err = snd_soc_update_bits(widget->codec, TWL6040_REG_SHADOW, mask, val); + + return err; +} + +static int snd_soc_put_dl2_mixer(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct soc_mixer_control *mc = + (struct soc_mixer_control *)kcontrol->private_value; + struct snd_soc_dapm_widget *widget = snd_kcontrol_chip(kcontrol); + unsigned int shift = mc->shift; + int mask; + int err; + unsigned short val; + char *name = kcontrol->id.name; + + mask = 1 << shift; + val = (ucontrol->value.integer.value[0] << shift); + + if (strcmp(name, "DL2 Mixer Tones") == 0) { + if (val) + abe_write_mixer(MIXDL2, GAIN_M6dB, + RAMP_0MS, MIX_DL2_INPUT_TONES); + else + abe_write_mixer(MIXDL2, MUTE_GAIN, + RAMP_0MS, MIX_DL2_INPUT_TONES); + } else if (strcmp(name, "DL2 Mixer Voice") == 0) { + if (val) + abe_write_mixer(MIXDL2, GAIN_M6dB, + RAMP_1MS, MIX_DL2_INPUT_VX_DL); + else + abe_write_mixer(MIXDL2, MUTE_GAIN, + RAMP_0MS, MIX_DL2_INPUT_VX_DL); + } else if (strcmp(name, "DL2 Mixer Multimedia") == 0) { + if (val) + abe_write_mixer(MIXDL2, GAIN_M6dB, + RAMP_2MS, MIX_DL2_INPUT_MM_DL); + else + abe_write_mixer(MIXDL2, MUTE_GAIN, + RAMP_0MS, MIX_DL2_INPUT_MM_DL); + } else if (strcmp(name, "DL2 Mixer Multimedia Uplink") == 0) { + if (val) + abe_write_mixer(MIXDL2, GAIN_M6dB, + RAMP_5MS, MIX_DL2_INPUT_MM_UL2); + else + abe_write_mixer(MIXDL2, MUTE_GAIN, + RAMP_0MS, MIX_DL2_INPUT_MM_UL2); + } + + err = snd_soc_update_bits(widget->codec, TWL6040_REG_SHADOW, mask, val); + + return err; +} + +/* + * MICATT volume control: + * from -6 to 0 dB in 6 dB steps + */ +static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0); + +/* + * MICGAIN volume control: + * from 6 to 30 dB in 6 dB steps + */ +static DECLARE_TLV_DB_SCALE(mic_amp_tlv, 600, 600, 0); + +/* + * AFMGAIN volume control: + * from 18 to 24 dB in 6 dB steps + */ +static DECLARE_TLV_DB_SCALE(afm_amp_tlv, 600, 600, 0); + + +/* + * HSGAIN volume control: + * from -30 to 0 dB in 2 dB steps + */ +static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0); + +/* + * HFGAIN volume control: + * from -52 to 6 dB in 2 dB steps + */ +static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0); + +/* + * EPGAIN volume control: + * from -24 to 6 dB in 2 dB steps + */ +static DECLARE_TLV_DB_SCALE(ep_tlv, -2400, 200, 0); + +/* Left analog microphone selection */ +static const char *twl6040_amicl_texts[] = + {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"}; + +/* Right analog microphone selection */ +static const char *twl6040_amicr_texts[] = + {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"}; + +static const char *twl6040_hs_texts[] = + {"Off", "HS DAC", "Line-In amp"}; + +static const char *twl6040_hf_texts[] = + {"Off", "HF DAC", "Line-In amp"}; + +static const struct soc_enum twl6040_enum[] = { + SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 4, twl6040_amicl_texts), + SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 4, twl6040_amicr_texts), + SOC_ENUM_SINGLE(TWL6040_REG_HSLCTL, 5, 3, twl6040_hs_texts), + SOC_ENUM_SINGLE(TWL6040_REG_HSRCTL, 5, 3, twl6040_hs_texts), + SOC_ENUM_SINGLE(TWL6040_REG_HFLCTL, 2, 3, twl6040_hf_texts), + SOC_ENUM_SINGLE(TWL6040_REG_HFRCTL, 2, 3, twl6040_hf_texts), +}; + +static const struct snd_kcontrol_new amicl_control = + SOC_DAPM_ENUM("Route", twl6040_enum[0]); + +static const struct snd_kcontrol_new amicr_control = + SOC_DAPM_ENUM("Route", twl6040_enum[1]); + +static const struct snd_kcontrol_new dl1_mixer_controls[] = { + SOC_SINGLE_EXT("Tones", TWL6040_REG_SHADOW, 0, 1, 0, + snd_soc_dapm_get_volsw, snd_soc_put_dl1_mixer), + SOC_SINGLE_EXT("Voice", TWL6040_REG_SHADOW, 1, 1, 0, + snd_soc_dapm_get_volsw, snd_soc_put_dl1_mixer), + SOC_SINGLE_EXT("Multimedia Uplink", TWL6040_REG_SHADOW, 2, 1, 0, + snd_soc_dapm_get_volsw, snd_soc_put_dl1_mixer), + SOC_SINGLE_EXT("Multimedia", TWL6040_REG_SHADOW, 3, 1, 0, + snd_soc_dapm_get_volsw, snd_soc_put_dl1_mixer), +}; + +static const struct snd_kcontrol_new dl2_mixer_controls[] = { + SOC_SINGLE_EXT("Tones", TWL6040_REG_SHADOW, 4, 1, 0, + snd_soc_dapm_get_volsw, snd_soc_put_dl2_mixer), + SOC_SINGLE_EXT("Voice", TWL6040_REG_SHADOW, 5, 1, 0, + snd_soc_dapm_get_volsw, snd_soc_put_dl2_mixer), + SOC_SINGLE_EXT("Multimedia Uplink", TWL6040_REG_SHADOW, 6, 1, 0, + snd_soc_dapm_get_volsw, snd_soc_put_dl2_mixer), + SOC_SINGLE_EXT("Multimedia", TWL6040_REG_SHADOW, 7, 1, 0, + snd_soc_dapm_get_volsw, snd_soc_put_dl2_mixer), +}; + + +/* Headset DAC playback switches */ +static const struct snd_kcontrol_new hsl_mux_controls = + SOC_DAPM_ENUM("Route", twl6040_enum[2]); + +static const struct snd_kcontrol_new hsr_mux_controls = + SOC_DAPM_ENUM("Route", twl6040_enum[3]); + +/* Handsfree DAC playback switches */ +static const struct snd_kcontrol_new hfl_mux_controls = + SOC_DAPM_ENUM("Route", twl6040_enum[4]); + +static const struct snd_kcontrol_new hfr_mux_controls = + SOC_DAPM_ENUM("Route", twl6040_enum[5]); + +static const struct snd_kcontrol_new ep_driver_switch_controls = + SOC_DAPM_SINGLE("Switch", TWL6040_REG_EARCTL, 0, 1, 0); + +static const struct snd_kcontrol_new twl6040_snd_controls[] = { + /* Capture gains */ + SOC_DOUBLE_TLV("Capture Preamplifier Volume", + TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv), + SOC_DOUBLE_TLV("Capture Volume", + TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv), + + /* AFM gains */ + SOC_DOUBLE_TLV("Aux FM Volume", + TWL6040_REG_LINEGAIN, 0, 5, 0xF, 0, afm_amp_tlv), + + /* Playback gains */ + SOC_DOUBLE_TLV("Headset Playback Volume", + TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, hs_tlv), + SOC_DOUBLE_R_TLV("Handsfree Playback Volume", + TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1, hf_tlv), + SOC_SINGLE_TLV("Earphone Playback Volume", + TWL6040_REG_EARCTL, 1, 0xF, 1, ep_tlv), +}; + +static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = { + /* Inputs */ + SND_SOC_DAPM_INPUT("MAINMIC"), + SND_SOC_DAPM_INPUT("HSMIC"), + SND_SOC_DAPM_INPUT("SUBMIC"), + SND_SOC_DAPM_INPUT("AFML"), + SND_SOC_DAPM_INPUT("AFMR"), + + /* Outputs */ + SND_SOC_DAPM_OUTPUT("HSOL"), + SND_SOC_DAPM_OUTPUT("HSOR"), + SND_SOC_DAPM_OUTPUT("HFL"), + SND_SOC_DAPM_OUTPUT("HFR"), + SND_SOC_DAPM_OUTPUT("EP"), + + /* Analog input muxes for the capture amplifiers */ + SND_SOC_DAPM_MUX("Analog Left Capture Route", + SND_SOC_NOPM, 0, 0, &amicl_control), + SND_SOC_DAPM_MUX("Analog Right Capture Route", + SND_SOC_NOPM, 0, 0, &amicr_control), + + SND_SOC_DAPM_MIXER("DL1 Mixer", + SND_SOC_NOPM, 0, 0, dl1_mixer_controls, + ARRAY_SIZE(dl1_mixer_controls)), + SND_SOC_DAPM_MIXER("DL2 Mixer", + SND_SOC_NOPM, 0, 0, dl2_mixer_controls, + ARRAY_SIZE(dl2_mixer_controls)), + + /* Analog capture PGAs */ + SND_SOC_DAPM_PGA("MicAmpL", + TWL6040_REG_MICLCTL, 0, 0, NULL, 0), + SND_SOC_DAPM_PGA("MicAmpR", + TWL6040_REG_MICRCTL, 0, 0, NULL, 0), + + /* Auxiliary FM PGAs */ + SND_SOC_DAPM_PGA("AFMAmpL", + TWL6040_REG_MICLCTL, 1, 0, NULL, 0), + SND_SOC_DAPM_PGA("AFMAmpR", + TWL6040_REG_MICRCTL, 1, 0, NULL, 0), + + /* ADCs */ + SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture", + TWL6040_REG_MICLCTL, 2, 0), + SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture", + TWL6040_REG_MICRCTL, 2, 0), + + /* Microphone bias */ + SND_SOC_DAPM_MICBIAS("Headset Mic Bias", + TWL6040_REG_AMICBCTL, 0, 0), + SND_SOC_DAPM_MICBIAS("Main Mic Bias", + TWL6040_REG_AMICBCTL, 4, 0), + SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias", + TWL6040_REG_DMICBCTL, 0, 0), + SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias", + TWL6040_REG_DMICBCTL, 4, 0), + + SND_SOC_DAPM_AIF_IN("AIFIN Tones", "Playback", 0, + SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("AIFIN Voice", "Playback", 0, + SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("AIFIN Multimedia Uplink", "Playback", 0, + SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_IN("AIFIN Multimedia", "Playback", 0, + SND_SOC_NOPM, 0, 0), + + /* DACs */ + SND_SOC_DAPM_DAC_E("HSDAC Left", "Headset Playback", + TWL6040_REG_HSLCTL, 0, 0, + twl6040_hs_power_event, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_DAC_E("HSDAC Right", "Headset Playback", + TWL6040_REG_HSRCTL, 0, 0, + twl6040_hs_power_event, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback", + TWL6040_REG_HFLCTL, 0, 0, + twl6040_power_mode_event, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback", + TWL6040_REG_HFRCTL, 0, 0, + twl6040_power_mode_event, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + + SND_SOC_DAPM_MUX("HF Left Playback", + SND_SOC_NOPM, 0, 0, &hfl_mux_controls), + SND_SOC_DAPM_MUX("HF Right Playback", + SND_SOC_NOPM, 0, 0, &hfr_mux_controls), + /* Analog playback Muxes */ + SND_SOC_DAPM_MUX("HS Left Playback", + SND_SOC_NOPM, 0, 0, &hsl_mux_controls), + SND_SOC_DAPM_MUX("HS Right Playback", + SND_SOC_NOPM, 0, 0, &hsr_mux_controls), + + /* Analog playback drivers */ + SND_SOC_DAPM_PGA_E("Handsfree Left Driver", + TWL6040_REG_HFLCTL, 4, 0, NULL, 0, + twl6040_power_mode_event, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_PGA_E("Handsfree Right Driver", + TWL6040_REG_HFRCTL, 4, 0, NULL, 0, + twl6040_power_mode_event, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_PGA("Headset Left Driver", + TWL6040_REG_HSLCTL, 2, 0, NULL, 0), + SND_SOC_DAPM_PGA("Headset Right Driver", + TWL6040_REG_HSRCTL, 2, 0, NULL, 0), + SND_SOC_DAPM_SWITCH_E("Earphone Driver", + SND_SOC_NOPM, 0, 0, &ep_driver_switch_controls, + twl6040_power_mode_event, + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), + + /* Analog playback PGAs */ + SND_SOC_DAPM_PGA("HFDAC Left PGA", + TWL6040_REG_HFLCTL, 1, 0, NULL, 0), + SND_SOC_DAPM_PGA("HFDAC Right PGA", + TWL6040_REG_HFRCTL, 1, 0, NULL, 0), + +}; + +static const struct snd_soc_dapm_route intercon[] = { + /* Capture path */ + {"Analog Left Capture Route", "Headset Mic", "HSMIC"}, + {"Analog Left Capture Route", "Main Mic", "MAINMIC"}, + {"Analog Left Capture Route", "Aux/FM Left", "AFML"}, + + {"Analog Right Capture Route", "Headset Mic", "HSMIC"}, + {"Analog Right Capture Route", "Sub Mic", "SUBMIC"}, + {"Analog Right Capture Route", "Aux/FM Right", "AFMR"}, + + {"MicAmpL", NULL, "Analog Left Capture Route"}, + {"MicAmpR", NULL, "Analog Right Capture Route"}, + + {"ADC Left", NULL, "MicAmpL"}, + {"ADC Right", NULL, "MicAmpR"}, + + /* AFM path */ + {"AFMAmpL", "NULL", "AFML"}, + {"AFMAmpR", "NULL", "AFMR"}, + + /* Headset playback path */ + {"DL1 Mixer", "Tones", "AIFIN Tones"}, + {"DL1 Mixer", "Voice", "AIFIN Voice"}, + {"DL1 Mixer", "Multimedia Uplink", "AIFIN Multimedia Uplink"}, + {"DL1 Mixer", "Multimedia", "AIFIN Multimedia"}, + + {"HSDAC Left", NULL, "DL1 Mixer"}, + {"HSDAC Right", NULL, "DL1 Mixer"}, + + {"HS Left Playback", "HS DAC", "HSDAC Left"}, + {"HS Left Playback", "Line-In amp", "AFMAmpL"}, + + {"HS Right Playback", "HS DAC", "HSDAC Right"}, + {"HS Right Playback", "Line-In amp", "AFMAmpR"}, + + {"Headset Left Driver", "NULL", "HS Left Playback"}, + {"Headset Right Driver", "NULL", "HS Right Playback"}, + + {"HSOL", NULL, "Headset Left Driver"}, + {"HSOR", NULL, "Headset Right Driver"}, + + /* Earphone playback path */ + {"Earphone Driver", "Switch", "HSDAC Left"}, + {"EP", NULL, "Earphone Driver"}, + + /* Handsfree playback path */ + {"DL2 Mixer", "Tones", "AIFIN Tones"}, + {"DL2 Mixer", "Voice", "AIFIN Voice"}, + {"DL2 Mixer", "Multimedia Uplink", "AIFIN Multimedia Uplink"}, + {"DL2 Mixer", "Multimedia", "AIFIN Multimedia"}, + + {"HFDAC Left", NULL, "DL2 Mixer"}, + {"HFDAC Right", NULL, "DL2 Mixer"}, + + {"HF Left Playback", "HF DAC", "HFDAC Left"}, + {"HF Left Playback", "Line-In amp", "AFMAmpL"}, + + {"HF Right Playback", "HF DAC", "HFDAC Right"}, + {"HF Right Playback", "Line-In amp", "AFMAmpR"}, + + {"HFDAC Left PGA", NULL, "HF Left Playback"}, + {"HFDAC Right PGA", NULL, "HF Right Playback"}, + + {"Handsfree Left Driver", "Switch", "HFDAC Left PGA"}, + {"Handsfree Right Driver", "Switch", "HFDAC Right PGA"}, + + {"HFL", NULL, "Handsfree Left Driver"}, + {"HFR", NULL, "Handsfree Right Driver"}, +}; + +static int abe_twl6040_add_widgets(struct snd_soc_codec *codec) +{ + snd_soc_dapm_new_controls(codec, twl6040_dapm_widgets, + ARRAY_SIZE(twl6040_dapm_widgets)); + + snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon)); + + snd_soc_dapm_new_widgets(codec); + + return 0; +} + +static int twl6040_power_up_completion(struct snd_soc_codec *codec, + int naudint) +{ + struct twl6040_data *priv = codec->private_data; + int time_left; + u8 intid; + + time_left = wait_for_completion_timeout(&priv->ready, + msecs_to_jiffies(48)); + + if (!time_left) { + twl_i2c_read_u8(TWL_MODULE_AUDIO_VOICE, &intid, + TWL6040_REG_INTID); + if (!(intid & TWL6040_READYINT)) { + dev_err(codec->dev, "timeout waiting for READYINT\n"); + return -ETIMEDOUT; + } + } + + priv->codec_powered = 1; + + return 0; +} + +static int abe_twl6040_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level) +{ + struct twl6040_data *priv = codec->private_data; + int audpwron = priv->audpwron; + int naudint = priv->naudint; + int ret; + + switch (level) { + case SND_SOC_BIAS_ON: + break; + case SND_SOC_BIAS_PREPARE: + break; + case SND_SOC_BIAS_STANDBY: + if (priv->codec_powered) + break; + + if (gpio_is_valid(audpwron)) { + /* use AUDPWRON line */ + gpio_set_value(audpwron, 1); + + /* wait for power-up completion */ + ret = twl6040_power_up_completion(codec, naudint); + if (ret) + return ret; + + /* sync registers updated during power-up sequence */ + twl6040_read_reg_volatile(codec, TWL6040_REG_NCPCTL); + twl6040_read_reg_volatile(codec, TWL6040_REG_LDOCTL); + twl6040_read_reg_volatile(codec, TWL6040_REG_LPPLLCTL); + } else { + /* use manual power-up sequence */ + twl6040_power_up(codec); + priv->codec_powered = 1; + } + + /* initialize vdd/vss registers with reg_cache */ + twl6040_init_vdd_regs(codec); + break; + case SND_SOC_BIAS_OFF: + if (!priv->codec_powered) + break; + + if (gpio_is_valid(audpwron)) { + /* use AUDPWRON line */ + gpio_set_value(audpwron, 0); + + /* power-down sequence latency */ + udelay(500); + + /* sync registers updated during power-down sequence */ + twl6040_read_reg_volatile(codec, TWL6040_REG_NCPCTL); + twl6040_read_reg_volatile(codec, TWL6040_REG_LDOCTL); + twl6040_write_reg_cache(codec, TWL6040_REG_LPPLLCTL, + 0x00); + } else { + /* use manual power-down sequence */ + twl6040_power_down(codec); + } + + priv->codec_powered = 0; + break; + } + + codec->bias_level = level; + + return 0; +} + +/* set of rates for each pll: low-power and high-performance */ + +static unsigned int lp_rates[] = { + 44100, + 48000, +}; + +static struct snd_pcm_hw_constraint_list lp_constraints = { + .count = ARRAY_SIZE(lp_rates), + .list = lp_rates, +}; + +static unsigned int hp_rates[] = { + 8000, + 16000, + 48000, +}; + +static struct snd_pcm_hw_constraint_list hp_constraints = { + .count = ARRAY_SIZE(hp_rates), + .list = hp_rates, +}; + +static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai, + int clk_id, unsigned int freq, int dir) +{ + struct snd_soc_codec *codec = codec_dai->codec; + struct twl6040_data *priv = codec->private_data; + u8 hppllctl, lppllctl; + + hppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_HPPLLCTL); + lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL); + + switch (clk_id) { + case TWL6040_SYSCLK_SEL_LPPLL: + switch (freq) { + case 32768: + /* headset dac and driver must be in low-power mode */ + headset_power_mode(codec, 0); + + /* clk32k input requires low-power pll */ + lppllctl |= TWL6040_LPLLENA; + twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); + mdelay(5); + lppllctl &= ~TWL6040_HPLLSEL; + twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); + hppllctl &= ~TWL6040_HPLLENA; + twl6040_write(codec, TWL6040_REG_HPPLLCTL, hppllctl); + break; + default: + dev_err(codec->dev, "unknown mclk freq %d\n", freq); + return -EINVAL; + } + + /* lppll divider */ + switch (priv->sysclk) { + case 17640000: + lppllctl |= TWL6040_LPLLFIN; + break; + case 19200000: + lppllctl &= ~TWL6040_LPLLFIN; + break; + default: + /* sysclk not yet configured */ + lppllctl &= ~TWL6040_LPLLFIN; + priv->sysclk = 19200000; + break; + } + + twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); + + priv->pll = TWL6040_LPPLL_ID; + priv->sysclk_constraints = &lp_constraints; + break; + case TWL6040_SYSCLK_SEL_HPPLL: + hppllctl &= ~TWL6040_MCLK_MSK; + + switch (freq) { + case 12000000: + /* mclk input, pll enabled */ + hppllctl |= TWL6040_MCLK_12000KHZ | + TWL6040_HPLLSQRBP | + TWL6040_HPLLENA; + break; + case 19200000: + /* mclk input, pll disabled */ + hppllctl |= TWL6040_MCLK_19200KHZ | + TWL6040_HPLLSQRENA | + TWL6040_HPLLBP; + break; + case 26000000: + /* mclk input, pll enabled */ + hppllctl |= TWL6040_MCLK_26000KHZ | + TWL6040_HPLLSQRBP | + TWL6040_HPLLENA; + break; + case 38400000: + /* clk slicer, pll disabled */ + hppllctl |= TWL6040_MCLK_38400KHZ | + TWL6040_HPLLSQRENA | + TWL6040_HPLLBP; + break; + default: + dev_err(codec->dev, "unknown mclk freq %d\n", freq); + return -EINVAL; + } + + /* headset dac and driver must be in high-performance mode */ + headset_power_mode(codec, 1); + + twl6040_write(codec, TWL6040_REG_HPPLLCTL, hppllctl); + udelay(500); + lppllctl |= TWL6040_HPLLSEL; + twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); + lppllctl &= ~TWL6040_LPLLENA; + twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); + + /* high-performance pll can provide only 19.2 MHz */ + priv->pll = TWL6040_HPPLL_ID; + priv->sysclk = 19200000; + priv->sysclk_constraints = &hp_constraints; + break; + default: + dev_err(codec->dev, "unknown clk_id %d\n", clk_id); + return -EINVAL; + } + + return 0; +} + +static int abe_mm_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct twl6040_data *priv = codec->private_data; + struct twl4030_codec_data *pdata = codec->dev->platform_data; + struct platform_device *pdev = to_platform_device(codec->dev); + + if (!priv->sysclk) { + dev_err(codec->dev, + "no mclk configured, call set_sysclk() on init\n"); + return -EINVAL; + } + + /* + * capture is not supported at 17.64 MHz, + * it's reserved for headset low-power playback scenario + */ + if ((priv->sysclk == 17640000) && substream->stream) { + dev_err(codec->dev, + "capture mode is not supported at %dHz\n", + priv->sysclk); + return -EINVAL; + } + + snd_pcm_hw_constraint_list(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, + priv->sysclk_constraints); + + if (!priv->configure++) { + pm_runtime_get_sync(&pdev->dev); +#ifndef CONFIG_PM_RUNTIME + if (pdata->device_enable) + pdata->device_enable(pdev); +#endif + + abe_set_router_configuration(UPROUTE, UPROUTE_CONFIG_AMIC, + (abe_router_t *)abe_router_ul_table_preset[UPROUTE_CONFIG_AMIC]); + + abe_write_gain(GAINS_DL1, GAIN_M6dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_DL1, GAIN_M6dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + abe_write_gain(GAINS_DL2, GAIN_M6dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_DL2, GAIN_M6dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + + abe_write_gain(GAINS_AMIC, GAIN_M6dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_AMIC, GAIN_M6dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + + abe_write_gain(GAINS_SPLIT, GAIN_M6dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_SPLIT, GAIN_M6dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + } + return 0; +} + +static int abe_mm_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct twl6040_data *priv = codec->private_data; + u8 lppllctl; + int rate; + int channels; + unsigned int sysclk; + abe_data_format_t format; + abe_dma_t dma_sink; + + lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL); + + rate = params_rate(params); + switch (rate) { + case 44100: + lppllctl |= TWL6040_LPLLFIN; + sysclk = 17640000; + break; + case 48000: + /* Select output frequency 19.2 MHz */ + lppllctl &= ~TWL6040_LPLLFIN; + sysclk = 19200000; + break; + default: + dev_err(codec->dev, "unsupported rate %d\n", rate); + return -EINVAL; + } + + channels = params_channels(params); + switch (channels) { + case 1: + format.samp_format = MONO_MSB; + break; + case 2: + format.samp_format = STEREO_MSB; + break; + default: + dev_err(codec->dev, "%d channels not supported", channels); + return -EINVAL; + } + + if (priv->pll == TWL6040_LPPLL_ID) { + priv->sysclk = sysclk; + twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); + } + + format.f = rate; + if (!substream->stream) { + abe_connect_cbpr_dmareq_port(MM_DL_PORT, &format, ABE_CBPR0_IDX, &dma_sink); + abe_enable_data_transfer(MM_DL_PORT); + if (!priv->mcpdm_dl_enable++) { + abe_enable_data_transfer(PDM_DL_PORT); + } + } else { + abe_connect_cbpr_dmareq_port(MM_UL2_PORT, &format, ABE_CBPR4_IDX, &dma_sink); + abe_enable_data_transfer(MM_UL2_PORT); + if (!priv->mcpdm_ul_enable++) + abe_enable_data_transfer(PDM_UL_PORT); + } + + return 0; +} + +static int abe_mm_trigger(struct snd_pcm_substream *substream, + int cmd, struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct twl6040_data *priv = codec->private_data; + unsigned int snd_reg_shadow; + + snd_reg_shadow = twl6040_read_reg_cache(codec, TWL6040_REG_SHADOW); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + /* + * low-power playback mode is restricted + * for headset path only + */ + if ((priv->sysclk == 17640000) && priv->non_lp) { + dev_err(codec->dev, + "some enabled paths aren't supported at %dHz\n", + priv->sysclk); + return -EPERM; + } + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (!substream->stream){ + if ((snd_reg_shadow & 0x08) == 0x08) + abe_write_mixer(MIXDL1, GAIN_M6dB, RAMP_0MS, MIX_DL1_INPUT_MM_DL); + + if ((snd_reg_shadow & 0x80) == 0x80) + abe_write_mixer(MIXDL2, GAIN_M6dB, RAMP_0MS, MIX_DL2_INPUT_MM_DL); + } + break; + + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + if (!substream->stream){ + if ((snd_reg_shadow & 0x08) == 0x08) + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_0MS, MIX_DL1_INPUT_MM_DL); + + if ((snd_reg_shadow & 0x80) == 0x80) + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_0MS, MIX_DL2_INPUT_MM_DL); + } + break; + default: + break; + } + + return 0; +} + +static void abe_mm_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct twl6040_data *priv = codec->private_data; + struct twl4030_codec_data *pdata = codec->dev->platform_data; + struct platform_device *pdev = to_platform_device(codec->dev); + + if (!substream->stream) { + abe_disable_data_transfer(MM_DL_PORT); + if (!--priv->mcpdm_dl_enable) { + abe_disable_data_transfer(PDM_DL_PORT); + } + } else { + abe_disable_data_transfer(MM_UL2_PORT); + if (!--priv->mcpdm_ul_enable) + abe_disable_data_transfer(PDM_UL_PORT); + } + + if (!--priv->configure) { + pm_runtime_put_sync(&pdev->dev); +#ifndef CONFIG_PM_RUNTIME + if (pdata->device_idle) + pdata->device_idle(pdev); +#endif + } +} + +static int twl6040_mute(struct snd_soc_dai *dai, int mute) +{ + struct snd_soc_codec *codec = dai->codec; + struct twl6040_data *priv = codec->private_data; + + int hs_gain, hf_gain; + + hf_gain = twl6040_read_reg_cache(codec, TWL6040_REG_HFRGAIN); + hs_gain = twl6040_read_reg_cache(codec, TWL6040_REG_HSGAIN); + + if (mute) { + if (priv->mcpdm_dl_enable == 1) { + twl_i2c_write_u8(TWL_MODULE_AUDIO_VOICE, 0x1D, TWL6040_REG_HFRGAIN); + twl_i2c_write_u8(TWL_MODULE_AUDIO_VOICE, 0x1D, TWL6040_REG_HFLGAIN); + twl_i2c_write_u8(TWL_MODULE_AUDIO_VOICE, 0xFF, TWL6040_REG_HSGAIN); + } + } else { + twl6040_write(codec, TWL6040_REG_HFRGAIN, hf_gain); + twl6040_write(codec, TWL6040_REG_HFLGAIN, hf_gain); + twl6040_write(codec, TWL6040_REG_HSGAIN, hs_gain); + } + + return 0; +} + +static struct snd_soc_dai_ops abe_mm_dai_ops = { + .startup = abe_mm_startup, + .hw_params = abe_mm_hw_params, + .digital_mute = twl6040_mute, + .shutdown = abe_mm_shutdown, + .trigger = abe_mm_trigger, + .set_sysclk = twl6040_set_dai_sysclk, +}; + +static int abe_tones_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct twl6040_data *priv = codec->private_data; + u8 lppllctl; + int rate; + int channels; + unsigned int sysclk; + abe_data_format_t format; + abe_dma_t dma_sink; + + lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL); + + rate = params_rate(params); + switch (rate) { + case 44100: + lppllctl |= TWL6040_LPLLFIN; + sysclk = 17640000; + break; + case 48000: + /* Select output frequency 19.2 MHz */ + lppllctl &= ~TWL6040_LPLLFIN; + sysclk = 19200000; + break; + default: + dev_err(codec->dev, "unsupported rate %d\n", rate); + return -EINVAL; + } + + channels = params_channels(params); + switch (channels) { + case 1: + format.samp_format = MONO_MSB; + break; + case 2: + format.samp_format = STEREO_MSB; + break; + default: + dev_err(codec->dev, "%d channels not supported", channels); + return -EINVAL; + } + + if (priv->pll == TWL6040_LPPLL_ID) { + priv->sysclk = sysclk; + twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); + } + + format.f = rate; + if (!substream->stream) { + abe_connect_cbpr_dmareq_port(TONES_DL_PORT, &format, + ABE_CBPR5_IDX, &dma_sink); + abe_enable_data_transfer(TONES_DL_PORT); + if (!priv->mcpdm_dl_enable++) + abe_enable_data_transfer(PDM_DL_PORT); + } + + return 0; +} + +static int abe_tones_trigger(struct snd_pcm_substream *substream, + int cmd, struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct twl6040_data *priv = codec->private_data; + unsigned int snd_reg_shadow; + + snd_reg_shadow = twl6040_read_reg_cache(codec, TWL6040_REG_SHADOW); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + /* + * low-power playback mode is restricted + * for headset path only + */ + if ((priv->sysclk == 17640000) && priv->non_lp) { + dev_err(codec->dev, + "some enabled paths aren't supported at %dHz\n", + priv->sysclk); + return -EPERM; + } + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (!substream->stream){ + if ((snd_reg_shadow & 0x01) == 0x01) + abe_write_mixer(MIXDL1, GAIN_M6dB, RAMP_0MS, MIX_DL1_INPUT_TONES); + + if ((snd_reg_shadow & 0x10) == 0x10) + abe_write_mixer(MIXDL2, GAIN_M6dB, RAMP_0MS, MIX_DL2_INPUT_TONES); + } + break; + + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + if (!substream->stream){ + if ((snd_reg_shadow & 0x01) == 0x01) + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_0MS, MIX_DL1_INPUT_TONES); + + if ((snd_reg_shadow & 0x10) == 0x10) + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_0MS, MIX_DL2_INPUT_TONES); + } + break; + default: + break; + } + + return 0; +} + +static void abe_tones_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct twl6040_data *priv = codec->private_data; + struct twl4030_codec_data *pdata = codec->dev->platform_data; + struct platform_device *pdev = to_platform_device(codec->dev); + + if (!substream->stream) { + abe_disable_data_transfer(TONES_DL_PORT); + if (!--priv->mcpdm_dl_enable) + abe_disable_data_transfer(PDM_DL_PORT); + } + + if (!--priv->configure) { + pm_runtime_put_sync(&pdev->dev); +#ifndef CONFIG_PM_RUNTIME + if (pdata->device_idle) + pdata->device_idle(pdev); +#endif + } +} + +static struct snd_soc_dai_ops abe_tones_dai_ops = { + .startup = abe_mm_startup, + .hw_params = abe_tones_hw_params, + .digital_mute = twl6040_mute, + .shutdown = abe_tones_shutdown, + .trigger = abe_tones_trigger, + .set_sysclk = twl6040_set_dai_sysclk, +}; + +static int abe_voice_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct twl6040_data *priv = codec->private_data; + struct twl4030_codec_data *pdata = codec->dev->platform_data; + struct platform_device *pdev = to_platform_device(codec->dev); + + if (!priv->sysclk) { + dev_err(codec->dev, + "no mclk configured, call set_sysclk() on init\n"); + return -EINVAL; + } + + /* + * capture is not supported at 17.64 MHz, + * it's reserved for headset low-power playback scenario + */ + if ((priv->sysclk == 17640000) && substream->stream) { + dev_err(codec->dev, + "capture mode is not supported at %dHz\n", + priv->sysclk); + return -EINVAL; + } + + snd_pcm_hw_constraint_list(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, + priv->sysclk_constraints); + + if (!priv->configure++) { + pm_runtime_get_sync(&pdev->dev); +#ifndef CONFIG_PM_RUNTIME + if (pdata->device_enable) + pdata->device_enable(pdev); +#endif + + abe_set_router_configuration(UPROUTE, UPROUTE_CONFIG_AMIC, + (abe_router_t *)abe_router_ul_table_preset[UPROUTE_CONFIG_AMIC]); + abe_write_gain(GAINS_DL1, GAIN_M6dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_DL1, GAIN_M6dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + abe_write_gain(GAINS_DL2, GAIN_M6dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_DL2, GAIN_M6dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + + abe_write_gain(GAINS_AMIC, GAIN_M6dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_AMIC, GAIN_M6dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + + abe_write_gain(GAINS_SPLIT, GAIN_M6dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_SPLIT, GAIN_M6dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + } + return 0; +} + +static int abe_voice_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct twl6040_data *priv = codec->private_data; + u8 lppllctl; + int rate; + int channels; + abe_data_format_t format; +#ifndef CONFIG_SND_OMAP_VOICE_TEST + abe_dma_t dma_sink; +#endif + + rate = params_rate(params); + switch (rate) { + case 16000: + case 8000: + /* Select output frequency 19.2 MHz */ + if (priv->pll == TWL6040_LPPLL_ID) { + lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL); + lppllctl &= ~TWL6040_LPLLFIN; + priv->sysclk = 19200000; + twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); + } + break; + default: + dev_err(codec->dev, "unsupported rate %d\n", rate); + return -EINVAL; + } + + channels = params_channels(params); + switch (channels) { + case 1: + format.samp_format = MONO_MSB; + break; + case 2: + format.samp_format = STEREO_MSB; + break; + default: + dev_err(codec->dev, "%d channels not supported", channels); + return -EINVAL; + } + + format.f = rate; +#ifdef CONFIG_SND_OMAP_VOICE_TEST + if (!substream->stream) { + /* Vx_DL connection to McBSP 2 ports */ + format.f = 8000; + format.samp_format = STEREO_RSHIFTED_16; + abe_connect_serial_port(VX_DL_PORT, &format, MCBSP2_RX); + /* Enable downlink port */ + abe_enable_data_transfer(VX_DL_PORT); + if (!priv->mcpdm_dl_enable++) + abe_enable_data_transfer(PDM_DL_PORT); + } else { + /* Vx_UL connection to McBSP 2 ports */ + format.f = 8000; + format.samp_format = STEREO_RSHIFTED_16; + abe_connect_serial_port(VX_UL_PORT, &format, MCBSP2_TX); + /* Enable uplink port */ + abe_enable_data_transfer(VX_UL_PORT); + if (!priv->mcpdm_ul_enable++) + abe_enable_data_transfer(PDM_UL_PORT); + } +#else + if (!substream->stream) { + abe_connect_cbpr_dmareq_port(VX_DL_PORT, &format, ABE_CBPR1_IDX, &dma_sink); + abe_enable_data_transfer(VX_DL_PORT); + if (!priv->mcpdm_dl_enable++) + abe_enable_data_transfer(PDM_DL_PORT); + } else { + abe_connect_cbpr_dmareq_port(VX_UL_PORT, &format, ABE_CBPR2_IDX, &dma_sink); + abe_enable_data_transfer(VX_UL_PORT); + if (!priv->mcpdm_ul_enable++) + abe_enable_data_transfer(PDM_UL_PORT); + } +#endif + + return 0; +} + +static int abe_voice_trigger(struct snd_pcm_substream *substream, + int cmd, struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct twl6040_data *priv = codec->private_data; + unsigned int snd_reg_shadow; + + snd_reg_shadow = twl6040_read_reg_cache(codec, TWL6040_REG_SHADOW); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + /* + * low-power playback mode is restricted + * for headset path only + */ + if ((priv->sysclk == 17640000) && priv->non_lp) { + dev_err(codec->dev, + "some enabled paths aren't supported at %dHz\n", + priv->sysclk); + return -EPERM; + } + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (!substream->stream){ + if ((snd_reg_shadow & 0x02) == 0x02) + abe_write_mixer(MIXDL1, GAIN_M6dB, RAMP_0MS, MIX_DL1_INPUT_VX_DL); + + if ((snd_reg_shadow & 0x20) == 0x20) + abe_write_mixer(MIXDL2, GAIN_M6dB, RAMP_0MS, MIX_DL2_INPUT_VX_DL); + } + break; + + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + if (!substream->stream){ + if ((snd_reg_shadow & 0x02) == 0x02) + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_0MS, MIX_DL1_INPUT_VX_DL); + + if ((snd_reg_shadow & 0x20) == 0x20) + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_0MS, MIX_DL2_INPUT_VX_DL); + } + break; + default: + break; + } + + return 0; +} + +static void abe_voice_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->card->codec; + struct twl6040_data *priv = codec->private_data; + struct twl4030_codec_data *pdata = codec->dev->platform_data; + struct platform_device *pdev = to_platform_device(codec->dev); + + if (!substream->stream) { + abe_disable_data_transfer(VX_DL_PORT); + if (!--priv->mcpdm_dl_enable) { + abe_disable_data_transfer(PDM_DL_PORT); + if (priv->mcpdm_ul_enable == 0) + abe_disable_data_transfer(PDM_UL_PORT); + } + } else { + abe_disable_data_transfer(VX_UL_PORT); + if (!--priv->mcpdm_ul_enable) { + if (priv->mcpdm_dl_enable == 0) { + abe_disable_data_transfer(PDM_UL_PORT); + } + } + } + + if(!--priv->configure) { + pm_runtime_put_sync(&pdev->dev); +#ifndef CONFIG_PM_RUNTIME + if (pdata->device_idle) + pdata->device_idle(pdev); +#endif + } +} + +static struct snd_soc_dai_ops abe_voice_dai_ops = { + .startup = abe_voice_startup, + .hw_params = abe_voice_hw_params, + .digital_mute = twl6040_mute, + .shutdown = abe_voice_shutdown, + .trigger = abe_voice_trigger, + .set_sysclk = twl6040_set_dai_sysclk, +}; + +/* Audio Backend DAIs */ +struct snd_soc_dai abe_dai[] = { + /* Multimedia: MM-UL2, MM-DL */ + { + .name = "Multimedia", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, + .formats = ABE_FORMATS, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_48000, + .formats = ABE_FORMATS, + }, + .ops = &abe_mm_dai_ops, + }, + /* Tones DL: MM-DL2 */ + { + .name = "Tones DL", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, + .formats = ABE_FORMATS, + }, + .ops = &abe_tones_dai_ops, + }, + /* Voice: VX-UL, VX-DL */ + { + .name = "Voice", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, + .formats = ABE_FORMATS, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, + .formats = ABE_FORMATS, + }, + .ops = &abe_voice_dai_ops, + }, + /* Digital Uplink: MM-UL */ + { + .name = "Digital Uplink", + .capture = { + .stream_name = "Capture", + .channels_min = 2, + .channels_max = 10, + .rates = SNDRV_PCM_RATE_48000, + .formats = ABE_FORMATS, + }, + }, + /* Vibrator: VIB-DL */ + { + .name = "Vibrator", + .playback = { + .stream_name = "Playback", + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_48000, + .formats = ABE_FORMATS, + }, + }, +}; + +#ifdef CONFIG_PM +static int abe_twl6040_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + + abe_twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF); + + return 0; +} + +static int abe_twl6040_resume(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + + abe_twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY); + abe_twl6040_set_bias_level(codec, codec->suspend_bias_level); + + return 0; +} +#else +#define abe_twl6040_suspend NULL +#define abe_twl6040_resume NULL +#endif + +void twl6040_hs_jack_detect(struct snd_soc_codec *codec, + struct snd_soc_jack *jack, int report) +{ + struct twl6040_data *priv = codec->private_data; + int status; + + priv->hs_jack.jack = jack; + priv->hs_jack.report = report; + + /* Sync status */ + status = twl6040_read_reg_volatile(codec, TWL6040_REG_STATUS); + if(status & TWL6040_PLUGCOMP) + snd_soc_jack_report(jack, report, report); + else + snd_soc_jack_report(jack, 0, report); +} +EXPORT_SYMBOL_GPL(twl6040_hs_jack_detect); + +static struct snd_soc_codec *twl6040_codec; + +static int abe_twl6040_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec; + int ret = 0; + + BUG_ON(!twl6040_codec); + + codec = twl6040_codec; + socdev->card->codec = codec; + + /* register pcms */ + ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); + if (ret < 0) { + dev_err(&pdev->dev, "failed to create pcms\n"); + return ret; + } + + abe_init_chip(codec, pdev); + snd_soc_add_controls(codec, twl6040_snd_controls, + ARRAY_SIZE(twl6040_snd_controls)); + abe_twl6040_add_widgets(codec); + + return 0; +} + +static int abe_twl6040_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->card->codec; + + abe_twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF); + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); + kfree(codec); + + return 0; +} + +struct snd_soc_codec_device soc_codec_dev_abe_twl6040 = { + .probe = abe_twl6040_probe, + .remove = abe_twl6040_remove, + .suspend = abe_twl6040_suspend, + .resume = abe_twl6040_resume, +}; +EXPORT_SYMBOL_GPL(soc_codec_dev_abe_twl6040); + +static int __devinit abe_twl6040_codec_probe(struct platform_device *pdev) +{ + struct twl4030_codec_data *twl_codec = pdev->dev.platform_data; + struct snd_soc_codec *codec; + struct twl6040_data *priv; + int audpwron, naudint; + int ret = 0; + + priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL); + if (priv == NULL) + return -ENOMEM; + + if (twl_codec) { + audpwron = twl_codec->audpwron_gpio; + naudint = twl_codec->naudint_irq; + } else { + audpwron = -EINVAL; + naudint = 0; + } + + priv->audpwron = audpwron; + priv->naudint = naudint; + + codec = &priv->codec; + codec->dev = &pdev->dev; + codec->name = "twl6040"; + codec->owner = THIS_MODULE; + codec->read = twl6040_read_reg_cache; + codec->write = twl6040_write; + codec->set_bias_level = abe_twl6040_set_bias_level; + codec->private_data = priv; + codec->dai = abe_dai; + codec->num_dai = ARRAY_SIZE(abe_dai); + codec->reg_cache_size = ARRAY_SIZE(twl6040_reg); + codec->reg_cache = kmemdup(twl6040_reg, sizeof(twl6040_reg), + GFP_KERNEL); + if (codec->reg_cache == NULL) { + ret = -ENOMEM; + goto cache_err; + } + + mutex_init(&codec->mutex); + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + init_completion(&priv->ready); + + if (gpio_is_valid(audpwron)) { + ret = gpio_request(audpwron, "audpwron"); + if (ret) + goto gpio1_err; + + ret = gpio_direction_output(audpwron, 0); + if (ret) + goto gpio2_err; + + priv->codec_powered = 0; + } + + if (naudint) { + /* audio interrupt */ + ret = request_threaded_irq(naudint, NULL, + twl6040_naudint_handler, + IRQF_TRIGGER_LOW | IRQF_ONESHOT, + "twl6040_codec", codec); + if (ret) + goto gpio2_err; + } else { + if (gpio_is_valid(audpwron)) { + /* enable only codec ready interrupt */ + twl6040_write_reg_cache(codec, TWL6040_REG_INTMR, + ~TWL6040_READYMSK & TWL6040_ALLINT_MSK); + } else { + /* no interrupts at all */ + twl6040_write_reg_cache(codec, TWL6040_REG_INTMR, + TWL6040_ALLINT_MSK); + } + } + + /* init vio registers */ + twl6040_init_vio_regs(codec); + + /* power on device */ + ret = abe_twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY); + if (ret) + goto irq_err; + + ret = snd_soc_register_codec(codec); + if (ret) + goto reg_err; + + twl6040_codec = codec; + + ret = snd_soc_register_dais(abe_dai, ARRAY_SIZE(abe_dai)); + if (ret) + goto dai_err; + + return 0; + +dai_err: + snd_soc_unregister_codec(codec); + twl6040_codec = NULL; +reg_err: + abe_twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF); +irq_err: + if (naudint) + free_irq(naudint, codec); + if (gpio_is_valid(audpwron)) + gpio_free(audpwron); +gpio2_err: + pm_runtime_put_sync(&pdev->dev); +#ifndef CONFIG_PM_RUNTIME + if (twl_codec->device_shutdown) + twl_codec->device_shutdown(pdev); +#endif + if (gpio_is_valid(audpwron)) + gpio_free(audpwron); +gpio1_err: + kfree(codec->reg_cache); +cache_err: + kfree(priv); + return ret; +} + +static int __devexit abe_twl6040_codec_remove(struct platform_device *pdev) +{ + struct twl6040_data *priv = twl6040_codec->private_data; + struct twl4030_codec_data *pdata = pdev->dev.platform_data; + int audpwron = priv->audpwron; + int naudint = priv->naudint; + + if (gpio_is_valid(audpwron)) + gpio_free(audpwron); + + if (naudint) + free_irq(naudint, twl6040_codec); + + pm_runtime_put_sync(&pdev->dev); +#ifndef CONFIG_PM_RUNTIME + if (pdata->device_shutdown) + pdata->device_shutdown(pdev); +#endif + + snd_soc_unregister_dais(abe_dai, ARRAY_SIZE(abe_dai)); + snd_soc_unregister_codec(twl6040_codec); + + kfree(twl6040_codec); + twl6040_codec = NULL; + + return 0; +} + +static struct platform_driver abe_twl6040_codec_driver = { + .driver = { + .name = "twl6040_codec", + .owner = THIS_MODULE, + }, + .probe = abe_twl6040_codec_probe, + .remove = __devexit_p(abe_twl6040_codec_remove), +}; + +static int __init abe_twl6040_codec_init(void) +{ + return platform_driver_register(&abe_twl6040_codec_driver); +} +module_init(abe_twl6040_codec_init); + +static void __exit abe_twl6040_codec_exit(void) +{ + platform_driver_unregister(&abe_twl6040_codec_driver); +} +module_exit(abe_twl6040_codec_exit); + +MODULE_DESCRIPTION("ASoC ABE-TWL6040 codec driver"); +MODULE_AUTHOR("Misael Lopez Cruz"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/abe-twl6040.h b/sound/soc/codecs/abe-twl6040.h new file mode 100644 index 000000000000..74224648cd9f --- /dev/null +++ b/sound/soc/codecs/abe-twl6040.h @@ -0,0 +1,36 @@ +/* + * ALSA SoC ABE-TWL6040 codec driver + * + * Author: Misael Lopez Cruz <x0052729@ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#ifndef __ABE_TWL6040_H__ +#define __ABE_TWL6040_H__ + +extern struct snd_soc_dai abe_dai[]; +extern struct snd_soc_codec_device soc_codec_dev_abe_twl6040; + +struct twl6040_setup_data { + void (*codec_enable)(int enable); + void *jack; +}; + +void twl6040_hs_jack_detect(struct snd_soc_codec *codec, + struct snd_soc_jack *jack, int report); + +#endif /* End of __ABE_TWL6040_H__ */ diff --git a/sound/soc/codecs/abe/C_ABE_FW.CM b/sound/soc/codecs/abe/C_ABE_FW.CM new file mode 100644 index 000000000000..b4601cfd383b --- /dev/null +++ b/sound/soc/codecs/abe/C_ABE_FW.CM @@ -0,0 +1,1315 @@ +0x000000, +0x000000, +0x001000, +0x001000, +0x001000, +0x001000, +0x001000, +0x001000, +0x001000, +0x151000, +0x141000, +0x001000, +0x001000, +0x001000, +0x001000, +0x001000, +0x001001, +0x000000, +0x001011, +0x001011, +0x021031, +0x041051, +0x061071, +0x081091, +0x0a10b1, +0x0c10d1, +0x001001, +0x001001, +0x001000, +0x001000, +0x001001, +0x001001, +0x001000, +0x001000, +0x001000, +0x001000, +0x001000, +0x001001, +0x001000, +0x001000, +0x001000, +0x001000, +0x001041, +0x001000, +0x000000, +0x001000, +0x001000, +0x001000, +0x001001, +0x001001, +0x001000, +0x001000, +0x001000, +0x001000, +0x001001, +0x001001, +0x001001, +0x001001, +0x001000, +0x001001, +0x001001, +0x001000, +0x001000, +0x001001, +0x001001, +0x001001, +0x001001, +0x001001, +0x001001, +0x001000, +0x001000, +0x001000, +0x001000, +0x001000, +0x001001, +0x001000, +0x000000, +0x000000, +0x000000, +0x001000, +0x001000, +0x001000, +0x000000, +0x000000, +0x000000, +0x001000, +0x001001, +0x000001, +0x001000, +0x002d94, +0x001000, +0x001001, +0x000001, +0x001000, +0x002d94, +0x151000, +0x000000, +0x002d94, +0x002d94, +0x151000, +0x001000, +0x001001, +0x000001, +0x001000, +0x002dd4, +0x001000, +0x001001, +0x001000, +0x001000, +0x001001, +0x001001, +0x0010c1, +0x001000, +0x0010c1, +0x001001, +0x001000, +0x001000, +0x001061, +0x001061, +0x000000, +0x000000, +0x000000, +0x001071, +0x000000, +0x001071, +0x001000, +0x001000, +0x001031, +0x001061, +0x001000, +0x001061, +0x001061, +0x001000, +0x001000, +0x001031, +0x001061, +0x000000, +0x001000, +0x001041, +0x001001, +0x000000, +0x001000, +0x001011, +0x001001, +0x000000, +0x000000, +0x000000, +0x001000, +0x001011, +0x001001, +0x000000, +0x001000, +0x001001, +0x000001, +0x001000, +0x002d94, +0x002d94, +0x001041, +0x001041, +0x001000, +0x001000, +0x001000, +0x001011, +0x001001, +0x001000, +0x001011, +0x001001, +0x001000, +0x001011, +0x001001, +0x000000, +0x001000, +0x001011, +0x001001, +0x000000, +0x001000, +0x001001, +0x001001, +0x001031, +0x001061, +0x001061, +0x001061, +0x151000, +0x001000, +0x001000, +0x001081, +0x001001, +0x001001, +0x001001, +0x001001, +0x0000bd, +0x001041, +0x001000, +0x001041, +0x001001, +0x001001, +0x000000, +0x001001, +0x001000, +0x001051, +0x001000, +0x001001, +0x001051, +0x001001, +0x0000cb, +0x001000, +0x001001, +0x001001, +0x001001, +0x001001, +0x00fff9, +0x001000, +0x001000, +0x000000, +0x001000, +0x001091, +0x001000, +0x000000, +0x001091, +0x001091, +0x001091, +0x001091, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x001000, +0x001000, +0x0000fc, +0x000000, +0x000000, +0x001000, +0x001000, +0x001000, +0x001000, +0x001000, +0x004444, +0x001000, +0x001000, +0x001061, +0x001061, +0x001031, +0x001061, +0x001061, +0x001061, +0x001031, +0x001061, +0x001000, +0x001000, +0x001000, +0x001000, +0x001000, +0x001000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000008, +0x100001, +0x100001, +0x100001, +0x100001, +0x100001, +0x100001, +0x100001, +0x100001, +0x100001, +0x100001, +0x100001, +0x100001, +0x100001, +0x100001, +0x100001, +0x100001, +0x100001, +0x100001, +0x700001, +0x700001, +0x700001, +0x700001, +0x700001, +0x700001, +0x700001, +0x700001, +0x700001, +0x700001, +0x700001, +0x700001, +0x700001, +0x700001, +0x700001, +0x700001, +0x700001, +0x700001, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x040002, +0x000000, +0x000000, +0x000000, +0x000000, +0x023c94, +0x5ed280, +0x6a9a5d, +0xbf42f0, +0x056260, +0x0f02e8, +0xeb9d08, +0x13f0e8, +0xeed498, +0x0d8628, +0xf610e8, +0x06dac8, +0xfb8ca8, +0x02b6a8, +0x9d1d03, +0x3411d3, +0xe7110b, +0x0a8b43, +0xfc4793, +0x0208b8, +0x6d23e0, +0x66c791, +0xb09170, +0x142c90, +0x03c304, +0xf376f8, +0x0eb9d8, +0xf220d0, +0x0b9710, +0xf71850, +0x0661c0, +0xfbb618, +0x02b430, +0x99fe5b, +0x37ceab, +0xe408e3, +0x0c8ac3, +0xfb2e83, +0x0464a8, +0x782010, +0x61b101, +0xa7ab80, +0x1ef5c0, +0xfadbf0, +0xfa10a0, +0x0a1678, +0xf53c30, +0x09a2c0, +0xf83d98, +0x05c418, +0xfc0144, +0x0296d8, +0x9badf3, +0x386703, +0xe2e293, +0x0d8413, +0xfa9443, +0x05d8f0, +0x42ccf5, +0x5b6439, +0x9fa4a8, +0x2a0528, +0xf141c8, +0x5c184b, +0x04be58, +0xf8ea80, +0x073f50, +0xf9b218, +0x04f108, +0xfc6e8c, +0x0264f0, +0xa04a13, +0x3770b3, +0xe2819b, +0x0e2353, +0xfa1fab, +0x07d850, +0x498425, +0x53f3c9, +0x9a9170, +0x334af8, +0xe88c00, +0x0875d0, +0xdcf763, +0xfcaf74, +0x04b6b0, +0xfb4d68, +0x03fc0c, +0xfcf654, +0x022008, +0xa80de3, +0x348833, +0xe33ce3, +0x0e2e23, +0xf9f08b, +0x0aadb0, +0x4fdc61, +0x4b98d9, +0x989408, +0x3a6068, +0xe12888, +0x0ec210, +0xfa8240, +0x14e61b, +0x022f7c, +0xfcf624, +0x02f50c, +0xfd8f38, +0x7356ab, +0xb24bfb, +0x300053, +0xe4f083, +0x0db28b, +0xfa0193, +0x0e5198, +0x55cb8d, +0x427b21, +0x9968b8, +0x3f50c0, +0xdb27e8, +0x143b08, +0xf604a8, +0x03bf5c, +0xef1dc3, +0xa7922b, +0x7977cb, +0x8ca91b, +0x5c4373, +0xbe654b, +0x2a32fb, +0xe76cb3, +0x0cc843, +0xfa47fb, +0x12b270, +0x5b537d, +0x716ee8, +0x9cd140, +0x423000, +0xd68e40, +0x18d298, +0xf20c30, +0x06e2f8, +0xfd6ac0, +0x0eee5b, +0x3575db, +0xb6e5bb, +0x4398ab, +0xcbda13, +0x236a1b, +0xea894b, +0x0b83a3, +0xfaba2b, +0x17d078, +0x606a75, +0x5cd070, +0xa2a0d0, +0x4306e0, +0xd365f8, +0x1c7720, +0xeeab88, +0x09ae08, +0xfb4778, +0x7127a3, +0xf2fbcb, +0xe1581b, +0x2a1533, +0xda3733, +0x1be75b, +0xee2313, +0x09f65b, +0xfb4feb, +0x1db640, +0x64f695, +0x4768e0, +0xaaa7f0, +0x41db98, +0xd1bd70, +0x1f1310, +0xebf900, +0x0c0d48, +0xf961f0, +0x032d94, +0xb409ab, +0x0aabc3, +0x108f73, +0xe8fccb, +0x13f29b, +0xf2141b, +0x08330b, +0xfc00bb, +0x2477b8, +0x68d739, +0x318e40, +0xb4aec0, +0x3ebd10, +0xd19bf0, +0x2095b8, +0xea0778, +0x0def88, +0xf7c838, +0x046be0, +0xfdea24, +0x319613, +0xf7da9b, +0xf7ab83, +0x0bd423, +0xf635fb, +0x064ca3, +0xfcc40b, +0x2c29d8, +0x6be82d, +0x1ba3e0, +0xc06ee8, +0x39c7a8, +0xd2fe70, +0x20f5c0, +0xe8e4e8, +0x0f46d0, +0xf68680, +0x0575e0, +0xfd2110, +0x54da23, +0xe0c55b, +0x05c47b, +0x03d513, +0xfa6163, +0x0456bb, +0xfd9103, +0x34dcb8, +0x6e0619, +0x0617a0, +0xcd9208, +0x3327e0, +0xd5d488, +0x2033b8, +0xe89830, +0x1009d8, +0xf5a608, +0x064398, +0xfc7b10, +0x735b3b, +0xcc0f3b, +0x12cf0b, +0xfc3c73, +0xfe6f83, +0x0264b3, +0xfe5ef3, +0x3ea030, +0x6f129d, +0xf14c40, +0xdbbf58, +0x2b1358, +0xda0390, +0x1e5960, +0xe92088, +0x1034f8, +0xf52c00, +0x06cfe8, +0xfbfc98, +0x023104, +0xba501b, +0x1e683b, +0xf5460b, +0x023efb, +0x00878b, +0xff2633, +0x497dd8, +0x6ef2a5, +0xdda780, +0xea95d0, +0x21ca50, +0xdf6710, +0x1b7880, +0xea7720, +0x0fc900, +0xf51a98, +0x071778, +0xfba8d8, +0x027b84, +0xac06cb, +0x283a63, +0xef271b, +0x05b193, +0xfeceb3, +0xffdfeb, +0x5561e0, +0x6d93e5, +0xcbaf78, +0xf99118, +0x17aaa0, +0xe5c408, +0x17b2e0, +0xec89f0, +0x0ecde0, +0xf56fc8, +0x071978, +0xfb81d8, +0x02aad0, +0xa1a46b, +0x2ff333, +0xea151b, +0x08a803, +0xfd4a6b, +0x000003, +0x000020, +0x3fffe0, +0x000020, +0x3fffe0, +0x01b16b, +0xf855f3, +0x14740b, +0xd40cc3, +0x539323, +0xfdafb8, +0x03fef8, +0xf8cbc0, +0x107398, +0x7f26c5, +0xf19bc0, +0x06a660, +0xfc4508, +0x0228bc, +0xb2821b, +0x284343, +0xeda3d3, +0x069cf3, +0x03c6eb, +0xefdbfb, +0x2a4a93, +0xa5ff43, +0x02a8ac, +0xfb4da0, +0x081d20, +0xf146b8, +0x22b568, +0x7ca649, +0xe57730, +0x0c8b38, +0xf8ede8, +0x041728, +0xfdb6d0, +0x4b880b, +0xddec9b, +0x0c0373, +0x06309b, +0xe6e21b, +0x40ab93, +0xfdde98, +0x040178, +0xf8f1a0, +0x0c31f8, +0xe9b5b8, +0x367598, +0x788dfd, +0xdbb070, +0x1185c8, +0xf61488, +0x05bc08, +0xfcce9c, +0x68d11b, +0xd13c0b, +0x101e33, +0x08d62b, +0xddc993, +0x56a233, +0xfd2bf0, +0x054a20, +0xf6b500, +0x1012a8, +0xe26390, +0x4b56d0, +0x72f70d, +0xd45408, +0x157878, +0xf3cc50, +0x070c10, +0xfc1754, +0x7f746f, +0xc7c91b, +0x12ea3b, +0x0b96fb, +0xd501e3, +0x6b2573, +0xfc8844, +0x067398, +0xf4b188, +0x139340, +0xdb9f08, +0x60f058, +0x6c0395, +0xcf5d50, +0x185148, +0xf221f8, +0x07fff0, +0xfb9490, +0x023c70, +0xc1a1c3, +0x147503, +0x0e4b13, +0xcd04b3, +0x7d228f, +0xfbfbf8, +0x076f18, +0xf30060, +0x1688a8, +0xd5b880, +0x76d0d4, +0x63ddc5, +0xccb738, +0x1a0988, +0xf11b68, +0x089470, +0xfb4790, +0x025f04, +0xbeae3b, +0x14d9d3, +0x10c49b, +0xc650c3, +0x022e24, +0xfb8f00, +0x082ea8, +0xf1b920, +0x18ca30, +0xd0ff50, +0x4640a1, +0x5ab67d, +0xcc3da8, +0x1aa578, +0xf0b7e8, +0x08ca48, +0xfb2f48, +0x0266a0, +0xbeb5b3, +0x143ecb, +0x12d1ab, +0xc1642b, +0x02555c, +0xfb48b0, +0x08a5d0, +0xf0f0a0, +0x1a3350, +0xcdbf38, +0x50c415, +0x50c415, +0xcdbf38, +0x1a3350, +0xf0f0a0, +0x08a5d0, +0xfb48b0, +0x02555c, +0xc1642b, +0x12d1ab, +0x143ecb, +0xbeb5b3, +0x0266a0, +0xfb2f48, +0x08ca48, +0xf0b7e8, +0x1aa578, +0xcc3da8, +0x5ab67d, +0x4640a1, +0xd0ff50, +0x18ca30, +0xf1b920, +0x082ea8, +0xfb8f00, +0x022e24, +0xc650c3, +0x10c49b, +0x14d9d3, +0xbeae3b, +0x025f04, +0xfb4790, +0x089470, +0xf11b68, +0x1a0988, +0xccb738, +0x63ddc5, +0x76d0d4, +0xd5b880, +0x1688a8, +0xf30060, +0x076f18, +0xfbfbf8, +0x7d228f, +0xcd04b3, +0x0e4b13, +0x147503, +0xc1a1c3, +0x023c70, +0xfb9490, +0x07fff0, +0xf221f8, +0x185148, +0xcf5d50, +0x6c0395, +0x60f058, +0xdb9f08, +0x139340, +0xf4b188, +0x067398, +0xfc8844, +0x6b2573, +0xd501e3, +0x0b96fb, +0x12ea3b, +0xc7c91b, +0x7f746f, +0xfc1754, +0x070c10, +0xf3cc50, +0x157878, +0xd45408, +0x72f70d, +0x4b56d0, +0xe26390, +0x1012a8, +0xf6b500, +0x054a20, +0xfd2bf0, +0x56a233, +0xddc993, +0x08d62b, +0x101e33, +0xd13c0b, +0x68d11b, +0xfcce9c, +0x05bc08, +0xf61488, +0x1185c8, +0xdbb070, +0x788dfd, +0x367598, +0xe9b5b8, +0x0c31f8, +0xf8f1a0, +0x040178, +0xfdde98, +0x40ab93, +0xe6e21b, +0x06309b, +0x0c0373, +0xddec9b, +0x4b880b, +0xfdb6d0, +0x041728, +0xf8ede8, +0x0c8b38, +0xe57730, +0x7ca649, +0x22b568, +0xf146b8, +0x081d20, +0xfb4da0, +0x02a8ac, +0xa5ff43, +0x2a4a93, +0xefdbfb, +0x03c6eb, +0x069cf3, +0xeda3d3, +0x284343, +0xb2821b, +0x0228bc, +0xfc4508, +0x06a660, +0xf19bc0, +0x7f26c5, +0x107398, +0xf8cbc0, +0x03fef8, +0xfdafb8, +0x539323, +0xd40cc3, +0x14740b, +0xf855f3, +0x01b16b, +0x000003, +0x000003, +0x000003, +0x000003, +0x000003, +0x000003, +0x000003, +0x000003, +0x040002, +0x000003, +0x000003, +0x000003, +0x000003, +0x000003, +0x000003, +0x000003, +0x000003, +0x000003, +0x000020, +0x3fffe0, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x040002, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x040002, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x040002, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0xb29ef9, +0x06d0f0, +0x06f82a, +0x000003, +0xf907da, +0xf92f10, +0x4d6109, +0x5b69b8, +0x28bfdc, +0xfa6c52, +0x8de6c0, +0x074aaa, +0x7a7c54, +0x078e34, +0xe705e8, +0x2cd4fc, +0xcb8068, +0x2cd4fc, +0xe705e8, +0x078e34, +0xbcc9d9, +0x0d38aa, +0xdc89f2, +0x33e6a2, +0xd43b62, +0x143386, +0x4fad57, +0xfbc240, +0x07ba10, +0xf6e0d0, +0x07ba10, +0xfbc240, +0x4fad57, +0xb8ab0d, +0x0de5ae, +0xdb14ea, +0x358402, +0xd34f7e, +0x146b32, +0x882bbd, +0x0b38ba, +0xf4c74a, +0x77d445, +0x70255d, +0xf5085a, +0x0b75e6, +0x0b2ce8, +0xfc17ec, +0x14ffa0, +0x9543af, +0x14ffa0, +0xfc17ec, +0x0b2ce8, +0xb7e094, +0x0693b6, +0xee7e42, +0x1b0bae, +0xe6318e, +0x0e8672, +0x035ac0, +0xdae2df, +0x063e74, +0x1acf33, +0x063e74, +0xdae2df, +0x035ac0, +0xb1a5e4, +0x06f542, +0xedda66, +0x1b9aa6, +0xe5f54a, +0x0e8d72, +0x666669, +0x999999, +0x000003, +0x08c704, +0x000003, +0xf4b6f8, +0x000003, +0x0fcca4, +0x000003, +0xe5aaf0, +0x000003, +0x4eff30, +0x7c1680, +0x4eff30, +0x000003, +0xe5aaf0, +0x000003, +0x0fcca4, +0x000003, +0xf4b6f8, +0x000003, +0x08c704, +0x000003, +0x028e88, +0xb46d8b, +0x051de8, +0x183def, +0x04d91c, +0x183def, +0x051de8, +0xb46d8b, +0x028e88, +0xfd245c, +0x22e2b4, +0x9f3a1d, +0x09cf9e, +0xeb653a, +0x1cb806, +0xe5ac1e, +0x0ea2c6, +0x000003, +0x08c704, +0x000003, +0xf4b6f8, +0x000003, +0x0fcca4, +0x000003, +0xe5aaf0, +0x000003, +0x4eff30, +0x7c1680, +0x4eff30, +0x000003, +0xe5aaf0, +0x000003, +0x0fcca4, +0x000003, +0xf4b6f8, +0x000003, +0x08c704, +0x000003, +0x028e88, +0xb46d8b, +0x051de8, +0x183def, +0x04d91c, +0x183def, +0x051de8, +0xb46d8b, +0x028e88, +0xfd245c, +0x22e2b4, +0x9f3a1d, +0x09cf9e, +0xeb653a, +0x1cb806, +0xe5ac1e, +0x0ea2c6, +0x000003, +0x000003, +0x02c197, +0x05832b, +0x02c197, +0x000003, +0x000003, +0x84a705, +0x07da1a, +0x000003, +0x0430ab, +0x7ff7a1, +0x000003, +0x0430ab, +0x7ff7a1, +0x000003, +0x000003, +0x02c197, +0x05832b, +0x02c197, +0x000003, +0x000003, +0x84a705, +0x07da1a, +0x000003, +0x000003, +0x02c197, +0x05832b, +0x02c197, +0x000003, +0x000003, +0x84a705, +0x07da1a, +0x000003, +0x0430ab, +0x7ff7a1, +0x000003, +0x0430ab, +0x7ff7a1, +0x000003, +0x0430ab, +0x7ff7a1, +0x000003, +0x0430ab, +0x7ff7a1, +0x000020, +0x3fffe0, +0x000000, +0x000000, +0x000000, +0x000000, +0x040002, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x040002, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x000000, +0x040002, +0x000000, +0x000000, +0x000000, +0x000000, +0x269ec3, +0x0d0ff4, +0x051eba, +0x640001, +0x02f290, +0xfdd340, +0x02a810, +0x02a810, +0xfdd340, +0x02f290, +0x45a895, +0xf4a186, +0x18a312, +0xe445b2, +0x10419e, + + +#if 0 + /* numerator of the flat impulse response */ + 343932, 1023940, 2058156, 2784340, 2784340, 2058156, 1023940, 343932, + + 1636220, -7884808, 318670, -582210, 729130, -748022, 448410, + +#else + + /* numerator of the smoothed correction for the MCPDM bug */ + 687864, 2047884, 4116312, 5568684, 5568684, 4116312, 2047884, 687864, + + 1636220, -7884808, 318670, -582210, 729130, -748022, 448410, +#endif + +0xc1248b, +0xfd1080, +0xfaca4c, +0xfab048, +0xfdb0ac, +0x024f54, +0x054fb8, +0x0535b4, +0x02ef80, +0x3edb77, +0x1d92ec, +0x962b59, +0x0bd422, +0xe48132, +0x2dbdc2, +0xc7a94a, +0x33fbe6, +0xdd3502, +0x0fea26, + diff --git a/sound/soc/codecs/abe/C_ABE_FW.PM b/sound/soc/codecs/abe/C_ABE_FW.PM new file mode 100644 index 000000000000..f300f53f8d79 --- /dev/null +++ b/sound/soc/codecs/abe/C_ABE_FW.PM @@ -0,0 +1,2048 @@ +0x1600200f, +0x0a0011d0, +0x08200000, +0x08200000, +0x07800000, +0x1602c9ce, +0x014000e0, +0x014000e1, +0x014000e2, +0x014000e3, +0x014000e4, +0x014000e5, +0x014000e6, +0x014000e7, +0x014000e8, +0x014000e9, +0x014000ea, +0x014000eb, +0x014000ec, +0x014000ed, +0x014000ef, +0x014000ef, +0x144000e4, +0x9e000000, +0x0a203910, +0x9e000040, +0x0a203910, +0x9e000080, +0x0a203910, +0x9e0000c0, +0x0a203910, +0x9e080000, +0x0a203910, +0x9e080100, +0x0a203910, +0x9e080200, +0x0a203910, +0x9e080300, +0x0a203910, +0x9e080400, +0x0a203910, +0x9e080500, +0x0a203910, +0x9e080600, +0x0a203910, +0x9e080700, +0x0a203910, +0x9c050800, +0x0a203910, +0x16000010, +0x16000001, +0x17000102, +0x01400042, +0x17800103, +0x01400043, +0x98020000, +0x048004ff, +0x413ffcfe, +0x1600274d, +0x16023f4c, +0x0a200fe0, +0x1600274d, +0x16026b4c, +0x0a200fe0, +0x1600274d, +0x16023e4c, +0x0a200fe0, +0x403ffcfe, +0x048ffcff, +0x08200000, +0x048004ff, +0x413ffcfe, +0x1600274d, +0x1602414c, +0x0a200fe0, +0x1600274d, +0x1602534c, +0x0a200fe0, +0x1600274d, +0x1602404c, +0x0a200fe0, +0x403ffcfe, +0x048ffcff, +0x08200000, +0x048004ff, +0x413ffcfe, +0x1600274d, +0x1602434c, +0x0a200fe0, +0x1600274d, +0x1602544c, +0x0a200fe0, +0x1600274d, +0x1602424c, +0x0a200fe0, +0x403ffcfe, +0x048ffcff, +0x08200000, +0x048004ff, +0x413ffcfe, +0x1600274d, +0x16025a4c, +0x0a200fe0, +0x1600274d, +0x16028c4c, +0x0a200fe0, +0x1600274d, +0x16025b4c, +0x0a200fe0, +0x403ffcfe, +0x048ffcff, +0x08200000, +0x048004ff, +0x413ffcfe, +0x1600274d, +0x16025c4c, +0x0a200fe0, +0x1600274d, +0x16028d4c, +0x0a200fe0, +0x1600274d, +0x16025d4c, +0x0a200fe0, +0x403ffcfe, +0x048ffcff, +0x08200000, +0x048004ff, +0x413ffcfe, +0x1600274d, +0x16025e4c, +0x0a200fe0, +0x1600274d, +0x16024c4c, +0x0a200fe0, +0x1600274d, +0x16025f4c, +0x0a200fe0, +0x403ffcfe, +0x048ffcff, +0x08200000, +0x048004ff, +0x413ffcfe, +0x1600274d, +0x1602604c, +0x0a200fe0, +0x1600274d, +0x16024d4c, +0x0a200fe0, +0x1600274d, +0x1602614c, +0x0a200fe0, +0x403ffcfe, +0x048ffcff, +0x08200000, +0x048004ff, +0x413ffcfe, +0x1600274d, +0x1602624c, +0x0a200fe0, +0x1600274d, +0x16028e4c, +0x0a200fe0, +0x1600274d, +0x1602634c, +0x0a200fe0, +0x403ffcfe, +0x048ffcff, +0x08200000, +0x048004ff, +0x413ffcfe, +0x1600274d, +0x1602644c, +0x0a200fe0, +0x1600274d, +0x16028f4c, +0x0a200fe0, +0x1600274d, +0x1602654c, +0x0a200fe0, +0x403ffcfe, +0x048ffcff, +0x08200000, +0x048004ff, +0x413ffcfe, +0x1600274d, +0x1602664c, +0x0a200fe0, +0x1600274d, +0x16024e4c, +0x0a200fe0, +0x1600274d, +0x1602674c, +0x0a200fe0, +0x403ffcfe, +0x048ffcff, +0x08200000, +0x048004ff, +0x413ffcfe, +0x1600274d, +0x1602684c, +0x0a200fe0, +0x1600274d, +0x16024f4c, +0x0a200fe0, +0x1600274d, +0x1602694c, +0x0a200fe0, +0x403ffcfe, +0x048ffcff, +0x08200000, +0x048004ff, +0x413ffcfe, +0x1600274d, +0x16026c4c, +0x0a200fe0, +0x1600274d, +0x1602504c, +0x0a200fe0, +0x1600274d, +0x16026d4c, +0x0a200fe0, +0x403ffcfe, +0x048ffcff, +0x08200000, +0x048004ff, +0x413ffcfe, +0x1600274d, +0x16026e4c, +0x0a200fe0, +0x1600274d, +0x1602514c, +0x0a200fe0, +0x1600274d, +0x16026f4c, +0x0a200fe0, +0x403ffcfe, +0x048ffcff, +0x08200000, +0x9d0c8118, +0x07800000, +0x9f16001a, +0x9f12021a, +0x9f12031a, +0x9f12051a, +0x98800ee0, +0x9d0c8118, +0x08200000, +0x9d0c8118, +0x07800000, +0x9f15001a, +0x9f11041a, +0x98800f70, +0x9d0c8118, +0x08200000, +0x400002c0, +0x048002ff, +0x000000c5, +0x000004c6, +0x9c028000, +0x400006c7, +0x12000155, +0x013ffefe, +0xc00008c4, +0x1e080000, +0x020005de, +0x00000ac3, +0xdc02b160, +0x04c3ff2d, +0xdc01ba70, +0x128002dd, +0xdc02a440, +0x048fffdd, +0x9c061830, +0x0b200000, +0x003ffefe, +0x000002c4, +0x400004c5, +0x048ffeff, +0x000006c6, +0x000008c7, +0x9d02a040, +0x9d02a950, +0x9d01b260, +0x9d02bc70, +0x08200000, +0x1602bf48, +0x00000089, +0x1602beea, +0x400000ac, +0x1602be86, +0x40000066, +0x0600000c, +0x0400069b, +0x4a801280, +0x1600274d, +0x0a200fe0, +0x4000009c, +0x1602bece, +0x410000ec, +0x0600000c, +0x1600274d, +0x0a8013f0, +0x1602e003, +0x00000030, +0x00000231, +0x00000435, +0x04800211, +0x04400511, +0x1602bfe4, +0x0000004e, +0x0300010e, +0x04800211, +0x04400511, +0x0300010c, +0x04800211, +0x04400511, +0x03000109, +0x01000231, +0x0a200fe0, +0x04800299, +0x41000089, +0x05c00b90, +0x4ac01280, +0x1602bea5, +0x40000055, +0x1602bf84, +0x40000047, +0x1602bfee, +0x04000599, +0x400000e1, +0x04800177, +0x01000089, +0x41000047, +0x04a00111, +0x410000e1, +0x06000001, +0x4aa01570, +0x1602bfcd, +0x400000d6, +0x16022549, +0x41000089, +0x04800166, +0x010000d6, +0x1600c005, +0x1602c941, +0x16000002, +0x40000011, +0x1602c900, +0x9e0e0550, +0xdd140530, +0x160ffff4, +0x41000002, +0x06000001, +0x08400000, +0x01000004, +0x9d140550, +0x0a8011d0, +0x0a001570, +0x9d0c8118, +0x9c080018, +0x9f03fc10, +0x07800000, +0x98801660, +0x9d0c8118, +0x08200000, +0x9d0c8118, +0x9c180028, +0x9c180068, +0x9f03fc10, +0x07800000, +0x988016d0, +0x9d0c8118, +0x08200000, +0x9d0c8108, +0x9c180028, +0x9f03fc10, +0x07800000, +0x98801750, +0x9d0c8108, +0x08200000, +0x9d188108, +0x9c0c0038, +0x9f020410, +0x07800000, +0x988017c0, +0x9d188108, +0x08200000, +0xdc0c0018, +0x04a001dd, +0x9f040010, +0x9c0c00b8, +0x9f0400b0, +0x9d188108, +0x9f065810, +0x98801860, +0x07800000, +0x07800000, +0x9d188108, +0x08200000, +0x9c0c0018, +0x9f040010, +0x07800000, +0x07800000, +0x9d0e0010, +0x9f03c010, +0x07800000, +0x07800000, +0x9d188108, +0x988018f0, +0x08200000, +0x9d188108, +0x9d188148, +0x9c0c0018, +0x9f03c010, +0x07800000, +0x988019a0, +0x9d188108, +0x9d188148, +0x08200000, +0x9d188108, +0x9d188148, +0x9c0c0018, +0x9f020410, +0x07800000, +0x98801a30, +0x9d188108, +0x9d188148, +0x08200000, +0x16000474, +0x16000485, +0x16000496, +0x1600005d, +0x9c032340, +0x9c032c50, +0x9c033560, +0x9c180028, +0x9c180068, +0x9f03fc10, +0x9c1800a8, +0x9c1800e8, +0x9f03fcb0, +0x07800000, +0x9d0c8318, +0x9d0c84b8, +0x9c180028, +0x9c180068, +0x9f03fc10, +0x9c1800a8, +0x9c1800e8, +0x9f03fcb0, +0x07800000, +0x9d0c8518, +0x9d0c83b8, +0x9c180028, +0x9c180068, +0x9f03fc10, +0x9c1800a8, +0x9c1800e8, +0x9f03fcb0, +0x07800000, +0x9d0c8418, +0x9d0c85b8, +0x98801b30, +0x9d032340, +0x9d032c50, +0x9d033560, +0x08200000, +0x160004f4, +0x16000505, +0x16000516, +0x9c032340, +0x9c032c50, +0x9c033560, +0x1600005d, +0x9c0c0318, +0x9c0c04b8, +0x9f020410, +0x9f0204b0, +0x07800000, +0x9d188108, +0x9d188148, +0x9d188188, +0x9d1881c8, +0x9c0c03b8, +0x9c0c0518, +0x9f0204b0, +0x07800000, +0x9d188108, +0x9d188148, +0x9d188188, +0x9d1881c8, +0x9c0c0418, +0x9f020410, +0x9c0c05b8, +0x07800000, +0x9d188108, +0x9d188148, +0x9d188188, +0x9d1881c8, +0x98801da0, +0x9d032340, +0x9d032c50, +0x9d033560, +0x08200000, +0x1600000d, +0x9e0f00d0, +0x00800e0d, +0x07800000, +0x9c0c0038, +0x9f020430, +0x04a002dd, +0x07800000, +0x9d188108, +0x9c0c0038, +0x9f020430, +0x98802000, +0x9d188108, +0x08200000, +0x08200000, +0x08200000, +0x08200000, +0x08200000, +0x9c0c00c0, +0x9c030f10, +0x9c009020, +0x9c0c0468, +0x9d0c8530, +0x1600007d, +0x9f130462, +0x9f13056a, +0x9c0c0428, +0x9f130422, +0x9d0c8570, +0x16000004, +0x9f1780ea, +0x9f13052a, +0x9c0c0468, +0x9f130462, +0x9d0c8530, +0x16000005, +0x9f1380ea, +0x9f13056a, +0x9c0c0428, +0x9f130422, +0x9d0c8570, +0x07800000, +0x9f1380ea, +0x9f13052a, +0x9c0c0468, +0x9f130462, +0x9d0c8530, +0x988021c0, +0x9f1380ea, +0x9f13056a, +0x9c0c0428, +0x9f13042a, +0x9d0c8570, +0x16000006, +0x9f1380ea, +0x9f13052a, +0x16000007, +0x07800000, +0x9d0c8538, +0x9e048000, +0x9f1380ea, +0x9f1380ea, +0x9c031830, +0x07800000, +0x9d0c83c8, +0x07800000, +0x07800000, +0xa007026a, +0x9f0628b0, +0x07800000, +0x9d0c8248, +0x9d0c8190, +0x08200000, +0x9c180004, +0x9c180080, +0x16000004, +0x07800000, +0x9c043e60, +0x9c043f60, +0x9c0c02b0, +0x9c180628, +0xdc180668, +0x1f040030, +0x9f040070, +0x9e0f0040, +0x9d0c8138, +0x9d188708, +0x9d188748, +0x08200000, +0x1440000d, +0x40000004, +0x16000011, +0x40000205, +0x16000002, +0x40000406, +0x16000003, +0x400006d7, +0x16000000, +0x9c0c00b0, +0x9f03a0b0, +0x9e048000, +0xdc1803e0, +0x1f040020, +0x9e040040, +0x9f0400d0, +0x9c0c0090, +0x9e008000, +0x9d1883c0, +0x9c0c0240, +0xc10000d4, +0x1f040090, +0x010002d5, +0x010004d6, +0x010006d7, +0x9d0c8120, +0x08200000, +0x9c028c10, +0x1440000d, +0x00000004, +0x9c0c04b8, +0x9d06a40a, +0x9d06a40a, +0x9d06a40a, +0x9d06a40a, +0x9d06a40a, +0x40000205, +0x16000002, +0x40000406, +0x16000003, +0x400006d7, +0x16000000, +0x9d028c10, +0x16000011, +0x9f03a0b0, +0x9e048000, +0xdc1803e0, +0x1f040020, +0x9e040040, +0x9f0400d0, +0x9c0c0090, +0x9e008000, +0x9d1883c0, +0x9c0c0240, +0xc10000d4, +0x1f040090, +0x010002d5, +0x010004d6, +0x010006d7, +0x9d0c8120, +0x08200000, +0x9c038600, +0x07800000, +0x07800000, +0x9c180770, +0xdc100348, +0x160fff05, +0x9f000810, +0x9f118412, +0x9f001010, +0x9f002810, +0x9c0c00b8, +0x160ffd80, +0x9d0c8410, +0x9f1d8012, +0x9f001810, +0x9f0400d0, +0x9c0c0210, +0x16000204, +0xdd0e00b0, +0x16000005, +0x9f1d80b2, +0x9f0000b0, +0x9f0020b0, +0x9f0400d0, +0x05800560, +0x0a802aa0, +0x9c0c0510, +0x0a002ab0, +0x9c0c0618, +0x16000014, +0x9d0c81e8, +0x9d0c8148, +0x0a802b20, +0x9c0c05b0, +0x9c0c0510, +0x0a002b40, +0x9c0c06b8, +0x9c0c0618, +0x07800000, +0x9d0c81e8, +0x9d0c8148, +0x98802920, +0x9d180750, +0x08200000, +0x9d019220, +0x048002ff, +0x14400004, +0x413ffefe, +0x16000040, +0x9c010910, +0x0a203f50, +0x14400040, +0x9c030810, +0x16000171, +0x9c009f30, +0x9c019220, +0x0a203a50, +0x9c009830, +0x003ffefe, +0x048ffeff, +0x08200000, +0x40000024, +0x048002ff, +0x41000224, +0x16000005, +0x413ffefe, +0x04000400, +0x9e0f0150, +0x01000025, +0x0a202e50, +0x403ffefe, +0x16000007, +0x9e0f0170, +0x048ffeff, +0x08200000, +0x048002ff, +0x413ffefe, +0x16000005, +0x01000025, +0x0a202e50, +0x40000024, +0x16000005, +0x403ffefe, +0x04200454, +0x41000224, +0x048ffeff, +0x08200000, +0x048008ff, +0x413ff8f8, +0x1440000d, +0x9c038e10, +0x413ffaf9, +0x04a001dd, +0x413ffcfa, +0x16000001, +0x413ffefb, +0x160000f0, +0x9c100400, +0x9c100480, +0x9c1d06c8, +0x9f085030, +0x9c180678, +0x9c180650, +0x058001a0, +0x0aa03220, +0x04800144, +0x04400044, +0x07800000, +0x05800040, +0x9d180658, +0x0a803030, +0x9d040008, +0x9e090000, +0x07800000, +0x07800000, +0x9e0d0500, +0x0a003100, +0x05800160, +0x0ac030b0, +0x9e090000, +0x07800000, +0x07800000, +0x9e0d0500, +0x9d040508, +0x0a003100, +0x9d040008, +0x9e090000, +0x07800000, +0x9d040008, +0x9e0d0500, +0x05800160, +0x0ac03160, +0x0480014b, +0x044000bb, +0x4a003190, +0x1440004a, +0x0420040a, +0x04a001ab, +0x044000bb, +0x120001aa, +0x42000a38, +0x120001bb, +0x42000b39, +0x12000288, +0x12000299, +0x9e0e8280, +0xca003330, +0x1e0e8390, +0xdd040608, +0x05800160, +0x0ac032d0, +0x9d040008, +0x9e090000, +0x07800000, +0x05800040, +0x9e0d0500, +0x0aa03330, +0x9d040508, +0x0a003330, +0x9e090000, +0x05800040, +0x9d040008, +0x9e0d0500, +0x0a803330, +0x9d040508, +0x9c1d06c8, +0xdc1d0648, +0x1f0400b0, +0x9c100700, +0xdc1d06c8, +0x1f040010, +0x9d108480, +0x9f0940b0, +0x9d108700, +0x00000cc9, +0x06000008, +0x0aa03520, +0xdc1d0688, +0x14400005, +0x9c1d0608, +0x04a00255, +0xdd108480, +0x16000017, +0xdd108700, +0x160ffff8, +0x05800540, +0x0aa034e0, +0x05800160, +0x0ac034d0, +0x01000027, +0x0a0034e0, +0x01000028, +0x9e088000, +0xa0054dba, +0xa005c81a, +0x0a0035c0, +0xdd040608, +0x1e088000, +0xa0054dba, +0xa005c81a, +0x9f1f80b0, +0x9f1e0010, +0x9f040020, +0x9f040070, +0x9f020810, +0x9d040608, +0x9e0f0070, +0x9d0c8118, +0x98802ef0, +0x003ffefb, +0x003ffcfa, +0x003ffaf9, +0x003ff8f8, +0x048ff8ff, +0x08200000, +0x9c0c0018, +0x9f0b0010, +0x04a001dd, +0x07800000, +0x9d0c8318, +0x07800000, +0xa00602ba, +0x9c0c0018, +0x9f0b0010, +0x9d0c82b8, +0x07800000, +0x9d0c8318, +0x988036b0, +0x07800000, +0xa00602ba, +0x9c0c0118, +0x16000015, +0x9d0c81b8, +0x9d0c82b8, +0x9f092010, +0x9f0920b0, +0x9c1d05c0, +0x9f0930c0, +0x9c1d0548, +0x9f093860, +0x06000006, +0x0aa03830, +0x06000017, +0x0aa03830, +0x01800025, +0x9c0c0118, +0x9c0c01b0, +0x9f082010, +0x9f0820b0, +0x9c1d05c0, +0x9f0830c0, +0x9c1d0548, +0x9f083860, +0x06000006, +0x0aa03900, +0x06000017, +0x0aa03900, +0x01800125, +0x08200000, +0x07800000, +0x01400040, +0x01400041, +0x01400042, +0x01400043, +0x08200000, +0x16000474, +0x16000485, +0x16000496, +0x16000007, +0x9c032040, +0x9c032950, +0x9c033260, +0x9e0f0070, +0x9e0f0170, +0x9e0f0270, +0x9d032040, +0x9d032950, +0x9d033260, +0x08200000, +0x9c0c0018, +0x1440001d, +0x04a001dd, +0x9d0c8318, +0x07800000, +0x9c0c0018, +0xa00602ba, +0x07800000, +0x9d0c8318, +0x9d0c81b8, +0x9d0c02b8, +0x98803aa0, +0x07800000, +0xa00602ba, +0x07800000, +0x07800000, +0x9d0c81b8, +0x9d0c82b8, +0x08200000, +0x9c0c0018, +0x160000ad, +0x07800000, +0x9d0c8318, +0x07800000, +0x9c0c0018, +0xa00602ba, +0x07800000, +0x9d0c8318, +0x9d0c81b8, +0x9d0c02b8, +0x07800000, +0x9c0c0018, +0xa00602ba, +0x07800000, +0x9d0c8318, +0x9d0c02b8, +0x98803bd0, +0x9c0c0018, +0xa00602ba, +0x07800000, +0x9d0c8318, +0x9d0c81b8, +0x9d0c02b8, +0x07800000, +0xa00602ba, +0x07800000, +0x07800000, +0x9d0c02b8, +0x08200000, +0x9c0c0038, +0x1440001d, +0x04a001dd, +0x9d0c8338, +0x07800000, +0xa00602ba, +0xa006821a, +0x9c0c0038, +0x07800000, +0x9d0c8298, +0x9d0c8338, +0x9d0c8198, +0x98803db0, +0x07800000, +0xa00602ba, +0xa006821a, +0x07800000, +0x07800000, +0x9d0c8298, +0x9d0c8198, +0x08200000, +0xdc0c0018, +0x04a00201, +0x04a001dd, +0xdd040008, +0x06000001, +0x04a00111, +0x0aa03ed0, +0x9d0c8118, +0x98803eb0, +0x08200000, +0x9c0c02b0, +0x9c0c0018, +0x04a00205, +0x07800000, +0x9d0c8118, +0xdd0c81b8, +0x06000005, +0x04a00155, +0x0aa03fa0, +0x98803f60, +0x08200000, +0x9f160028, +0x9f168298, +0x04a001dd, +0x07800000, +0x9d0c8128, +0x07800000, +0x9f160028, +0x9f168298, +0x98804040, +0x9d0c8128, +0x08200000, +0x9f160020, +0x9f168098, +0x07800000, +0x9d0c8108, +0x9d0c8258, +0x988040b0, +0x08200000, +0x9f160010, +0x9f168068, +0x07800000, +0x07800000, +0x9d0c8128, +0x98804120, +0x08200000, +0x9d008810, +0x1280020d, +0x07800000, +0x9c038810, +0x9e0e0620, +0x04a001dd, +0x9f16801a, +0x9f12011a, +0x9f039810, +0x9f026810, +0x9f118610, +0x9f1680ba, +0x9f1201ba, +0x9f0398b0, +0x9f0268b0, +0x9f1186b0, +0x9d0c8718, +0x9d108248, +0x9d108208, +0x9d0c87b8, +0x9d1082c8, +0x9d108288, +0x988041f0, +0x08200000, +0x00800003, +0x00800105, +0x144000d7, +0x1440001d, +0x9c039830, +0x9c03aa50, +0x07800000, +0x9c0c0018, +0x9c0c02b8, +0x07800000, +0x07800000, +0x9d0c8128, +0x98804380, +0x1440007d, +0x08200000, +0x010002fe, +0x00801605, +0x16002c23, +0x12000155, +0x0200035e, +0x0b200000, +0x00800405, +0x16002c23, +0x12000155, +0x0200035e, +0x0b200000, +0x00801705, +0x16002c23, +0x12000155, +0x0200035e, +0x0b200000, +0x000002fe, +0x07800000, +0x08200000, +0x16000181, +0x04000101, +0x00000215, +0x00800b03, +0x00000017, +0x9e0e0450, +0x06000003, +0x16000004, +0x0aa04680, +0x01800354, +0x9c01b970, +0x00800715, +0x16002c26, +0x9c180404, +0x9c180480, +0x410004fe, +0x12000155, +0x00800d0d, +0x0200056e, +0x9c051820, +0x0a004730, +0x01800054, +0x9c01b870, +0x00800715, +0x16002c26, +0x9c180404, +0x9c180480, +0x410004fe, +0x12000155, +0x00800d0d, +0x0200056e, +0x9c041920, +0x04a001dd, +0x0b200000, +0x0000021d, +0x000004fe, +0x00000806, +0x008007d7, +0x00800f02, +0x40000014, +0x04c07f77, +0x9e0e0560, +0x40800a02, +0x04500273, +0x418007d3, +0x16000003, +0x07800000, +0x07800000, +0x9d140530, +0x08200000, +0x16000181, +0x04000101, +0x00800b03, +0x00000212, +0x00000017, +0x9e0e0420, +0x00000416, +0xdc180404, +0x06000003, +0x9c180480, +0x0aa04c00, +0x9c052b20, +0x9c042820, +0x9c023970, +0x07800000, +0x07800000, +0x9d01b060, +0x16000005, +0x160ffff6, +0x00800e04, +0x00800503, +0x05800420, +0x17c00565, +0x0ae04b10, +0x04000344, +0x05800420, +0x17c00565, +0x0ae04be0, +0x04000344, +0x05800420, +0x17c00565, +0x0ae04be0, +0x04000344, +0x05800420, +0x0ae04be0, +0x16000016, +0x04000344, +0x05800420, +0x0ae04be0, +0x04000344, +0x05800420, +0x17c00565, +0x0ae04be0, +0x14400065, +0x12000134, +0x04000443, +0x00800e04, +0x04000433, +0x07800000, +0x07800000, +0x0b400003, +0x9c100308, +0x16000012, +0x9d019320, +0x07800000, +0x07800000, +0x9c019020, +0x01800c05, +0x0a004ee0, +0x9c042b20, +0x9c052920, +0x9c023870, +0x07800000, +0x07800000, +0x9d00b360, +0x16000004, +0x16000005, +0x160ffff6, +0x00800503, +0x05800420, +0x17c00565, +0x0ae04e20, +0x04000344, +0x05800420, +0x17c00565, +0x0ae04ed0, +0x04000344, +0x05800420, +0x17c00565, +0x0ae04ed0, +0x04000344, +0x05800420, +0x0ae04ed0, +0x16000016, +0x04000344, +0x05800420, +0x17c00565, +0x0ae04ed0, +0x04000344, +0x05800420, +0x17c00565, +0x0ae04ed0, +0x14400065, +0x12000134, +0x04000443, +0x07800000, +0x07800000, +0x0b400003, +0x9c100308, +0x16000012, +0x9d019320, +0x07800000, +0x07800000, +0x9c019120, +0x01800c05, +0x00800715, +0x16002c26, +0x410004fe, +0x12000155, +0x00000202, +0x00800d04, +0x0200056e, +0x0400042d, +0x04a001dd, +0x0b200000, +0x00000806, +0x000004fe, +0x0000021d, +0x9e0e0560, +0x00800b05, +0x408007d7, +0x06000005, +0x40800f02, +0x04c07f77, +0x4a8050c0, +0x04500273, +0x00800a02, +0x9e088100, +0x07800000, +0x418007d3, +0x16000003, +0x12800277, +0x018003d7, +0x9d140530, +0x08200000, +0x00800a02, +0x9e088000, +0x07800000, +0x418007d3, +0x16000003, +0x12800277, +0x018000d7, +0x9d140530, +0x08200000, +0x00001807, +0x00801e02, +0x07800000, +0x9c01b970, +0x12000c23, +0x07800000, +0x9e088100, +0x07800000, +0x07800000, +0x04c3ff66, +0x04500366, +0x07800000, +0x16000003, +0x9e0c8100, +0x1602d406, +0x00800064, +0x1600003d, +0x04a00122, +0x9c03a040, +0x04800166, +0x9e0f0130, +0x04800433, +0x06000002, +0x9c0c0038, +0x9c0c0078, +0x9c0c00b8, +0x9d0c810c, +0x9d0c815c, +0x9d0c81ac, +0x988052c0, +0x0aa05240, +0x9e0f0120, +0x08200000, +0x40800605, +0x048004ff, +0x413ffcf8, +0x144000d3, +0x413ffef9, +0x144000e8, +0x16002c2e, +0x12000155, +0x420005ee, +0x04a001dd, +0x0b200000, +0x9e088000, +0x40000e05, +0x1440008e, +0x40800b09, +0x16000007, +0x9e0e8040, +0x9e0f0070, +0x04200355, +0x01000e05, +0x06000005, +0x0aa05680, +0x40000403, +0x12000f98, +0x40800a06, +0x12800f88, +0x06000008, +0x4a805590, +0x1600024d, +0x40001604, +0x04800199, +0x00001405, +0x01000e04, +0x01000c05, +0x0a0055e0, +0x40001204, +0x04800199, +0x00001005, +0x01000e04, +0x01000c05, +0x41800b09, +0x16000014, +0x05c00d30, +0x9e0e8050, +0x0a805670, +0x12000233, +0x9e0e0530, +0x9d140570, +0x0a005680, +0x01800014, +0x003ffef9, +0x003ffcf8, +0x048ffcff, +0x08200000, +0x0080070d, +0x00800203, +0x40800905, +0x048002ff, +0x413ffefe, +0x040003dd, +0x00000e04, +0x9c03a950, +0x06000004, +0x0a805830, +0x058004d0, +0x0ae05820, +0x042004d2, +0x1440004d, +0x0a205360, +0x00000e04, +0x05800420, +0x0ae057f0, +0x0a005830, +0x1440002d, +0x0a205360, +0x0a005830, +0x0a205360, +0x003ffefe, +0x40800905, +0x048ffeff, +0x9d03a950, +0x08200000, +0x048008ff, +0x9c039e30, +0x413ff8f8, +0x1440002d, +0x013ffaf9, +0x013ffcfa, +0x013ffefb, +0x9c018202, +0x9c028c12, +0x07800000, +0x9e088200, +0x9e090300, +0x07800000, +0x14400042, +0x14400083, +0x9e088400, +0x9e090500, +0x9d180634, +0x07800000, +0x14400085, +0x07800000, +0x07800000, +0x9d180654, +0x988058f0, +0x1602dfca, +0x16000842, +0x12000222, +0x408000a4, +0x1602e2cd, +0x408001a5, +0x16000007, +0x9e0e0220, +0x408002a8, +0x16000806, +0x408003a9, +0x12000155, +0x410000a7, +0x04500544, +0x9d140270, +0x408000d5, +0x12000288, +0x410002a7, +0x04500844, +0x408001d8, +0x12000399, +0x408002d6, +0x04500944, +0x410000d7, +0x1602e30a, +0x408003d9, +0x12000455, +0x410002d7, +0x04500544, +0x408000a5, +0x12000588, +0x408001a2, +0x04500844, +0x408002a8, +0x12000666, +0x410000a7, +0x04500644, +0x408003a6, +0x12000799, +0x410002a7, +0x04500944, +0x12000855, +0x04500544, +0x1602d38a, +0x1602d3cb, +0x12000922, +0x04500244, +0x12000a88, +0x04500844, +0x400000a8, +0x12000b66, +0x400000b9, +0x04500644, +0x04a00188, +0x04a00199, +0x16000005, +0x16000006, +0x06000008, +0x0aa05dd0, +0x16000015, +0x000002a8, +0x06000009, +0x0aa05e10, +0x16000016, +0x000002b9, +0x1602c742, +0x410000a8, +0x12000166, +0x410000b9, +0x04500655, +0x40800021, +0x1602bfcd, +0x41800027, +0x06000004, +0x0aa05f00, +0x06000005, +0x0aa05f80, +0x06000001, +0x0aa06010, +0x0a006110, +0x160000a8, +0x400000d6, +0x12000c88, +0x04500487, +0x07800000, +0x06000005, +0x9d180078, +0x0a805ff0, +0x160000c8, +0x400000d6, +0x12000c88, +0x04500587, +0x07800000, +0x07800000, +0x9d180078, +0x06000001, +0x0a806080, +0x160000d8, +0x400000d6, +0x12000c88, +0x04500187, +0x07800000, +0x07800000, +0x9d180078, +0x16000243, +0x12000233, +0x16000fb9, +0x16000016, +0x9e0e0530, +0x16000007, +0x9d03c890, +0x07800000, +0x9d140570, +0x1602c001, +0x16000013, +0x00000014, +0x1602bfe2, +0x00800041, +0x16000005, +0x160ffff6, +0x05800510, +0x01800045, +0x17000353, +0x17800363, +0x04800233, +0x01000023, +0x003ffefb, +0x003ffcfa, +0x003ffaf9, +0x003ff8f8, +0x048ff8ff, +0x08200000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x07800000, +0x07800000, +0x07800000, +0x08400000, +0x0a000000, diff --git a/sound/soc/codecs/abe/C_ABE_FW.SM32 b/sound/soc/codecs/abe/C_ABE_FW.SM32 new file mode 100644 index 000000000000..33113a3970fa --- /dev/null +++ b/sound/soc/codecs/abe/C_ABE_FW.SM32 @@ -0,0 +1,4464 @@ +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00049202, +0x00000000, +0x00049502, +0x00000000, +0x0006BE03, +0x00000000, +0x0004DF04, +0x00000000, +0x0004E404, +0x00000000, +0x0006B905, +0x00000000, +0x0001690C, +0x00000000, +0x0004E828, +0x00000000, +0x00053828, +0x00000000, +0x00075006, +0x00000000, +0x00026A18, +0x00000000, +0x00012012, +0x00000000, +0x00013212, +0x00011D00, +0x00014224, +0x00011E12, +0x00013012, +0x00120024, +0x00051000, +0x0001420E, +0x0001420E, +0x0001420E, +0x0001420E, +0x0001420E, +0x0001420E, +0x0001420E, +0x0001420E, +0x0001420E, +0x0001420E, +0x0001420E, +0x0001420E, +0x0001420E, +0x0001420E, +0x0001420E, +0x0001420E, +0x0001450C, +0x00015004, +0x0001450C, +0x00015404, +0x00000000, +0x00015802, +0x00000000, +0x00015A02, +0x0001510C, +0x00015C04, +0x0001510C, +0x00016004, +0x00000000, +0x0001750C, +0x00000000, +0x0001810C, +0x00000000, +0x00015D0C, +0x00000000, +0x0001510C, +0x00000000, +0x0001450C, +0x0001510C, +0x00015D0C, +0x00000000, +0x00018D0C, +0x00000000, +0x0001A50C, +0x00000000, +0x0001B10C, +0x00000000, +0x00023D0C, +0x00024909, +0x00024909, +0x00000000, +0x00016609, +0x000B0009, +0x00000000, +0x00000000, +0x0001990C, +0x00000000, +0x0006C10C, +0x00000000, +0x0002820C, +0x00026A18, +0x0002D60C, +0x00026A18, +0x0002E20C, +0x00000000, +0x00028E0C, +0x00026A00, +0x0002EE0C, +0x00026A00, +0x0002FA0C, +0x00000000, +0x00029A0C, +0x00026A18, +0x0003060C, +0x00026A18, +0x0003120C, +0x00026A18, +0x00031E0C, +0x00026A18, +0x00032A0C, +0x00000000, +0x0002A60C, +0x00026A18, +0x0003360C, +0x00026A18, +0x0003420C, +0x00000000, +0x0002B218, +0x00000000, +0x0002CA0C, +0x00026A18, +0x00034E0C, +0x00026A18, +0x00035A0C, +0x00026A18, +0x0003660C, +0x00026A18, +0x0003720C, +0x00026A18, +0x00037E0C, +0x00026A18, +0x00038A0C, +0x00000000, +0x00039678, +0x00000000, +0x00040E18, +0x00000000, +0x00042618, +0x00000000, +0x00043E18, +0x00000000, +0x00045618, +0x00067401, +0x00000202, +0x00000000, +0x0004860C, +0x000B0019, +0x00000000, +0x000B0009, +0x00000000, +0x00000006, +0x00000000, +0x00000000, +0x00049718, +0x00000000, +0x0004AF18, +0x00000000, +0x0004C718, +0x000B2D4C, +0x00000000, +0x000B2D4A, +0x00000000, +0x000B2D40, +0x00000000, +0x00000000, +0x0004E828, +0x00018213, +0x00016F13, +0x0004E828, +0x0002A100, +0x0002A200, +0x000B5508, +0x00580002, +0x0020F800, +0x00000000, +0x00051028, +0x00018213, +0x00016F13, +0x00051028, +0x00029F00, +0x0002A000, +0x000B5D08, +0x005D0002, +0x0020A800, +0x00000000, +0x00051028, +0x00000003, +0x00000000, +0x00580004, +0x0020F800, +0x005D0004, +0x0020A800, +0x00000000, +0x00051028, +0x00000000, +0x00053828, +0x0002B512, +0x0002A312, +0x00053828, +0x0003C300, +0x0003C400, +0x000B6D08, +0x0067000C, +0x001FE000, +0x00000000, +0x0005600C, +0x0001A50C, +0x0001450C, +0x00000000, +0x00056C0C, +0x00000000, +0x0005780C, +0x00026A18, +0x0005840C, +0x00026A18, +0x0005900C, +0x0005B519, +0x0005B519, +0x00000000, +0x0003F719, +0x00059C19, +0x00059C19, +0x0003DE19, +0x0003C519, +0x00000000, +0x00041D0D, +0x00000000, +0x0004100D, +0x0005CE0D, +0x0005CE0D, +0x0005DB0D, +0x0005DB0D, +0x0001000D, +0x00000000, +0x00030007, +0x00000000, +0x000B000D, +0x00000000, +0x0005E80F, +0x0005E80F, +0x000B000F, +0x00000000, +0x0005F70F, +0x0005F70F, +0x00000000, +0x00043707, +0x00000000, +0x00043E0D, +0x00060607, +0x00060607, +0x00060D0D, +0x00060D0D, +0x00000000, +0x00042A0D, +0x00061A0D, +0x00061A0D, +0x0006270D, +0x0006270D, +0x00000000, +0x00063402, +0x00000000, +0x00044B0D, +0x00063607, +0x00063607, +0x00063D0D, +0x00063D0D, +0x00030007, +0x00000000, +0x00000000, +0x00064A04, +0x00067609, +0x00067609, +0x0004A609, +0x0004A609, +0x000B0009, +0x00000000, +0x00000000, +0x00068502, +0x00067F03, +0x00067F03, +0x000B7D02, +0x0004AF03, +0x00000003, +0x002DFC00, +0x00000003, +0x002E2C00, +0x00000003, +0x002E3000, +0x00000000, +0x00068702, +0x00068203, +0x00068203, +0x000B8D02, +0x0004B203, +0x00000003, +0x002DFE00, +0x00000000, +0x00069128, +0x00018213, +0x00016F13, +0x00069128, +0x0004D300, +0x0004D400, +0x000B8208, +0x009A0002, +0x0020A800, +0x009A0004, +0x0020A800, +0x0006CD09, +0x0006CD09, +0x0006D609, +0x0006D609, +0x00000000, +0x0004B509, +0x00000000, +0x0004BE09, +0x00000000, +0x00068902, +0x0006DF03, +0x0006DF03, +0x000B8F02, +0x0004C703, +0x00000000, +0x00068D02, +0x0006E203, +0x0006E203, +0x000B9302, +0x0004CA03, +0x00000000, +0x00068B02, +0x0006E503, +0x0006E503, +0x000B9102, +0x0004CD03, +0x00000003, +0x002E2E00, +0x00000000, +0x00068F02, +0x0006E803, +0x0006E803, +0x000B9502, +0x0004D003, +0x00000003, +0x002E3200, +0x00000000, +0x0006EB0C, +0x00026A18, +0x0006F70C, +0x00026A18, +0x0007030C, +0x00072907, +0x00072907, +0x0007300D, +0x0007300D, +0x00070F0D, +0x00070F0D, +0x00071C0D, +0x00071C0D, +0x00000000, +0x00069128, +0x00000000, +0x00067401, +0x00000000, +0x00067501, +0x00064E11, +0x00064E11, +0x00065F15, +0x00065F15, +0x00045802, +0x00045A15, +0x00067501, +0x00065F15, +0x00046F11, +0x00067401, +0x00BB0011, +0x0000BC00, +0x00073D09, +0x00073D09, +0x00000000, +0x0004D509, +0x00074609, +0x00074609, +0x0004E709, +0x0004DE09, +0x000B4B00, +0x00074F01, +0x00002D30, +0x00000000, +0x00000000, +0x00078806, +0x00026A00, +0x0007A618, +0x0007BE0B, +0x0007BE0B, +0x00000000, +0x0004F40B, +0x00011D00, +0x00078E18, +0x0007BE0B, +0x0007BE0B, +0x0007A618, +0x00078806, +0x00C9000B, +0x0000CA00, +0x00000000, +0x00075606, +0x00026A18, +0x00075D18, +0x0004F004, +0x00075C00, +0x00011D00, +0x00077500, +0x000B8A00, +0x00077612, +0x00EA00D1, +0x000026FF, +0x00000000, +0x00075006, +0x00000000, +0x00100020, +0x00742C44, +0x0000002C, +0x00000000, +0x0004FF0F, +0x0007E113, +0x0007E113, +0x00000000, +0x00050E13, +0x00170013, +0x00000000, +0x0007F413, +0x0007F413, +0x00080713, +0x00080713, +0x00081A13, +0x00081A13, +0x00082D13, +0x00082D13, +0x00ED2D30, +0x00000000, +0x00001FE0, +0x00000000, +0x00002008, +0x00000000, +0x00002030, +0x00000000, +0x00002058, +0x00000000, +0x00002080, +0x00000000, +0x000020A8, +0x00000000, +0x000020D0, +0x00000000, +0x000020F8, +0x00000000, +0x00002120, +0x00000000, +0x00002148, +0x00000000, +0x00002170, +0x00000000, +0x00002198, +0x00000000, +0x000021C0, +0x00000000, +0x000021E8, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x000B0110, +0x00000000, +0x00088400, +0x00EE00ED, +0x00000600, +0x00000002, +0x00000000, +0x00000000, +0x00011D00, +0x00000000, +0x0001270C, +0x00000000, +0x00084008, +0x00000000, +0x00084810, +0x00000000, +0x00085818, +0x00000000, +0x00087048, +0x00221111, +0x00333322, +0x00000000, +0x00046E0C, +0x00000000, +0x00047A0C, +0x0001E10D, +0x0001E10D, +0x0001EE0D, +0x0001EE0D, +0x0001FB07, +0x0001FB07, +0x0002020D, +0x0002020D, +0x00020F0D, +0x00020F0D, +0x00021C0D, +0x00021C0D, +0x00022907, +0x00022907, +0x0002300D, +0x0002300D, +0x00000000, +0x0001BD0C, +0x00000000, +0x0001C90C, +0x00000000, +0x0001D502, +0x00000000, +0x0001D704, +0x00000000, +0x0001DB02, +0x00000000, +0x0001DD04, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00040000, +0x00040000, +0x00000001, +0x00000010, +0x00000001, +0x00000010, +0x00000001, +0x00000010, +0x00000001, +0x00000010, +0x00000001, +0x00000010, +0x00000001, +0x00000010, +0x00000001, +0x00000010, +0x00000001, +0x00000010, +0x00000001, +0x00000010, +0x00000001, +0x00000010, +0x00000001, +0x00000010, +0x00000001, +0x00000010, +0x00000001, +0x00000010, +0x00000001, +0x00000010, +0x00000001, +0x00000010, +0x00000001, +0x00000010, +0x00000001, +0x00000010, +0x00000000, +0x00000000, +0x00400000, +0x00400000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x0000001B, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000003, +0x00000000, +0x00000003, +0x00000000, +0x00000003, +0x00000000, +0x00000006, +0x00000000, +0x00000006, +0x00000000, +0x00000006, +0x00000000, +0x00000009, +0x00000000, +0x00000009, +0x00000000, +0x00000009, +0x00000000, +0x00000005, +0x00000000, +0x00000005, +0x00000000, +0x00000005, +0x00000000, +0x00000007, +0x00000000, +0x00000007, +0x00000000, +0x00000007, +0x00000000, +0x00000008, +0x00000000, +0x00000008, +0x00000000, +0x00000008, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, diff --git a/sound/soc/codecs/abe/C_ABE_FW.lDM b/sound/soc/codecs/abe/C_ABE_FW.lDM new file mode 100644 index 000000000000..5c6a615ae4fe --- /dev/null +++ b/sound/soc/codecs/abe/C_ABE_FW.lDM @@ -0,0 +1,16384 @@ +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00006210, +0x040003A5, +0x03EB040B, +0x00F903F5, +0x041200F0, +0x0431020A, +0x02BA028E, +0x02D90365, +0x041902CB, +0x000203D6, +0x026C0251, +0x0241056C, +0x007E0062, +0x008C0070, +0x00B6009A, +0x00C400A8, +0x00E000D2, +0x05880440, +0x03B80397, +0x00460038, +0x00030054, +0x016E0167, +0x017D0176, +0x01A50183, +0x01D301AC, +0x020601F8, +0x02080207, +0x05150209, +0x04850453, +0x019C018F, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00AF000C, +0x008E008D, +0x0090008F, +0x00000000, +0x002E000C, +0x00940093, +0x00960095, +0x00000000, +0x00B0000C, +0x00A200A1, +0x009100A3, +0x00000000, +0x00B0000C, +0x00A800A7, +0x00AA00A9, +0x00000000, +0x00B1000C, +0x00A500A4, +0x009200A6, +0x00000000, +0x00B1000C, +0x00AC00AB, +0x00AE00AD, +0x00000000, +0x0055000D, +0x00560003, +0x00590057, +0x00000013, +0x0055000D, +0x00560006, +0x00610057, +0x00000013, +0x0064000D, +0x00650008, +0x00680066, +0x00000012, +0x005A000E, +0x005B0002, +0x005E005C, +0x00000013, +0x005A000E, +0x005B0005, +0x0062005C, +0x00000013, +0x0097000E, +0x00980004, +0x009B0099, +0x00000013, +0x0097000E, +0x00980007, +0x009C0099, +0x00000013, +0x00010013, +0x00C300B7, +0x00DE0001, +0x00000000, +0x01060003, +0x00010084, +0x004E0001, +0x00000000, +0x01070003, +0x00010089, +0x00600001, +0x00000000, +0x01100003, +0x00010112, +0x004E0001, +0x00000000, +0x01100003, +0x00010113, +0x00600001, +0x00000000, +0x004B0003, +0x00010084, +0x004E0001, +0x00000000, +0x004B0003, +0x00010089, +0x00600001, +0x00000000, +0x00210010, +0x00710021, +0x004C0072, +0x00000000, +0x00B00000, +0x009D00B0, +0x008C009F, +0x00000000, +0x00B10000, +0x009E00B1, +0x008C00A0, +0x00000000, +0x00210010, +0x00C100B0, +0x008C00C2, +0x00000000, +0x0001001F, +0x00010001, +0x00000001, +0x00000000, +0x0001001E, +0x00010001, +0x00000001, +0x00000000, +0x000D000F, +0x000F000E, +0x00110010, +0x00000000, +0x00270000, +0x002A0029, +0x002C002B, +0x00000000, +0x00030000, +0x00750003, +0x00770074, +0x00000000, +0x00230000, +0x00760023, +0x00790073, +0x00000000, +0x00060000, +0x007F0006, +0x0078007D, +0x00000000, +0x00230000, +0x00800023, +0x0079007E, +0x00000000, +0x00280000, +0x00830106, +0x00790081, +0x00000000, +0x00840000, +0x00820002, +0x00770074, +0x00000000, +0x00280000, +0x00870107, +0x00790085, +0x00000000, +0x00890000, +0x00860005, +0x0078007D, +0x00000000, +0x01140000, +0x01080114, +0x00770074, +0x00000000, +0x01110000, +0x01090111, +0x00790073, +0x00000000, +0x01150000, +0x010A0115, +0x0078007D, +0x00000000, +0x01110000, +0x010B0111, +0x0079007E, +0x00000000, +0x002D0000, +0x010D0110, +0x00790081, +0x00000000, +0x01120000, +0x010C0112, +0x00770074, +0x00000000, +0x002D0000, +0x010F0110, +0x00790085, +0x00000000, +0x01130000, +0x010E0113, +0x0078007D, +0x00000000, +0x002D0000, +0x006F002E, +0x004C0070, +0x00000000, +0x002E0000, +0x008A00AF, +0x008C008B, +0x00000000, +0x00260000, +0x00B5004B, +0x00790081, +0x00000000, +0x00840000, +0x00B400B6, +0x00770074, +0x00000000, +0x00260000, +0x00B3004B, +0x00790085, +0x00000000, +0x00890000, +0x00B200B6, +0x0078007D, +0x00000000, +0x002E0000, +0x00BF00AF, +0x008C00C0, +0x00000000, +0x00500000, +0x007C0050, +0x007B00D6, +0x00000000, +0x004F0000, +0x007A004F, +0x007B00D6, +0x00000000, +0x00200007, +0x00010020, +0x00000017, +0x00000000, +0x00210007, +0x00010021, +0x00000018, +0x00000000, +0x00D40014, +0x00010001, +0x00D50001, +0x00000000, +0x00010020, +0x00010001, +0x00DF0001, +0x00000000, +0x00010020, +0x00010001, +0x00E00001, +0x00000000, +0x00010020, +0x00010001, +0x00E10001, +0x00000000, +0x00010020, +0x00010001, +0x00E20001, +0x00000000, +0x00010020, +0x00010001, +0x00E30001, +0x00000000, +0x00010020, +0x00010001, +0x00E40001, +0x00000000, +0x00010020, +0x00010001, +0x00E50001, +0x00000000, +0x00010020, +0x00010001, +0x00E60001, +0x00000000, +0x00010020, +0x00010001, +0x00E70001, +0x00000000, +0x00010020, +0x00010001, +0x00E80001, +0x00000000, +0x00010020, +0x00010001, +0x00E90001, +0x00000000, +0x00010020, +0x00010001, +0x00EA0001, +0x00000000, +0x00010020, +0x00010001, +0x00EB0001, +0x00000000, +0x00010020, +0x00010001, +0x00EC0001, +0x00000000, +0x00FB0021, +0x00010001, +0x00FD0001, +0x00000000, +0x00200005, +0x001C0026, +0x00000021, +0x00000000, +0x00290005, +0x001D0020, +0x00000020, +0x00000000, +0x00080006, +0x00250020, +0x0000001A, +0x00000000, +0x00080006, +0x00250021, +0x0000001B, +0x00000000, +0x00080006, +0x006A0069, +0x0000001E, +0x00000000, +0x00080006, +0x006A0028, +0x0000001F, +0x00000000, +0x00C60001, +0x00CE0051, +0x00000019, +0x00000000, +0x00030004, +0x000C0023, +0x004E0001, +0x00000000, +0x00060004, +0x000C0023, +0x00600001, +0x00000000, +0x01140004, +0x000C0111, +0x004E0001, +0x00000000, +0x01150004, +0x000C0111, +0x00600001, +0x00000000, +0x00210004, +0x00FF0050, +0x00FE0001, +0x00000000, +0x00200004, +0x00FF004F, +0x00FE0001, +0x00000000, +0x003A0002, +0x003C003B, +0x00000016, +0x00000000, +0x002F0002, +0x00310030, +0x00000013, +0x00000000, +0x00320002, +0x00340033, +0x00000014, +0x00000000, +0x00350002, +0x00370036, +0x00000015, +0x00000000, +0x00690002, +0x006C006B, +0x00000019, +0x00000000, +0x01110002, +0x00390038, +0x00000019, +0x00000000, +0x00080002, +0x00440043, +0x00000019, +0x00000000, +0x00B00002, +0x00B100B0, +0x00000019, +0x00000000, +0x00D30002, +0x00CD00C5, +0x00000019, +0x00000000, +0x003E0002, +0x0040003F, +0x00000019, +0x00000000, +0x00010009, +0x00010027, +0x00520001, +0x00000000, +0x00010009, +0x00010022, +0x00530001, +0x00000000, +0x00C5000B, +0x00C700C6, +0x00CC00C8, +0x00000000, +0x00CD000A, +0x00CF00CE, +0x00D200D0, +0x00000000, +0x0001001C, +0x00010001, +0x00000001, +0x00000000, +0x0001001A, +0x00010001, +0x00000001, +0x00000000, +0x0001001D, +0x00010001, +0x00000001, +0x00000000, +0x0001001B, +0x00010001, +0x00000001, +0x00000000, +0x00010018, +0x00010001, +0x00000001, +0x00000000, +0x00010016, +0x00010001, +0x00000001, +0x00000000, +0x00010019, +0x00010001, +0x00000001, +0x00000000, +0x00010017, +0x00010001, +0x00000001, +0x00000000, +0x00010022, +0x00010001, +0x00000001, +0x00000000, +0x00010024, +0x00010001, +0x00000001, +0x00000000, +0x00010025, +0x00010001, +0x00000001, +0x00000000, +0x00010026, +0x00010001, +0x00000001, +0x00000000, +0x00460023, +0x00D7003A, +0x00D900D8, +0x00000000, +0x00470023, +0x00DA002F, +0x00D900D8, +0x00000000, +0x00480023, +0x00DB0032, +0x00D900D8, +0x00000000, +0x00490023, +0x00DC0035, +0x00D900D8, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000010, +0x00000000, +0x00000000, +0x00002254, +0x00000000, +0x00180000, +0x00002250, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x0000000A, +0x00000000, +0x00000000, +0x00000000, +0x7FFF7FFF, +0x7FFF7FFF, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000004, +0x00000001, +0x00000000, +0x00000000, +0x00000000, +0x003FFFF0, +0x00000000, +0x00400000, +0x00000004, +0x00000001, +0x00000000, +0x00000000, +0x00000000, +0x003FFFF0, +0x00000000, +0x00400000, +0x0182016F, +0x01A80195, +0x01CE01BB, +0x01F401E1, +0x021A0207, +0x0240022D, +0x02660253, +0x028C0279, +0x00000004, +0x00000001, +0x00000000, +0x00000000, +0x00000000, +0x003FFFF0, +0x00000000, +0x00400000, +0x02B502A3, +0x02D902C7, +0x02FD02EB, +0x0321030F, +0x03450333, +0x03690357, +0x038D037B, +0x03B1039F, +0x00008363, +0x00000428, +0x00000000, +0x00003800, +0x000000FF, +0x00000004, +0x00000001, +0x00000000, +0x00000000, +0x00000000, +0x003FFFF0, +0x00000000, +0x00400000, +0x00000000, +0x00000000, +0x00000000, +0x00008363, +0x00000428, +0x00008363, +0x00000428, +0x00008363, +0x00000428, +0x00008363, +0x00000428, +0x00008363, +0x00000428, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, +0x00000000, diff --git a/sound/soc/codecs/abe/C_ABE_FW_SIZE.h b/sound/soc/codecs/abe/C_ABE_FW_SIZE.h new file mode 100644 index 000000000000..3221b53e9068 --- /dev/null +++ b/sound/soc/codecs/abe/C_ABE_FW_SIZE.h @@ -0,0 +1,6 @@ +/* + FW 05.10 MEMORY SIZES +*/ +#define ABE_DMEM_SIZE_OPTIMIZED 16384 +#define ABE_SMEM_SIZE_OPTIMIZED 15360 +#define ABE_CMEM_SIZE_OPTIMIZED 6552
\ No newline at end of file diff --git a/sound/soc/codecs/abe/Makefile b/sound/soc/codecs/abe/Makefile new file mode 100644 index 000000000000..4dd762827518 --- /dev/null +++ b/sound/soc/codecs/abe/Makefile @@ -0,0 +1,10 @@ +snd-soc-abe-hal-objs += abe_api.o \ + abe_dbg.o \ + abe_ext.o \ + abe_ini.o \ + abe_irq.o \ + abe_lib.o \ + abe_seq.o \ + +obj-$(CONFIG_SND_SOC_ABE_TWL6040) += snd-soc-abe-hal.o + diff --git a/sound/soc/codecs/abe/abe_api.c b/sound/soc/codecs/abe/abe_api.c new file mode 100644 index 000000000000..75713ba75896 --- /dev/null +++ b/sound/soc/codecs/abe/abe_api.c @@ -0,0 +1,1625 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#include "abe_main.h" +#include "abe_typedef.h" + +static abe_uint32 ABE_FW_PM[ABE_PMEM_SIZE / 4] = { +#include "C_ABE_FW.PM" +}; +static abe_uint32 ABE_FW_CM[ABE_CMEM_SIZE / 4] = { +#include "C_ABE_FW.CM" +}; +static abe_uint32 ABE_FW_DM[ABE_DMEM_SIZE / 4] = { +#include "C_ABE_FW.lDM" +}; +static abe_uint32 ABE_FW_SM[ABE_SMEM_SIZE / 4] = { +#include "C_ABE_FW.SM32" +}; + +/** +* @fn abe_reset_hal() +* +* Operations : reset the HAL by reloading the static variables and default AESS registers. +* Called after a PRCM cold-start reset of ABE +* +* @see ABE_API.h +*/ +void abe_reset_hal(void) +{ + /* init hardware components */ + abe_hw_configuration(); +} + +/** +* @fn abe_load_fwl() +* +* Operations : +* loads the Audio Engine firmware, generate a single pulse on the Event generator +* to let execution start, read the version number returned from this execution. +* +* @see ABE_API.h +*/ +void abe_load_fw_param(abe_uint32 *PMEM, abe_uint32 PMEM_SIZE, + abe_uint32 *CMEM, abe_uint32 CMEM_SIZE, + abe_uint32 *SMEM, abe_uint32 SMEM_SIZE, + abe_uint32 *DMEM, abe_uint32 DMEM_SIZE) +{ + static abe_uint32 warm_boot; + abe_uint32 event_gen; + +#if PC_SIMULATION + /* the code is loaded from the Checkers */ +#else + /* do not load PMEM */ + if (warm_boot) { + /* Stop the event Generator */ + event_gen = 0; + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_ATC, + EVENT_GENERATOR_START, &event_gen, 4); + + /* Now we are sure the firmware is stalled */ + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_CMEM, 0, CMEM, CMEM_SIZE); + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_SMEM, 0, SMEM, SMEM_SIZE); + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, 0, DMEM, DMEM_SIZE); + + /* Restore the event Generator status */ + event_gen = 1; + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_ATC, + EVENT_GENERATOR_START, &event_gen, 4); + } else { + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_PMEM, 0, PMEM, PMEM_SIZE); + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_CMEM, 0, CMEM, CMEM_SIZE); + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_SMEM, 0, SMEM, SMEM_SIZE); + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, 0, DMEM, DMEM_SIZE); + } + + warm_boot = 1; +#endif +} + +void abe_load_fw(void) +{ + abe_load_fw_param(ABE_FW_PM, sizeof (ABE_FW_PM), + ABE_FW_CM, sizeof(ABE_FW_CM), + ABE_FW_SM, sizeof(ABE_FW_SM), + ABE_FW_DM, sizeof(ABE_FW_DM)); + + abe_reset_all_ports(); + abe_build_scheduler_table(); + abe_reset_all_sequence(); + abe_select_main_port(PDM_DL_PORT); +} + +/* + * ABE_HARDWARE_CONFIGURATION + * + * Parameter : + * U : use-case description list (pointer) + * H : pointer to the output structure + * + * Operations : + * return a structure with the HW thresholds compatible with the HAL/FW/AESS_ATC + * will be upgraded in FW06 + * + * Return value : + * None. + */ +void abe_read_hardware_configuration(abe_use_case_id *u, abe_opp_t *o, abe_hw_config_init_t *hw) +{ + abe_read_use_case_opp(u, o); + + hw->MCPDM_CTRL__DIV_SEL = 0; /* 0: 96kHz 1:192kHz */ + hw->MCPDM_CTRL__CMD_INT = 1; /* 0: no command in the FIFO, 1: 6 data on each lines (with commands) */ + hw->MCPDM_CTRL__PDMOUTFORMAT = 0; /* 0:MSB aligned 1:LSB aligned */ + hw->MCPDM_CTRL__PDM_DN5_EN = 1; + hw->MCPDM_CTRL__PDM_DN4_EN = 1; + hw->MCPDM_CTRL__PDM_DN3_EN = 1; + hw->MCPDM_CTRL__PDM_DN2_EN = 1; + hw->MCPDM_CTRL__PDM_DN1_EN = 1; + hw->MCPDM_CTRL__PDM_UP3_EN = 0; + hw->MCPDM_CTRL__PDM_UP2_EN = 1; + hw->MCPDM_CTRL__PDM_UP1_EN = 1; + hw->MCPDM_FIFO_CTRL_DN__DN_TRESH = MCPDM_DL_ITER/6; /* All the McPDM_DL FIFOs are enabled simultaneously */ + hw->MCPDM_FIFO_CTRL_UP__UP_TRESH = MCPDM_UL_ITER/2; /* number of ATC access upon AMIC DMArequests, 2 the FIFOs channels are enabled */ + + hw->DMIC_CTRL__DMIC_CLK_DIV = 0; /* 0:2.4MHz 1:3.84MHz */ + hw->DMIC_CTRL__DMICOUTFORMAT = 0; /* 0:MSB aligned 1:LSB aligned */ + hw->DMIC_CTRL__DMIC_UP3_EN = 1; + hw->DMIC_CTRL__DMIC_UP2_EN = 1; + hw->DMIC_CTRL__DMIC_UP1_EN = 1; + hw->DMIC_FIFO_CTRL__DMIC_TRESH = DMIC_ITER/6; /* 1*(DMIC_UP1_EN+ 2+ 3)*2 OCP read access every 96/88.1 KHz. */ + + hw->MCBSP_SPCR1_REG__RJUST = 1; /* 1:MSB 2:LSB aligned */ + hw->MCBSP_THRSH2_REG_REG__XTHRESHOLD = 1; + hw->MCBSP_THRSH1_REG_REG__RTHRESHOLD = 1; + + hw->AESS_EVENT_GENERATOR_COUNTER__COUNTER_VALUE = EVENT_GENERATOR_COUNTER_DEFAULT; /* 2050 gives about 96kHz */ + hw->AESS_EVENT_SOURCE_SELECTION__SELECTION = 1; /* 0: DMAreq, 1:Counter */ + hw->AESS_AUDIO_ENGINE_SCHEDULER__DMA_REQ_SELECTION = ABE_ATC_MCPDMDL_DMA_REQ; /* 5bits DMAreq selection */ + + hw->HAL_EVENT_SELECTION = EVENT_TIMER; +} + +/* + * ABE_DEFAULT_CONFIGURATION + * + * Parameter : + * use-case-ID : "LP player", "voice-call" use-cases as defined in the paragraph + * "programming use-case sequences" + * Param 1, 2, 3, 4 used for non regression tests + * + * Operations : + * private API used during development. Loads all the necessary parameters and data + * patterns to allow a stand-alone functional test without the need of. + * + * Return value : + * None. + */ +void abe_default_configuration(abe_uint32 use_case) +{ + abe_data_format_t format; + abe_dma_t dma_sink; + abe_uint32 data_sink; + abe_use_case_id UC2[] = {ABE_AUDIO_PLAYER_ON_HEADSET_OR_EARPHONE, ABE_RINGER_TONES, (abe_use_case_id)0}; + abe_use_case_id UC5[] = {ABE_AUDIO_PLAYER_ON_HEADSET_OR_EARPHONE, (abe_use_case_id)0}; + abe_opp_t OPP; + abe_hw_config_init_t CONFIG; + + abe_load_fw(); + + switch (use_case) { + /* voice ul/dl on earpiece + MM_DL on IHF */ + case UC2_VOICE_CALL_AND_IHF_MMDL: + /* enable one of the preloaded and programmable routing + * configuration for the uplink paths + * To be added here: + * - Device driver initialization following + * abe_read_hardware_configuration() returned data + * McPDM_DL : 6 slots activated (5 + Commands) + * DMIC : 6 microphones activated + * McPDM_UL : 2 microphones activated (No status) + */ + abe_read_hardware_configuration(UC2, &OPP, &CONFIG); /* check hw config and opp config */ + abe_set_opp_processing(OPP); /* sets the OPP100 on FW05.xx */ + abe_write_event_generator(CONFIG.HAL_EVENT_SELECTION); /* "tick" of the audio engine */ + /* mixers' configuration = voice on earphone + music on hands-free path */ + abe_write_mixer(MIXDL1, GAIN_0dB, RAMP_1MS, MIX_DL1_INPUT_VX_DL); + abe_write_mixer(MIXDL2, GAIN_0dB, RAMP_50MS, MIX_DL2_INPUT_MM_DL); + + abe_enable_data_transfer(MM_UL2_PORT); + abe_enable_data_transfer(MM_UL_PORT); + abe_enable_data_transfer(MM_DL_PORT); /* enable all the data paths */ + abe_enable_data_transfer(VX_DL_PORT); + abe_enable_data_transfer(VX_UL_PORT); + abe_enable_data_transfer(PDM_UL_PORT); + abe_enable_data_transfer(DMIC_PORT); + abe_enable_data_transfer(PDM_DL_PORT); + abe_enable_data_transfer(TONES_DL_PORT); + break; + case UC5_PINGPONG_MMDL: + /* Ping-Pong access through MM_DL using Left/Right + * 16bits/16bits data format + * To be added here: + * - Device driver initialization following abe_read_hardware_configuration() returned data + * McPDM_DL : 6 slots activated (5 + Commands) + * DMIC : 6 microphones activated + * McPDM_UL : 2 microphones activated (No status) + */ + abe_read_hardware_configuration(UC5, &OPP, &CONFIG); /* check hw config and opp config */ + abe_set_opp_processing(OPP); /* sets the OPP100 on FW05.xx */ + abe_write_event_generator(CONFIG.HAL_EVENT_SELECTION); /* "tick" of the audio engine */ + + /* MM_DL init: overwrite the previous default initialization made above */ + format.f = 48000; + format.samp_format = MONO_MSB; + + /* connect a Ping-Pong SDMA protocol to MM_DL port + * with Ping-Pong 576 mono samples + * (12x4 bytes for each ping & pong size) + */ + abe_connect_dmareq_ping_pong_port(MM_DL_PORT, &format, ABE_CBPR0_IDX, (12 * 4), &dma_sink); + + /* mixers' configuration = voice on earphone + music on hands-free path */ + abe_write_mixer(MIXDL1, GAIN_0dB, RAMP_2MS, MIX_DL1_INPUT_MM_DL); + abe_write_mixer(MIXDL2, GAIN_0dB, RAMP_50MS, MIX_DL2_INPUT_MM_DL); + + /* Here: connect the sDMA to "dma_sink" content */ + abe_enable_data_transfer(MM_DL_PORT); /* enable all the data paths */ + abe_enable_data_transfer(PDM_DL1_PORT); + break; + case UC6_PINGPONG_MMDL_WITH_IRQ: + /* Ping-Pong using the IRQ instead of the sDMA */ + abe_read_hardware_configuration(UC5, &OPP, &CONFIG); /* check hw config and opp config */ + abe_set_opp_processing(OPP); /* sets the OPP100 on FW05.xx */ + abe_write_event_generator(CONFIG.HAL_EVENT_SELECTION); /* "tick" of the audio engine */ + + /* MM_DL init: overwrite the previous default initialization made above */ + format.f = 48000; + format.samp_format = STEREO_16_16; + + /* connect a Ping-Pong cache-flush protocol to MM_DL port + * with 50Hz (20ms) rate + */ + abe_add_subroutine(&abe_irq_pingpong_player_id, + (abe_subroutine2) abe_default_irq_pingpong_player, + SUB_0_PARAM, (abe_uint32*)0); + #define N_SAMPLES_BYTES (120 *4) + abe_connect_irq_ping_pong_port(MM_DL_PORT, &format, + abe_irq_pingpong_player_id, N_SAMPLES_BYTES, &data_sink, + PING_PONG_WITH_MCU_IRQ); + + /* mixers' configuration = voice on earphone + music on hands-free path */ + abe_write_mixer(MIXDL1, GAIN_0dB, RAMP_2MS, MIX_DL1_INPUT_MM_DL); + abe_write_mixer(MIXDL2, GAIN_0dB, RAMP_50MS, MIX_DL2_INPUT_MM_DL); + + abe_enable_data_transfer(MM_DL_PORT); /* enable all the data paths */ + abe_enable_data_transfer(PDM_DL1_PORT); + break; + case UC71_STOP_ALL: + abe_disable_data_transfer(MM_UL2_PORT); + abe_disable_data_transfer(MM_DL_PORT); + abe_disable_data_transfer(VX_DL_PORT); + abe_disable_data_transfer(VX_UL_PORT); + abe_disable_data_transfer(PDM_UL_PORT); + abe_disable_data_transfer(DMIC_PORT); + abe_disable_data_transfer(PDM_DL_PORT); + break; + case UC72_ENABLE_ALL: + abe_enable_data_transfer(MM_UL2_PORT); + abe_enable_data_transfer(MM_DL_PORT); + abe_enable_data_transfer(VX_DL_PORT); + abe_enable_data_transfer(VX_UL_PORT); + abe_enable_data_transfer(PDM_UL_PORT); + abe_enable_data_transfer(DMIC_PORT); + abe_enable_data_transfer(PDM_DL_PORT); + break; + default: + break; + } +} + +/* + * ABE_IRQ_PROCESSING + * + * Parameter : + * No parameter + * + * Operations : + * This subroutine is call upon reception of "MA_IRQ_99 ABE_MPU_IRQ" ABE interrupt + * This subroutine will check the IRQ_FIFO from the AE and act accordingly. + * Some IRQ source are originated for the delivery of "end of time sequenced tasks" + * notifications, some are originated from the Ping-Pong protocols, some are generated from + * the embedded debugger when the firmware stops on programmable break-points, etc … + * + * Return value : + * None. + */ +void abe_irq_processing(void) +{ + abe_uint32 clear_abe_irq; + abe_uint32 abe_irq_dbg_write_ptr, i, cmem_src, sm_cm = 0; + abe_irq_data_t IRQ_data; +#define IrqFiFoMask ((D_McuIrqFifo_sizeof >> 2) - 1) + + /* extract the write pointer index from CMEM memory (INITPTR format) */ + /* CMEM address of the write pointer in bytes */ + cmem_src = MCU_IRQ_FIFO_ptr_labelID * 4; + abe_block_copy(COPY_FROM_ABE_TO_HOST, ABE_CMEM, cmem_src, + (abe_uint32*)&abe_irq_dbg_write_ptr, + sizeof (abe_irq_dbg_write_ptr)); + abe_irq_dbg_write_ptr = sm_cm >> 16; /* AESS left-pointer index located on MSBs */ + abe_irq_dbg_write_ptr &= 0xFF; + + /* loop on the IRQ FIFO content */ + for (i = 0; i < D_McuIrqFifo_sizeof; i++) { + /* stop when the FIFO is empty */ + if (abe_irq_dbg_write_ptr == abe_irq_dbg_read_ptr) + break; + /* read the IRQ/DBG FIFO */ + abe_block_copy(COPY_FROM_ABE_TO_HOST, ABE_DMEM, + D_McuIrqFifo_ADDR + (i << 2), (abe_uint32 *)&IRQ_data, + sizeof (IRQ_data)); + abe_irq_dbg_read_ptr = (abe_irq_dbg_read_ptr + 1) & IrqFiFoMask; + + /* select the source of the interrupt */ + switch (IRQ_data.tag) { + case IRQtag_APS: + abe_irq_aps(IRQ_data.data); + break; + case IRQtag_PP: + abe_irq_ping_pong(); + break; + case IRQtag_COUNT: + abe_irq_check_for_sequences(IRQ_data.data); + break; + default: + break; + } + } + + abe_monitoring(); + + clear_abe_irq = 1; + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_ATC, ABE_MCU_IRQSTATUS, + &clear_abe_irq, 4); +} + +/* + * ABE_SELECT_MAIN_PORT + * + * Parameter : + * id : audio port name + * + * Operations : + * tells the FW which is the reference stream for adjusting + * the processing on 23/24/25 slots + * + * Return value: + * None. + */ +void abe_select_main_port (abe_port_id id) +{ + abe_uint32 selection; + + /* flow control */ + selection = D_IOdescr_ADDR + id*sizeof(ABE_SIODescriptor) + flow_counter_; + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, D_Slot23_ctrl_ADDR, &selection, 4); +} + +/* + * ABE_WRITE_EVENT_GENERATOR + * + * Parameter : + * e: Event Generation Counter, McPDM, DMIC or default. + * + * Operations : + * load the AESS event generator hardware source. Loads the firmware parameters + * accordingly. Indicates to the FW which data stream is the most important to preserve + * in case all the streams are asynchronous. If the parameter is "default", let the HAL + * decide which Event source is the best appropriate based on the opened ports. + * + * When neither the DMIC and the McPDM are activated the AE will have its EVENT generator programmed + * with the EVENT_COUNTER. The event counter will be tuned in order to deliver a pulse frequency higher + * than 96 kHz. The DPLL output at 100% OPP is MCLK = (32768kHz x6000) = 196.608kHz + * The ratio is (MCLK/96000)+(1<<1) = 2050 + * (1<<1) in order to have the same speed at 50% and 100% OPP (only 15 MSB bits are used at OPP50%) + * + * Return value : + * None. + */ +void abe_write_event_generator(abe_event_id e) +{ + abe_uint32 event, selection, counter, start; + + counter = EVENT_GENERATOR_COUNTER_DEFAULT; + start = EVENT_GENERATOR_ON; + abe_current_event_id = e; + + switch (e) { + case EVENT_MCPDM: + selection = EVENT_SOURCE_DMA; + event = ABE_ATC_MCPDMDL_DMA_REQ; + break; + case EVENT_DMIC: + selection = EVENT_SOURCE_DMA; + event = ABE_ATC_DMIC_DMA_REQ; + break; + case EVENT_TIMER: + selection = EVENT_SOURCE_COUNTER; + event = 0; + break; + case EVENT_McBSP: + selection = EVENT_SOURCE_COUNTER; + event = 0; + break; + case EVENT_McASP: + selection = EVENT_SOURCE_COUNTER; + event = 0; + break; + case EVENT_SLIMBUS: + selection = EVENT_SOURCE_COUNTER; + event = 0; + break; + case EVENT_44100: + selection = EVENT_SOURCE_COUNTER; + event = 0; + counter = EVENT_GENERATOR_COUNTER_44100; + break; + case EVENT_DEFAULT: + selection = EVENT_SOURCE_COUNTER; + event = 0; + break; + default: + abe_dbg_param |= ERR_API; + abe_dbg_error_log(ABE_BLOCK_COPY_ERR); + } + + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_ATC, EVENT_GENERATOR_COUNTER, &counter, 4); + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_ATC, EVENT_SOURCE_SELECTION, &selection, 4); + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_ATC, EVENT_GENERATOR_START, &start, 4); + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_ATC, AUDIO_ENGINE_SCHEDULER, &event, 4); + +} + +/** +* abe_read_use_case_opp() description for void abe_read_use_case_opp(). +* +* Operations : returns the expected min OPP for a given use_case list +* +* Parameter : No parameter +* @param +* +* @pre no pre-condition +* +* @post +* +* @return error code +* +* @see +*/ +void abe_read_use_case_opp(abe_use_case_id *u, abe_opp_t *o) +{ + abe_uint32 opp, i; + abe_use_case_id *ptr = u; + + #define MAX_READ_USE_CASE_OPP 10 /* there is no reason to have more use_cases */ + #define OPP_25 1 + #define OPP_50 2 + #define OPP_100 4 + + opp = i = 0; + do { + /* check for pointer errors */ + if (i > MAX_READ_USE_CASE_OPP) { + abe_dbg_param |= ERR_API; + abe_dbg_error_log(ABE_READ_USE_CASE_OPP_ERR); + break; + } + + /* check for end_of_list */ + if (*ptr <= 0) + break; + + /* OPP selection based on current firmware implementation */ + switch (*ptr) { + case ABE_AUDIO_PLAYER_ON_HEADSET_OR_EARPHONE: + opp |= OPP_25; + break; + case ABE_DRIFT_MANAGEMENT_FOR_AUDIO_PLAYER: + opp |= OPP_100; + break; + case ABE_DRIFT_MANAGEMENT_FOR_VOICE_CALL: + opp |= OPP_100; + break; + case ABE_VOICE_CALL_ON_HEADSET_OR_EARPHONE_OR_BT: + opp |= OPP_50; + break; + case ABE_MULTIMEDIA_AUDIO_RECORDER: + opp |= OPP_50; + break; + case ABE_VIBRATOR_OR_HAPTICS: + opp |= OPP_100; + break; + case ABE_VOICE_CALL_ON_HANDS_FREE_SPEAKER: + opp |= OPP_100; + break; + case ABE_RINGER_TONES: + opp |= OPP_100; + break; + case ABE_VOICE_CALL_WITH_EARPHONE_ACTIVE_NOISE_CANCELLER: + opp |= OPP_100; + break; + default: + break; + } + + i++; + ptr++; + } while (*ptr != 0); + + if (opp & OPP_100) + *o = ABE_OPP100; + else if (opp & OPP_50) + *o = ABE_OPP50; + else + *o = ABE_OPP25; +} + +/* + * ABE_READ_LOWEST_OPP + * + * Parameter : + * Data pointer : returned data + * + * Operations : + * Returns the lowest possible OPP based on the current active ports + * + * Return value : + * None. + */ +void abe_read_lowest_opp(abe_opp_t *o) +{ + abe_uint32 opp; + opp = OPP_25; + + if (abe_port[DMIC_PORT].status == RUN_P) + opp |= OPP_50; + if (abe_port[PDM_UL_PORT].status == RUN_P) + opp |= OPP_50; + if (abe_port[BT_VX_UL_PORT].status == RUN_P) + opp |= OPP_50; + if (abe_port[MM_UL_PORT].status == RUN_P) + opp |= OPP_50; + if (abe_port[MM_UL2_PORT].status == RUN_P) + opp |= OPP_50; + if (abe_port[VX_UL_PORT].status == RUN_P) + opp |= OPP_50; + if (abe_port[VX_DL_PORT].status == RUN_P) + opp |= OPP_50; + if (abe_port[MM_EXT_OUT_PORT].status == RUN_P) + opp |= OPP_50; + if (abe_port[MM_EXT_IN_PORT].status == RUN_P) + opp |= OPP_50; + if (abe_port[VIB_DL_PORT].status == RUN_P) + opp |= OPP_100; + + if (opp & OPP_100) + *o = ABE_OPP100; + else if (opp & OPP_50) + *o = ABE_OPP50; + else + *o = ABE_OPP25; +} + +/* + * ABE_SET_OPP_PROCESSING + * + * Parameter : + * New processing network and OPP: + * 0: Ultra Lowest power consumption audio player (no post-processing, no mixer) + * 1: OPP 25% (simple multimedia features, including low-power player) + * 2: OPP 50% (multimedia and voice calls) + * 3: OPP100% (EANC, multimedia complex use-cases) + * + * Operations : + * Rearranges the FW task network to the corresponding OPP list of features. + * The corresponding AE ports are supposed to be set/reset accordingly before this switch. + * + * Return value : + * error code when the new OPP do not corresponds the list of activated features + */ +void abe_set_opp_processing(abe_opp_t opp) +{ + abe_uint32 dOppMode32; + + switch(opp){ + case ABE_OPP25: + /* OPP25% */ + dOppMode32 = DOPPMODE32_OPP25; + break; + case ABE_OPP50: + /* OPP50% */ + dOppMode32 = DOPPMODE32_OPP50; + break; + default: + abe_dbg_param |= ERR_API; + abe_dbg_error_log(ABE_BLOCK_COPY_ERR); + case ABE_OPP100: + /* OPP100% */ + dOppMode32 = DOPPMODE32_OPP100; + break; + } + + /* Write Multiframe inside DMEM */ + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, + D_maxTaskBytesInSlot_ADDR, &dOppMode32, sizeof(abe_uint32)); +} + +/* + * ABE_SET_PING_PONG_BUFFER + * + * Parameter : + * Port_ID : + * New data + * + * Operations : + * Updates the next ping-pong buffer with "size" bytes copied from the + * host processor. This API notifies the FW that the data transfer is done. + */ +void abe_set_ping_pong_buffer(abe_port_id port, abe_uint32 n_bytes) +{ + abe_uint32 sio_pp_desc_address, struct_offset, *src, n_samples, datasize, base_and_size; + ABE_SPingPongDescriptor desc_pp; + + /* ping_pong is only supported on MM_DL */ + if (port != MM_DL_PORT) { + abe_dbg_param |= ERR_API; + abe_dbg_error_log(ABE_PARAMETER_ERROR); + } + /* translates the number of bytes in samples */ + /* data size in DMEM words */ + datasize = abe_dma_port_iter_factor(&((abe_port[port]).format)); + /* data size in bytes */ + datasize = datasize << 2; + n_samples = n_bytes / datasize; + + abe_block_copy(COPY_FROM_ABE_TO_HOST, ABE_DMEM, D_PingPongDesc_ADDR, + (abe_uint32 *)&desc_pp, sizeof(desc_pp)); + + /* + * read the port SIO descriptor and extract the current pointer + * address after reading the counter + */ + if ((desc_pp.counter & 0x1) == 0) { + struct_offset = (abe_uint32)&(desc_pp.nextbuff0_BaseAddr) - + (abe_uint32)&(desc_pp); + base_and_size = desc_pp.nextbuff0_BaseAddr; + } else { + struct_offset = (abe_uint32)&(desc_pp.nextbuff1_BaseAddr) - + (abe_uint32)&(desc_pp); + base_and_size = desc_pp.nextbuff1_BaseAddr; + } + + base_and_size = (base_and_size & 0xFFFFL) + ((abe_uint32)n_samples << 16); + + sio_pp_desc_address = D_PingPongDesc_ADDR + struct_offset; + src = &base_and_size; + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, sio_pp_desc_address, + (abe_uint32 *)&base_and_size, sizeof(abe_uint32)); +} + +/* + * ABE_READ_NEXT_PING_PONG_BUFFER + * + * Parameter : + * Port_ID : + * Returned address to the next buffer (byte offset from DMEM start) + * + * Operations : + * Tell the next base address of the next ping_pong Buffer and its size + * + * + */ +void abe_read_next_ping_pong_buffer(abe_port_id port, abe_uint32 *p, abe_uint32 *n) +{ + abe_uint32 sio_pp_desc_address; + ABE_SPingPongDescriptor desc_pp; + + /* ping_pong is only supported on MM_DL */ + if (port != MM_DL_PORT) { + abe_dbg_param |= ERR_API; + abe_dbg_error_log(ABE_PARAMETER_ERROR); + } + + /* read the port SIO descriptor and extract the current pointer address after reading the counter */ + sio_pp_desc_address = D_PingPongDesc_ADDR; + abe_block_copy(COPY_FROM_ABE_TO_HOST, ABE_DMEM, sio_pp_desc_address, (abe_uint32*)&desc_pp, sizeof(ABE_SPingPongDescriptor)); + + if ((desc_pp.counter & 0x1) == 0) { + (*p) = desc_pp.nextbuff0_BaseAddr; + } else { + (*p) = desc_pp.nextbuff1_BaseAddr; + } + + /* translates the number of samples in bytes */ + (*n) = abe_size_pingpong; +} + +/* + * ABE_INIT_PING_PONG_BUFFER + * + * Parameter : + * size of the ping pong + * number of buffers (2 = ping/pong) + * returned address of the ping-pong list of base address (byte offset from DMEM start) + * + * Operations : + * Computes the base address of the ping_pong buffers + * + */ +void abe_init_ping_pong_buffer(abe_port_id id, abe_uint32 size_bytes, abe_uint32 n_buffers, abe_uint32 *p) +{ + abe_uint32 i, dmem_addr; + + /* ping_pong is supported in 2 buffers configuration right now but FW is ready for ping/pong/pung/pang... */ + if (id != MM_DL_PORT || n_buffers > MAX_PINGPONG_BUFFERS) { + abe_dbg_param |= ERR_API; + abe_dbg_error_log(ABE_PARAMETER_ERROR); + } + + for (i = 0; i < n_buffers; i++) { + dmem_addr = dmem_ping_pong_buffer + (i * size_bytes); + abe_base_address_pingpong [i] = dmem_addr; /* base addresses of the ping pong buffers in U8 unit */ + } + + abe_size_pingpong = size_bytes; /* global data */ + *p = (abe_uint32)dmem_ping_pong_buffer; +} + +/* + * ABE_PLUG_SUBROUTINE + * + * Parameter : + * id: returned sequence index after plugging a new subroutine + * f : subroutine address to be inserted + * n : number of parameters of this subroutine + * + * Returned value : error code + * + * Operations : register a list of subroutines for call-back purpose + * + */ +void abe_plug_subroutine(abe_uint32 *id, abe_subroutine2 f, abe_uint32 n, abe_uint32* params) +{ + /* debug trace */ + abe_add_subroutine (id, f, n, params); +} + +/* + * ABE_PLUG_SEQUENCE + * + * Parameter : + * Id: returned sequence index after pluging a new sequence (index in the tables) + * s : sequence to be inserted + * + * Operations : + * Load a time-sequenced operations. + * + * Return value : + * None. + */ +void abe_plug_sequence(abe_uint32 *id, abe_sequence_t *s) +{ +} + +/* + * ABE_SET_SEQUENCE_TIME_ACCURACY + * + * Parameter : + * patch bit field used to guarantee the code compatibility without conditionnal compilation + * Sequence index + * + * Operations : two counters are implemented in the firmware: + * - one "fast" counter, generating an IRQ to the HAL for sequences scheduling, the rate is in the range 1ms .. 100ms + * - one "slow" counter, generating an IRQ to the HAL for the management of ASRC drift, the rate is in the range 1s .. 100s + * + * Return value : + * None. + */ +void abe_set_sequence_time_accuracy(abe_micros_t fast, abe_micros_t slow) +{ +} + +/* + * ABE_LAUNCH_SEQUENCE + * + * Parameter : + * patch bit field used to guarantee the code compatibility without conditionnal compilation + * Sequence index + * + * Operations : + * Launch a list a time-sequenced operations. + * + * Return value : + * None. + */ +void abe_launch_sequence(abe_patch_rev patch, abe_uint32 n) +{ + just_to_avoid_the_many_warnings_abe_patch_rev = patch; + just_to_avoid_the_many_warnings = n; +} + +/* + * ABE_LAUNCH_SEQUENCE_PARAM + * + * Parameter : + * patch bit field used to guarantee the code compatibility without conditionnal compilation + * Sequence index + * Parameters to the programmable sequence + * + * Operations : + * Launch a list a time-sequenced operations. + * + * Return value : + * None. + */ +void abe_launch_sequence_param(abe_patch_rev patch, abe_uint32 n, abe_int32 *param1, abe_int32 *param2, abe_int32 *param3, abe_int32 *param4) +{ +} + +/* + * ABE_RESET_PORT + * + * Parameters : + * id: port name + * + * Returned value : error code + * + * Operations : stop the port activity and reload default parameters on the associated processing features. + * Clears the internal AE buffers. + * + */ +void abe_reset_port(abe_port_id id) +{ + abe_port[id] = ((abe_port_t *) abe_port_init) [id]; +} + +/* + * ABE_READ_REMAINING_DATA + * + * Parameter : + * Port_ID : + * size : pointer to the remaining number of 32bits words + * + * Operations : + * computes the remaining amount of data in the buffer. + * + * Return value : + * error code + */ +void abe_read_remaining_data(abe_port_id port, abe_uint32 *n) +{ +} + +/* + * ABE_DISABLE_DATA_TRANSFER + * + * Parameter : + * p: port indentifier + * + * Operations : + * disables the ATC descriptor and stop IO/port activities + * disable the IO task (@f = 0) + * clear ATC DMEM buffer, ATC enabled + * + * Return value : + * None. + */ +void abe_disable_data_transfer(abe_port_id id) +{ + /* local host variable status= "port is running" */ + abe_port[id].status = IDLE_P; + /* disable DMA requests */ + abe_disable_dma_request(id); + /* disable ATC transfers */ + abe_init_atc(id); + abe_clean_temporary_buffers(id); +} + +/* + * ABE_ENABLE_DATA_TRANSFER + * + * Parameter : + * p: port indentifier + * + * Operations : + * enables the ATC descriptor + * reset ATC pointers + * enable the IO task (@f <> 0) + * + * Return value : + * None. + */ +void abe_enable_data_transfer(abe_port_id id) +{ + abe_port_protocol_t *protocol; + abe_data_format_t format; + + abe_clean_temporary_buffers(id); + + if (id == PDM_UL_PORT) { + /* initializes the ABE ATC descriptors in DMEM - MCPDM_UL */ + protocol = &(abe_port[PDM_UL_PORT].protocol); + format = abe_port[PDM_UL_PORT].format; + abe_init_atc(PDM_UL_PORT); + abe_init_io_tasks(PDM_UL_PORT, &format, protocol); + } + if (id == PDM_DL_PORT) { + /* initializes the ABE ATC descriptors in DMEM - MCPDM_DL */ + protocol = &(abe_port[PDM_DL_PORT].protocol); + format = abe_port[PDM_DL_PORT].format; + abe_init_atc(PDM_DL_PORT); + abe_init_io_tasks(PDM_DL_PORT, &format, protocol); + } + if (id == DMIC_PORT) { + /* one DMIC port enabled = all DMICs enabled, + * since there is a single DMIC path for all DMICs */ + protocol = &(abe_port[DMIC_PORT].protocol); + format = abe_port[DMIC_PORT].format; + abe_init_atc(DMIC_PORT); + abe_init_io_tasks(DMIC_PORT, &format, protocol); + } + + /* local host variable status= "port is running" */ + abe_port[id].status = RUN_P; + /* enable DMA requests */ + abe_enable_dma_request(id); +} + +/* + * ABE_SET_DMIC_FILTER + * + * Parameter : + * DMIC decimation ratio : 16/25/32/40 + * + * Operations : + * Loads in CMEM a specific list of coefficients depending on the DMIC sampling + * frequency (2.4MHz or 3.84MHz). This table compensates the DMIC decimator roll-off at 20kHz. + * The default table is loaded with the DMIC 2.4MHz recommended configuration. + * + * Return value : + * None. + */ +void abe_set_dmic_filter(abe_dmic_ratio_t d) +{ + abe_int32 *src; + + switch(d) { + case ABE_DEC16: + src = (abe_int32 *)abe_dmic_16; + break; + case ABE_DEC25: + src = (abe_int32 *) abe_dmic_25; + break; + case ABE_DEC32: + src = (abe_int32 *) abe_dmic_32; + break; + default: + case ABE_DEC40: + src = (abe_int32 *) abe_dmic_40; + break; + } + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_CMEM, + C_98_48_LP_Coefs_ADDR, + (abe_uint32 *)src, C_98_48_LP_Coefs_sizeof << 2); +} + +/** +* @fn abe_connect_cbpr_dmareq_port() +* +* Operations : enables the data echange between a DMA and the ABE through the +* CBPr registers of AESS. +* +* Parameters : +* id: port name +* f : desired data format +* d : desired dma_request line (0..7) +* a : returned pointer to the base address of the CBPr register and number of +* samples to exchange during a DMA_request. +* +* @see ABE_API.h +*/ +void abe_connect_cbpr_dmareq_port(abe_port_id id, abe_data_format_t *f, abe_uint32 d, abe_dma_t *returned_dma_t) +{ + if (f->f == 44100) + /* waiting for a true SRC_44_48 in ABE */ + abe_write_event_generator(EVENT_44100); + abe_port[id] = ((abe_port_t *)abe_port_init)[id]; + + abe_port[id].format = *f; + abe_port[id].protocol.protocol_switch = DMAREQ_PORT_PROT; + abe_port[id].protocol.p.prot_dmareq.iter = abe_dma_port_iteration(f); + abe_port[id].protocol.p.prot_dmareq.dma_addr = ABE_DMASTATUS_RAW; + abe_port[id].protocol.p.prot_dmareq.dma_data = (1 << d); + + abe_port[id].status = RUN_P; + + /* load the micro-task parameters */ + abe_init_io_tasks(id, &((abe_port [id]).format), &((abe_port [id]).protocol)); + + /* load the dma_t with physical information from AE memory mapping */ + abe_init_dma_t(id, &((abe_port [id]).protocol)); + + /* load the ATC descriptors - disabled */ + abe_init_atc(id); + + /* return the dma pointer address */ + abe_read_port_address(id, returned_dma_t); +} + +/** +* @fn abe_connect_dmareq_port() +* +* Operations : enables the data echanges between a DMA and a direct access to +* the DMEM memory of ABE. On each dma_request activation the DMA will exchange +* "iter" bytes and rewind its pointer to the base address "l3" waiting for the +* next activation. The scheme is used for the MM_UL and debug port +* +* Parameters : +* id: port name +* f : desired data format +* d : desired dma_request line (0..7) +* a : returned pointer to the base address of the ping-pong buffer and number +* of samples to exchange during a DMA_request.. +* +* @see ABE_API.h +*/ +void abe_connect_dmareq_port(abe_port_id id, abe_data_format_t *f, abe_uint32 d, abe_dma_t *a) +{ +} + +/** +* @fn abe_connect_dmareq_ping_pong_port() +* +* Operations : enables the data echanges between a DMA and a direct access to +* the DMEM memory of ABE. On each dma_request activation the DMA will exchange +* "s" bytes and switch to the "pong" buffer for a new buffer exchange. +* +* Parameters : +* id: port name +* f : desired data format +* d : desired dma_request line (0..7) +* s : half-buffer (ping) size +* +* a : returned pointer to the base address of the ping-pong buffer and number of samples to exchange during a DMA_request. +* +* @see ABE_API.h +*/ +void abe_connect_dmareq_ping_pong_port(abe_port_id id, abe_data_format_t *f, abe_uint32 d, abe_uint32 s, abe_dma_t *returned_dma_t) +{ + abe_dma_t dma1; + + /* ping_pong is only supported on MM_DL */ + if (id != MM_DL_PORT) + { + abe_dbg_param |= ERR_API; + abe_dbg_error_log(ABE_PARAMETER_ERROR); + } + + /* declare PP buffer and prepare the returned dma_t */ + abe_init_ping_pong_buffer(MM_DL_PORT, s, 2, (abe_uint32 *)&(returned_dma_t->data)); + + abe_port [id] = ((abe_port_t *) abe_port_init) [id]; + + (abe_port [id]).format = (*f); + (abe_port [id]).protocol.protocol_switch = PINGPONG_PORT_PROT; + (abe_port [id]).protocol.p.prot_pingpong.buf_addr = dmem_ping_pong_buffer; + (abe_port [id]).protocol.p.prot_pingpong.buf_size = s; + (abe_port [id]).protocol.p.prot_pingpong.irq_addr = ABE_DMASTATUS_RAW; + (abe_port [id]).protocol.p.prot_pingpong.irq_data = (1 << d); + + abe_port [id].status = RUN_P; + + /* load the micro-task parameters DESC_IO_PP */ + abe_init_io_tasks(id, &((abe_port [id]).format), &((abe_port [id]).protocol)); + + /* load the dma_t with physical information from AE memory mapping */ + abe_init_dma_t(id, &((abe_port [id]).protocol)); + + dma1.data = (abe_uint32 *)(abe_port [id].dma.data + ABE_DMEM_BASE_ADDRESS_L3); + dma1.iter = abe_port [id].dma.iter; + (*returned_dma_t) = dma1; +} + +/** +* @fn abe_connect_irq_ping_pong_port() +* +* Operations : enables the data echanges between a direct access to the DMEM +* memory of ABE using cache flush. On each IRQ activation a subroutine +* registered with "abe_plug_subroutine" will be called. This subroutine +* will generate an amount of samples, send them to DMEM memory and call +* "abe_set_ping_pong_buffer" to notify the new amount of samples in the +* pong buffer. +* +* Parameters : +* id: port name +* f : desired data format +* I : index of the call-back subroutine to call +* s : half-buffer (ping) size +* +* p: returned base address of the first (ping) buffer) +* +* @see ABE_API.h +*/ +void abe_connect_irq_ping_pong_port(abe_port_id id, abe_data_format_t *f, + abe_uint32 subroutine_id, abe_uint32 size, + abe_uint32 *sink, abe_uint32 dsp_mcu_flag) +{ + /* ping_pong is only supported on MM_DL */ + if (id != MM_DL_PORT) { + abe_dbg_param |= ERR_API; + abe_dbg_error_log(ABE_PARAMETER_ERROR); + } + + abe_port[id] = ((abe_port_t *) abe_port_init)[id]; + (abe_port[id]).format = (*f); + (abe_port[id]).protocol.protocol_switch = PINGPONG_PORT_PROT; + (abe_port[id]).protocol.p.prot_pingpong.buf_addr = dmem_ping_pong_buffer; + (abe_port[id]).protocol.p.prot_pingpong.buf_size = size; + (abe_port[id]).protocol.p.prot_pingpong.irq_data = (1); + + abe_init_ping_pong_buffer(MM_DL_PORT, size, 2, sink); + + if (dsp_mcu_flag == PING_PONG_WITH_MCU_IRQ) + (abe_port [id]).protocol.p.prot_pingpong.irq_addr = ABE_MCU_IRQSTATUS_RAW; + + if (dsp_mcu_flag == PING_PONG_WITH_DSP_IRQ) + (abe_port [id]).protocol.p.prot_pingpong.irq_addr = ABE_DSP_IRQSTATUS_RAW; + + abe_port[id].status = RUN_P; + + /* load the micro-task parameters */ + abe_init_io_tasks(id, &((abe_port [id]).format), &((abe_port [id]).protocol)); + + /* load the ATC descriptors - disabled */ + abe_init_atc(id); + + (*sink)= (abe_port [id]).protocol.p.prot_pingpong.buf_addr; +} + +/** +* @fn abe_connect_serial_port() +* +* Operations : enables the data echanges between a McBSP and an ATC buffer in +* DMEM. This API is used connect 48kHz McBSP streams to MM_DL and 8/16kHz +* voice streams to VX_UL, VX_DL, BT_VX_UL, BT_VX_DL. It abstracts the +* abe_write_port API. +* +* Parameters : +* id: port name +* f : data format +* i : peripheral ID (McBSP #1, #2, #3) +* +* @see ABE_API.h +*/ +void abe_connect_serial_port(abe_port_id id, abe_data_format_t *f, abe_mcbsp_id mcbsp_id) +{ + abe_port [id] = ((abe_port_t *) abe_port_init) [id]; + (abe_port [id]).format = (*f); + (abe_port [id]).protocol.protocol_switch = SERIAL_PORT_PROT; + /* McBSP peripheral connected to ATC */ + (abe_port [id]).protocol.p.prot_serial.desc_addr = mcbsp_id*ATC_SIZE; + /* ITERation on each DMAreq signals */ + (abe_port [id]).protocol.p.prot_serial.iter = abe_dma_port_iteration(f); + + //(abe_port [id]).protocol.p.prot_serial.buf_addr; /* Address of ATC McBSP/McASP descriptor's in bytes */ + //(abe_port [id]).protocol.p.prot_serial.buf_size; /* DMEM address in bytes */ + //(abe_port [id]).protocol.p.prot_serial.thr_flow; /* Data threshold for flow management */ + + abe_port [id].status = RUN_P; + /* load the micro-task parameters */ + abe_init_io_tasks(id, &((abe_port [id]).format), &((abe_port [id]).protocol)); + /* load the ATC descriptors - disabled */ + abe_init_atc(id); +} + +/* + * ABE_READ_PORT_DESCRIPTOR + * + * Parameter : + * id: port name + * f : input pointer to the data format + * p : input pointer to the protocol description + * dma : output pointer to the DMA iteration and data destination pointer : + * + * Operations : + * returns the port parameters from the HAL internal buffer. + * + * Return value : + * error code in case the Port_id is not compatible with the current OPP value + */ +void abe_read_port_descriptor(abe_port_id port, abe_data_format_t *f, abe_port_protocol_t *p) +{ + (*f) = (abe_port[port]).format; + (*p) = (abe_port[port]).protocol; +} + +/* + * ABE_READ_APS_ENERGY + * + * Parameter : + * Port_ID : port ID supporting APS + * APS data struct pointer + * + * Operations : + * Returns the estimated amount of energy + * + * Return value : + * error code when the Port is not activated. + */ +void abe_read_aps_energy(abe_port_id *p, abe_gain_t *a) +{ + just_to_avoid_the_many_warnings_abe_port_id = *p; + just_to_avoid_the_many_warnings_abe_gain_t = *a; +} + +/* + * ABE_READ_PORT_ADDRESS + * + * Parameter : + * dma : output pointer to the DMA iteration and data destination pointer + * + * Operations : + * This API returns the address of the DMA register used on this audio port. + * Depending on the protocol being used, adds the base address offset L3 (DMA) or MPU (ARM) + * + * Return value : + */ +void abe_read_port_address(abe_port_id port, abe_dma_t *dma2) +{ + abe_dma_t_offset dma1; + abe_uint32 protocol_switch; + + dma1 = (abe_port[port]).dma; + protocol_switch = abe_port[port].protocol.protocol_switch; + + switch (protocol_switch) { + case PINGPONG_PORT_PROT: + /* return the base address of the ping buffer in L3 and L4 spaces */ + (*dma2).data = (void *)(dma1.data + ABE_DMEM_BASE_ADDRESS_L3); + (*dma2).l3_dmem = (void *)(dma1.data + ABE_DMEM_BASE_ADDRESS_L3); + (*dma2).l4_dmem = (void *)(dma1.data + ABE_DMEM_BASE_ADDRESS_L4); + break; + case DMAREQ_PORT_PROT: + /* return the CBPr(L3), DMEM(L3), DMEM(L4) address */ + (*dma2).data = (void *)(dma1.data + ABE_ATC_BASE_ADDRESS_L3); + (*dma2).l3_dmem = + (void *)((abe_port[port]).protocol.p.prot_dmareq.buf_addr + + ABE_DMEM_BASE_ADDRESS_L3); + (*dma2).l4_dmem = (void *)((abe_port[port]).protocol.p.prot_dmareq.buf_addr + ABE_DMEM_BASE_ADDRESS_L4); + break; + default: + break; + } + + (*dma2).iter = (dma1.iter); +} + +/* + * ABE_WRITE_EQUALIZER + * + * Parameter : + * Id : name of the equalizer + * Param : equalizer coefficients + * + * Operations : + * Load the coefficients in CMEM. This API can be called when the corresponding equalizer + * is not activated. After reloading the firmware the default coefficients corresponds to + * "no equalizer feature". Loading all coefficients with zeroes disables the feature. + * + * Return value : + * None. + */ +void abe_write_equalizer(abe_equ_id id, abe_equ_t *param) +{ + abe_uint32 eq_offset, length, *src; + + switch(id) { + default: + case EQ1: + eq_offset = C_DL1_Coefs_ADDR; + break; + case EQ2L: + eq_offset = C_DL2_L_Coefs_ADDR; + break; + case EQ2R: + eq_offset = C_DL2_R_Coefs_ADDR; + break; + case EQSDT: + eq_offset = C_SDT_Coefs_ADDR; + break; + case EQMIC: + eq_offset = C_98_48_LP_Coefs_ADDR; + break; + case APS1: + eq_offset = C_APS_DL1_coeffs1_ADDR; + break; + case APS2L: + eq_offset = C_APS_DL2_L_coeffs1_ADDR; + break; + case APS2R: + eq_offset = C_APS_DL2_R_coeffs1_ADDR; + break; + } + + length = param->equ_length; + src = (abe_uint32 *)((param->coef).type1); + + eq_offset <<=2; /* translate in bytes */ + length <<=2; /* translate in bytes */ + + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_CMEM, eq_offset, src, length); +} + +/* + * ABE_SET_ASRC_DRIFT_CONTROL + * + * Parameter : + * Id : name of the asrc + * f: flag which enables (1) the automatic computation of drift parameters + * + * Operations : + * When an audio port is connected to an hardware peripheral (MM_DL connected to a McBSP for + * example), the drift compensation can be managed in "forced mode" (f=0) or "adaptive mode" + * (f=1). In the first case the drift is managed with the usage of the API "abe_write_asrc". + * In the second case the firmware will generate on periodic basis an information about the + * observed drift, the HAL will reload the drift parameter based on those observations. + * + * Return value : + * None. + */ +void abe_set_asrc_drift_control(abe_asrc_id id, abe_uint32 f) +{ +} + +/* + * ABE_WRITE_ASRC + * + * Parameter : + * Id : name of the asrc + * param : drift value t compensate + * + * Operations : + * Load the drift coefficients in FW memory. This API can be called when the corresponding + * ASRC is not activated. After reloading the firmware the default coefficients corresponds + * to "no ASRC activated". Loading the drift value with zero disables the feature. + * + * Return value : + * None. + */ +void abe_write_asrc(abe_asrc_id id, abe_drift_t dppm) +{ +#if 0 + abe_int32 dtempvalue, adppm, alpha_current, beta_current, asrc_params; + abe_int32 atempvalue32[8]; + /* + * x = ppm + * - 1000000/x must be multiple of 16 + * - deltaalpha = round(2^20*x*16/1000000)=round(2^18/5^6*x) on 22 bits. then shifted by 2bits + * - minusdeltaalpha + * - oneminusepsilon = 1-deltaalpha/2. + * ppm = 250 + * - 1000000/250=4000 + * - deltaalpha = 4194.3 ~ 4195 => 0x00418c + */ + /* examples for -6250 ppm */ + // atempvalue32[0] = 4; /* d_constalmost0 */ + // atempvalue32[1] = -1; /* d_driftsign */ + // atempvalue32[2] = 15; /* d_subblock */ + // atempvalue32[3] = 0x00066668; /* d_deltaalpha */ + // atempvalue32[4] = 0xfff99998; /* d_minusdeltaalpha */ + // atempvalue32[5] = 0x003ccccc; /* d_oneminusepsilon */ + // atempvalue32[6] = 0x00000000; /* d_alphazero */ + // atempvalue32[7] = 0x00400000; /* d_betaone */ + + /* compute new value for the ppm */ + if (dppm > 0){ + atempvalue32[1] = 1; /* d_driftsign */ + adppm = dppm; + } else { + atempvalue32[1] = -1; /* d_driftsign */ + adppm = (-1*dppm); + } + + dtempvalue = (adppm << 4) + adppm - ((adppm * 3481L)/15625L); + atempvalue32[3] = dtempvalue<<2; + atempvalue32[4] = (-dtempvalue)<<2; + atempvalue32[5] = (0x00100000-(dtempvalue/2))<<2; + + switch (id) { + case ASRC2: /* asynchronous sample-rate-converter for the uplink voice path */ + alpha_current = C_AlphaCurrent_UL_VX_ADDR; + beta_current = C_BetaCurrent_UL_VX_ADDR; + asrc_params = D_AsrcVars_UL_VX_ADDR; + break; + case ASRC1: /* asynchronous sample-rate-converter for the downlink voice path */ + alpha_current = C_AlphaCurrent_DL_VX_ADDR; + beta_current = C_BetaCurrent_DL_VX_ADDR; + asrc_params = D_AsrcVars_DL_VX_ADDR; + break; + default: + case ASRC3: /* asynchronous sample-rate-converter for the multimedia player */ + alpha_current = C_AlphaCurrent_DL_MM_ADDR; + beta_current = C_BetaCurrent_DL_MM_ADDR; + asrc_params = D_AsrcVars_DL_MM_ADDR; + break; + } + + dtempvalue = 0x00000000; + abe_block_copy (COPY_FROM_HOST_TO_ABE, ABE_CMEM, alpha_current,(abe_uint32 *)&dtempvalue, 4); + dtempvalue = 0x00400000; + abe_block_copy (COPY_FROM_HOST_TO_ABE, ABE_CMEM, beta_current, (abe_uint32 *)&dtempvalue, 4); + abe_block_copy (COPY_FROM_HOST_TO_ABE, ABE_CMEM, asrc_params , (abe_uint32 *)&atempvalue32, sizeof(atempvalue32)); +#endif +} + +/* + * ABE_WRITE_APS + * + * Parameter : + * Id : name of the aps filter + * param : table of filter coefficients + * + * Operations : + * Load the filters and thresholds coefficients in FW memory. This API can be called when + * the corresponding APS is not activated. After reloading the firmware the default coefficients + * corresponds to "no APS activated". Loading all the coefficients value with zero disables + * the feature. + * + * Return value : + * None. + */ +void abe_write_aps(abe_aps_id id, abe_aps_t *param) +{ +} + +/* + * ABE_WRITE_MIXER + * + * Parameter : + * Id : name of the mixer + * param : list of input gains of the mixer + * p : list of port corresponding to the above gains + * + * Operations : + * Load the gain coefficients in FW memory. This API can be called when the corresponding + * MIXER is not activated. After reloading the firmware the default coefficients corresponds + * to "all input and output mixer's gain in mute state". A mixer is disabled with a network + * reconfiguration corresponding to an OPP value. + * + * Return value : + * None. + */ +void abe_write_gain(abe_gain_id id, abe_gain_t f_g, abe_ramp_t f_ramp, abe_port_id p) +{ + abe_uint32 lin_g, mixer_target, mixer_offset; + abe_int32 gain_index; + + gain_index = ((f_g - min_mdb) / 100); + gain_index = maximum(gain_index, 0); + gain_index = minimum(gain_index, sizeof_db2lin_table); + + lin_g = abe_db2lin_table [gain_index]; + + switch(id) { + default: + case GAINS_DMIC1: + mixer_offset = dmic1_gains_offset; + break; + case GAINS_DMIC2: + mixer_offset = dmic2_gains_offset; + break; + case GAINS_DMIC3: + mixer_offset = dmic3_gains_offset; + break; + case GAINS_AMIC: + mixer_offset = amic_gains_offset; + break; + case GAINS_DL1: + mixer_offset = dl1_gains_offset; + break; + case GAINS_DL2: + mixer_offset = dl2_gains_offset; + break; + case GAINS_SPLIT: + mixer_offset = splitters_gains_offset; + break; + case MIXDL1: + mixer_offset = mixer_dl1_offset; + break; + case MIXDL2: + mixer_offset = mixer_dl2_offset; + break; + case MIXECHO: + mixer_offset = mixer_echo_offset; + break; + case MIXSDT: + mixer_offset = mixer_sdt_offset; + break; + case MIXVXREC: + mixer_offset = mixer_vxrec_offset; + break; + case MIXAUDUL: + mixer_offset = mixer_audul_offset; + break; + } + + mixer_target = (smem_target_gain_base << 1);/* SMEM word32 address */ + mixer_target += mixer_offset; + mixer_target += p; + mixer_target <<= 2; /* translate coef address in Bytes */ + + /* load the S_G_Target SMEM table */ + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_SMEM, mixer_target, + (abe_uint32*)&lin_g, sizeof(lin_g)); +} + +void abe_write_mixer(abe_mixer_id id, abe_gain_t f_g, abe_ramp_t f_ramp, abe_port_id p) +{ + abe_write_gain((abe_gain_id)id, f_g, f_ramp, p); +} + +/* + * ABE_SET_ROUTER_CONFIGURATION + * + * Parameter : + * Id : name of the router + * Conf : id of the configuration + * param : list of output index of the route + * + * Operations : + * The uplink router takes its input from DMIC (6 samples), AMIC (2 samples) and + * PORT1/2 (2 stereo ports). Each sample will be individually stored in an intermediate + * table of 10 elements. The intermediate table is used to route the samples to + * three directions : REC1 mixer, 2 EANC DMIC source of filtering and MM recording audio path. + * For example, a use case consisting in AMIC used for uplink voice communication, DMIC 0,1,2,3 + * used for multimedia recording, , DMIC 5 used for EANC filter, DMIC 4 used for the feedback channel, + * will be implemented with the following routing table index list : + * [3, 2 , 1, 0, 0, 0 (two dummy indexes to data that will not be on MM_UL), 4, 5, 7, 6] + * example + * abe_set_router_configuration (UPROUTE, UPROUTE_CONFIG_AMIC, abe_router_ul_table_preset[UPROUTE_CONFIG_AMIC]); + * Return value : + * None. + */ +void abe_set_router_configuration(abe_router_id id, abe_uint32 configuration, abe_router_t *param) +{ + abe_uint8 aUplinkMuxing[16], n, i; + + n = D_aUplinkRouting_ADDR_END - D_aUplinkRouting_ADDR + 1; + + for(i=0; i < n; i++) + aUplinkMuxing[i] = (abe_uint8) (param [i]); + + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, D_aUplinkRouting_ADDR, (abe_uint32 *)aUplinkMuxing, sizeof (aUplinkMuxing)); +} + +/* + * ABE_READ_DEBUG_TRACE + * + * Parameter : + * data destination pointer + * max number of data read + * + * Operations : + * reads the AE circular data pointer holding pairs of debug data+timestamps, and store + * the pairs in linear addressing to the parameter pointer. Stops the copy when the max + * parameter is reached or when the FIFO is empty. + * + * Return value : + * None. + */ +void abe_read_debug_trace(abe_uint32 *data, abe_uint32 *n) +{ + just_to_avoid_the_many_warnings = (*data); + just_to_avoid_the_many_warnings = (*n); +} + +/* + * ABE_SET_DEBUG_TRACE + * + * Parameter : + * debug ID from a list to be defined + * + * Operations : + * load a mask which filters the debug trace to dedicated types of data + * + * Return value : + * None. + */ +void abe_set_debug_trace(abe_dbg_t debug) +{ +} + +/* + * ABE_REMOTE_DEBUGGER_INTERFACE + * + * Parameter : + * + * Operations : + * interpretation of the UART stream from the remote debugger commands. + * The commands consist in setting break points, loading parameter + * + * Return value : + * None. + */ +void abe_remote_debugger_interface(abe_uint32 n, abe_uint8 *p) +{ +} diff --git a/sound/soc/codecs/abe/abe_api.h b/sound/soc/codecs/abe/abe_api.h new file mode 100644 index 000000000000..5a30d8bc306f --- /dev/null +++ b/sound/soc/codecs/abe/abe_api.h @@ -0,0 +1,708 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#ifndef _ABE_API_H_ +#define _ABE_API_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * External API + */ +#if PC_SIMULATION +extern void target_server_read_pmem(abe_uint32 address, abe_uint32 *data, abe_uint32 nb_words_32bits); +extern void target_server_write_pmem(abe_uint32 address, abe_uint32 *data, abe_uint32 nb_words_32bits); +extern void target_server_read_cmem(abe_uint32 address, abe_uint32 *data, abe_uint32 nb_words_32bits); +extern void target_server_write_cmem(abe_uint32 address, abe_uint32 *data, abe_uint32 nb_words_32bits); +extern void target_server_read_atc(abe_uint32 address, abe_uint32 *data, abe_uint32 nb_words_32bits); +extern void target_server_write_atc(abe_uint32 address, abe_uint32 *data, abe_uint32 nb_words_32bits); +extern void target_server_read_smem(abe_uint32 address_48bits, abe_uint32 *data, abe_uint32 nb_words_48bits); +extern void target_server_write_smem(abe_uint32 address_48bits, abe_uint32 *data, abe_uint32 nb_words_48bits); +extern void target_server_read_dmem(abe_uint32 address_byte, abe_uint32 *data, abe_uint32 nb_byte); +extern void target_server_write_dmem(abe_uint32 address_byte, abe_uint32 *data, abe_uint32 nb_byte); + +extern void target_server_activate_mcpdm_ul(void); +extern void target_server_activate_mcpdm_dl(void); +extern void target_server_activate_dmic(void); +extern void target_server_set_voice_sampling(int dVirtAudioVoiceMode, int dVirtAudioVoiceSampleFrequency); +extern void target_server_set_dVirtAudioMultimediaMode(int dVirtAudioMultimediaMode); +#endif + +/* + * Internal API + */ + +/** +* abe_read_sys_clock() description for void abe_read_sys_clock(). +* +* Operations : returns the current time indication for the LOG +* +* Parameter : No parameter +* @param +* +* @pre no pre-condition +* +* @post +* +* @return error code +* +* @see +*/ +void abe_read_sys_clock(abe_micros_t *time); + +/** +* abe_fprintf() description for void abe_fprintf(). +* +* Operations : returns the current time indication for the LOG +* +* Parameter : No parameter +* @param +* +* @pre no pre-condition +* +* @post +* +* @return error code +* +* @see +*/ +//void abe_fprintf(char *line); + +/* + * API as part of the HAL paper documentation + */ + +/** +* abe_reset_hal() description for void abe_reset_hal(). +* +* Operations : reset the HAL by reloading the static variables and default AESS registers. +* Called after a PRCM cold-start reset of ABE +* +* Parameter : No parameter +* @param +* +* @pre no pre-condition +* +* @post +* +* @return error code +* +* @see +*/ +void abe_reset_hal(void); + +/** +* abe_read_use_case_opp() description for void abe_read_use_case_opp(). +* +* Operations : returns the expected min OPP for a given use_case list +* +* Parameter : No parameter +* @param +* +* @pre no pre-condition +* +* @post +* +* @return error code +* +* @see +*/ +void abe_read_use_case_opp(abe_use_case_id *u, abe_opp_t *o); + +/** +* abe_load_fw() description for void abe_load_fw(). +* +* Operations : +* loads the Audio Engine firmware, generate a single pulse on the Event generator +* to let execution start, read the version number returned from this execution. +* +* Parameter : No parameter +* @param +* +* @pre no pre-condition +* +* @post +* +* @return error code in case the firmware does not start. +* +* @see +*/ +void abe_load_fw(void); + +/** +* abe_read_port_address() description for void abe_read_port_address(). +* +* Operations : +* This API returns the address of the DMA register used on this audio port. +* +* Parameter : No parameter +* @param dma : output pointer to the DMA iteration and data destination pointer +* +* @pre no pre-condition +* +* @post +* +* @return error code +* +* @see +*/ +void abe_read_port_address(abe_port_id port, abe_dma_t *dma); + +/** +* abe_default_configuration() description for void abe_default_configuration(). +* +* Parameter : +* use-case-ID : "LP player", "voice-call" use-cases as defined in the paragraph +* "programming use-case sequences" +* param1, 2, 3, 4 : two parameters to be used later during FW06 integration +* +* Operations : +* private API used during development. Loads all the necessary parameters and data +* patterns to allow a stand-alone functional test without the need of. +* +* Parameter : No parameter +* @param dma : output pointer to the DMA iteration and data destination pointer +* +* @pre no pre-condition +* +* @post +* +* @return error code +* +* @see +*/ +void abe_default_configuration(abe_uint32 use_case); + +/** +* abe_irq_processing() description for void abe_irq_processing(). +* +* Parameter : +* No parameter +* +* Operations : +* This subroutine will check the IRQ_FIFO from the AE and act accordingly. +* Some IRQ source are originated for the delivery of "end of time sequenced tasks" +* notifications, some are originated from the Ping-Pong protocols, some are generated from +* the embedded debugger when the firmware stops on programmable break-points, etc … +* +* @param dma : output pointer to the DMA iteration and data destination pointer +* +* @pre no pre-condition +* +* @post +* +* @return error code +* +* @see +*/ +void abe_irq_processing(void); + +/** +* abe_write_event_generator () description for void abe_event_generator_switch(). +* +* Operations : +* load the AESS event generator hardware source. Loads the firmware parameters +* accordingly. Indicates to the FW which data stream is the most important to preserve +* in case all the streams are asynchronous. If the parameter is "default", let the HAL +* decide which Event source is the best appropriate based on the opened ports. +* +* @param e: Event Generation Counter, McPDM, DMIC or default. +* +* @pre no pre-condition +* +* @post +* +* @return error code +* +* @see +*/ +void abe_write_event_generator(abe_event_id e); + +/** +* abe_read_lowest_opp() description for void abe_read_lowest_opp(). +* +* Operations : +* Returns the lowest possible OPP based on the current active ports. +* +* @param o: returned data +* +* @pre no pre-condition +* +* @post +* +* @return error code +* +* @see +*/ +void abe_read_lowest_opp(abe_opp_t *o); + +/** +* abe_set_opp_processing() description for void abe_set_opp_processing(). +* +* Parameter : +* New processing network and OPP: +* 0: Ultra Lowest power consumption audio player (no post-processing, no mixer); +* 1: OPP 25% (simple multimedia features, including low-power player); +* 2: OPP 50% (multimedia and voice calls); +* 3: OPP100% (EANC, multimedia complex use-cases); +* +* Operations : +* Rearranges the FW task network to the corresponding OPP list of features. +* The corresponding AE ports are supposed to be set/reset accordingly before this switch. +* +* @param o: desired opp +* +* @pre no pre-condition +* +* @post +* +* @return error code +* +* @see +*/ +void abe_set_opp_processing(abe_opp_t opp); + +/** +* abe_set_ping_pong_bufferg() description for void abe_set_ping_pong_buffer(). +* +* Parameter : +* Port_ID : +* Pointer name : Read or Write pointer +* New data +* +* Operations : +* Updates the ping-pong read/write pointer with the input data. +* +* @param +* +* @pre no pre-condition +* +* @post +* +* @return error code +* +* @see +*/ +void abe_set_ping_pong_buffer(abe_port_id port, abe_uint32 n); + +/** +* @fn abe_connect_irq_ping_pong_port() +* +* Operations : enables the data echanges between a direct access to the DMEM +* memory of ABE using cache flush. On each IRQ activation a subroutine +* registered with "abe_plug_subroutine" will be called. This subroutine +* will generate an amount of samples, send them to DMEM memory and call +* "abe_set_ping_pong_buffer" to notify the new amount of samples in the +* pong buffer. +* +* Parameters : +* id: port name +* f : desired data format +* I : index of the call-back subroutine to call +* s : half-buffer (ping) size +* +* p: returned base address of the first (ping) buffer) +* +* @see ABE_API.h +*/ +void abe_connect_irq_ping_pong_port(abe_port_id id, abe_data_format_t *f, abe_uint32 d, + abe_uint32 s, abe_uint32 *p, abe_uint32 dsp_mcu_flag); + +/** +* abe_plug_subroutine() description for void abe_plug_subroutine(). +* +* Parameter : +* id: returned sequence index after plugging a new subroutine +* f : subroutine address to be inserted +* +* Operations : +* register a list of subroutines for call-back purpose. +* +* @param +* +* @pre no pre-condition +* +* @post +* +* @return error code +* +* @see +*/ +void abe_plug_subroutine(abe_uint32 *id, abe_subroutine2 f, abe_uint32 n, abe_uint32 *params); + +/** +* abe_plug_sequence() description for void abe_plug_sequence(). +* + * Parameter : + * Id: returned sequence index after pluging a new sequence (index in the tables); + * s : sequence to be inserted + * + * Operations : + * Load a list a time-sequenced operations. +* +* @param +* +* @pre no pre-condition +* +* @post +* +* @return error code +* +* @see +*/ +void abe_plug_sequence(abe_uint32 *id, abe_sequence_t *s); + +/** +* abe_launch_sequence() description for void abe_launch_sequence(). +* +* Parameter : +* Sequence index +* +* Operations : +* Launch a list a time-sequenced operations. +* +* @param +* +* @pre no pre-condition +* +* @post +* +* @return error code +* +* @see +*/ +void abe_launch_sequence(abe_patch_rev patch, abe_uint32 n); + +/** +* abe_launch_sequence_param() description for void abe_launch_sequence_param(). +* +* Parameter : +* Sequence index +* Parameters to the programmable sequence +* +* Operations : +* Launch a list a time-sequenced operations. +* +* @param +* +* @pre no pre-condition +* +* @post +* +* @return error code +* +* @see +*/ +void abe_launch_sequence_param(abe_patch_rev patch, abe_uint32 n, abe_int32 *param1, abe_int32 *param2, abe_int32 *param3, abe_int32 *param4);; + +/* + * ABE_RESET_PORT + * + * Parameters : + * id: port name + * + * Returned value : error code + * + * Operations : stop the port activity and reload default parameters on the associated processing features. + * + */ +void abe_reset_port(abe_port_id id); + +/* + * ABE_READ_REMAINING_DATA + * + * Parameter : + * Port_ID : + * size : pointer to the remaining number of 32bits words + * + * Operations : + * computes the remaining amount of data in the buffer. + * + * Return value : + * error code + */ +void abe_read_remaining_data(abe_port_id port, abe_uint32 *n); + +/* + * ABE_DISABLE_DATA_TRANSFER + * + * Parameter : + * p: port indentifier + * + * Operations : + * disables the ATC descriptor + * + * Return value : + * None. + */ +void abe_disable_data_transfer (abe_port_id p); + +/* + * ABE_ENABLE_DATA_TRANSFER + * + * Parameter : + * p: port indentifier + * + * Operations : + * enables the ATC descriptor + * + * Return value : + * None. + */ +void abe_enable_data_transfer(abe_port_id p); + +/* + * ABE_SET_DMIC_FILTER + * + * Parameter : + * DMIC decimation ratio : 16/25/32/40 + * + * Operations : + * Loads in CMEM a specific list of coefficients depending on the DMIC sampling + * frequency (2.4MHz or 3.84MHz);. This table compensates the DMIC decimator roll-off at 20kHz. + * The default table is loaded with the DMIC 2.4MHz recommended configuration. + * + * Return value : + * None. + */ +void abe_set_dmic_filter(abe_dmic_ratio_t d); + +/** +* @fn abe_connect_cbpr_dmareq_port() +* +* Operations : enables the data echange between a DMA and the ABE through the +* CBPr registers of AESS. +* +* Parameters : +* id: port name +* f : desired data format +* d : desired dma_request line (0..7) +* a : returned pointer to the base address of the CBPr register and number of +* samples to exchange during a DMA_request. +* +* @see ABE_API.h +*/ +void abe_connect_cbpr_dmareq_port(abe_port_id id, abe_data_format_t *f, abe_uint32 d, abe_dma_t *a); + +/** +* @fn abe_connect_dmareq_port() +* +* Operations : enables the data echange between a DMA and the ABE through the +* CBPr registers of AESS. +* +* Parameters : +* id: port name +* f : desired data format +* d : desired dma_request line (0..7) +* a : returned pointer to the base address of the ping-pong buffer and number +* of samples to exchange during a DMA_request.. +* +* @see ABE_API.h +*/ +void abe_connect_dmareq_port(abe_port_id id, abe_data_format_t *f, abe_uint32 d, abe_dma_t *a); + +/** +* @fn abe_connect_dmareq_ping_pong_port() +* +* Operations : enables the data echanges between a DMA and a direct access to the +* DMEM memory of ABE. On each dma_request activation the DMA will exchange "s" +* bytes and switch to the "pong" buffer for a new buffer exchange.ABE +* +* Parameters : +* id: port name +* f : desired data format +* d : desired dma_request line (0..7) +* s : half-buffer (ping) size +* +* a : returned pointer to the base address of the ping-pong buffer and number of samples to exchange during a DMA_request. +* +* @see ABE_API.h +*/ +void abe_connect_dmareq_ping_pong_port(abe_port_id id, abe_data_format_t *f, abe_uint32 d, abe_uint32 s, abe_dma_t *a); + +/** +* @fn abe_connect_serial_port() +* +* Operations : enables the data echanges between a McBSP and an ATC buffer in +* DMEM. This API is used connect 48kHz McBSP streams to MM_DL and 8/16kHz +* voice streams to VX_UL, VX_DL, BT_VX_UL, BT_VX_DL. It abstracts the +* abe_write_port API. +* +* Parameters : +* id: port name +* f : data format +* i : peripheral ID (McBSP #1, #2, #3) +* +* @see ABE_API.h +*/ +void abe_connect_serial_port(abe_port_id id, abe_data_format_t *f, abe_mcbsp_id i); + +/* + * ABE_WRITE_GAIN + * + * Parameter : + * port : name of the port (VX_DL_PORT, MM_DL_PORT, MM_EXT_DL_PORT, TONES_DL_PORT, …); + * dig_gain_port pointer to returned port gain and time constant + * + * Operations : + * saves the gain data in the local HAL-L0 table of gains in native format. + * Translate the gain to the AE-FW format and load it in CMEM + * + * Return value : + * error code in case the gain_id is not compatible with the current OPP value. + */ + +void abe_write_gain(abe_gain_id id, abe_gain_t f_g, abe_ramp_t f_ramp, abe_port_id p); + +/* + * ABE_WRITE_EQUALIZER + * + * Parameter : + * Id : name of the equalizer + * Param : equalizer coefficients + * + * Operations : + * Load the coefficients in CMEM. This API can be called when the corresponding equalizer + * is not activated. After reloading the firmware the default coefficients corresponds to + * "no equalizer feature". Loading all coefficients with zeroes disables the feature. + * + * Return value : + * None. + */ +void abe_write_equalizer(abe_equ_id id, abe_equ_t *param); + +/* + * ABE_SELECT_MAIN_PORT + * + * Parameter : + * id : audio port name + * Operations : + * tells the FW which is the reference stream for adjusting the processing on 23/24/25 slots + * + * Return value : + * None. + */ +void abe_select_main_port(abe_port_id id); + +/* + * ABE_WRITE_ASRC + * + * Parameter : + * Id : name of the asrc + * param : drift value t compensate + * + * Operations : + * Load the drift coefficients in FW memory. This API can be called when the corresponding + * ASRC is not activated. After reloading the firmware the default coefficients corresponds + * to "no ASRC activated". Loading the drift value with zero disables the feature. + * + * Return value : + * None. + */ +void abe_write_asrc(abe_asrc_id id, abe_drift_t param); +void abe_set_asrc_drift_control(abe_asrc_id id, abe_uint32 f); + +/* + * ABE_WRITE_APS + * + * Parameter : + * Id : name of the aps filter + * param : table of filter coefficients + * + * Operations : + * Load the filters and thresholds coefficients in FW memory. This API can be called when + * the corresponding APS is not activated. After reloading the firmware the default coefficients + * corresponds to "no APS activated". Loading all the coefficients value with zero disables + * the feature. + * + * Return value : + * None. + */ +void abe_write_aps(abe_aps_id id, abe_aps_t *param); + +/* + * ABE_WRITE_MIXER + * + * Parameter : + * Id : name of the mixer + * param : list of input gains of the mixer + * p : list of ports corresponding to the above gains + * + * Operations : + * Load the gain coefficients in FW memory. This API can be called when the corresponding + * MIXER is not activated. After reloading the firmware the default coefficients corresponds + * to "all input and output mixer's gain in mute state". A mixer is disabled with a network + * reconfiguration corresponding to an OPP value. + * + * Return value : + * None. + */ +void abe_write_mixer(abe_mixer_id id, abe_gain_t g, abe_ramp_t ramp, abe_port_id p); + +/* + * ABE_SET_ROUTER_CONFIGURATION + * + * Parameter : + * Id : name of the router + * Conf : id of the configuration + * param : list of output index of the route + * + * Operations : + * The uplink router takes its input from DMIC (6 samples), AMIC (2 samples) and + * PORT1/2 (2 stereo ports). Each sample will be individually stored in an intermediate + * table of 10 elements. The intermediate table is used to route the samples to + * three directions : REC1 mixer, 2 EANC DMIC source of filtering and MM recording audio path. + * For example, a use case consisting in AMIC used for uplink voice communication, DMIC 0,1,2,3 + * used for multimedia recording, , DMIC 5 used for EANC filter, DMIC 4 used for the feedback channel, + * will be implemented with the following routing table index list : + * [3, 2 , 1, 0, 0, 0 (two dummy indexes to data that will not be on MM_UL), 4, 5, 7, 6] + * + * Return value : + * None. + */ +void abe_set_router_configuration(abe_router_id id, abe_uint32 configuration, abe_router_t *param); + +/* + * ABE_READ_DEBUG_TRACE + * + * Parameter : + * data destination pointer + * max number of data read + * + * Operations : + * reads the AE circular data pointer holding pairs of debug data+timestamps, and store + * the pairs in linear addressing to the parameter pointer. Stops the copy when the max + * parameter is reached or when the FIFO is empty. + * + * Return value : + * None. + */ +void abe_read_debug_trace(abe_uint32 *data, abe_uint32 *n); + +/* + * ABE_SET_DEBUG_TRACE + * + * Parameter : + * debug ID from a list to be defined + * + * Operations : + * load a mask which filters the debug trace to dedicated types of data + * + * Return value : + * None. + */ +void abe_set_debug_trace(abe_dbg_t debug); +#ifdef __cplusplus +} +#endif + +#endif /* _ABE_API_H_ */ diff --git a/sound/soc/codecs/abe/abe_cm_addr.h b/sound/soc/codecs/abe/abe_cm_addr.h new file mode 100644 index 000000000000..2f56b3dcc1c7 --- /dev/null +++ b/sound/soc/codecs/abe/abe_cm_addr.h @@ -0,0 +1,346 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#ifndef _ABE_CM_ADDR_H_ +#define _ABE_CM_ADDR_H_ + +#define init_CM_ADDR 0 +#define init_CM_ADDR_END 284 +#define init_CM_sizeof 285 + +#define C_Data_LSB_2_ADDR 285 +#define C_Data_LSB_2_ADDR_END 285 +#define C_Data_LSB_2_sizeof 1 + +#define C_1_Alpha_ADDR 286 +#define C_1_Alpha_ADDR_END 303 +#define C_1_Alpha_sizeof 18 + +#define C_Alpha_ADDR 304 +#define C_Alpha_ADDR_END 321 +#define C_Alpha_sizeof 18 + +#define C_GainsWRamp_ADDR 322 +#define C_GainsWRamp_ADDR_END 335 +#define C_GainsWRamp_sizeof 14 + +#define C_Gains_DL1M_ADDR 336 +#define C_Gains_DL1M_ADDR_END 339 +#define C_Gains_DL1M_sizeof 4 + +#define C_Gains_DL2M_ADDR 340 +#define C_Gains_DL2M_ADDR_END 343 +#define C_Gains_DL2M_sizeof 4 + +#define C_Gains_EchoM_ADDR 344 +#define C_Gains_EchoM_ADDR_END 345 +#define C_Gains_EchoM_sizeof 2 + +#define C_Gains_SDTM_ADDR 346 +#define C_Gains_SDTM_ADDR_END 347 +#define C_Gains_SDTM_sizeof 2 + +#define C_Gains_VxRecM_ADDR 348 +#define C_Gains_VxRecM_ADDR_END 351 +#define C_Gains_VxRecM_sizeof 4 + +#define C_Gains_ULM_ADDR 352 +#define C_Gains_ULM_ADDR_END 355 +#define C_Gains_ULM_sizeof 4 + +#define C_Gains_unused_ADDR 356 +#define C_Gains_unused_ADDR_END 357 +#define C_Gains_unused_sizeof 2 + +#define C_SDT_Coefs_ADDR 358 +#define C_SDT_Coefs_ADDR_END 366 +#define C_SDT_Coefs_sizeof 9 + +#define C_CoefASRC1_VX_ADDR 367 +#define C_CoefASRC1_VX_ADDR_END 385 +#define C_CoefASRC1_VX_sizeof 19 + +#define C_CoefASRC2_VX_ADDR 386 +#define C_CoefASRC2_VX_ADDR_END 404 +#define C_CoefASRC2_VX_sizeof 19 + +#define C_CoefASRC3_VX_ADDR 405 +#define C_CoefASRC3_VX_ADDR_END 423 +#define C_CoefASRC3_VX_sizeof 19 + +#define C_CoefASRC4_VX_ADDR 424 +#define C_CoefASRC4_VX_ADDR_END 442 +#define C_CoefASRC4_VX_sizeof 19 + +#define C_CoefASRC5_VX_ADDR 443 +#define C_CoefASRC5_VX_ADDR_END 461 +#define C_CoefASRC5_VX_sizeof 19 + +#define C_CoefASRC6_VX_ADDR 462 +#define C_CoefASRC6_VX_ADDR_END 480 +#define C_CoefASRC6_VX_sizeof 19 + +#define C_CoefASRC7_VX_ADDR 481 +#define C_CoefASRC7_VX_ADDR_END 499 +#define C_CoefASRC7_VX_sizeof 19 + +#define C_CoefASRC8_VX_ADDR 500 +#define C_CoefASRC8_VX_ADDR_END 518 +#define C_CoefASRC8_VX_sizeof 19 + +#define C_CoefASRC9_VX_ADDR 519 +#define C_CoefASRC9_VX_ADDR_END 537 +#define C_CoefASRC9_VX_sizeof 19 + +#define C_CoefASRC10_VX_ADDR 538 +#define C_CoefASRC10_VX_ADDR_END 556 +#define C_CoefASRC10_VX_sizeof 19 + +#define C_CoefASRC11_VX_ADDR 557 +#define C_CoefASRC11_VX_ADDR_END 575 +#define C_CoefASRC11_VX_sizeof 19 + +#define C_CoefASRC12_VX_ADDR 576 +#define C_CoefASRC12_VX_ADDR_END 594 +#define C_CoefASRC12_VX_sizeof 19 + +#define C_CoefASRC13_VX_ADDR 595 +#define C_CoefASRC13_VX_ADDR_END 613 +#define C_CoefASRC13_VX_sizeof 19 + +#define C_CoefASRC14_VX_ADDR 614 +#define C_CoefASRC14_VX_ADDR_END 632 +#define C_CoefASRC14_VX_sizeof 19 + +#define C_CoefASRC15_VX_ADDR 633 +#define C_CoefASRC15_VX_ADDR_END 651 +#define C_CoefASRC15_VX_sizeof 19 + +#define C_CoefASRC16_VX_ADDR 652 +#define C_CoefASRC16_VX_ADDR_END 670 +#define C_CoefASRC16_VX_sizeof 19 + +#define C_AlphaCurrent_UL_VX_ADDR 671 +#define C_AlphaCurrent_UL_VX_ADDR_END 671 +#define C_AlphaCurrent_UL_VX_sizeof 1 + +#define C_BetaCurrent_UL_VX_ADDR 672 +#define C_BetaCurrent_UL_VX_ADDR_END 672 +#define C_BetaCurrent_UL_VX_sizeof 1 + +#define C_AlphaCurrent_DL_VX_ADDR 673 +#define C_AlphaCurrent_DL_VX_ADDR_END 673 +#define C_AlphaCurrent_DL_VX_sizeof 1 + +#define C_BetaCurrent_DL_VX_ADDR 674 +#define C_BetaCurrent_DL_VX_ADDR_END 674 +#define C_BetaCurrent_DL_VX_sizeof 1 + +#define C_CoefASRC1_DL_MM_ADDR 675 +#define C_CoefASRC1_DL_MM_ADDR_END 692 +#define C_CoefASRC1_DL_MM_sizeof 18 + +#define C_CoefASRC2_DL_MM_ADDR 693 +#define C_CoefASRC2_DL_MM_ADDR_END 710 +#define C_CoefASRC2_DL_MM_sizeof 18 + +#define C_CoefASRC3_DL_MM_ADDR 711 +#define C_CoefASRC3_DL_MM_ADDR_END 728 +#define C_CoefASRC3_DL_MM_sizeof 18 + +#define C_CoefASRC4_DL_MM_ADDR 729 +#define C_CoefASRC4_DL_MM_ADDR_END 746 +#define C_CoefASRC4_DL_MM_sizeof 18 + +#define C_CoefASRC5_DL_MM_ADDR 747 +#define C_CoefASRC5_DL_MM_ADDR_END 764 +#define C_CoefASRC5_DL_MM_sizeof 18 + +#define C_CoefASRC6_DL_MM_ADDR 765 +#define C_CoefASRC6_DL_MM_ADDR_END 782 +#define C_CoefASRC6_DL_MM_sizeof 18 + +#define C_CoefASRC7_DL_MM_ADDR 783 +#define C_CoefASRC7_DL_MM_ADDR_END 800 +#define C_CoefASRC7_DL_MM_sizeof 18 + +#define C_CoefASRC8_DL_MM_ADDR 801 +#define C_CoefASRC8_DL_MM_ADDR_END 818 +#define C_CoefASRC8_DL_MM_sizeof 18 + +#define C_CoefASRC9_DL_MM_ADDR 819 +#define C_CoefASRC9_DL_MM_ADDR_END 836 +#define C_CoefASRC9_DL_MM_sizeof 18 + +#define C_CoefASRC10_DL_MM_ADDR 837 +#define C_CoefASRC10_DL_MM_ADDR_END 854 +#define C_CoefASRC10_DL_MM_sizeof 18 + +#define C_CoefASRC11_DL_MM_ADDR 855 +#define C_CoefASRC11_DL_MM_ADDR_END 872 +#define C_CoefASRC11_DL_MM_sizeof 18 + +#define C_CoefASRC12_DL_MM_ADDR 873 +#define C_CoefASRC12_DL_MM_ADDR_END 890 +#define C_CoefASRC12_DL_MM_sizeof 18 + +#define C_CoefASRC13_DL_MM_ADDR 891 +#define C_CoefASRC13_DL_MM_ADDR_END 908 +#define C_CoefASRC13_DL_MM_sizeof 18 + +#define C_CoefASRC14_DL_MM_ADDR 909 +#define C_CoefASRC14_DL_MM_ADDR_END 926 +#define C_CoefASRC14_DL_MM_sizeof 18 + +#define C_CoefASRC15_DL_MM_ADDR 927 +#define C_CoefASRC15_DL_MM_ADDR_END 944 +#define C_CoefASRC15_DL_MM_sizeof 18 + +#define C_CoefASRC16_DL_MM_ADDR 945 +#define C_CoefASRC16_DL_MM_ADDR_END 962 +#define C_CoefASRC16_DL_MM_sizeof 18 + +#define C_AlphaCurrent_DL_MM_ADDR 963 +#define C_AlphaCurrent_DL_MM_ADDR_END 963 +#define C_AlphaCurrent_DL_MM_sizeof 1 + +#define C_BetaCurrent_DL_MM_ADDR 964 +#define C_BetaCurrent_DL_MM_ADDR_END 964 +#define C_BetaCurrent_DL_MM_sizeof 1 + +#define C_DL2_L_Coefs_ADDR 965 +#define C_DL2_L_Coefs_ADDR_END 989 +#define C_DL2_L_Coefs_sizeof 25 + +#define C_DL2_R_Coefs_ADDR 990 +#define C_DL2_R_Coefs_ADDR_END 1014 +#define C_DL2_R_Coefs_sizeof 25 + +#define C_DL1_Coefs_ADDR 1015 +#define C_DL1_Coefs_ADDR_END 1039 +#define C_DL1_Coefs_sizeof 25 + +#define C_VX_8_48_BP_Coefs_ADDR 1040 +#define C_VX_8_48_BP_Coefs_ADDR_END 1052 +#define C_VX_8_48_BP_Coefs_sizeof 13 + +#define C_VX_8_48_LP_Coefs_ADDR 1053 +#define C_VX_8_48_LP_Coefs_ADDR_END 1065 +#define C_VX_8_48_LP_Coefs_sizeof 13 + +#define C_VX_48_8_LP_Coefs_ADDR 1066 +#define C_VX_48_8_LP_Coefs_ADDR_END 1078 +#define C_VX_48_8_LP_Coefs_sizeof 13 + +#define C_VX_16_48_HP_Coefs_ADDR 1079 +#define C_VX_16_48_HP_Coefs_ADDR_END 1085 +#define C_VX_16_48_HP_Coefs_sizeof 7 + +#define C_VX_16_48_LP_Coefs_ADDR 1086 +#define C_VX_16_48_LP_Coefs_ADDR_END 1098 +#define C_VX_16_48_LP_Coefs_sizeof 13 + +#define C_VX_48_16_LP_Coefs_ADDR 1099 +#define C_VX_48_16_LP_Coefs_ADDR_END 1111 +#define C_VX_48_16_LP_Coefs_sizeof 13 + +#define C_EANC_WarpCoeffs_ADDR 1112 +#define C_EANC_WarpCoeffs_ADDR_END 1113 +#define C_EANC_WarpCoeffs_sizeof 2 + +#define C_EANC_FIRcoeffs_ADDR 1114 +#define C_EANC_FIRcoeffs_ADDR_END 1134 +#define C_EANC_FIRcoeffs_sizeof 21 + +#define C_EANC_IIRcoeffs_ADDR 1135 +#define C_EANC_IIRcoeffs_ADDR_END 1151 +#define C_EANC_IIRcoeffs_sizeof 17 + +#define C_EANC_FIRcoeffs_2nd_ADDR 1152 +#define C_EANC_FIRcoeffs_2nd_ADDR_END 1172 +#define C_EANC_FIRcoeffs_2nd_sizeof 21 + +#define C_EANC_IIRcoeffs_2nd_ADDR 1173 +#define C_EANC_IIRcoeffs_2nd_ADDR_END 1189 +#define C_EANC_IIRcoeffs_2nd_sizeof 17 + +#define C_APS_DL1_coeffs1_ADDR 1190 +#define C_APS_DL1_coeffs1_ADDR_END 1198 +#define C_APS_DL1_coeffs1_sizeof 9 + +#define C_APS_DL1_M_coeffs2_ADDR 1199 +#define C_APS_DL1_M_coeffs2_ADDR_END 1201 +#define C_APS_DL1_M_coeffs2_sizeof 3 + +#define C_APS_DL1_C_coeffs2_ADDR 1202 +#define C_APS_DL1_C_coeffs2_ADDR_END 1204 +#define C_APS_DL1_C_coeffs2_sizeof 3 + +#define C_APS_DL2_L_coeffs1_ADDR 1205 +#define C_APS_DL2_L_coeffs1_ADDR_END 1213 +#define C_APS_DL2_L_coeffs1_sizeof 9 + +#define C_APS_DL2_R_coeffs1_ADDR 1214 +#define C_APS_DL2_R_coeffs1_ADDR_END 1222 +#define C_APS_DL2_R_coeffs1_sizeof 9 + +#define C_APS_DL2_L_M_coeffs2_ADDR 1223 +#define C_APS_DL2_L_M_coeffs2_ADDR_END 1225 +#define C_APS_DL2_L_M_coeffs2_sizeof 3 + +#define C_APS_DL2_R_M_coeffs2_ADDR 1226 +#define C_APS_DL2_R_M_coeffs2_ADDR_END 1228 +#define C_APS_DL2_R_M_coeffs2_sizeof 3 + +#define C_APS_DL2_L_C_coeffs2_ADDR 1229 +#define C_APS_DL2_L_C_coeffs2_ADDR_END 1231 +#define C_APS_DL2_L_C_coeffs2_sizeof 3 + +#define C_APS_DL2_R_C_coeffs2_ADDR 1232 +#define C_APS_DL2_R_C_coeffs2_ADDR_END 1234 +#define C_APS_DL2_R_C_coeffs2_sizeof 3 + +#define C_AlphaCurrent_ECHO_REF_ADDR 1235 +#define C_AlphaCurrent_ECHO_REF_ADDR_END 1235 +#define C_AlphaCurrent_ECHO_REF_sizeof 1 + +#define C_BetaCurrent_ECHO_REF_ADDR 1236 +#define C_BetaCurrent_ECHO_REF_ADDR_END 1236 +#define C_BetaCurrent_ECHO_REF_sizeof 1 + +#define C_APS_DL1_EQ_ADDR 1237 +#define C_APS_DL1_EQ_ADDR_END 1245 +#define C_APS_DL1_EQ_sizeof 9 + +#define C_APS_DL2_L_EQ_ADDR 1246 +#define C_APS_DL2_L_EQ_ADDR_END 1254 +#define C_APS_DL2_L_EQ_sizeof 9 + +#define C_APS_DL2_R_EQ_ADDR 1255 +#define C_APS_DL2_R_EQ_ADDR_END 1263 +#define C_APS_DL2_R_EQ_sizeof 9 + +#define C_Vibra2_consts_ADDR 1264 +#define C_Vibra2_consts_ADDR_END 1267 +#define C_Vibra2_consts_sizeof 4 + +#define C_Vibra1_coeffs_ADDR 1268 +#define C_Vibra1_coeffs_ADDR_END 1278 +#define C_Vibra1_coeffs_sizeof 11 + +#define C_48_96_LP_Coefs_ADDR 1279 +#define C_48_96_LP_Coefs_ADDR_END 1293 +#define C_48_96_LP_Coefs_sizeof 15 + +#define C_98_48_LP_Coefs_ADDR 1294 +#define C_98_48_LP_Coefs_ADDR_END 1312 +#define C_98_48_LP_Coefs_sizeof 19 + +#endif /* _ABECM_ADDR_H_ */ diff --git a/sound/soc/codecs/abe/abe_cof.h b/sound/soc/codecs/abe/abe_cof.h new file mode 100644 index 000000000000..322b9ccae138 --- /dev/null +++ b/sound/soc/codecs/abe/abe_cof.h @@ -0,0 +1,32 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ +const abe_int32 abe_dmic_40[C_98_48_LP_Coefs_sizeof] = { + -4119413, -192384, -341428, -348088, -151380, 151380, + 348088, 341428, 192384, 4119415, 1938156, -6935719, + 775202, -1801934, 2997698, -3692214, 3406822, -2280190, 1042982 + }; + +const abe_int32 abe_dmic_32 [C_98_48_LP_Coefs_sizeof] = { + -4119413, -192384, -341428, -348088, -151380, 151380, + 348088, 341428, 192384, 4119415, 1938156, -6935719, + 775202, -1801934, 2997698, -3692214, 3406822, -2280190, 1042982 + }; + +const abe_int32 abe_dmic_25 [C_98_48_LP_Coefs_sizeof] = { + -4119413, -192384, -341428, -348088, -151380, 151380, + 348088, 341428, 192384, 4119415, 1938156, -6935719, + 775202, -1801934, 2997698, -3692214, 3406822, -2280190, 1042982 + }; +const abe_int32 abe_dmic_16 [C_98_48_LP_Coefs_sizeof] = { + -4119413, -192384, -341428, -348088, -151380, 151380, + 348088, 341428, 192384, 4119415, 1938156, -6935719, + 775202, -1801934, 2997698, -3692214, 3406822, -2280190, 1042982 + }; + diff --git a/sound/soc/codecs/abe/abe_dat.h b/sound/soc/codecs/abe/abe_dat.h new file mode 100644 index 000000000000..ab2ef4217f2e --- /dev/null +++ b/sound/soc/codecs/abe/abe_dat.h @@ -0,0 +1,1300 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#ifndef _ABE_DAT_H_ +#define _ABE_DAT_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * Callbacks + */ +abe_subroutine2 callbacks[MAXCALLBACK]; /* 2 parameters subroutine pointers */ + +abe_port_t abe_port[MAXNBABEPORTS]; /* list of ABE ports */ + +const abe_port_t abe_port_init[MAXNBABEPORTS] = { +/* status, data format, drift, callback, io-task buffer 1, io-task buffer 2, + * protocol, dma offset, features, name + * - Features reseted at start + */ + + /* DMIC */ + { + IDLE_P, + {96000, SIX_MSB}, + NODRIFT, + NOCALLBACK, + 0, + 0, + { + SNK_P, + DMIC_PORT_PROT, + {{ + dmem_dmic, + dmem_dmic_size, + DMIC_ITER + }}, + }, + {0, 0}, + {EQMIC, 0}, + "DMIC", + }, + /* PDM_UL */ + { + IDLE_P, + {96000, STEREO_MSB}, + NODRIFT, + NOCALLBACK, + smem_amic, + 0, + { + SNK_P, + MCPDMUL_PORT_PROT, + {{ + dmem_amic, + dmem_amic_size, + MCPDM_UL_ITER, + }}, + }, + {0, 0}, + {EQMIC, 0}, + "PDM_UL", + }, + /* BT_VX_UL */ + { + IDLE_P, + {8000, STEREO_MSB}, + NODRIFT, + NOCALLBACK, + smem_bt_vx_ul, + 0, + { + SNK_P, + SERIAL_PORT_PROT, + {{ + MCBSP1_DMA_TX * ATC_SIZE, + dmem_bt_vx_ul, + dmem_bt_vx_ul_size, + 1 * SCHED_LOOP_8kHz, + }}, + }, + {0, 0}, + {0}, + "BT_VX_UL", + }, + /* MM_UL */ + { + IDLE_P, + {48000, STEREO_MSB}, + NODRIFT, + NOCALLBACK, + smem_mm_ul, + 0, + { + SRC_P, + DMAREQ_PORT_PROT, + {{ + CBPr_DMA_RTX3 * ATC_SIZE, + dmem_mm_ul, + dmem_mm_ul_size, + 10 * SCHED_LOOP_48kHz, + ABE_DMASTATUS_RAW, + 1 << 3, + }}, + }, + {CIRCULAR_BUFFER_PERIPHERAL_R__3, 120}, + {UPROUTE, 0}, + "MM_UL", + }, + /* MM_UL2 */ + { + IDLE_P, + {48000, STEREO_MSB}, + NODRIFT, + NOCALLBACK, + smem_mm_ul2, + 0, + { + SRC_P, + DMAREQ_PORT_PROT, + {{ + CBPr_DMA_RTX4 * ATC_SIZE, + dmem_mm_ul2, + dmem_mm_ul2_size, + 2 * SCHED_LOOP_48kHz, + ABE_DMASTATUS_RAW, + 1 << 4, + }}, + }, + {CIRCULAR_BUFFER_PERIPHERAL_R__4, 24}, + {UPROUTE, 0}, + "MM_UL2", + }, + /* VX_UL */ + { + IDLE_P, + {8000, MONO_MSB}, + NODRIFT, + NOCALLBACK, + smem_vx_ul, + 0, + { + SRC_P, + DMAREQ_PORT_PROT, + {{ + CBPr_DMA_RTX2*ATC_SIZE, + dmem_vx_ul, + dmem_vx_ul_size / 2, + 1 * SCHED_LOOP_8kHz, + ABE_DMASTATUS_RAW, + 1 << 2, + }}, + }, + {CIRCULAR_BUFFER_PERIPHERAL_R__2, 2}, + {ASRC2, 0}, + "VX_UL", + }, + /* MM_DL */ + { + IDLE_P, + {48000, STEREO_MSB}, + NODRIFT, + NOCALLBACK, + smem_mm_dl_opp100, + 0, + { + SNK_P, + PINGPONG_PORT_PROT, + {{ + CBPr_DMA_RTX0 * ATC_SIZE, + dmem_mm_dl, + dmem_mm_dl_size, + 2 * SCHED_LOOP_48kHz, + ABE_DMASTATUS_RAW, + 1 << 0, + }}, + }, + {CIRCULAR_BUFFER_PERIPHERAL_R__0, 24}, + {ASRC3, 0}, + "MM_DL", + }, + /* VX_DL */ + { + IDLE_P, + {8000, MONO_MSB}, + NODRIFT, + NOCALLBACK, + smem_vx_dl, + 0, + { + SNK_P, + DMAREQ_PORT_PROT, + {{ + CBPr_DMA_RTX1 * ATC_SIZE, + dmem_vx_dl, + dmem_vx_dl_size, + 1 * SCHED_LOOP_8kHz, + ABE_DMASTATUS_RAW, + 1 << 1, + }}, + }, + {CIRCULAR_BUFFER_PERIPHERAL_R__1, 2}, + {ASRC1, 0}, + "VX_DL", + }, + /* TONES_DL */ + { + IDLE_P, + {48000, STEREO_MSB}, + NODRIFT, + NOCALLBACK, + smem_tones_dl, + 0, + { + SNK_P, + DMAREQ_PORT_PROT, + {{ + CBPr_DMA_RTX5 * ATC_SIZE, + dmem_tones_dl, + dmem_tones_dl_size, + 2 * SCHED_LOOP_48kHz, + ABE_DMASTATUS_RAW, + 1 << 5, + }}, + }, + {CIRCULAR_BUFFER_PERIPHERAL_R__5, 24}, + {0}, + "TONES_DL", + }, + /* VIB_DL */ + { + IDLE_P, + {24000, STEREO_MSB}, + NODRIFT, + NOCALLBACK, + smem_vib, + 0, + { + SNK_P, + DMAREQ_PORT_PROT, + {{ + CBPr_DMA_RTX6 * ATC_SIZE, + dmem_vib_dl, + dmem_vib_dl_size, + 2 * SCHED_LOOP_24kHz, + ABE_DMASTATUS_RAW, + 1 << 6, + }}, + }, + {CIRCULAR_BUFFER_PERIPHERAL_R__6, 12}, + {0}, + "VIB_DL", + }, + /* BT_VX_DL */ + { + IDLE_P, + {8000, MONO_MSB}, + NODRIFT, + NOCALLBACK, + smem_bt_vx_dl, + 0, + { + SRC_P, + SERIAL_PORT_PROT, + {{ + MCBSP1_DMA_RX * ATC_SIZE, + dmem_bt_vx_dl, + dmem_bt_vx_dl_size, + 1 * SCHED_LOOP_8kHz, + }}, + }, + {0, 0}, + {0}, + "BT_VX_DL", + }, + /* PDM_DL1 */ + { + IDLE_P, + {96000, SIX_MSB}, + NODRIFT, + NOCALLBACK, + 0, + 0, + { + SRC_P, + MCPDMDL_PORT_PROT, + {{ + dmem_mcpdm, + dmem_mcpdm_size, + }}, + }, + {0, 0}, + {MIXDL1, EQ1, APS1, MIXDL2, EQ2L, EQ2R, APS2L, APS2R, 0}, + "PDM_DL", + }, + /* MM_EXT_OUT */ + { + IDLE_P, + {48000, STEREO_MSB}, + NODRIFT, + NOCALLBACK, + smem_mm_ext_out, + 0, + { + SRC_P, + SERIAL_PORT_PROT, + {{ + MCBSP1_DMA_TX * ATC_SIZE, + dmem_mm_ext_out, + dmem_mm_ext_out_size, + 2 * SCHED_LOOP_48kHz, + }}, + }, + {0, 0}, + {0}, + "MM_EXT_OUT", + }, + /* MM_EXT_IN */ + { + IDLE_P, + {48000, STEREO_MSB}, + NODRIFT, + NOCALLBACK, + smem_mm_ext_in, + 0, + { + SRC_P, + SERIAL_PORT_PROT, + {{ + MCBSP1_DMA_RX * ATC_SIZE, + dmem_mm_ext_in, + dmem_mm_ext_in_size, + 2 * SCHED_LOOP_48kHz, + }}, + }, + {0, 0}, + {0}, + "MM_EXT_IN", + }, +#if 0 + /* SCHD_DBG_PORT */ + { + IDLE_P, + {48000, STEREO_MSB}, + NODRIFT, + NOCALLBACK, + smem_mm_trace, + 0, + { + SRC_P, + DMAREQ_PORT_PROT, + {{ + CBPr_DMA_RTX7 * ATC_SIZE, + dmem_mm_trace, + dmem_mm_trace_size, + 2 * SCHED_LOOP_48kHz, + DEFAULT_THR_WRITE, + ABE_DMASTATUS_RAW, + 1 << 4, + }}, + }, + {CIRCULAR_BUFFER_PERIPHERAL_R__7, 24}, + {SEQUENCE, CONTROL, GAINS, 0}, + "SCHD_DBG", + }, +#endif +}; + +const abe_port_info_t abe_port_info[MAXNBABEPORTS] = { + /* DMIC */ + { + ABE_OPP50, + {SUB_WRITE_PORT_GAIN, {DMIC_PORT, MUTE_GAIN, 0, 0}}, + {0, {0, 0, 0, 0}} + }, + /* PDM_UL */ + { + ABE_OPP50, + {SUB_WRITE_PORT_GAIN, {DMIC_PORT, MUTE_GAIN, 0, 0}}, + {0, {0, 0, 0, 0}} + }, + /* BT_VX_UL */ + { + ABE_OPP50, + {SUB_WRITE_PORT_GAIN, {DMIC_PORT, MUTE_GAIN, 0, 0}}, + {0, {0, 0, 0, 0}} + }, + /* MM_UL */ + { + ABE_OPP50, + {SUB_WRITE_PORT_GAIN, {DMIC_PORT, MUTE_GAIN, 0, 0}}, + {0, {0, 0, 0, 0}} + }, + /* MM_UL2 */ + { + ABE_OPP50, + {SUB_WRITE_PORT_GAIN, {DMIC_PORT, MUTE_GAIN, 0, 0}}, + {0, {0, 0, 0, 0}} + }, + /* VX_UL */ + { + ABE_OPP50, + {SUB_WRITE_PORT_GAIN, {DMIC_PORT, MUTE_GAIN, 0, 0}}, + {0, {0, 0, 0, 0}} + }, + /* MM_DL */ + { + ABE_OPP50, + {SUB_WRITE_MIXER, {MM_DL_PORT, MUTE_GAIN, 0, 0}}, + {0, {0, 0, 0, 0}} + }, + /* VX_DL */ + { + ABE_OPP50, + {SUB_WRITE_PORT_GAIN, {DMIC_PORT, MUTE_GAIN, 0, 0}}, + {0, {0, 0, 0, 0}} + }, + /* TONES_DL */ + { + ABE_OPP50, + {SUB_WRITE_PORT_GAIN, {DMIC_PORT, MUTE_GAIN, 0, 0}}, + {0, {0, 0, 0, 0}} + }, + /* VIB_DL */ + { + ABE_OPP50, + {SUB_WRITE_PORT_GAIN, {DMIC_PORT, MUTE_GAIN, 0, 0}}, + {0, {0, 0, 0, 0}} + }, + /* BT_VX_DL */ + { + ABE_OPP50, + {SUB_WRITE_PORT_GAIN, {DMIC_PORT, MUTE_GAIN, 0, 0}}, + {0, {0, 0, 0, 0}} + }, + /* PDM_DL */ + { + ABE_OPP50, + {SUB_WRITE_PORT_GAIN, {DMIC_PORT, MUTE_GAIN, 0, 0}}, + {0, {0, 0, 0, 0}} + }, + /* MM_EXT_OUT */ + { + ABE_OPP50, + {SUB_WRITE_PORT_GAIN, {DMIC_PORT, MUTE_GAIN, 0, 0}}, + {0, {0, 0, 0, 0}} + }, + /* MM_EXT_IN */ + { + ABE_OPP50, + {SUB_WRITE_PORT_GAIN, {DMIC_PORT, MUTE_GAIN, 0, 0}}, + {0, {0, 0, 0, 0}} + }, + /* + SCHD_DBG_PORT + { + ABE_OPP25, + {SUB_WRITE_PORT_GAIN, {DMIC_PORT, MUTE_GAIN, 0, 0}}, + {0, {0, 0, 0, 0}} + }, + */ +}; + +/* + * Firmware features + */ +abe_feature_t all_feature[MAXNBFEATURE]; + +const abe_feature_t all_feature_init[] = { +/* on_reset, off, read, write, status, input, output, slots, opp, name */ + /* EQ1: equalizer downlink path headset + earphone */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq1, + c_write_eq1, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP25, + " DLEQ1", + }, + /* EQ2L: equalizer downlink path integrated handsfree left */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq2, + c_write_eq2, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP100, + " DLEQ2L", + }, + /* EQ2R: equalizer downlink path integrated handsfree right */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP100, + " DLEQ2R", + }, + /* EQSDT: equalizer downlink path side-tone */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP50, + " EQSDT", + }, + /* EQDMIC1: SRC+equalizer uplink DMIC 1st pair */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP50, + " EQDMIC1", + }, + /* EQDMIC2: SRC+equalizer uplink DMIC 2nd pair */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP50, + " EQDMIC2", + }, + /* EQDMIC3: SRC+equalizer uplink DMIC 3rd pair */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP50, + " EQDMIC3", + }, + /* EQAMIC: SRC+equalizer uplink AMIC */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP50, + " EQAMIC", + }, + /* APS1: Acoustic protection for headset */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP25, + " APS1", + }, + /* APS2: acoustic protection high-pass filter for handsfree left */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP100, + " APS2", + }, + /* APS3: acoustic protection high-pass filter for handsfree right */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP100, + " APS3", + }, + /* ASRC1: asynchronous sample-rate-converter for the downlink voice path */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP50, + " ASRC_VXDL" + }, + /* ASRC2: asynchronous sample-rate-converter for the uplink voice path */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP50, + " ASRC_VXUL", + }, + /* ASRC3: asynchronous sample-rate-converter for the multimedia player */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP100, + " ASRC_MMDL", + }, + /* ASRC4: asynchronous sample-rate-converter for the echo reference */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP50, + " ASRC_ECHO", + }, + /* MXDL1: mixer of the headset and earphone path */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP25, + " MIX_DL1", + }, + /* MXDL2: mixer of the hands-free path */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP100, + " MIX_DL2", + }, + /* MXAUDUL: mixer for uplink tone mixer */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP50, + " MXSAUDUL", + }, + /* MXVXREC: mixer for voice recording */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP50, + " MXVXREC", + }, + /* MXSDT: mixer for side-tone */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP50, + " MIX_SDT", + }, + /* MXECHO: mixer for echo reference */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP50, + " MIX_ECHO", + }, + /* UPROUTE: router of the uplink path */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP50, + " DLEQ3", + }, + /* GAINS: all gains */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP25, + " DLEQ3", + }, + /* EANC: active noise canceller */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP100, + " DLEQ3", + }, + /* SEQ: sequencing queue of micro tasks */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP25, + " DLEQ3", + }, + /* CTL: Phoenix control queue through McPDM */ + { + c_feat_init_eq, + c_feat_init_eq, + c_feat_read_eq3, + c_write_eq3, + 0, + 0x1000, + 0x1010, + 2, + 0, + ABE_OPP25, + " DLEQ3", + }, +}; + +/* + * Memory mapping of DMEM FIFOs + */ +abe_uint32 abe_map_dmem[LAST_PORT_ID]; /* DMEM port map */ +abe_uint32 abe_map_dmem_secondary[LAST_PORT_ID]; +abe_uint32 abe_map_dmem_size[LAST_PORT_ID]; /* DMEM port buffer sizes */ + +/* + * AESS/ATC destination and source address translation + * (except McASPs) from the original 64bits words address + */ +const abe_uint32 abe_atc_dstid[ABE_ATC_DESC_SIZE >> 3] = { + /* DMA_0 DMIC PDM_DL PDM_UL McB1TX McB1RX McB2TX McB2RX 0-7 */ + 0, 0, 12, 0, 1, 0, 2, 0, + /* McB3TX McB3RX SLIMT0 SLIMT1 SLIMT2 SLIMT3 SLIMT4 SLIMT5 8-15 */ + 3, 0, 4, 5, 6, 7, 8, 9, + /* SLIMT6 SLIMT7 SLIMR0 SLIMR1 SLIMR2 SLIMR3 SLIMR4 SLIMR5 16-23 */ + 10, 11, 0, 0, 0, 0, 0, 0, + /* SLIMR6 SLIMR7 McASP1X ------ ------ McASP1R ----- ------ 24-31 */ + 0, 0, 14, 0, 0, 0, 0, 0, + /* CBPrT0 CBPrT1 CBPrT2 CBPrT3 CBPrT4 CBPrT5 CBPrT6 CBPrT7 32-39 */ + 63, 63, 63, 63, 63, 63, 63, 63, + /* CBP_T0 CBP_T1 CBP_T2 CBP_T3 CBP_T4 CBP_T5 CBP_T6 CBP_T7 40-47 */ + 0, 0, 0, 0, 0, 0, 0, 0, + /* CBP_T8 CBP_T9 CBP_T10 CBP_T11 CBP_T12 CBP_T13 CBP_T14 CBP_T15 48-63 */ + 0, 0, 0, 0, 0, 0, 0, 0, +}; + +const abe_uint32 abe_atc_srcid[ABE_ATC_DESC_SIZE >> 3] = { + /* DMA_0 DMIC PDM_DL PDM_UL McB1TX McB1RX McB2TX McB2RX 0-7 */ + 0, 12, 0, 13, 0, 1, 0, 2, + /* McB3TX McB3RX SLIMT0 SLIMT1 SLIMT2 SLIMT3 SLIMT4 SLIMT5 8-15 */ + 0, 3, 0, 0, 0, 0, 0, 0, + /* SLIMT6 SLIMT7 SLIMR0 SLIMR1 SLIMR2 SLIMR3 SLIMR4 SLIMR5 16-23 */ + 0, 0, 4, 5, 6, 7, 8, 9, + /* SLIMR6 SLIMR7 McASP1X ------ ------ McASP1R ------ ------ 24-31 */ + 10, 11, 0, 0, 0, 14, 0, 0, + /* CBPrT0 CBPrT1 CBPrT2 CBPrT3 CBPrT4 CBPrT5 CBPrT6 CBPrT7 32-39 */ + 63, 63, 63, 63, 63, 63, 63, 63, + /* CBP_T0 CBP_T1 CBP_T2 CBP_T3 CBP_T4 CBP_T5 CBP_T6 CBP_T7 40-47 */ + 0, 0, 0, 0, 0, 0, 0, 0, + /* CBP_T8 CBP_T9 CBP_T10 CBP_T11 CBP_T12 CBP_T13 CBP_T14 CBP_T15 48-63 */ + 0, 0, 0, 0, 0, 0, 0, 0, +}; + +/* + * Router tables + */ +const abe_router_t abe_router_ul_table_preset[NBROUTE_CONFIG][NBROUTE_UL] = { + /* Voice uplink with Phoenix microphones - Uproute config_dmic1 */ + { + /* 0 .. 9 = MM_UL */ + DMIC1_L_labelID, + DMIC1_R_labelID, + DMIC2_L_labelID, + DMIC2_R_labelID, + DMIC3_L_labelID, + DMIC3_R_labelID, + ZERO_labelID, + ZERO_labelID, + ZERO_labelID, + ZERO_labelID, + /* 10 .. 11 = MM_UL2 */ + AMIC_L_labelID, + AMIC_R_labelID, + /* 12 .. 13 = VX_UL */ + AMIC_L_labelID, + AMIC_R_labelID, + /* 14 .. 15 = RESERVED */ + ZERO_labelID, + ZERO_labelID, + }, + /* Voice uplink with the first DMIC pair - Uproute config_dmic2 */ + { + /* 0 .. 9 = MM_UL */ + DMIC2_L_labelID, + DMIC2_R_labelID, + DMIC3_L_labelID, + DMIC3_R_labelID, + DMIC1_L_labelID, + DMIC1_R_labelID, + ZERO_labelID, + ZERO_labelID, + ZERO_labelID, + ZERO_labelID, + /* 10 .. 11 = MM_UL2 */ + DMIC1_L_labelID, + DMIC1_R_labelID, + /* 12 .. 13 = VX_UL */ + DMIC1_L_labelID, + DMIC1_R_labelID, + /* 14 .. 15 = RESERVED */ + ZERO_labelID, + ZERO_labelID, + }, + /* Voice uplink with the second DMIC pair - Uproute config_dmic3 */ + { + /* 0 .. 9 = MM_UL */ + DMIC3_L_labelID, + DMIC3_R_labelID, + DMIC1_L_labelID, + DMIC1_R_labelID, + DMIC2_L_labelID, + DMIC2_R_labelID, + ZERO_labelID, + ZERO_labelID, + ZERO_labelID, + ZERO_labelID, + /* 10 .. 11 = MM_UL2 */ + DMIC2_L_labelID, + DMIC2_R_labelID, + /* 12 .. 13 = VX_UL */ + DMIC2_L_labelID, + DMIC2_R_labelID, + /* 14 .. 15 = RESERVED */ + ZERO_labelID, + ZERO_labelID, + }, + /* VOICE UPLINK WITH THE LAST DMIC PAIR - UPROUTE_CONFIG_DMIC3 */ + { + AMIC_L_labelID, /* 0 .. 9 = MM_UL */ + AMIC_R_labelID, + DMIC2_L_labelID, + DMIC2_R_labelID, + DMIC3_L_labelID, + DMIC3_R_labelID, + ZERO_labelID, + ZERO_labelID, + ZERO_labelID, + ZERO_labelID, + DMIC3_L_labelID, + DMIC3_R_labelID, /* 10 .. 11 = MM_UL2 */ + DMIC3_L_labelID, + DMIC3_R_labelID, /* 12 .. 13 = VX_UL */ + ZERO_labelID, + ZERO_labelID, /* 14 .. 15 = RESERVED */ + }, + /* VOICE UPLINK WITH THE BT - UPROUTE_CONFIG_BT */ + { + BT_UL_L_labelID, + BT_UL_R_labelID, + DMIC2_L_labelID, + DMIC2_R_labelID, /* 0 .. 9 = MM_UL */ + DMIC3_L_labelID, + DMIC3_R_labelID, + DMIC1_L_labelID, + DMIC1_R_labelID, + ZERO_labelID, + ZERO_labelID, + AMIC_L_labelID, + AMIC_R_labelID, /* 10 .. 11 = MM_UL2 */ + BT_UL_L_labelID, + BT_UL_R_labelID, /* 12 .. 13 = VX_UL */ + ZERO_labelID, + ZERO_labelID, /* 14 .. 15 = RESERVED */ + }, +}; + +/* all default routing configurations */ +abe_router_t abe_router_ul_table[NBROUTE_CONFIG_MAX][NBROUTE_UL]; + +/* + * ABE_GLOBAL DATA + */ +/* flag, indicates the allowed control of Phoenix through McPDM slot 6 */ +abe_uint32 abe_global_mcpdm_control; +abe_event_id abe_current_event_id; + +/* + * ABE SUBROUTINES AND SEQUENCES + */ + +/* +const abe_seq_t abe_seq_array [MAXNBSEQUENCE] [MAXSEQUENCESTEPS] = + {{0, 0, 0, 0}, {-1, 0, 0, 0}}, + {{0, 0, 0, 0}, {-1, 0, 0, 0}}, +const seq_t setup_hw_sequence2 [ ] = { 0, C_AE_FUNC1, 0, 0, 0, 0, + -1, C_CALLBACK1, 0, 0, 0, 0 }; + +const abe_subroutine2 abe_sub_array [MAXNBSUBROUTINE] = + abe_init_atc, 0, 0, + abe_init_atc, 0, 0, + + typedef double (*PtrFun) (double); +PtrFun pFun; +pFun = sin; +y = (* pFun) (x); +*/ + +const abe_sequence_t seq_null = { + NOMASK, + { + CL_M1, + 0, + {0, 0, 0, 0}, + 0, + }, + { + CL_M1, + 0, + {0, 0, 0, 0}, + 0, + }, +}; + +/* table of new subroutines called in the sequence */ +abe_subroutine2 abe_all_subsubroutine[MAXNBSUBROUTINE]; +/* number of parameters per calls */ +abe_uint32 abe_all_subsubroutine_nparam[MAXNBSUBROUTINE]; +/* index of the subroutine */ +abe_uint32 abe_subroutine_id[MAXNBSUBROUTINE]; +abe_uint32* abe_all_subroutine_params[MAXNBSUBROUTINE]; +abe_uint32 abe_subroutine_write_pointer; + +/* table of all sequences */ +abe_sequence_t abe_all_sequence[MAXNBSEQUENCE]; + +abe_uint32 abe_sequence_write_pointer; + +/* current number of pending sequences (avoids to look in the table) */ +abe_uint32 abe_nb_pending_sequences; + +/* pending sequences due to ressource collision */ +abe_uint32 abe_pending_sequences[MAXNBSEQUENCE]; + +/* mask of unsharable ressources among other sequences */ +abe_uint32 abe_global_sequence_mask; + +/* table of active sequences */ +abe_seq_t abe_active_sequence[MAXACTIVESEQUENCE][MAXSEQUENCESTEPS]; + +/* index of the plugged subroutine doing ping-pong cache-flush DMEM accesses */ +abe_uint32 abe_irq_pingpong_player_id; +/* index of the plugged subroutine doing acoustics protection adaptation */ +abe_uint32 abe_irq_aps_adaptation_id; + +/* base addresses of the ping pong buffers in bytes addresses */ +abe_uint32 abe_base_address_pingpong[MAX_PINGPONG_BUFFERS]; + +/* size of each ping/pong buffers */ +abe_uint32 abe_size_pingpong; + +/* number of ping/pong buffer being used */ +abe_uint32 abe_nb_pingpong; + +/* + * ABE CONST AREA FOR PARAMETERS TRANSLATION + */ +const abe_uint32 abe_db2lin_table [sizeof_db2lin_table] = { + 0x00000000, /* SMEM coding of -120 dB */ + 0x00000000, /* SMEM coding of -119 dB */ + 0x00000000, /* SMEM coding of -118 dB */ + 0x00000000, /* SMEM coding of -117 dB */ + 0x00000000, /* SMEM coding of -116 dB */ + 0x00000000, /* SMEM coding of -115 dB */ + 0x00000000, /* SMEM coding of -114 dB */ + 0x00000000, /* SMEM coding of -113 dB */ + 0x00000000, /* SMEM coding of -112 dB */ + 0x00000000, /* SMEM coding of -111 dB */ + 0x00000000, /* SMEM coding of -110 dB */ + 0x00000000, /* SMEM coding of -109 dB */ + 0x00000001, /* SMEM coding of -108 dB */ + 0x00000001, /* SMEM coding of -107 dB */ + 0x00000001, /* SMEM coding of -106 dB */ + 0x00000001, /* SMEM coding of -105 dB */ + 0x00000001, /* SMEM coding of -104 dB */ + 0x00000001, /* SMEM coding of -103 dB */ + 0x00000002, /* SMEM coding of -102 dB */ + 0x00000002, /* SMEM coding of -101 dB */ + 0x00000002, /* SMEM coding of -100 dB */ + 0x00000002, /* SMEM coding of -99 dB */ + 0x00000003, /* SMEM coding of -98 dB */ + 0x00000003, /* SMEM coding of -97 dB */ + 0x00000004, /* SMEM coding of -96 dB */ + 0x00000004, /* SMEM coding of -95 dB */ + 0x00000005, /* SMEM coding of -94 dB */ + 0x00000005, /* SMEM coding of -93 dB */ + 0x00000006, /* SMEM coding of -92 dB */ + 0x00000007, /* SMEM coding of -91 dB */ + 0x00000008, /* SMEM coding of -90 dB */ + 0x00000009, /* SMEM coding of -89 dB */ + 0x0000000A, /* SMEM coding of -88 dB */ + 0x0000000B, /* SMEM coding of -87 dB */ + 0x0000000D, /* SMEM coding of -86 dB */ + 0x0000000E, /* SMEM coding of -85 dB */ + 0x00000010, /* SMEM coding of -84 dB */ + 0x00000012, /* SMEM coding of -83 dB */ + 0x00000014, /* SMEM coding of -82 dB */ + 0x00000017, /* SMEM coding of -81 dB */ + 0x0000001A, /* SMEM coding of -80 dB */ + 0x0000001D, /* SMEM coding of -79 dB */ + 0x00000021, /* SMEM coding of -78 dB */ + 0x00000025, /* SMEM coding of -77 dB */ + 0x00000029, /* SMEM coding of -76 dB */ + 0x0000002E, /* SMEM coding of -75 dB */ + 0x00000034, /* SMEM coding of -74 dB */ + 0x0000003A, /* SMEM coding of -73 dB */ + 0x00000041, /* SMEM coding of -72 dB */ + 0x00000049, /* SMEM coding of -71 dB */ + 0x00000052, /* SMEM coding of -70 dB */ + 0x0000005D, /* SMEM coding of -69 dB */ + 0x00000068, /* SMEM coding of -68 dB */ + 0x00000075, /* SMEM coding of -67 dB */ + 0x00000083, /* SMEM coding of -66 dB */ + 0x00000093, /* SMEM coding of -65 dB */ + 0x000000A5, /* SMEM coding of -64 dB */ + 0x000000B9, /* SMEM coding of -63 dB */ + 0x000000D0, /* SMEM coding of -62 dB */ + 0x000000E9, /* SMEM coding of -61 dB */ + 0x00000106, /* SMEM coding of -60 dB */ + 0x00000126, /* SMEM coding of -59 dB */ + 0x0000014A, /* SMEM coding of -58 dB */ + 0x00000172, /* SMEM coding of -57 dB */ + 0x0000019F, /* SMEM coding of -56 dB */ + 0x000001D2, /* SMEM coding of -55 dB */ + 0x0000020B, /* SMEM coding of -54 dB */ + 0x0000024A, /* SMEM coding of -53 dB */ + 0x00000292, /* SMEM coding of -52 dB */ + 0x000002E2, /* SMEM coding of -51 dB */ + 0x0000033C, /* SMEM coding of -50 dB */ + 0x000003A2, /* SMEM coding of -49 dB */ + 0x00000413, /* SMEM coding of -48 dB */ + 0x00000492, /* SMEM coding of -47 dB */ + 0x00000521, /* SMEM coding of -46 dB */ + 0x000005C2, /* SMEM coding of -45 dB */ + 0x00000676, /* SMEM coding of -44 dB */ + 0x0000073F, /* SMEM coding of -43 dB */ + 0x00000822, /* SMEM coding of -42 dB */ + 0x00000920, /* SMEM coding of -41 dB */ + 0x00000A3D, /* SMEM coding of -40 dB */ + 0x00000B7D, /* SMEM coding of -39 dB */ + 0x00000CE4, /* SMEM coding of -38 dB */ + 0x00000E76, /* SMEM coding of -37 dB */ + 0x0000103A, /* SMEM coding of -36 dB */ + 0x00001235, /* SMEM coding of -35 dB */ + 0x0000146E, /* SMEM coding of -34 dB */ + 0x000016EC, /* SMEM coding of -33 dB */ + 0x000019B8, /* SMEM coding of -32 dB */ + 0x00001CDC, /* SMEM coding of -31 dB */ + 0x00002061, /* SMEM coding of -30 dB */ + 0x00002455, /* SMEM coding of -29 dB */ + 0x000028C4, /* SMEM coding of -28 dB */ + 0x00002DBD, /* SMEM coding of -27 dB */ + 0x00003352, /* SMEM coding of -26 dB */ + 0x00003995, /* SMEM coding of -25 dB */ + 0x0000409C, /* SMEM coding of -24 dB */ + 0x0000487E, /* SMEM coding of -23 dB */ + 0x00005156, /* SMEM coding of -22 dB */ + 0x00005B43, /* SMEM coding of -21 dB */ + 0x00006666, /* SMEM coding of -20 dB */ + 0x000072E5, /* SMEM coding of -19 dB */ + 0x000080E9, /* SMEM coding of -18 dB */ + 0x000090A4, /* SMEM coding of -17 dB */ + 0x0000A24B, /* SMEM coding of -16 dB */ + 0x0000B618, /* SMEM coding of -15 dB */ + 0x0000CC50, /* SMEM coding of -14 dB */ + 0x0000E53E, /* SMEM coding of -13 dB */ + 0x00010137, /* SMEM coding of -12 dB */ + 0x0001209A, /* SMEM coding of -11 dB */ + 0x000143D1, /* SMEM coding of -10 dB */ + 0x00016B54, /* SMEM coding of -9 dB */ + 0x000197A9, /* SMEM coding of -8 dB */ + 0x0001C967, /* SMEM coding of -7 dB */ + 0x00020137, /* SMEM coding of -6 dB */ + 0x00023FD6, /* SMEM coding of -5 dB */ + 0x00028619, /* SMEM coding of -4 dB */ + 0x0002D4EF, /* SMEM coding of -3 dB */ + 0x00032D64, /* SMEM coding of -2 dB */ + 0x000390A4, /* SMEM coding of -1 dB */ + 0x00040000, /* SMEM coding of 0 dB */ + 0x00047CF2, /* SMEM coding of 1 dB */ + 0x00050923, /* SMEM coding of 2 dB */ + 0x0005A670, /* SMEM coding of 3 dB */ + 0x000656EE, /* SMEM coding of 4 dB */ + 0x00071CF5, /* SMEM coding of 5 dB */ + 0x0007FB26, /* SMEM coding of 6 dB */ + 0x0008F473, /* SMEM coding of 7 dB */ + 0x000A0C2B, /* SMEM coding of 8 dB */ + 0x000B4606, /* SMEM coding of 9 dB */ + 0x000CA62C, /* SMEM coding of 10 dB */ + 0x000E314A, /* SMEM coding of 11 dB */ + 0x000FEC9E, /* SMEM coding of 12 dB */ + 0x0011DE0A, /* SMEM coding of 13 dB */ + 0x00140C28, /* SMEM coding of 14 dB */ + 0x00167E60, /* SMEM coding of 15 dB */ + 0x00193D00, /* SMEM coding of 16 dB */ + 0x001C515D, /* SMEM coding of 17 dB */ + 0x001FC5EB, /* SMEM coding of 18 dB */ + 0x0023A668, /* SMEM coding of 19 dB */ + 0x00280000, /* SMEM coding of 20 dB */ + 0x002CE178, /* SMEM coding of 21 dB */ + 0x00325B65, /* SMEM coding of 22 dB */ + 0x00388062, /* SMEM coding of 23 dB */ + 0x003F654E, /* SMEM coding of 24 dB */ + 0x00472194, /* SMEM coding of 25 dB */ + 0x004FCF7C, /* SMEM coding of 26 dB */ + 0x00598C81, /* SMEM coding of 27 dB */ + 0x006479B7, /* SMEM coding of 28 dB */ + 0x0070BC3D, /* SMEM coding of 29 dB */ + 0x007E7DB9, /* SMEM coding of 30 dB */ +}; + + +const abe_uint32 abe_sin_table [] = { 0 }; +/* + * ABE_DEBUG DATA + */ + +/* + * IRQ and trace pointer in DMEM: + * FW updates a write pointer at "MCU_IRQ_FIFO_ptr_labelID", the read pointer is in HAL + */ +abe_uint32 abe_irq_dbg_read_ptr; + +/* General circular buffer used to trace APIs calls and AE activity */ +abe_uint32 abe_dbg_activity_log[DBG_LOG_SIZE]; +abe_uint32 abe_dbg_activity_log_write_pointer; +abe_uint32 abe_dbg_mask; + +/* Global variable holding parameter errors */ +abe_uint32 abe_dbg_param; + +/* Output of messages selector */ +abe_uint32 abe_dbg_output; + +/* Last parameters */ +#define SIZE_PARAM 10 + +abe_uint32 param1[SIZE_PARAM]; +abe_uint32 param2[SIZE_PARAM]; +abe_uint32 param3[SIZE_PARAM]; +abe_uint32 param4[SIZE_PARAM]; +abe_uint32 param5[SIZE_PARAM]; + +volatile abe_uint32 just_to_avoid_the_many_warnings; +volatile abe_gain_t just_to_avoid_the_many_warnings_abe_gain_t; +volatile abe_ramp_t just_to_avoid_the_many_warnings_abe_ramp_t; +volatile abe_dma_t just_to_avoid_the_many_warnings_abe_dma_t; +volatile abe_port_id just_to_avoid_the_many_warnings_abe_port_id; +volatile abe_millis_t just_to_avoid_the_many_warnings_abe_millis_t; +volatile abe_micros_t just_to_avoid_the_many_warnings_abe_micros_t; +volatile abe_patch_rev just_to_avoid_the_many_warnings_abe_patch_rev; +volatile abe_sequence_t just_to_avoid_the_many_warnings_abe_sequence_t; +volatile abe_ana_port_id just_to_avoid_the_many_warnings_abe_ana_port_id; +volatile abe_time_stamp_t just_to_avoid_the_many_warnings_abe_time_stamp_t; +volatile abe_data_format_t just_to_avoid_the_many_warnings_abe_data_format_t; +volatile abe_port_protocol_t just_to_avoid_the_many_warnings_abe_port_protocol_t; +volatile abe_router_t just_to_avoid_the_many_warnings_abe_router_t; +volatile abe_router_id just_to_avoid_the_many_warnings_abe_router_id; + +#ifdef __cplusplus +} +#endif + +#endif /* _ABE_DAT_H_ */ diff --git a/sound/soc/codecs/abe/abe_dbg.c b/sound/soc/codecs/abe/abe_dbg.c new file mode 100644 index 000000000000..130bc067f290 --- /dev/null +++ b/sound/soc/codecs/abe/abe_dbg.c @@ -0,0 +1,259 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#include "abe_main.h" + +/* + * ABE_DBG_LOG + * + * Parameter : + * x : data to be logged + * + * abe_dbg_activity_log : global circular buffer holding the data + * abe_dbg_activity_log_write_pointer : circular write pointer + * + * Operations : + * saves data in the log file + * + * Return value : + * none + */ +void abe_dbg_log_copy(abe_uint32 x) +{ + abe_dbg_activity_log[abe_dbg_activity_log_write_pointer] = x; + + if (abe_dbg_activity_log_write_pointer == (DBG_LOG_SIZE - 1)) + abe_dbg_activity_log_write_pointer = 0; + else + abe_dbg_activity_log_write_pointer ++; +} + +void abe_dbg_log(abe_uint32 x) +{ + abe_time_stamp_t t = 0; + abe_millis_t m = 0; + abe_micros_t time; + + abe_read_sys_clock(&time); /* extract system timer */ + + abe_dbg_log_copy(x); /* dump data */ + abe_dbg_log_copy(time); + abe_dbg_log_copy(t); + abe_dbg_log_copy(m); +} + +/* + * ABE_DEBUG_OUTPUT_PINS + * + * Parameter : + * x : d + * + * Operations : + * set the debug output pins of AESS + * + * Return value : + * + */ +void abe_debug_output_pins(abe_uint32 x) +{ + just_to_avoid_the_many_warnings = x; +} + + +/* + * ABE_DBG_ERROR_LOG + * + * Parameter : + * x : d + * + * Operations : + * log the error codes + * + * Return value : + * + */ +void abe_dbg_error_log(abe_uint32 x) +{ + just_to_avoid_the_many_warnings = x; +} + +/* + * ABE_DEBUGGER + * + * Parameter : + * x : d + * + * Operations : + * + * + * Return value : + * + */ +void abe_debugger(abe_uint32 x) +{ + just_to_avoid_the_many_warnings = x; +} +/* + * S = power (2, 31) * 0.25; + * N = 4; B = 2; F=[1/N 1/N]; gen_and_save('dbg_8k_2.txt', B, F, N, S); + * N = 8; B = 2; F=[1/N 2/N]; gen_and_save('dbg_16k_2.txt', B, F, N, S); + * N = 12; B = 2; F=[1/N 2/N]; gen_and_save('dbg_48k_2.txt', B, F, N, S); + * N = 60; B = 2; F=[4/N 8/N]; gen_and_save('dbg_amic.txt', B, F, N, S); + * N = 10; B = 6; F=[1/N 2/N 3/N 1/N 2/N 3/N]; gen_and_save('dbg_dmic.txt', B, F, N, S); + */ +void abe_load_embeddded_patterns (void) +{ + abe_uint32 i; +#if 0 +#define patterns_dmic_len 60 +const long patterns_dmic[patterns_dmic_len] = { // 9.6kHZ + 315564800, 510594560, 510594560, 315564800, 510594560, 510594560, + 510594560, 315564800, -315565056, 510594560, 315564800, -315565056, + 510594560, -315565056, -315565056, 510594560, -315565056, -315565056, + 315564800, -510594816, 510594560, 315564800, -510594816, 510594560, + 0, -256, 0, 0, -256, 0, + -315565056, 510594560, -510594816, -315565056, 510594560, -510594816, + -510594816, 315564800, 315564800, -510594816, 315564800, 315564800, + -510594816, -315565056, 315564800, -510594816, -315565056, 315564800, + -315565056, -510594816, -510594816, -315565056, -510594816, -510594816, + -256, -256, -256, -256, -256, -256, +}; +#endif +#define patterns_mcpdm_len (6*12) +const long patterns_mcpdm[patterns_mcpdm_len] = { + 268435200, 464943616, 536870912, 536870912, 464943616, 268435200, + 464943616, 464943616,0, 0, 464943616, 464943616, + 536870912, 0, -536870912, -536870912, 0,536870912, + 464943616, -464943872, -256, -256, -464943872, 464943616, + 268435456, -464943872, 536870912, 536870912, -464943872, 268435456, + 0, -256, 0, 0, -256, 0, + -268435456, 464943616, -536870912, -536870912, 464943616, -268435456, + -464943872, 464943616, -256, -256, 464943616, -464943872, + -536870912, 0, 536870912, 536870912, 0, -536870912, + -464943872, -464943872, 0, 0, -464943872, -464943872, + -268435712, -464943872, -536870912, -536870912, -464943872, -268435712, + -256, -256, -256, -256, -256, -256, +}; +#if 0 +#define patterns_amic_len 120 +const long patterns_amic[patterns_amic_len] = { // 6 / 12kHz + 218364928, 398972672, + 398972672, 533929728, + 510594560, 315564800, + 533929728, -111621888, + 464943616, -464943872, + 315564800, -510594816, + 111621632, -218365184, + -111621888, 218364928, + -315565056, 510594560, + -464943872, 464943616, + -533929984, 111621632, + -510594816, -315565056, + -398972928, -533929984, + -218365184, -398972928, + -256, -256, + 218364928, 398972672, + 398972672, 533929728, + 510594560, 315564800, + 533929728, -111621888, + 464943616, -464943872, + 315564800, -510594816, + 111621632, -218365184, + -111621888, 218364928, + -315565056, 510594560, + -464943872, 464943616, + -533929984, 111621632, + -510594816, -315565056, + -398972928, -533929984, + -218365184, -398972928, + -256, -256, + 218364928, 398972672, + 398972672, 533929728, + 510594560, 315564800, + 533929728, -111621888, + 464943616, -464943872, + 315564800, -510594816, + 111621632, -218365184, + -111621888, 218364928, + -315565056, 510594560, + -464943872, 464943616, + -533929984, 111621632, + -510594816, -315565056, + -398972928, -533929984, + -218365184, -398972928, + -256, -256, + 218364928, 398972672, + 398972672, 533929728, + 510594560, 315564800, + 533929728, -111621888, + 464943616, -464943872, + 315564800, -510594816, + 111621632, -218365184, + -111621888, 218364928, + -315565056, 510594560, + -464943872, 464943616, + -533929984, 111621632, + -510594816, -315565056, + -398972928, -533929984, + -218365184, -398972928, + -256, -256, +}; +#endif +#define patterns_48k_len 24 +const long patterns_48k[patterns_48k_len] = { // 4kHz 8kHZ + 268435200, 464943616, + 464943616, 464943616, + 536870912, 0, + 464943616, -464943872, + 268435456, -464943872, + 0, -256, + -268435456, 464943616, + -464943872, 464943616, + -536870912, 0, + -464943872, -464943872, + -268435712, -464943872, + -256, -256, +}; +#define patterns_16k_len 16 +const long patterns_16k[patterns_16k_len] = { // 2kHz / 4kHz + 379624960, 536870912, + 536870912, 0, + 379624960, -536870912, + 0, -256, + -379625216, 536870912, + -536870912, 0, + -379625216, -536870912, + -256, -256, +}; +#define patterns_8k_len 8 +const long patterns_8k[patterns_8k_len] = { // 2kHz + 536870912, 536870912, + 0, 0, + -536870912, -536870912, + -256, -256, +}; + + for(i = 0; i < patterns_mcpdm_len; i++) + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_SMEM, + S_DBG_MCPDM_PATTERN_ADDR *8, + (abe_uint32 *)(&(patterns_mcpdm[i])), 4); + for(i = 0; i < patterns_16k_len; i++) + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_SMEM, + S_DBG_16K_PATTERN_ADDR *8, + (abe_uint32 *)(&(patterns_16k[i])), 4); + for(i = 0; i < patterns_8k_len; i++) + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_SMEM, + S_DBG_8K_PATTERN_ADDR *8, + (abe_uint32 *)(&(patterns_8k[i])), 4); + for (i = 0; i < patterns_48k_len; i++) + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_SMEM, + S_DBG_48K_PATTERN_ADDR *8, + (abe_uint32 *)(&(patterns_48k[i])), 4); +} diff --git a/sound/soc/codecs/abe/abe_dbg.h b/sound/soc/codecs/abe/abe_dbg.h new file mode 100644 index 000000000000..daecd9a7c374 --- /dev/null +++ b/sound/soc/codecs/abe/abe_dbg.h @@ -0,0 +1,167 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#include "abe_main.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * DEFINE + */ +#define NO_OUTPUT 0 +#define TERMINAL_OUTPUT 1 +#define LINE_OUTPUT 2 +#define DEBUG_TRACE_OUTPUT 3 + +#define DBG_LOG_SIZE 1000 + +#define DBG_BITFIELD_OFFSET 8 + +#define DBG_API_CALLS 0 +#define DBG_MAPI (1L << (DBG_API_CALLS + DBG_BITFIELD_OFFSET)) + +#define DBG_EXT_DATA_ACCESS 1 +#define DBG_MDATA (1L << (DBG_EXT_DATA_ACCESS + DBG_BITFIELD_OFFSET)) + +#define DBG_ERR_CODES 2 +#define DBG_MERR (1L << (DBG_API_CALLS + DBG_BITFIELD_OFFSET)) + +/* + * IDs used for traces + */ +#define ID_RESET_HAL (1 + DBG_MAPI) +#define ID_LOAD_FW (2 + DBG_MAPI) +#define ID_DEFAULT_CONFIGURATION (3 + DBG_MAPI) +#define ID_IRQ_PROCESSING (4 + DBG_MAPI) +#define ID_EVENT_GENERATOR_SWITCH (5 + DBG_MAPI) +#define ID_SET_MEMORY_CONFIG (6 + DBG_MAPI) +#define ID_READ_LOWEST_OPP (7 + DBG_MAPI) +#define ID_SET_OPP_PROCESSING (8 + DBG_MAPI) +#define ID_SET_PING_PONG_BUFFER (9 + DBG_MAPI) +#define ID_PLUG_SUBROUTINE (10 + DBG_MAPI) +#define ID_UNPLUG_SUBROUTINE (11 + DBG_MAPI) +#define ID_PLUG_SEQUENCE (12 + DBG_MAPI) +#define ID_LAUNCH_SEQUENCE (13 + DBG_MAPI) +#define ID_LAUNCH_SEQUENCE_PARAM (14 + DBG_MAPI) +#define ID_SET_ANALOG_CONTROL (15 + DBG_MAPI) +#define ID_READ_ANALOG_GAIN_DL (16 + DBG_MAPI) +#define ID_READ_ANALOG_GAIN_UL (17 + DBG_MAPI) +#define ID_ENABLE_DYN_UL_GAIN (18 + DBG_MAPI) +#define ID_DISABLE_DYN_UL_GAIN (19 + DBG_MAPI) +#define ID_ENABLE_DYN_EXTENSION (20 + DBG_MAPI) +#define ID_DISABLE_DYN_EXTENSION (21 + DBG_MAPI) +#define ID_NOTIFY_ANALOG_GAIN_CHANGED (22 + DBG_MAPI) +#define ID_RESET_PORT (23 + DBG_MAPI) +#define ID_READ_REMAINING_DATA (24 + DBG_MAPI) +#define ID_DISABLE_DATA_TRANSFER (25 + DBG_MAPI) +#define ID_ENABLE_DATA_TRANSFER (26 + DBG_MAPI) +#define ID_READ_GLOBAL_COUNTER (27 + DBG_MAPI) +#define ID_SET_DMIC_FILTER (28 + DBG_MAPI) +#define ID_WRITE_PORT_DESCRIPTOR (29 + DBG_MAPI) +#define ID_READ_PORT_DESCRIPTOR (30 + DBG_MAPI) +#define ID_READ_PORT_ADDRESS (31 + DBG_MAPI) +#define ID_WRITE_PORT_GAIN (32 + DBG_MAPI) +#define ID_WRITE_HEADSET_OFFSET (33 + DBG_MAPI) +#define ID_READ_GAIN_RANGES (34 + DBG_MAPI) +#define ID_WRITE_EQUALIZER (35 + DBG_MAPI) +#define ID_WRITE_ASRC (36 + DBG_MAPI) +#define ID_WRITE_APS (37 + DBG_MAPI) +#define ID_WRITE_MIXER (38 + DBG_MAPI) +#define ID_WRITE_EANC (39 + DBG_MAPI) +#define ID_WRITE_ROUTER (40 + DBG_MAPI) +#define ID_READ_PORT_GAIN (41 + DBG_MAPI) +#define ID_READ_ASRC (42 + DBG_MAPI) +#define ID_READ_APS (43 + DBG_MAPI) +#define ID_READ_APS_ENERGY (44 + DBG_MAPI) +#define ID_READ_MIXER (45 + DBG_MAPI) +#define ID_READ_EANC (46 + DBG_MAPI) +#define ID_READ_ROUTER (47 + DBG_MAPI) +#define ID_READ_DEBUG_TRACE (48 + DBG_MAPI) +#define ID_SET_DEBUG_TRACE (49 + DBG_MAPI) +#define ID_SET_DEBUG_PINS (50 + DBG_MAPI) +#define ID_CALL_SUBROUTINE (51 + DBG_MAPI) + +/* + * IDs used for error codes + */ +#define NOERR 0 +#define ABE_SET_MEMORY_CONFIG_ERR (1 + DBG_MERR) +#define ABE_BLOCK_COPY_ERR (2 + DBG_MERR) +#define ABE_SEQTOOLONG (3 + DBG_MERR) +#define ABE_BADSAMPFORMAT (4 + DBG_MERR) +#define ABE_SET_ATC_MEMORY_CONFIG_ERR (5 + DBG_MERR) +#define ABE_PROTOCOL_ERROR (6 + DBG_MERR) +#define ABE_PARAMETER_ERROR (7 + DBG_MERR) +#define ABE_PORT_REPROGRAMMING (8 + DBG_MERR) /* port programmed while still running */ +#define ABE_READ_USE_CASE_OPP_ERR (9 + DBG_MERR) +#define ABE_PARAMETER_OVERFLOW (10 + DBG_MERR) + +/* + * IDs used for error codes + */ +#define ERR_LIB (1 << 1) /* error in the LIB.C file */ +#define ERR_API (1 << 2) /* error in the API.C file */ +#define ERR_INI (1 << 3) /* error in the INI.C file */ +#define ERR_SEQ (1 << 4) /* error in the SEQ.C file */ +#define ERR_DBG (1 << 5) /* error in the DBG.C file */ +#define ERR_EXT (1 << 6) /* error in the EXT.C file */ + +/* + * MACROS + */ +#ifdef HAL_TIME_STAMP +#define _log(x) ((x&abe_dbg_mask)?abe_dbg_log(x); \ + abe_dbg_time_stamp(x); \ + abe_dbg_printf(x); \ + ) +#else +#define _log(x) {if(x&abe_dbg_mask)abe_dbg_log(x);} +#endif + +/* + * PROTOTYPES + */ + +/* + * ABE_DBG_LOG + * + * Parameter : + * x : data to be logged + * + * abe_dbg_activity_log : global circular buffer holding the data + * abe_dbg_activity_log_write_pointer : circular write pointer + * + * Operations : + * saves data in the log file + * + * Return value : + * none + */ +void abe_dbg_log(abe_uint32 x); + +/* + * ABE_DBG_ERROR_LOG + * + * Parameter : + * x : d + * + * Operations : + * log the error codes + * + * Return value : + * + */ +void abe_dbg_error_log(abe_uint32 x); + +#ifdef __cplusplus +} +#endif diff --git a/sound/soc/codecs/abe/abe_def.h b/sound/soc/codecs/abe/abe_def.h new file mode 100644 index 000000000000..3f7d8a5eb420 --- /dev/null +++ b/sound/soc/codecs/abe/abe_def.h @@ -0,0 +1,303 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#ifndef _ABE_DEF_H_ +#define _ABE_DEF_H_ + +/* + * HARDWARE AND PERIPHERAL DEFINITIONS + */ + +#define ABE_DMAREQ_REGISTER(desc) (abe_uint32 *)((desc/8) + CIRCULAR_BUFFER_PERIPHERAL_R__0) + +//#define ABE_SEND_DMAREQ(dma) (*((abe_uint32 *)(ABE_ATC_BASE_ADDRESS_MPU+ABE_DMASTATUS_RAW)) = (dma)) + +#define ABE_CBPR0_IDX 0 /* MM_DL */ +#define ABE_CBPR1_IDX 1 /* VX_DL */ +#define ABE_CBPR2_IDX 2 /* VX_UL */ +#define ABE_CBPR3_IDX 3 /* MM_UL */ +#define ABE_CBPR4_IDX 4 /* MM_UL2 */ +#define ABE_CBPR5_IDX 5 /* TONES */ +#define ABE_CBPR6_IDX 6 /* VIB */ +#define ABE_CBPR7_IDX 7 /* DEBUG/CTL */ + +#define CIRCULAR_BUFFER_PERIPHERAL_R__0 (0x100 + ABE_CBPR0_IDX * 4) +#define CIRCULAR_BUFFER_PERIPHERAL_R__1 (CIRCULAR_BUFFER_PERIPHERAL_R__0 + ABE_CBPR1_IDX * 4) +#define CIRCULAR_BUFFER_PERIPHERAL_R__2 (CIRCULAR_BUFFER_PERIPHERAL_R__0 + ABE_CBPR2_IDX * 4) +#define CIRCULAR_BUFFER_PERIPHERAL_R__3 (CIRCULAR_BUFFER_PERIPHERAL_R__0 + ABE_CBPR3_IDX * 4) +#define CIRCULAR_BUFFER_PERIPHERAL_R__4 (CIRCULAR_BUFFER_PERIPHERAL_R__0 + ABE_CBPR4_IDX * 4) +#define CIRCULAR_BUFFER_PERIPHERAL_R__5 (CIRCULAR_BUFFER_PERIPHERAL_R__0 + ABE_CBPR5_IDX * 4) +#define CIRCULAR_BUFFER_PERIPHERAL_R__6 (CIRCULAR_BUFFER_PERIPHERAL_R__0 + ABE_CBPR6_IDX * 4) +#define CIRCULAR_BUFFER_PERIPHERAL_R__7 (CIRCULAR_BUFFER_PERIPHERAL_R__0 + ABE_CBPR7_IDX * 4) + +/* + * cache-flush mechanism + */ +#define NB_BYTES_CACHELINE_SHFT 4 +#define NB_BYTES_IN_CACHE_LINE (1<<NB_BYTES_CACHELINE_SHFT) /* there are 16 bytes in each cache lines */ + +/* + * DEFINITIONS SHARED WITH VIRTAUDIO + */ + +#define UC1_LP 1 /* MP3 low-power player use-case */ +#define UC2_VOICE_CALL_AND_IHF_MMDL 2 /* enables voice ul/dl on earpiece + MM_DL on IHF */ +#define UC5_PINGPONG_MMDL 5 /* Test MM_DL with Ping-Pong */ +#define UC6_PINGPONG_MMDL_WITH_IRQ 6 /* ping-pong with IRQ instead of sDMA */ + +#define UC31_VOICE_CALL_8KMONO 31 +#define UC32_VOICE_CALL_8KSTEREO 32 +#define UC33_VOICE_CALL_16KMONO 33 +#define UC34_VOICE_CALL_16KSTEREO 34 +#define UC35_MMDL_MONO 35 +#define UC36_MMDL_STEREO 36 +#define UC37_MMUL2_MONO 37 +#define UC38_MMUL2_STEREO 38 + +#define UC41_____ 40 +#define UC71_STOP_ALL 71 /* stop all activities */ +#define UC72_ENABLE_ALL 72 /* stop all activities */ +#define UC81_ROUTE_AMIC 81 +#define UC82_ROUTE_DMIC01 82 +#define UC83_ROUTE_DMIC23 83 +#define UC84_ROUTE_DMIC45 84 + +#define UC91_ASRC_DRIFT1 91 +#define UC92_ASRC_DRIFT2 92 +#define UC93_EANC 93 + +#define PING_PONG_WITH_MCU_IRQ 1 +#define PING_PONG_WITH_DSP_IRQ 2 + +#define HAL_RESET_HAL 10 /* abe_reset_hal () */ +#define HAL_WRITE_MIXER 11 /* abe_write_mixer () */ + +#define COPY_FROM_ABE_TO_HOST 1 /* ID used for LIB memory copy subroutines */ +#define COPY_FROM_HOST_TO_ABE 2 + +/* + * INTERNAL DEFINITIONS + */ + +#define CC_M1 0xFF /* unsigned version of (-1) */ +#define CS_M1 0xFFFF /* unsigned version of (-1) */ +#define CL_M1 0xFFFFFFFFL /* unsigned version of (-1) */ + +#define NBEANC1 20 /* 20 Q6.26 coef for the FIR */ +#define NBEANC2 16 /* 16 Q6.26 coef for the IIR */ + +#define NBEQ1 25 /* 24 Q6.26 coefficients */ +#define NBEQ2 13 /* 2x12 Q6.26 coefficients */ + +#define NBAPS1 10 /* TBD APS first set of parameters */ +#define NBAPS2 10 /* TBD APS second set of parameters */ + +#define NBMIX_AUDIO_UL 2 /* Mixer used for sending tones to the uplink voice path */ +#define NBMIX_DL1 4 /* Main downlink mixer */ +#define NBMIX_DL2 4 /* Handsfree downlink mixer */ +#define NBMIX_SDT 2 /* Side-tone mixer */ +#define NBMIX_ECHO 2 /* Echo reference mixer */ +#define NBMIX_VXREC 4 /* Voice record mixer */ + /* + Mixer ID Input port ID Comments + DL1_MIXER 0 MMDL path + 1 MMUL2 path + 2 VXDL path + 3 TONES path + + SDT_MIXER 0 Uplink path + 1 Downlink path + + ECHO_MIXER 0 DL1_MIXER path + 1 DL2_MIXER path + + AUDUL_MIXER 0 TONES_DL path + 1 Uplink path + 2 MM_DL path + + VXREC_MIXER 0 TONES_DL path + 1 VX_DL path + 2 MM_DL path + 3 VX_UL path + */ +#define MIX_VXUL_INPUT_MM_DL (abe_port_id)0 +#define MIX_VXUL_INPUT_TONES (abe_port_id)1 +#define MIX_VXUL_INPUT_VX_UL (abe_port_id)2 +#define MIX_VXUL_INPUT_VX_DL (abe_port_id)3 + +#define MIX_DL1_INPUT_MM_DL (abe_port_id)0 +#define MIX_DL1_INPUT_MM_UL2 (abe_port_id)1 +#define MIX_DL1_INPUT_VX_DL (abe_port_id)2 +#define MIX_DL1_INPUT_TONES (abe_port_id)3 + +#define MIX_DL2_INPUT_MM_DL (abe_port_id)0 +#define MIX_DL2_INPUT_MM_UL2 (abe_port_id)1 +#define MIX_DL2_INPUT_VX_DL (abe_port_id)2 +#define MIX_DL2_INPUT_TONES (abe_port_id)3 + +#define MIX_SDT_INPUT_UP_MIXER (abe_port_id)0 +#define MIX_SDT_INPUT_DL1_MIXER (abe_port_id)1 + +#define MIX_AUDUL_INPUT_MM_DL (abe_port_id)0 +#define MIX_AUDUL_INPUT_TONES (abe_port_id)1 +#define MIX_AUDUL_INPUT_UPLINK (abe_port_id)2 +#define MIX_AUDUL_INPUT_VX_DL (abe_port_id)3 + +#define MIX_VXREC_INPUT_MM_DL (abe_port_id)0 +#define MIX_VXREC_INPUT_TONES (abe_port_id)1 +#define MIX_VXREC_INPUT_VX_UL (abe_port_id)2 +#define MIX_VXREC_INPUT_VX_DL (abe_port_id)3 + +#define NBROUTE_UL 16 /* nb of samples to route */ +#define NBROUTE_CONFIG_MAX 10 /* 10 routing tables max */ + +#define NBROUTE_CONFIG 5 /* 5 pre-computed routing tables */ +#define UPROUTE_CONFIG_AMIC 0 /* AMIC on VX_UL */ +#define UPROUTE_CONFIG_DMIC1 1 /* DMIC first pair on VX_UL */ +#define UPROUTE_CONFIG_DMIC2 2 /* DMIC second pair on VX_UL */ +#define UPROUTE_CONFIG_DMIC3 3 /* DMIC last pair on VX_UL */ +#define UPROUTE_CONFIG_BT 4 /* BT_UL on VX_UL */ + +#define ABE_PMEM 1 +#define ABE_CMEM 2 +#define ABE_SMEM 3 +#define ABE_DMEM 4 +#define ABE_ATC 5 + +#define MAXCALLBACK 100 /* call-back indexes */ +#define MAXNBSUBROUTINE 100 /* subroutines */ + +#define MAXNBSEQUENCE 20 /* time controlled sequenced */ +#define MAXACTIVESEQUENCE 20 /* maximum simultaneous active sequences */ +#define MAXSEQUENCESTEPS 2 /* max number of steps in the sequences */ +#define MAXFEATUREPORT 12 /* max number of feature associated to a port */ +#define SUB_0_PARAM 0 +#define SUB_1_PARAM 1 /* number of parameters per sequence calls */ +#define SUB_2_PARAM 2 +#define SUB_3_PARAM 3 +#define SUB_4_PARAM 4 + +#define FREE_LINE 0 /* active sequence mask = 0 means the line is free */ +#define NOMASK (1 << 0) /* no ask for collision protection */ +#define MASK_PDM_OFF (1 << 1) /* do not allow a PDM OFF during the execution of this sequence */ +#define MASK_PDM_ON (1 << 2) /* do not allow a PDM ON during the execution of this sequence */ + +#define NBCHARFEATURENAME 16 /* explicit name of the feature */ +#define NBCHARPORTNAME 16 /* explicit name of the port */ +#define MAXNBABEPORTS LAST_PORT_ID /* number of sink+source ports of the ABE */ +#define MAX_MAP_DMEM LAST_PORT_ID + +#define SNK_P ABE_ATC_DIRECTION_IN /* sink / input port from Host point of view (or AESS for DMIC/McPDM/.. */ +#define SRC_P ABE_ATC_DIRECTION_OUT /* source / ouptut port */ + +#define NODRIFT 0 /* no ASRC applied */ +#define FORCED_DRIFT_CONTROL 1 /* for abe_set_asrc_drift_control */ +#define ADPATIVE_DRIFT_CONTROL 2 /* for abe_set_asrc_drift_control */ + +#define DOPPMODE32_OPP100 (0x00000010 | (0x00000000<<16)) +#define DOPPMODE32_OPP50 (0x0000000C | (0x0000004<<16)) +#define DOPPMODE32_OPP25 (0x0000004 | (0x0000000C<<16)) + +/* + * ABE CONST AREA FOR PARAMETERS TRANSLATION + */ +#define min_mdb (-12000) +#define max_mdb ( 3000) +#define sizeof_db2lin_table (1+ ((max_mdb - min_mdb)/100)) + +#define GAIN_MAXIMUM (abe_gain_t)3000L +#define GAIN_24dB (abe_gain_t)2400L +#define GAIN_18dB (abe_gain_t)1800L +#define GAIN_12dB (abe_gain_t)1200L +#define GAIN_6dB (abe_gain_t)600L +#define GAIN_0dB (abe_gain_t) 0L /* default gain = 1 */ +#define GAIN_M6dB (abe_gain_t)-600L +#define GAIN_M12dB (abe_gain_t)-1200L +#define GAIN_M18dB (abe_gain_t)-1800L +#define GAIN_M24dB (abe_gain_t)-2400L +#define GAIN_M30dB (abe_gain_t)-3000L +#define GAIN_M40dB (abe_gain_t)-4000L +#define GAIN_M50dB (abe_gain_t)-5000L +#define MUTE_GAIN (abe_gain_t)-12000L + +#define RAMP_0MS (abe_ramp_t)0L /* ramp_t is in milli- seconds */ +#define RAMP_1MS (abe_ramp_t)1L +#define RAMP_2MS (abe_ramp_t)2L +#define RAMP_5MS (abe_ramp_t)5L +#define RAMP_10MS (abe_ramp_t)10L +#define RAMP_20MS (abe_ramp_t)20L +#define RAMP_50MS (abe_ramp_t)50L +#define RAMP_100MS (abe_ramp_t)100L +#define RAMP_200MS (abe_ramp_t) 200L +#define RAMP_500MS (abe_ramp_t) 500L +#define RAMP_1000MS (abe_ramp_t) 1000L +#define RAMP_MAXLENGTH (abe_ramp_t) 10000L + +#define LINABE_TO_DECIBELS 1 /* for abe_translate_gain_format */ +#define DECIBELS_TO_LINABE 2 +#define IIRABE_TO_MICROS 1 /* for abe_translate_ramp_format */ +#define MICROS_TO_IIABE 2 + +#define IDLE_P 1 /* port idled */ +#define RUN_P 2 /* port running */ +#define NOCALLBACK 0 +#define NOPARAMETER 0 + /* HAL 06: those numbers may be x4 */ +#define MCPDM_UL_ITER 2 /* number of ATC access upon AMIC DMArequests, all the FIFOs are enabled */ +#define MCPDM_DL_ITER 6 /* All the McPDM FIFOs are enabled simultaneously */ +#define DMIC_ITER 6 /* All the DMIC FIFOs are enabled simultaneously */ + +#define DEFAULT_THR_READ 1 /* port / flow management */ +#define DEFAULT_THR_WRITE 1 /* port / flow management */ + +#define DEFAULT_CONTROL_MCPDMDL 1 /* allows control on the PDM line */ + +#define MAX_PINGPONG_BUFFERS 2 /* TBD later if needed */ + +/* + * Indexes to the subroutines + */ +#define SUB_WRITE_MIXER 1 +#define SUB_WRITE_PORT_GAIN 2 + +/* OLD WAY */ +#define c_feat_init_eq 1 +#define c_feat_read_eq1 2 +#define c_write_eq1 3 +#define c_feat_read_eq2 4 +#define c_write_eq2 5 +#define c_feat_read_eq3 6 +#define c_write_eq3 7 + +/* + * MACROS + */ + +#define LOAD_ABEREG(reg,data) {abe_uint32 *ocp_addr = (abe_uint32 *)((reg)+ABE_ATC_BASE_ADDRESS_MPU); *ocp_addr= (data);} + +#define maximum(a,b) (((a)<(b))?(b):(a)) +#define minimum(a,b) (((a)>(b))?(b):(a)) +#define absolute(a) ( ((a)>0) ? (a):((-1)*(a)) ) + +// Gives 1% errors +//#define abe_power_of_two(x) (abe_float)(1 + x*(0.69315 + x*(0.24022 + x*(0.056614 + x*(0.00975 ))))) /* for x = [-1..+1] */ +//#define abe_log_of_two(i) (abe_float)(-2.4983 + i*(4.0321 + i*(-2.0843 + i*(0.63 + i*(-0.0793))))) /* for i = [+1..+2[ */ +// Gives 0.1% errors +//#define abe_power_of_two(xx) (abe_float)(1 + xx*(0.69314718055995 + xx*(0.24022650695909 + xx*(0.05661419083812 + xx*(0.0096258236109 ))))) /* for x = [-1..+1] */ +//#define abe_log_of_two(i) (abe_float)(-3.02985297173966 + i*(6.07170945221999 + i*(-5.27332161514862 + i*(3.22638187067771 + i*(-1.23767101624897 + i*(0.26766043958616 + i*(-0.02490211314987))))))) /* for i = [+1..+2[ */ + +#if 0 +#define abe_power_of_two(xx) (abe_float)(0.9999999924494 + xx*(0.69314847688495 + xx*(0.24022677604481 + xx*(0.05549256818679 + xx*(0.00961666477618 + xx*(0.0013584351075 + xx*(0.00015654359307))))))) /* for x = [-1..+1] */ +#define abe_log_of_two(xx) (abe_float)(-3.02985297175803 + xx*(6.07170945229365 + xx*(-5.27332161527062 + xx*(3.22638187078450 + xx*(-1.23767101630110 + xx*(0.26766043959961 + xx*(-0.02490211315130))))))) /* for x = [+1..+2] */ +#define abe_sine(xx) (abe_float)(-0.000000389441 + xx*(6.283360925789 + xx*(-0.011140658372 + xx*(-41.073653348384 + xx*(-3.121196875959 + xx*(100.619954580736 + xx*( -59.133359355846))))))) /* for x = [0 .. pi/2] */ +#define abe_sqrt(xx) (abe_float)(0.32298238417665 + xx*(0.93621865220393 + xx*(-0.36276443369703 + xx*(0.13008602653101+ xx*(-0.03017833169073 + xx*(0.00393731964847 + xx*-0.00021858629159 )))))) /* for x = [1 .. 4] */ +#endif + +#endif /* _ABE_DEF_H_ */ diff --git a/sound/soc/codecs/abe/abe_define.h b/sound/soc/codecs/abe/abe_define.h new file mode 100644 index 000000000000..95889f84ee7b --- /dev/null +++ b/sound/soc/codecs/abe/abe_define.h @@ -0,0 +1,47 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#ifndef _ABE_DEFINE_H_ +#define _ABE_DEFINE_H_ + +#define ATC_DESCRIPTOR_NUMBER 64 +#define PROCESSING_SLOTS 25 +#define TASK_POOL_LENGTH 128 +#define MCU_IRQ 0x24 +#define DMA_REQ 0x84 +#define DSP_IRQ 0x4c +#define IRQtag_APS 0x000a +#define IRQtag_COUNT 0x000c +#define IRQtag_PP 0x000d +#define DMAreq_7 0x0080 +#define IRQ_FIFO_LENGTH 16 +#define SDT_EQ_ORDER 4 +#define DL_EQ_ORDER 12 +#define MIC_FILTER_ORDER 4 +#define GAINS_WITH_RAMP1 14 +#define GAINS_WITH_RAMP2 22 +#define GAINS_WITH_RAMP_TOTAL 36 +#define EANC_FIR_TAPS 21 +#define EANC_IIR_ORDER 8 +#define ASRC_MEMLENGTH 40 +#define ASRC_UL_VX_FIR_L 19 +#define ASRC_DL_VX_FIR_L 19 +#define ASRC_DL_MM_FIR_L 18 +#define ASRC_N_8k 2 +#define ASRC_N_16k 4 +#define ASRC_N_48k 12 +#define VIBRA_N 5 +#define VIBRA1_IIR_MEMSIZE 11 +#define SAMP_LOOP_96K 24 +#define SAMP_LOOP_48K 12 +#define SAMP_LOOP_16K 4 +#define SAMP_LOOP_8K 2 + +#endif /* _ABE_DEFINE_H_ */ diff --git a/sound/soc/codecs/abe/abe_dm_addr.h b/sound/soc/codecs/abe/abe_dm_addr.h new file mode 100644 index 000000000000..17601716380d --- /dev/null +++ b/sound/soc/codecs/abe/abe_dm_addr.h @@ -0,0 +1,322 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#ifndef _ABE_DM_ADDR_H_ +#define _ABE_DM_ADDR_H_ + +#define D_atcDescriptors_ADDR 0 +#define D_atcDescriptors_ADDR_END 511 +#define D_atcDescriptors_sizeof 512 + +#define stack_ADDR 512 +#define stack_ADDR_END 623 +#define stack_sizeof 112 + +#define D_version_ADDR 624 +#define D_version_ADDR_END 627 +#define D_version_sizeof 4 + +#define D_BT_DL_FIFO_ADDR 1024 +#define D_BT_DL_FIFO_ADDR_END 1503 +#define D_BT_DL_FIFO_sizeof 480 + +#define D_BT_UL_FIFO_ADDR 1536 +#define D_BT_UL_FIFO_ADDR_END 2015 +#define D_BT_UL_FIFO_sizeof 480 + +#define D_MM_EXT_OUT_FIFO_ADDR 2048 +#define D_MM_EXT_OUT_FIFO_ADDR_END 2527 +#define D_MM_EXT_OUT_FIFO_sizeof 480 + +#define D_MM_EXT_IN_FIFO_ADDR 2560 +#define D_MM_EXT_IN_FIFO_ADDR_END 3039 +#define D_MM_EXT_IN_FIFO_sizeof 480 + +#define D_MM_UL2_FIFO_ADDR 3072 +#define D_MM_UL2_FIFO_ADDR_END 3551 +#define D_MM_UL2_FIFO_sizeof 480 + +#define D_VX_UL_FIFO_ADDR 3584 +#define D_VX_UL_FIFO_ADDR_END 4063 +#define D_VX_UL_FIFO_sizeof 480 + +#define D_VX_DL_FIFO_ADDR 4096 +#define D_VX_DL_FIFO_ADDR_END 4575 +#define D_VX_DL_FIFO_sizeof 480 + +#define D_DMIC_UL_FIFO_ADDR 4608 +#define D_DMIC_UL_FIFO_ADDR_END 5087 +#define D_DMIC_UL_FIFO_sizeof 480 + +#define D_MM_UL_FIFO_ADDR 5120 +#define D_MM_UL_FIFO_ADDR_END 5599 +#define D_MM_UL_FIFO_sizeof 480 + +#define D_MM_DL_FIFO_ADDR 5632 +#define D_MM_DL_FIFO_ADDR_END 6111 +#define D_MM_DL_FIFO_sizeof 480 + +#define D_TONES_DL_FIFO_ADDR 6144 +#define D_TONES_DL_FIFO_ADDR_END 6623 +#define D_TONES_DL_FIFO_sizeof 480 + +#define D_VIB_DL_FIFO_ADDR 6656 +#define D_VIB_DL_FIFO_ADDR_END 7135 +#define D_VIB_DL_FIFO_sizeof 480 + +#define D_McPDM_DL_FIFO_ADDR 7168 +#define D_McPDM_DL_FIFO_ADDR_END 7647 +#define D_McPDM_DL_FIFO_sizeof 480 + +#define D_McPDM_UL_FIFO_ADDR 7680 +#define D_McPDM_UL_FIFO_ADDR_END 8159 +#define D_McPDM_UL_FIFO_sizeof 480 + +#define D_IOdescr_ADDR 8160 +#define D_IOdescr_ADDR_END 8719 +#define D_IOdescr_sizeof 560 + +#define D_debugATCptrs_ADDR 8720 +#define D_debugATCptrs_ADDR_END 8783 +#define D_debugATCptrs_sizeof 64 + +#define d_zero_ADDR 8784 +#define d_zero_ADDR_END 8784 +#define d_zero_sizeof 1 + +#define dbg_trace1_ADDR 8785 +#define dbg_trace1_ADDR_END 8785 +#define dbg_trace1_sizeof 1 + +#define dbg_trace2_ADDR 8786 +#define dbg_trace2_ADDR_END 8786 +#define dbg_trace2_sizeof 1 + +#define dbg_trace3_ADDR 8787 +#define dbg_trace3_ADDR_END 8787 +#define dbg_trace3_sizeof 1 + +#define D_multiFrame_ADDR 8788 +#define D_multiFrame_ADDR_END 9187 +#define D_multiFrame_sizeof 400 + +#define D_tasksList_ADDR 9188 +#define D_tasksList_ADDR_END 11235 +#define D_tasksList_sizeof 2048 + +#define D_idleTask_ADDR 11236 +#define D_idleTask_ADDR_END 11237 +#define D_idleTask_sizeof 2 + +#define D_typeLengthCheck_ADDR 11238 +#define D_typeLengthCheck_ADDR_END 11239 +#define D_typeLengthCheck_sizeof 2 + +#define D_maxTaskBytesInSlot_ADDR 11240 +#define D_maxTaskBytesInSlot_ADDR_END 11241 +#define D_maxTaskBytesInSlot_sizeof 2 + +#define D_rewindTaskBytes_ADDR 11242 +#define D_rewindTaskBytes_ADDR_END 11243 +#define D_rewindTaskBytes_sizeof 2 + +#define D_pCurrentTask_ADDR 11244 +#define D_pCurrentTask_ADDR_END 11245 +#define D_pCurrentTask_sizeof 2 + +#define D_pFastLoopBack_ADDR 11246 +#define D_pFastLoopBack_ADDR_END 11247 +#define D_pFastLoopBack_sizeof 2 + +#define D_pNextFastLoopBack_ADDR 11248 +#define D_pNextFastLoopBack_ADDR_END 11251 +#define D_pNextFastLoopBack_sizeof 4 + +#define D_ppCurrentTask_ADDR 11252 +#define D_ppCurrentTask_ADDR_END 11253 +#define D_ppCurrentTask_sizeof 2 + +#define D_slotCounter_ADDR 11256 +#define D_slotCounter_ADDR_END 11257 +#define D_slotCounter_sizeof 2 + +#define D_loopCounter_ADDR 11260 +#define D_loopCounter_ADDR_END 11261 +#define D_loopCounter_sizeof 2 + +#define D_RewindFlag_ADDR 11262 +#define D_RewindFlag_ADDR_END 11263 +#define D_RewindFlag_sizeof 2 + +#define D_Slot23_ctrl_ADDR 11264 +#define D_Slot23_ctrl_ADDR_END 11267 +#define D_Slot23_ctrl_sizeof 4 + +#define D_McuIrqFifo_ADDR 11268 +#define D_McuIrqFifo_ADDR_END 11331 +#define D_McuIrqFifo_sizeof 64 + +#define D_PingPongDesc_ADDR 11332 +#define D_PingPongDesc_ADDR_END 11379 +#define D_PingPongDesc_sizeof 48 + +#define D_PP_MCU_IRQ_ADDR 11380 +#define D_PP_MCU_IRQ_ADDR_END 11381 +#define D_PP_MCU_IRQ_sizeof 2 + +#define D_ctrlPortFifo_ADDR 11392 +#define D_ctrlPortFifo_ADDR_END 11407 +#define D_ctrlPortFifo_sizeof 16 + +#define D_Idle_State_ADDR 11408 +#define D_Idle_State_ADDR_END 11411 +#define D_Idle_State_sizeof 4 + +#define D_Stop_Request_ADDR 11412 +#define D_Stop_Request_ADDR_END 11415 +#define D_Stop_Request_sizeof 4 + +#define D_Ref0_ADDR 11416 +#define D_Ref0_ADDR_END 11417 +#define D_Ref0_sizeof 2 + +#define D_DebugRegister_ADDR 11420 +#define D_DebugRegister_ADDR_END 11559 +#define D_DebugRegister_sizeof 140 + +#define D_Gcount_ADDR 11560 +#define D_Gcount_ADDR_END 11561 +#define D_Gcount_sizeof 2 + +#define D_DCcounter_ADDR 11564 +#define D_DCcounter_ADDR_END 11567 +#define D_DCcounter_sizeof 4 + +#define D_DCsum_ADDR 11568 +#define D_DCsum_ADDR_END 11575 +#define D_DCsum_sizeof 8 + +#define D_fastCounter_ADDR 11576 +#define D_fastCounter_ADDR_END 11579 +#define D_fastCounter_sizeof 4 + +#define D_slowCounter_ADDR 11580 +#define D_slowCounter_ADDR_END 11583 +#define D_slowCounter_sizeof 4 + +#define D_aUplinkRouting_ADDR 11584 +#define D_aUplinkRouting_ADDR_END 11599 +#define D_aUplinkRouting_sizeof 16 + +#define D_VirtAudioLoop_ADDR 11600 +#define D_VirtAudioLoop_ADDR_END 11603 +#define D_VirtAudioLoop_sizeof 4 + +#define D_AsrcVars_DL_VX_ADDR 11604 +#define D_AsrcVars_DL_VX_ADDR_END 11635 +#define D_AsrcVars_DL_VX_sizeof 32 + +#define D_AsrcVars_UL_VX_ADDR 11636 +#define D_AsrcVars_UL_VX_ADDR_END 11667 +#define D_AsrcVars_UL_VX_sizeof 32 + +#define D_CoefAddresses_VX_ADDR 11668 +#define D_CoefAddresses_VX_ADDR_END 11699 +#define D_CoefAddresses_VX_sizeof 32 + +#define D_AsrcVars_DL_MM_ADDR 11700 +#define D_AsrcVars_DL_MM_ADDR_END 11731 +#define D_AsrcVars_DL_MM_sizeof 32 + +#define D_CoefAddresses_DL_MM_ADDR 11732 +#define D_CoefAddresses_DL_MM_ADDR_END 11763 +#define D_CoefAddresses_DL_MM_sizeof 32 + +#define D_APS_DL1_M_thresholds_ADDR 11764 +#define D_APS_DL1_M_thresholds_ADDR_END 11771 +#define D_APS_DL1_M_thresholds_sizeof 8 + +#define D_APS_DL1_M_IRQ_ADDR 11772 +#define D_APS_DL1_M_IRQ_ADDR_END 11773 +#define D_APS_DL1_M_IRQ_sizeof 2 + +#define D_APS_DL1_C_IRQ_ADDR 11774 +#define D_APS_DL1_C_IRQ_ADDR_END 11775 +#define D_APS_DL1_C_IRQ_sizeof 2 + +#define D_TraceBufAdr_ADDR 11776 +#define D_TraceBufAdr_ADDR_END 11777 +#define D_TraceBufAdr_sizeof 2 + +#define D_TraceBufOffset_ADDR 11778 +#define D_TraceBufOffset_ADDR_END 11779 +#define D_TraceBufOffset_sizeof 2 + +#define D_TraceBufLength_ADDR 11780 +#define D_TraceBufLength_ADDR_END 11781 +#define D_TraceBufLength_sizeof 2 + +#define D_AsrcVars_ECHO_REF_ADDR 11784 +#define D_AsrcVars_ECHO_REF_ADDR_END 11815 +#define D_AsrcVars_ECHO_REF_sizeof 32 + +#define D_Pempty_ADDR 11816 +#define D_Pempty_ADDR_END 11819 +#define D_Pempty_sizeof 4 + +#define D_APS_DL2_L_M_IRQ_ADDR 11820 +#define D_APS_DL2_L_M_IRQ_ADDR_END 11821 +#define D_APS_DL2_L_M_IRQ_sizeof 2 + +#define D_APS_DL2_L_C_IRQ_ADDR 11822 +#define D_APS_DL2_L_C_IRQ_ADDR_END 11823 +#define D_APS_DL2_L_C_IRQ_sizeof 2 + +#define D_APS_DL2_R_M_IRQ_ADDR 11824 +#define D_APS_DL2_R_M_IRQ_ADDR_END 11825 +#define D_APS_DL2_R_M_IRQ_sizeof 2 + +#define D_APS_DL2_R_C_IRQ_ADDR 11826 +#define D_APS_DL2_R_C_IRQ_ADDR_END 11827 +#define D_APS_DL2_R_C_IRQ_sizeof 2 + +#define D_APS_DL1_C_thresholds_ADDR 11828 +#define D_APS_DL1_C_thresholds_ADDR_END 11835 +#define D_APS_DL1_C_thresholds_sizeof 8 + +#define D_APS_DL2_L_M_thresholds_ADDR 11836 +#define D_APS_DL2_L_M_thresholds_ADDR_END 11843 +#define D_APS_DL2_L_M_thresholds_sizeof 8 + +#define D_APS_DL2_L_C_thresholds_ADDR 11844 +#define D_APS_DL2_L_C_thresholds_ADDR_END 11851 +#define D_APS_DL2_L_C_thresholds_sizeof 8 + +#define D_APS_DL2_R_M_thresholds_ADDR 11852 +#define D_APS_DL2_R_M_thresholds_ADDR_END 11859 +#define D_APS_DL2_R_M_thresholds_sizeof 8 + +#define D_APS_DL2_R_C_thresholds_ADDR 11860 +#define D_APS_DL2_R_C_thresholds_ADDR_END 11867 +#define D_APS_DL2_R_C_thresholds_sizeof 8 + +#define D_nextMultiFrame_ADDR 11868 +#define D_nextMultiFrame_ADDR_END 11875 +#define D_nextMultiFrame_sizeof 8 + +#define D_PING_ADDR 16384 +#define D_PING_ADDR_END 40959 +#define D_PING_sizeof 24576 + +#define D_PONG_ADDR 40960 +#define D_PONG_ADDR_END 65535 +#define D_PONG_sizeof 24576 + +#endif /* _ABE_DM_ADDR_H_ */ diff --git a/sound/soc/codecs/abe/abe_ext.c b/sound/soc/codecs/abe/abe_ext.c new file mode 100644 index 000000000000..0ca6cd1b257b --- /dev/null +++ b/sound/soc/codecs/abe/abe_ext.c @@ -0,0 +1,174 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#include "abe_main.h" + +/* + * ABE_DEFAULT_IRQ_PINGPONG_PLAYER + * + * + * Operations : + * generates data for the cache-flush buffer MODE 16+16 + * + * Return value : + * None. + */ +void abe_default_irq_pingpong_player(void) +{ + /* ping-pong access to MM_DL at 48kHz Mono with 20ms packet sizes */ + #define N_SAMPLES_MAX ((int)(1024)) + + static abe_int32 idx; + abe_uint32 i, dst, n_samples, n_bytes; + abe_int32 temp [N_SAMPLES_MAX], audio_sample; +#define DATA_SIZE 20 + const abe_int32 audio_pattern [DATA_SIZE] = + { + 0, 5063, 9630, 13254, 15581, 16383, 15581, 13254, 9630, + 5063, 0, -5063, -9630, -13254, -15581, -16383, -15581, + -13254, -9630, -5063 + }; + + /* read the address of the Pong buffer */ + abe_read_next_ping_pong_buffer(MM_DL_PORT, &dst, &n_bytes); + + n_samples = n_bytes / 4; + /* generate a test pattern */ + for (i = 0; i < n_samples; i++) { + audio_sample = audio_pattern [idx]; + idx = (idx >= (DATA_SIZE-1))? 0: (idx+1); + temp[i] = ((audio_sample << 16) + audio_sample); + } + + /* copy the pattern (flush it) to DMEM pointer update + * not necessary here because the buffer size do not + * change from one ping to the other pong + */ + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, dst, (abe_uint32 *)&(temp[0]), n_samples * 4); + abe_set_ping_pong_buffer(MM_DL_PORT, n_bytes); +} + +/* + * ABE_DEFAULT_IRQ_PINGPONG_PLAYER_32BITS + * + * Operations: + * generates data for the cache-flush buffer MODE 32 BITS + * Return value: + * None. + */ +void abe_default_irq_pingpong_player_32bits(void) +{ +/* ping-pong access to MM_DL at 48kHz Mono with 20ms packet sizes */ +#define N_SAMPLES_MAX ((int)(1024)) + static abe_int32 idx; + abe_uint32 i, dst, n_samples, n_bytes; + abe_int32 temp[N_SAMPLES_MAX], audio_sample; +#define DATA_SIZE 20 /* t = [0:N-1]/N; x = round(16383*sin(2*pi*t)) */ + const abe_int32 audio_pattern [DATA_SIZE] = + { + 0, 5063, 9630, 13254, 15581, 16383, 15581, 13254, + 9630, 5063, 0, -5063, -9630, -13254, -15581, -16383, + -15581, -13254, -9630, -5063 + }; + + /* read the address of the Pong buffer */ + abe_read_next_ping_pong_buffer(MM_DL_PORT, &dst, &n_bytes); + n_samples = n_bytes / 8; /* each stereo sample weights 8 bytes (format 32|32) */ + + /* generate a test pattern */ + for (i = 0; i < n_samples; i++) { + /* circular addressing */ + audio_sample = audio_pattern[idx]; + idx = (idx >= (DATA_SIZE-1))? 0: (idx+1); + temp[i*2 +0] = (audio_sample << 16); + temp[i*2 +1] = (audio_sample << 16); + } + + /* copy the pattern (flush it) to DMEM pointer update + * not necessary here because the buffer size do not + * change from one ping to the other pong + */ + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, dst, + (abe_uint32 *)&(temp[0]), n_samples * 4 *2); + + abe_set_ping_pong_buffer(MM_DL_PORT, n_bytes); +} +/* + * ABE_DEFAULT_IRQ_APS_ADAPTATION + * + * Operations : + * updates the APS filter and gain + * + * Return value : + * None. + */ +void abe_default_irq_aps_adaptation(void) +{ +} + +/* + * ABE_READ_SYS_CLOCK + * + * Parameter : + * pointer to the system clock + * + * Operations : + * returns the current time indication for the LOG + * + * Return value : + * None. + */ +void abe_read_sys_clock(abe_micros_t *time) +{ + static abe_micros_t clock; + + *time = clock; + clock ++; +} + +/* + * ABE_APS_TUNING + * + * Parameter : + * + * + * Operations : + * + * + * Return value : + * + */ +void abe_aps_tuning(void) +{ +} + +/** +* @fn abe_lock_executione() +* +* Operations : set a spin-lock and wait in case of collision +* +* +* @see ABE_API.h +*/ +void abe_lock_execution(void) +{ +} + +/** +* @fn abe_unlock_executione() +* +* Operations : reset a spin-lock (end of subroutine) +* +* +* @see ABE_API.h +*/ +void abe_unlock_execution(void) +{ +} diff --git a/sound/soc/codecs/abe/abe_ext.h b/sound/soc/codecs/abe/abe_ext.h new file mode 100644 index 000000000000..510e707d43f6 --- /dev/null +++ b/sound/soc/codecs/abe/abe_ext.h @@ -0,0 +1,165 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#ifndef _ABE_EXT_H_ +#define _ABE_EXT_H_ + +#include <linux/io.h> +#define PC_SIMULATION 0 /* Tuning is done on PC ? */ + +/* + * OS DEPENDENT MMU CONFIGURATION + */ +#define ABE_ATC_BASE_ADDRESS_L3 0x490F1000L /* base address used for L3/DMA access */ +#define ABE_ATC_BASE_ADDRESS_L4 0x401F1000L /* base address used for L4/MCU access */ +#define ABE_DMEM_BASE_ADDRESS_L3 0x49080000L /* 64kB as seen from DMA access */ +#define ABE_DMEM_BASE_ADDRESS_L4 0x40180000L /* 64kB as seen from MCU access */ + + +#if 0 +#define ABE_PMEM_BASE_ADDRESS_MPU 0x401E0000L /* 8kB as seen from MPU access */ +#define ABE_CMEM_BASE_ADDRESS_MPU 0x401A0000L /* 8kB +++++++++++++++++++++++ */ +#define ABE_SMEM_BASE_ADDRESS_MPU 0x401C0000L /* 24kB */ +#define ABE_DMEM_BASE_ADDRESS_MPU 0x40180000L /* 64kB */ +#define ABE_ATC_BASE_ADDRESS_MPU 0x401F1000L +#else +#define ABE_PMEM_BASE_ADDRESS_MPU 0x490E0000L /* 8kB as seen from MPU access */ +#define ABE_CMEM_BASE_ADDRESS_MPU 0x490A0000L /* 8kB +++++++++++++++++++++++ */ +#define ABE_SMEM_BASE_ADDRESS_MPU 0x490C0000L /* 24kB */ +#define ABE_DMEM_BASE_ADDRESS_MPU 0x49080000L /* 64kB */ +#define ABE_ATC_BASE_ADDRESS_MPU 0x490F1000L +#endif + +/* + * HARDWARE AND PERIPHERAL DEFINITIONS + */ + +#define ABE_PMEM_SIZE 8192 /* PMEM SIZE in bytes (1024 words of 64 bits: : #32bits words x 4)*/ +#define ABE_CMEM_SIZE 8192 /* CMEM SIZE in bytes (2048 coeff : #32bits words x 4)*/ +#define ABE_SMEM_SIZE 24576 /* SMEM SIZE in bytes (3072 stereo samples : #32bits words x 4)*/ +#define ABE_DMEM_SIZE 65536L /* DMEM SIZE in bytes */ +#define ABE_ATC_DESC_SIZE 512 /* ATC REGISTERS SIZE in bytes */ + + +#define ABE_MCU_IRQSTATUS_RAW 0x24 /* holds the MCU Irq signal */ +#define ABE_MCU_IRQSTATUS 0x28 /* status : clear the IRQ */ +#define ABE_DSP_IRQSTATUS_RAW 0x4C /* holds the DSP Irq signal */ +#define ABE_DMASTATUS_RAW 0x84 /* holds the DMA req lines to the sDMA */ + + +#define EVENT_GENERATOR_COUNTER 0x68 +#define EVENT_GENERATOR_COUNTER_DEFAULT 2048 /* PLL output/desired sampling rate = (32768 * 6000)/96000 */ +#define EVENT_GENERATOR_COUNTER_44100 2229 /* PLL output/desired sampling rate = (32768 * 6000)/88400 */ + +#define EVENT_GENERATOR_START 0x6C /* start / stop the EVENT generator */ +#define EVENT_GENERATOR_ON 1 +#define EVENT_GENERATOR_OFF 0 + +#define EVENT_SOURCE_SELECTION 0x70 /* selection of the EVENT generator source */ +#define EVENT_SOURCE_DMA 0 +#define EVENT_SOURCE_COUNTER 1 + +#define AUDIO_ENGINE_SCHEDULER 0x74 /* selection of the ABE DMA req line from ATC */ +#define ABE_ATC_DMIC_DMA_REQ 1 +#define ABE_ATC_MCPDMDL_DMA_REQ 2 +#define ABE_ATC_MCPDMUL_DMA_REQ 3 +#define ABE_ATC_DIRECTION_IN 0 /* Direction=0 means input from ABE point of view */ +#define ABE_ATC_DIRECTION_OUT 1 /* Direction=1 means output from ABE point of view */ + +/* + * * DMA requests + * */ +#define External_DMA_0 0 //Internal connection doesn't connect at ABE boundary +#define DMIC_DMA_REQ 1 //Transmit request digital microphone +#define McPDM_DMA_DL 2 //Multichannel PDM downlink +#define McPDM_DMA_UP 3 //Multichannel PDM uplink +#define MCBSP1_DMA_TX 4 //MCBSP module 1 - transmit request +#define MCBSP1_DMA_RX 5 //MCBSP module 1 - receive request +#define MCBSP2_DMA_TX 6 //MCBSP module 2 - transmit request +#define MCBSP2_DMA_RX 7 //MCBSP module 2 - receive request +#define MCBSP3_DMA_TX 8 //MCBSP module 3 - transmit request +#define MCBSP3_DMA_RX 9 //MCBSP module 3 - receive request +#define SLIMBUS1_DMA_TX0 10 //SLIMBUS module 1 - transmit request channel 0 +#define SLIMBUS1_DMA_TX1 11 //SLIMBUS module 1 - transmit request channel 1 +#define SLIMBUS1_DMA_TX2 12 //SLIMBUS module 1 - transmit request channel 2 +#define SLIMBUS1_DMA_TX3 13 //SLIMBUS module 1 - transmit request channel 3 +#define SLIMBUS1_DMA_TX4 14 //SLIMBUS module 1 - transmit request channel 4 +#define SLIMBUS1_DMA_TX5 15 //SLIMBUS module 1 - transmit request channel 5 +#define SLIMBUS1_DMA_TX6 16 //SLIMBUS module 1 - transmit request channel 6 +#define SLIMBUS1_DMA_TX7 17 //SLIMBUS module 1 - transmit request channel 7 +#define SLIMBUS1_DMA_RX0 18 //SLIMBUS module 1 - receive request channel 0 +#define SLIMBUS1_DMA_RX1 19 //SLIMBUS module 1 - receive request channel 1 +#define SLIMBUS1_DMA_RX2 20 //SLIMBUS module 1 - receive request channel 2 +#define SLIMBUS1_DMA_RX3 21 //SLIMBUS module 1 - receive request channel 3 +#define SLIMBUS1_DMA_RX4 22 //SLIMBUS module 1 - receive request channel 4 +#define SLIMBUS1_DMA_RX5 23 //SLIMBUS module 1 - receive request channel 5 +#define SLIMBUS1_DMA_RX6 24 //SLIMBUS module 1 - receive request channel 6 +#define SLIMBUS1_DMA_RX7 25 //SLIMBUS module 1 - receive request channel 7 +#define McASP1_AXEVT 26 //McASP - Data transmit DMA request line +#define McASP1_AREVT 29 //McASP - Data receive DMA request line +#define CBPr_DMA_RTX0 32 //DMA of the Circular buffer peripheral 0 +#define CBPr_DMA_RTX1 33 //DMA of the Circular buffer peripheral 1 +#define CBPr_DMA_RTX2 34 //DMA of the Circular buffer peripheral 2 +#define CBPr_DMA_RTX3 35 //DMA of the Circular buffer peripheral 3 +#define CBPr_DMA_RTX4 36 //DMA of the Circular buffer peripheral 4 +#define CBPr_DMA_RTX5 37 //DMA of the Circular buffer peripheral 5 +#define CBPr_DMA_RTX6 38 //DMA of the Circular buffer peripheral 6 +#define CBPr_DMA_RTX7 39 //DMA of the Circular buffer peripheral 7 + +/* + * * ATC DESCRIPTORS - DESTINATIONS + * */ +#define DEST_DMEM_access 0x00 +#define DEST_MCBSP1_TX 0x01 +#define DEST_MCBSP2_TX 0x02 +#define DEST_MCBSP3_TX 0x03 +#define DEST_SLIMBUS1_TX0 0x04 +#define DEST_SLIMBUS1_TX1 0x05 +#define DEST_SLIMBUS1_TX2 0x06 +#define DEST_SLIMBUS1_TX3 0x07 +#define DEST_SLIMBUS1_TX4 0x08 +#define DEST_SLIMBUS1_TX5 0x09 +#define DEST_SLIMBUS1_TX6 0x0A +#define DEST_SLIMBUS1_TX7 0x0B +#define DEST_MCPDM_DL 0x0C +#define DEST_MCASP_TX0 0x0D +#define DEST_MCASP_TX1 0x0E +#define DEST_MCASP_TX2 0x0F +#define DEST_MCASP_TX3 0x10 +#define DEST_EXTPORT0 0x11 +#define DEST_EXTPORT1 0x12 +#define DEST_EXTPORT2 0x13 +#define DEST_EXTPORT3 0x14 +#define DEST_MCPDM_ON 0x15 +#define DEST_CBP_CBPr 0x3F + +/* + * * ATC DESCRIPTORS - SOURCES + * */ +#define SRC_DMEM_access 0x0 +#define SRC_MCBSP1_RX 0x01 +#define SRC_MCBSP2_RX 0x02 +#define SRC_MCBSP3_RX 0x03 +#define SRC_SLIMBUS1_RX0 0x04 +#define SRC_SLIMBUS1_RX1 0x05 +#define SRC_SLIMBUS1_RX2 0x06 +#define SRC_SLIMBUS1_RX3 0x07 +#define SRC_SLIMBUS1_RX4 0x08 +#define SRC_SLIMBUS1_RX5 0x09 +#define SRC_SLIMBUS1_RX6 0x0A +#define SRC_SLIMBUS1_RX7 0x0B +#define SRC_DMIC_UP 0x0C +#define SRC_MCPDM_UP 0x0D +#define SRC_MCASP_RX0 0x0E +#define SRC_MCASP_RX1 0x0F +#define SRC_MCASP_RX2 0x10 +#define SRC_MCASP_RX3 0x11 +#define SRC_CBP_CBPr 0x3F +#endif /* _ABE_EXT_H_ */ diff --git a/sound/soc/codecs/abe/abe_functionsId.h b/sound/soc/codecs/abe/abe_functionsId.h new file mode 100644 index 000000000000..ffb8072c0ddb --- /dev/null +++ b/sound/soc/codecs/abe/abe_functionsId.h @@ -0,0 +1,80 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#ifndef _ABE_FUNCTIONSID_H_ +#define _ABE_FUNCTIONSID_H_ + +/* + * TASK function ID definitions + */ +#define C_ABE_FW_FUNCTION_IIR 0 +#define C_ABE_FW_FUNCTION_monoToStereoPack 1 +#define C_ABE_FW_FUNCTION_stereoToMonoSplit 2 +#define C_ABE_FW_FUNCTION_decimator 3 +#define C_ABE_FW_FUNCTION_OS0Fill 4 +#define C_ABE_FW_FUNCTION_mixer2 5 +#define C_ABE_FW_FUNCTION_mixer4 6 +#define C_ABE_FW_FUNCTION_inplaceGain 7 +#define C_ABE_FW_FUNCTION_EANC 8 +#define C_ABE_FW_FUNCTION_StreamRouting 9 +#define C_ABE_FW_FUNCTION_VIBRA2 10 +#define C_ABE_FW_FUNCTION_VIBRA1 11 +#define C_ABE_FW_FUNCTION_APS_core 12 +#define C_ABE_FW_FUNCTION_ASRC_DL_wrapper 13 +#define C_ABE_FW_FUNCTION_ASRC_UL_wrapper 14 +#define C_ABE_FW_FUNCTION_gainConverge 15 +#define C_ABE_FW_FUNCTION_dualIir 16 +#define C_ABE_FW_FUNCTION_EANC_wrapper 17 +#define C_ABE_FW_FUNCTION_DCoffset 18 +#define C_ABE_FW_FUNCTION_DCoffset2 19 +#define C_ABE_FW_FUNCTION_IO_DL_pp 20 +#define C_ABE_FW_FUNCTION_EANCUpdateOutSample 21 +#define C_ABE_FW_FUNCTION_VX_DL_8_48_wrapper 22 +#define C_ABE_FW_FUNCTION_VX_UL_48_8_wrapper 23 +#define C_ABE_FW_FUNCTION_VX_DL_16_48_wrapper 24 +#define C_ABE_FW_FUNCTION_VX_UL_48_16_wrapper 25 +#define C_ABE_FW_FUNCTION_BT_UL_8_48_wrapper 26 +#define C_ABE_FW_FUNCTION_BT_DL_48_8_wrapper 27 +#define C_ABE_FW_FUNCTION_BT_UL_16_48_wrapper 28 +#define C_ABE_FW_FUNCTION_BT_DL_48_16_wrapper 29 +#define C_ABE_FW_FUNCTION_ECHO_REF_48_8_wrapper 30 +#define C_ABE_FW_FUNCTION_ECHO_REF_48_16_wrapper 31 +#define C_ABE_FW_FUNCTION_IO_generic2 32 +#define C_ABE_FW_FUNCTION_irq_fifo_debug 33 +#define C_ABE_FW_FUNCTION_synchronize_pointers 34 +#define C_ABE_FW_FUNCTION_IIR_SRC_MIC 35 +#define C_ABE_FW_FUNCTION_APS_FEEDBACK_DL1_wrapper 36 +#define C_ABE_FW_FUNCTION_APS_FEEDBACK_DL2_L_wrapper 37 +#define C_ABE_FW_FUNCTION_APS_FEEDBACK_DL2_R_wrapper 38 + +/* + * COPY function ID definitions + */ +#define NULL_COPY_CFPID 0 +#define COPY_D2S_LR_CFPID 1 +#define COPY_D2S_2_CFPID 2 +#define COPY_D2S_MONO_CFPID 3 +#define COPY_S1D_MONO_CFPID 4 +#define COPY_S2D_MONO_CFPID 5 +#define COPY_S2D_2_CFPID 6 +#define COPY_DMIC_CFPID 7 +#define COPY_MCPDM_DL_CFPID 8 +#define COPY_MM_UL_CFPID 9 +#define SPLIT_SMEM_CFPID 10 +#define MERGE_SMEM_CFPID 11 +#define SPLIT_TDM_12_CFPID 12 +#define MERGE_TDM_12_CFPID 13 +#define ROUTE_MM_UL_CFPID 14 +#define IO_DMAREQ_CFPID 15 +#define IO_IP_CFPID 16 +#define COPY_S2D_MONOS16_CFPID 17 +#define COPY_S2D_2S16_CFPID 18 + +#endif /* _ABE_FUNCTIONSID_H_ */ diff --git a/sound/soc/codecs/abe/abe_fw.h b/sound/soc/codecs/abe/abe_fw.h new file mode 100644 index 000000000000..f13975300584 --- /dev/null +++ b/sound/soc/codecs/abe/abe_fw.h @@ -0,0 +1,454 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#include "abe_cm_addr.h" +#include "abe_sm_addr.h" +#include "abe_dm_addr.h" +#include "abe_typedef.h" + +/* + * GLOBAL DEFINITION + */ +#define FW_SCHED_LOOP_FREQ 4000 /* one scheduler loop = 4kHz = 12 samples at 48kHz */ +#define EVENT_FREQUENCY 96000 +#define SLOTS_IN_SCHED_LOOP (96000/FW_SCHED_LOOP_FREQ) + +#define SCHED_LOOP_8kHz ( 8000/FW_SCHED_LOOP_FREQ) +#define SCHED_LOOP_16kHz (16000/FW_SCHED_LOOP_FREQ) +#define SCHED_LOOP_24kHz (24000/FW_SCHED_LOOP_FREQ) +#define SCHED_LOOP_48kHz (48000/FW_SCHED_LOOP_FREQ) + +#define TASKS_IN_SLOT 8 +/* + * DMEM AREA - SCHEDULER + */ +#define smem_mm_trace 0 +#define dmem_mm_trace D_debugATCptrs_ADDR +#define dmem_mm_trace_size ((D_debugATCptrs_ADDR_END-D_debugATCptrs_ADDR+1)/4) + + +#define ATC_SIZE 8 /* 8 bytes per descriptors */ + +typedef struct { + unsigned rdpt:7; /* first 32bits word of the descriptor */ + unsigned reserved0:1; + unsigned cbsize:7; + unsigned irqdest:1; + unsigned cberr:1; + unsigned reserved1:5; + unsigned cbdir:1; + unsigned nw:1; + unsigned wrpt:7; + unsigned reserved2:1; + unsigned badd:12; /* second 32bits word of the descriptor */ + unsigned iter:7; /* iteration field overlaps the 16 bits boundary */ + unsigned srcid:6; + unsigned destid:6; + unsigned desen:1; +} abe_satcdescriptor_aess; + +/* + * table of scheduler tasks : + * char scheduler_table[24 x 4] : four bytes used at OPP100% + */ +#define dmem_scheduler_table D_multiFrame_ADDR + +#define dmem_eanc_task_pointer D_pFastLoopBack_ADDR + +/* + * OPP value : + * pointer increment steps in the scheduler table + */ +#define dmem_scheduler_table_step D_taskStep_ADDR + +/* + * table of scheduler tasks (max 64) : + * char task_descriptors[64 x 8] : eight bytes per task + * TASK INDEX, INITPTR 1,2,3, INITREG, Loop Counter, Reserved 1,2 + */ +#define dmem_task_descriptor D_tasksList_ADDR + +/* + * table of task function addresses: + * short task_function_descriptors[32 x 1] : 16bits addresses to PMEM using TASK_INDEX above + */ + +/* + * IDs of the micro tasks + */ + +// from ABE_FunctionsId.h +/*#define id_ copyMultiFrame_TFID +#define id_ inplaceGain_TFID +#define id_ mixer_TFID +#define id_ IIR_TFID +#define id_ gainConverge_TFID +#define id_ sinGen_TFID +#define id_ OSR0Fill_TFID +#define id_ IOtask_TFID + +#define id_mixer +#define id_eq +#define id_upsample_src +#define id_downsample_src +#define id_asrc +#define id_gain_update +#define id_aps_hs +#define id_aps_ihf +#define id_dither +#define id_eanc +#define id_io +#define id_router +#define id_dynamic_dl +#define id_dynamic_ul +#define id_sequence_reader +#define id_ .. +*/ + +/* + * I/O DESCRIPTORS + */ +#define dmem_port_descriptors D_IOdescr_ADDR + +/* ping_pong_t descriptors table + * structure of 8 bytes: + * uint16 base_address1 + * uint16 size1 (16bits address format) + * uint16 base_address2 + * uint16 size2 + * } ping_pong_t + * ping_pong_t dmem_ping_pong_t [8] + */ +#define dmem_ping_pong_buffer D_PING_ADDR /* U8 address */ + +/* + * IRQ mask used with ports with IRQ (DMA or host) + * uint32 dmem_irq_masks [8] + */ +#define dmem_irq_masks D_IRQMask_ADDR + +/* + * tables of to the 8 FIFO sequences (delayed commands) holding 12bytes tasks in the format + * structure { + * 1) Down counter delay on 16bits, decremented on each scheduler period + * 2) Code on 8 bits for the type of operation to execute : call or data move. + * 3) Three 16bits parameters (for data move example example : source/destination/counter) + * 4) Three bytes reserved + * } seq_fw_task_t + * + * structure { + * uint32 : base address(MSB) + read pointer(LSB) + * uint32 : max address (MSB) + write pointer (LSB) + * } FIFO_generic; + * seq_fw_task_t FIFO_CONTENT [8]; 96 bytes + * + * FIFO_SEQ dmem_fifo_sequences [8]; all FIFO sequences + */ +#define dmem_fifo_sequences D_DCFifo_ADDR +#define dmem_fifo_sequences_descriptors D_DCFifoDesc_ADDR + +/* + * IRQ FIFOs + * + * structure { + * uint32 : base address(MSB) + read pointer(LSB) + * uint32 : max address (MSB) + write pointer (LSB) + * uint32 IRQ_CODES [6]; + * } dmem_fifo_irq_mcu; 32 bytes + * } dmem_fifo_irq_dsp; 32 bytes + */ +#define dmem_fifo_irq_mcu_descriptor D_McuIrqFifoDesc_ADDR +#define dmem_fifo_irq_dsp_descriptor D_DspIrqFifoDesc_ADDR +#define dmem_fifo_irq_mcu D_McuIrqFifo_ADDR +#define dmem_fifo_irq_dsp D_DspIrqFifo_ADDR + +/* + * remote debugger exchange buffer + * uint32 dmem_debug_ae2hal [32] + * uint32 dmem_debug_hal2ae [32] + */ +#define dmem_debug_ae2hal D_DebugAbe2hal_ADDR +#define dmem_debug_hal2ae D_Debug_hal2abe_ADDR + +/* + * DMEM address of the ASRC ppm drift parameter for ASRCs (voice and multimedia paths) + * uint32 smem_asrc(x)_drift + */ +#define dmem_asrc1_drift D_ASRC1drift_ADDR +#define dmem_asrc2_drift D_ASRC2drift_ADDR + +/* + * DMEM indexes of the router uplink paths + * uint8 dmem_router_index [8] + */ +// OC: TBD ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +//#define dmem_router_index + +/* + * analog control circular buffer commands to Phoenix + * structure { + * uint32 : base address(MSB) + read pointer(LSB) + * uint32 : max address (MSB) + write pointer (LSB) + * uint32 FIFO_CONTENT [6]; + * } dmem_commands_to_phoenix; 32 bytes + */ +#define dmem_commands_to_phoenix D_Cmd2PhenixFifo_ADDR +#define dmem_commands_to_phoenix_descriptor D_Cmd2PhenixFifoDesc_ADDR + +/* + * analog control circular buffer commands from Phoenix (status line) + * structure { + * uint32 : base address(MSB) + read pointer(LSB) + * uint32 : max address (MSB) + write pointer (LSB) + * uint32 FIFO_CONTENT [6]; + * } dmem_commands_to_phoenix; 32 bytes + */ +#define dmem_commands_from_phoenix D_StatusFromPhenixFifo_ADDR +#define dmem_commands_from_phoenix_descriptor D_StatusFromPhenixFifoDesc_ADDR + +/* + * DEBUG mask + * uint16 dmem_debug_trace_mask + * each bit of this word enables a type a trace in the debug circular buffer + */ + +// OC: TBD ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ +//#define dmem_debug_trace_mask + +/* + * DEBUG circular buffer + * structure { + * uint32 : base address(MSB) + read pointer(LSB) + * uint32 : max address (MSB) + write pointer (LSB) + * uint32 FIFO_CONTENT [14]; = TIMESTAMP + CODE + * } dmem_debug_trace_buffer; 64 bytes + * should be much larger (depends on the DMEM mapping...) + */ +#define dmem_debug_trace_buffer +#define dmem_debug_trace_fifo D_debugFifo_ADDR +#define dmem_debug_trace_descriptor D_debugFifoDesc_ADDR + +/* + * Infinite counter incremented on each sheduler periods (~250 us) + * uint16 dmem_debug_time_stamp + */ +#define dmem_debug_time_stamp D_loopCounter_ADDR + +/* + * ATC BUFFERS + IO TASKS SMEM buffers + */ +#define dmem_dmic D_DMIC_UL_FIFO_ADDR +#define dmem_dmic_size ((D_DMIC_UL_FIFO_ADDR_END-D_DMIC_UL_FIFO_ADDR+1)/4) +#define smem_dmic1 DMIC0_96_labelID +#define smem_dmic2 DMIC1_96_labelID +#define smem_dmic3 DMIC2_96_labelID + +#define dmem_amic D_McPDM_UL_FIFO_ADDR +#define dmem_amic_size ((D_McPDM_UL_FIFO_ADDR_END-D_McPDM_UL_FIFO_ADDR+1)/4) +#define smem_amic AMIC_96_labelID + +#define dmem_mcpdm D_McPDM_DL_FIFO_ADDR +#define dmem_mcpdm_size ((D_McPDM_DL_FIFO_ADDR_END-D_McPDM_DL_FIFO_ADDR+1)/4) + +#define dmem_mm_ul D_MM_UL_FIFO_ADDR +#define dmem_mm_ul_size ((D_MM_UL_FIFO_ADDR_END-D_MM_UL_FIFO_ADDR+1)/4) +#define smem_mm_ul MM_UL_labelID /* managed directly by the router */ + +#define dmem_mm_ul2 D_MM_UL2_FIFO_ADDR +#define dmem_mm_ul2_size ((D_MM_UL2_FIFO_ADDR_END-D_MM_UL2_FIFO_ADDR+1)/4) +#define smem_mm_ul2 MM_UL2_labelID /* managed directly by the router */ + +#define dmem_mm_dl D_MM_DL_FIFO_ADDR +#define dmem_mm_dl_size ((D_MM_DL_FIFO_ADDR_END-D_MM_DL_FIFO_ADDR+1)/4) +#define smem_mm_dl_opp100 MM_DL_labelID +#define smem_mm_dl_opp25 MM_DL_labelID /* @@@ at OPP 25/50 or without ASRC */ + +#define dmem_vx_dl D_VX_DL_FIFO_ADDR +#define dmem_vx_dl_size ((D_VX_DL_FIFO_ADDR_END-D_VX_DL_FIFO_ADDR+1)/4) +#define smem_vx_dl Voice_16k_DL_labelID /* ASRC input buffer, size 40 */ + +#define dmem_vx_ul D_VX_UL_FIFO_ADDR +#define dmem_vx_ul_size ((D_VX_UL_FIFO_ADDR_END-D_VX_UL_FIFO_ADDR+1)/4) +#define smem_vx_ul Voice_16k_UL_labelID + +#define dmem_tones_dl D_TONES_DL_FIFO_ADDR +#define dmem_tones_dl_size ((D_TONES_DL_FIFO_ADDR_END-D_TONES_DL_FIFO_ADDR+1)/4) +#define smem_tones_dl Tones_labelID + +#define dmem_vib_dl D_VIB_DL_FIFO_ADDR +#define dmem_vib_dl_size ((D_VIB_DL_FIFO_ADDR_END-D_VIB_DL_FIFO_ADDR+1)/4) +#define smem_vib IO_VIBRA_DL_labelID + +#define dmem_mm_ext_out D_MM_EXT_OUT_FIFO_ADDR +#define dmem_mm_ext_out_size ((D_MM_EXT_OUT_FIFO_ADDR_END-D_MM_EXT_OUT_FIFO_ADDR+1)/4) +#define smem_mm_ext_out DL1_M_labelID + +#define dmem_mm_ext_in D_MM_EXT_IN_FIFO_ADDR +#define dmem_mm_ext_in_size ((D_MM_EXT_IN_FIFO_ADDR_END-D_MM_EXT_IN_FIFO_ADDR+1)/4) +#define smem_mm_ext_in AMIC_labelID + +#define dmem_bt_vx_dl D_BT_DL_FIFO_ADDR +#define dmem_bt_vx_dl_size ((D_BT_DL_FIFO_ADDR_END-D_BT_DL_FIFO_ADDR+1)/4) +#define smem_bt_vx_dl AMIC_labelID + +#define dmem_bt_vx_ul D_BT_UL_FIFO_ADDR +#define dmem_bt_vx_ul_size ((D_BT_UL_FIFO_ADDR_END-D_BT_UL_FIFO_ADDR+1)/4) +#define smem_bt_vx_ul SDT_M_labelID + +/* + * INITPTR / INITREG AREA + */ + +/* + * POINTER - used for the port descriptor programming + * corresponds to 8bits addresses to the INITPTR area + * + * List from ABE_INITxxx_labels.h + */ +#define ptr_ul_rec +#define ptr_vx_dl +#define ptr_mm_dl +#define ptr_mm_ext +#define ptr_tones +#define ptr_vibra2 + +/* + * SMEM AREA + */ + +/* + * PHOENIX OFFSET in SMEM + * used to subtract a DC offset on the headset path (power consumption optimization) + */ + +/* OC: exact usage to be detailled */ +#define smem_phoenix_offset S_PhoenixOffset_ADDR + +/* + * EQUALIZERS Z AREA + * used to reset the filter memory - IIR-8 (max) + * int24 stereo smem_equ(x) [8x2 + 1] + */ +#define smem_equ1 S_EQU1_data_ADDR +#define smem_equ2 S_EQU2_data_ADDR +#define smem_equ3 S_EQU3_data_ADDR +#define smem_equ4 S_EQU4_data_ADDR +#define smem_sdt S_SDT_data_ADDR + +/* + * GAIN SMEM on PORT + * int32 smem_G0 [18] : desired gain on the ports + * format of G0 = 6 bits left shifted desired gain in linear 24bits format + * int24 stereo G0 [18] = G0 + * int24 stereo GI [18] current value of the gain in the same format of G0 + * List of smoothed gains : + * 6 DMIC 0 1 2 3 4 5 + * 2 AMIC L R + * 4 PORT1/2_RX L R + * 2 MM_EXT L R + * 2 MM_VX_DL L R + * 2 IHF L R + * --------------- + * 18 = TOTAL + */ +//#define smem_g0 S_GTarget_ADDR /* [9] 2 gains in 1 SM address */ +//#define smem_g1 S_GCurrent_ADDR /* [9] 2 gains in 1 SM address */ + +/* + * COEFFICIENTS AREA + */ + +/* + * delay coefficients used in the IIR-1 filters + * int24 cmem_gain_delay_iir1[9 x 2] (a, (1-a)) + * + * 3 for 6 DMIC 0 1 2 3 4 5 + * 1 for 2 AMIC L R + * 2 for 4 PORT1/2_RX L R + * 1 for 2 MM_EXT L R + * 1 for 2 MM_VX_DL L R + * 1 for 2 IHF L R + */ + +#define cmem_gain_alpha C_Alpha_ADDR /* [9] */ +#define cmem_gain_1_alpha C_1_Alpha_ADDR + +/* + * gain controls + */ +#define GAIN_LEFT_OFFSET (abe_port_id)0 +#define GAIN_RIGHT_OFFSET (abe_port_id)1 + +#define cmem_gains_base C_GainsWRamp_ADDR +#define smem_target_gain_base S_GTarget1_ADDR +#define cmem_1_Alpha_base C_1_Alpha_ADDR +#define cmem_Alpha_base C_Alpha_ADDR + +#define dmic1_gains_offset 0 /* stereo gains */ +#define dmic2_gains_offset 2 /* stereo gains */ +#define dmic3_gains_offset 4 /* stereo gains */ +#define amic_gains_offset 6 /* stereo gains */ +#define dl1_gains_offset 8 /* stereo gains */ +#define dl2_gains_offset 10 /* stereo gains */ +#define splitters_gains_offset 12 /* stereo gains */ + +#define mixer_dl1_offset 14 +#define mixer_dl2_offset 18 +#define mixer_echo_offset 22 +#define mixer_sdt_offset 24 +#define mixer_vxrec_offset 26 +#define mixer_audul_offset 30 +#define gain_unused_offset 34 + +/* + * DMIC SRC 96->48 + * the filter is changed depending on the decimatio ratio used (16/25/32/40) + * int32 cmem_src2_dmic [6] IIR with 2 coefs in the recursive part and 4 coefs in the direct part + */ +#define cmem_src2_dmic + +/* + * EANC coefficients + * structure of : + * 20 Q6.26 coef for the FIR + * 16 Q6.26 coef for the IIR + * 1 Q6.26 coef for Lambda + */ +#define cmem_eanc_coef_fir +#define cmem_eanc_coef_iir +#define cmem_eanc_coef_lambda + +/* + * EQUALIZERS - SDT - COEF AREA + * int24 cmem_equ(x) [8x2+1] + */ +#define cmem_equ1 C_EQU1_data_ADDR +#define cmem_equ2 C_EQU2_data_ADDR +#define cmem_equ3 C_EQU3_data_ADDR +#define cmem_equ4 C_EQU4_data_ADDR +#define cmem_sdt C_SDT_data_ADDR + +/* + * APS - COEF AREA + * int24 cmem_aps(x) [16] + */ +#define cmem_aps1 +#define cmem_aps2 +#define cmem_aps3 + +/* + * DITHER - COEF AREA + * int24 cmem_dither(x) [4] + */ +#define cmem_dither + +//#ifdef __cplusplus +//} +//#endif diff --git a/sound/soc/codecs/abe/abe_ini.c b/sound/soc/codecs/abe/abe_ini.c new file mode 100644 index 000000000000..5beeb465aa71 --- /dev/null +++ b/sound/soc/codecs/abe/abe_ini.c @@ -0,0 +1,1145 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#include "abe_main.h" +#include "abe_dat.h" /* data declaration */ +#include "abe_cof.h" +/* + * initialize the default values for call-backs to subroutines + * - FIFO IRQ call-backs for sequenced tasks + * - FIFO IRQ call-backs for audio player/recorders (ping-pong protocols) + * - Remote debugger interface + * - Error monitoring + * - Activity Tracing + */ + +/* + * ABE_HW_CONFIGURATION + * + * Parameter : + * + * Operations : + * + * + * Return value : + * + */ +void abe_hw_configuration() +{ + abe_uint32 atc_reg; + + /* enables the DMAreq from AESS AESS_DMAENABLE_SET = 255 */ + atc_reg = 0xFF; + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_ATC, 0x60, &atc_reg, 4); +} + +/* + * ABE_BUILD_SCHEDULER_TABLE + * + * Parameter : + * + * Operations : + * + * + * Return value : + * + */ +void abe_build_scheduler_table() +{ + short MultiFrame[PROCESSING_SLOTS][TASKS_IN_SLOT]; + abe_uint16 i, n; + abe_uint8 *ptr; + char aUplinkMuxing[16]; + + /* LOAD OF THE TASKS' MULTIFRAME */ + /* WARNING ON THE LOCATION OF IO_MM_DL WHICH IS PATCHED IN "abe_init_io_tasks" */ + + for (ptr = (abe_uint8 *)&(MultiFrame[0][0]), i=0; i < sizeof (MultiFrame); i++) + *ptr++ = 0; + + //MultiFrame[0][0] = 0; + //MultiFrame[0][1] = 0; + MultiFrame[0][2] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_VX_DL; + //MultiFrame[0][3] = 0; + //MultiFrame[0][4] = 0; + //MultiFrame[0][5] = 0; + //@@@ MultiFrame[0][6] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_ASRC_MM_DL; No ASRC + //MultiFrame[0][7] = 0; + //MultiFrame[1][0] = 0; + //MultiFrame[1][1] = 0; +#define TASK_ASRC_VX_DL_SLT 1 +#define TASK_ASRC_VX_DL_IDX 2 + //MultiFrame[1][2] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_ASRC_VX_DL_16; +#define TASK_VX_DL_SLT 1 +#define TASK_VX_DL_IDX 3 + MultiFrame[1][3] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_VX_DL_16_48; + //MultiFrame[1][4] = 0; + //MultiFrame[1][5] = 0; + MultiFrame[1][6] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DL2Mixer; + MultiFrame[1][7] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_VIB_DL; + MultiFrame[2][0] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DL1Mixer; + //MultiFrame[2][1] = 0; + MultiFrame[2][2] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_SideTone; + //MultiFrame[2][3] = 0; + MultiFrame[2][4] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_SDTMixer; + MultiFrame[2][5] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_DMIC; + //MultiFrame[2][6] = 0; + //MultiFrame[2][7] = 0; + + MultiFrame[3][0] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DL1_EQ; + //MultiFrame[3][1] = 0; + MultiFrame[3][2] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_EchoMixer; + //MultiFrame[3][3] = 0; + //MultiFrame[3][4] = 0; + //MultiFrame[3][5] = 0; + MultiFrame[3][6] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DL2_EQ; + MultiFrame[3][7] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_VIBRA_SPLIT; + MultiFrame[4][0] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DL1_APS_EQ; + MultiFrame[4][1] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DL1_GAIN; + MultiFrame[4][2] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_VXRECMixer; + MultiFrame[4][3] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_VXREC_SPLIT; + //MultiFrame[4][4] = 0; + //MultiFrame[4][5] = 0; + MultiFrame[4][6] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_VIBRA1; + MultiFrame[4][7] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_VIBRA2; + + MultiFrame[5][0] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_EARP_48_96_0SR; + MultiFrame[5][1] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_EARP_48_96_LP; + MultiFrame[5][2] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_PDM_UL; + //MultiFrame[5][3] = 0; + //MultiFrame[5][4] = 0; + //MultiFrame[5][5] = 0; + MultiFrame[5][6] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DL2_APS_EQ; + MultiFrame[5][7] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DL2_GAIN; + + MultiFrame[6][0] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_EARP_48_96_LP; + MultiFrame[6][1] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_PDM_DL; + //MultiFrame[6][2] = 0; + //MultiFrame[6][3] = 0; + //MultiFrame[6][4] = 0; + //MultiFrame[6][5] = 0; + MultiFrame[6][6] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DL2_APS_SPLIT; + //MultiFrame[6][7] = 0; + + //MultiFrame[7][0] = 0; + //MultiFrame[7][1] = 0; + MultiFrame[7][2] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_BT_UL_SPLIT; + MultiFrame[7][3] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DBG_SYNC; + //MultiFrame[7][4] = 0; + //MultiFrame[7][5] = 0; + MultiFrame[7][6] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DL2_R_APS_CORE; + MultiFrame[7][7] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DL2_L_APS_CORE; + + //MultiFrame[8][0] = 0; + //MultiFrame[8][1] = 0; + MultiFrame[8][2] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DMIC1_96_48_LP; + //MultiFrame[8][3] = 0; + MultiFrame[8][4] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DMIC1_SPLIT; + //MultiFrame[8][5] = 0; + //MultiFrame[8][6] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_EANC_FBK_96_48; + //MultiFrame[8][7] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_EANC_FBK_SPLIT; + + //MultiFrame[9][0] = 0; + //MultiFrame[9][1] = 0; + MultiFrame[9][2] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DMIC2_96_48_LP; + //MultiFrame[9][3] = 0; + MultiFrame[9][4] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DMIC2_SPLIT; + //MultiFrame[9][5] = 0; + MultiFrame[9][6] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IHF_48_96_0SR; + MultiFrame[9][7] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IHF_48_96_LP; + + //MultiFrame[10][0] = 0; + //MultiFrame[10][1] = 0; + MultiFrame[10][2] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DMIC3_96_48_LP; + //MultiFrame[10][3] = 0; + MultiFrame[10][4] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DMIC3_SPLIT; + //MultiFrame[10][5] = 0; + //MultiFrame[10][6] = 0; // D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_EANC_COPY; // NEW: copy EANC coefs to working CMEM areas + MultiFrame[10][7] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IHF_48_96_LP; + + //MultiFrame[11][0] = 0; + //MultiFrame[11][1] = 0; + MultiFrame[11][2] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_AMIC_96_48_LP; + //MultiFrame[11][3] = 0; + MultiFrame[11][4] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_AMIC_SPLIT; + //MultiFrame[11][5] = 0; + //MultiFrame[11][6] = 0; + MultiFrame[11][7] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_VIBRA_PACK; + + //MultiFrame[12][0] = 0; + //MultiFrame[12][1] = 0; + MultiFrame[12][2] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_BT_VX_DL; + MultiFrame[12][3] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_VX_UL_ROUTING; + MultiFrame[12][4] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_ULMixer; +#define TASK_VX_UL_SLT 12 +#define TASK_VX_UL_IDX 5 + MultiFrame[12][5] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_VX_UL_48_16; + //MultiFrame[12][6] = 0; + //MultiFrame[12][7] = 0; + //MultiFrame[13][0] = 0; + //MultiFrame[13][1] = 0; + MultiFrame[13][2] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_MM_UL2_ROUTING; + //MultiFrame[13][3] = 0; + MultiFrame[13][4] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_MM_UL; + //MultiFrame[13][5] = 0; + //MultiFrame[13][6] = 0; + //MultiFrame[13][7] = 0; + + //MultiFrame[14][0] = 0; + //MultiFrame[14][1] = 0; + //MultiFrame[14][2] = 0; + MultiFrame[14][3] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_DMIC; +#define TASK_BT_DL_48_8_SLT 14 +#define TASK_BT_DL_48_8_IDX 4 + MultiFrame[14][4] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_BT_DL_48_8; + //MultiFrame[14][5] = 0; +#define TASK_ECHO_SLT 14 +#define TASK_ECHO_IDX 6 + MultiFrame[14][6] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_ECHO_REF_48_16; + //MultiFrame[14][7] = 0; + + MultiFrame[15][0] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DL1_APS_IIR; + MultiFrame[15][1] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DL1_APS_CORE; + //MultiFrame[15][2] = 0; + MultiFrame[15][3] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_BT_VX_UL; + //MultiFrame[15][4] = 0; + //MultiFrame[15][5] = 0; + //MultiFrame[15][6] = 0; +#define TASK_ASRC_ECHO_SLT 15 +#define TASK_ASRC_ECHO_IDX 7 + //@@@ MultiFrame[15][7] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_ASRC_ECHO_REF_16; + + //MultiFrame[16][0] = 0; + //MultiFrame[16][1] = 0; +#define TASK_ASRC_VX_UL_SLT 16 +#define TASK_ASRC_VX_UL_IDX 2 + //@@@ MultiFrame[16][2] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_ASRC_VX_UL_16; + MultiFrame[16][3] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_VX_UL; // USING ECHO REF MERGED + //MultiFrame[16][4] = 0; + //MultiFrame[16][5] = 0; + //MultiFrame[16][6] = 0; + //MultiFrame[16][7] = 0; + + //MultiFrame[17][0] = 0; + //MultiFrame[17][1] = 0; +#define TASK_BT_UL_8_48_SLT 17 +#define TASK_BT_UL_8_48_IDX 2 + MultiFrame[17][2] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_BT_UL_8_48; + MultiFrame[17][3] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_MM_UL2; + //MultiFrame[17][4] = 0; + //MultiFrame[17][5] = 0; + //MultiFrame[17][6] = 0; + //MultiFrame[17][7] = 0; + + MultiFrame[18][0] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_PDM_DL; + //MultiFrame[18][1] = 0; + //MultiFrame[18][2] = 0; + //MultiFrame[18][3] = 0; + //MultiFrame[18][4] = 0; + //MultiFrame[18][5] = 0; + //MultiFrame[18][6] = 0; + //MultiFrame[18][7] = 0; + +#define TASK_IO_MM_DL_SLT 19 +#define TASK_IO_MM_DL_IDX 0 + MultiFrame[19][0] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_MM_DL; + //MultiFrame[19][1] = 0 + //MultiFrame[19][2] = 0; + //MultiFrame[19][3] = 0; + //MultiFrame[19][4] = 0; + //MultiFrame[19][5] = 0; + //MultiFrame[19][6] = 0; + //MultiFrame[19][7] = 0; + + MultiFrame[20][0] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_TONES_DL; + MultiFrame[20][1] = 0; + MultiFrame[20][2] = 0; + //MultiFrame[20][3] = 0; + //MultiFrame[20][4] = 0; + //MultiFrame[20][5] = 0; + //MultiFrame[20][6] = 0; + //MultiFrame[20][7] = 0; + + //MultiFrame[21][0] = 0; + //MultiFrame[21][1] = 0; + //MultiFrame[21][2] = 0; + //MultiFrame[21][3] = 0; + //MultiFrame[21][4] = 0; + //MultiFrame[21][5] = 0; + //MultiFrame[21][6] = 0; + //MultiFrame[21][7] = 0; + + MultiFrame[22][0] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_DEBUG_IRQFIFO; // MUST STAY ON SLOT 22 + //MultiFrame[22][1] = 0; + MultiFrame[22][2] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_MM_EXT_OUT; + MultiFrame[22][3] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_MM_EXT_IN; + //MultiFrame[22][4] = 0; + //MultiFrame[22][5] = 0; + //MultiFrame[22][6] = 0; + //MultiFrame[22][7] = 0; + + MultiFrame[23][0] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_GAIN_UPDATE; + //MultiFrame[23][1] = 0; + //MultiFrame[23][2] = 0; + //MultiFrame[23][3] = 0; + //MultiFrame[23][4] = 0; + //MultiFrame[23][5] = 0; + //MultiFrame[23][6] = 0; + //MultiFrame[23][7] = 0; + + //MultiFrame[24][0] = 0; + //MultiFrame[24][1] = 0; + //MultiFrame[24][2] = 0; + //MultiFrame[24][3] = 0; + //MultiFrame[24][4] = 0; + //MultiFrame[24][5] = 0; + //MultiFrame[24][6] = 0; + //MultiFrame[24][7] = 0; + + abe_block_copy (COPY_FROM_HOST_TO_ABE, ABE_DMEM, D_multiFrame_ADDR, (abe_uint32*)MultiFrame, sizeof (MultiFrame)); + + // EANC Fast Loopback + // dFastLoopback = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_EANC_WRAP2; + // abe_block_copy (COPY_FROM_HOST_TO_ABE, ABE_DMEM, D_pFastLoopBack_ADDR, (abe_uint32*)&dFastLoopback, sizeof (dFastLoopback)); + + /* reset the uplink router */ + n = D_aUplinkRouting_ADDR_END - D_aUplinkRouting_ADDR + 1; + for(i = 0; i < n; i++) + aUplinkMuxing[i] = ZERO_labelID; + + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, D_aUplinkRouting_ADDR, (abe_uint32 *)aUplinkMuxing, sizeof(aUplinkMuxing)); +} + +/* + * ABE_INIT_ATC + * + * Parameter : + * prot : protocol being used + * + * Operations : + * load the DMEM ATC/AESS descriptors + * + * Return value : + * + */ +void abe_init_atc(abe_port_id id) +{ + abe_satcdescriptor_aess desc; + abe_uint8 iter; + abe_int32 datasize; + + // load default values of the descriptor + desc.rdpt = desc.wrpt = desc.irqdest = desc.cberr = desc.desen = desc.nw =0; + desc.reserved0 = desc.reserved1 = desc.reserved2 = 0; + desc.srcid = desc.destid = desc.badd = desc.iter = desc.cbsize = 0; + + datasize = abe_dma_port_iter_factor (&((abe_port[id]).format)); + iter = (abe_uint8) abe_dma_port_iteration (&((abe_port[id]).format)); + + if (abe_port[id].protocol.direction == ABE_ATC_DIRECTION_IN) // IN from AESS point of view + if (iter + 2*datasize > 126) + desc.wrpt = (iter >>1) + (2*datasize); + else + desc.wrpt = iter + 2*datasize; + else + desc.wrpt = 0 + 2*datasize; + + switch ((abe_port[id]).protocol.protocol_switch) { + case SLIMBUS_PORT_PROT: + desc.cbdir = (abe_port[id]).protocol.direction; + desc.cbsize = (abe_port[id]).protocol.p.prot_slimbus.buf_size; + desc.badd = ((abe_port[id]).protocol.p.prot_slimbus.buf_addr1) >> 4; + desc.iter = (abe_port[id]).protocol.p.prot_slimbus.iter; + desc.srcid = abe_atc_srcid [(abe_port[id]).protocol.p.prot_slimbus.desc_addr1 >> 3]; + + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, + (abe_port[id]).protocol.p.prot_slimbus.desc_addr1, + (abe_uint32*)&desc, sizeof(desc)); + + desc.badd = (abe_port[id]).protocol.p.prot_slimbus.buf_addr2; + desc.srcid = abe_atc_srcid [(abe_port[id]).protocol.p.prot_slimbus.desc_addr2 >> 3]; + + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, + (abe_port[id]).protocol.p.prot_slimbus.desc_addr2, + (abe_uint32*)&desc, sizeof(desc)); + break; + case SERIAL_PORT_PROT: + desc.cbdir = (abe_port[id]).protocol.direction; + desc.cbsize = (abe_port[id]).protocol.p.prot_serial.buf_size; + desc.badd = ((abe_port[id]).protocol.p.prot_serial.buf_addr) >> 4; + desc.iter = (abe_port[id]).protocol.p.prot_serial.iter; + desc.srcid = abe_atc_srcid[(abe_port[id]).protocol.p.prot_serial.desc_addr >> 3]; + desc.destid = abe_atc_dstid[(abe_port[id]).protocol.p.prot_serial.desc_addr >> 3]; + + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, + (abe_port[id]).protocol.p.prot_serial.desc_addr, + (abe_uint32*)&desc, sizeof(desc)); + break; + case DMIC_PORT_PROT: + desc.cbdir = ABE_ATC_DIRECTION_IN; + desc.cbsize = (abe_port[id]).protocol.p.prot_dmic.buf_size; + desc.badd = ((abe_port[id]).protocol.p.prot_dmic.buf_addr) >> 4; + desc.iter = DMIC_ITER; + desc.srcid = abe_atc_srcid[ABE_ATC_DMIC_DMA_REQ]; + + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, + ABE_ATC_DMIC_DMA_REQ * ATC_SIZE, (abe_uint32*)&desc, sizeof(desc)); + break; + case MCPDMDL_PORT_PROT: + abe_global_mcpdm_control = abe_port[id].protocol.p.prot_mcpdmdl.control; /* Control allowed on McPDM DL */ + desc.cbdir = ABE_ATC_DIRECTION_OUT; + desc.cbsize = (abe_port[id]).protocol.p.prot_mcpdmdl.buf_size; + desc.badd = ((abe_port[id]).protocol.p.prot_mcpdmdl.buf_addr) >> 4; + desc.iter = MCPDM_DL_ITER; + desc.destid = abe_atc_dstid[ABE_ATC_MCPDMDL_DMA_REQ]; + + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, + ABE_ATC_MCPDMDL_DMA_REQ * ATC_SIZE, (abe_uint32*)&desc, sizeof(desc)); + break; + case MCPDMUL_PORT_PROT: + desc.cbdir = ABE_ATC_DIRECTION_IN; + desc.cbsize = (abe_port[id]).protocol.p.prot_mcpdmul.buf_size; + desc.badd = ((abe_port[id]).protocol.p.prot_mcpdmul.buf_addr) >> 4; + desc.iter = MCPDM_UL_ITER; + desc.srcid = abe_atc_srcid[ABE_ATC_MCPDMUL_DMA_REQ]; + + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, + ABE_ATC_MCPDMUL_DMA_REQ * ATC_SIZE, (abe_uint32*)&desc, sizeof(desc)); + break; + case PINGPONG_PORT_PROT: + /* software protocol, nothing to do on ATC */ + break; + case DMAREQ_PORT_PROT: + desc.cbdir = (abe_port[id]).protocol.direction; + desc.cbsize = (abe_port[id]).protocol.p.prot_dmareq.buf_size; + desc.badd = ((abe_port[id]).protocol.p.prot_dmareq.buf_addr) >> 4; + desc.iter = 1; /* CBPr needs ITER=1. this is the eDMA job to do the iterations */ + /* input from ABE point of view */ + if (abe_port[id].protocol.direction == ABE_ATC_DIRECTION_IN) { + desc.rdpt = 127; + desc.wrpt = 0; + desc.srcid = abe_atc_srcid[(abe_port[id]).protocol.p.prot_dmareq.desc_addr >> 3]; + } else { + desc.rdpt = 0; + desc.wrpt = 127; + desc.destid = abe_atc_dstid[(abe_port[id]).protocol.p.prot_dmareq.desc_addr >> 3]; + } + + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, + (abe_port[id]).protocol.p.prot_dmareq.desc_addr, (abe_uint32*)&desc, sizeof (desc)); + break; + default: + break; + } +} + +/* + * + * ABE_INIT_DMA_T + * Parameter : + * prot : protocol being used + * + * Operations : + * load the dma_t with physical information from AE memory mapping + * + * Return value : + * + */ +void abe_init_dma_t(abe_port_id id, abe_port_protocol_t *prot) +{ + abe_dma_t_offset dma; + abe_uint32 idx; + + dma.data = 0; /* default dma_t points to address 0000... */ + dma.iter = 0; + + switch (prot->protocol_switch) { + case PINGPONG_PORT_PROT: + for (idx = 0; idx < 32; idx++) { + if (((prot->p).prot_pingpong.irq_data) == (abe_uint32)(1 << idx)) + break; + } + (prot->p).prot_dmareq.desc_addr = (CBPr_DMA_RTX0+idx)*ATC_SIZE; + dma.data = (prot->p).prot_pingpong.buf_addr >> 2; + dma.iter = (prot->p).prot_pingpong.buf_size >> 2; + break; + case DMAREQ_PORT_PROT: + for (idx = 0; idx < 32; idx++) { + if (((prot->p).prot_dmareq.dma_data) == (abe_uint32)(1 << idx)) + break; + } + dma.data = (CIRCULAR_BUFFER_PERIPHERAL_R__0 + idx*4); + dma.iter = (prot->p).prot_dmareq.iter; + (prot->p).prot_dmareq.desc_addr = (CBPr_DMA_RTX0+idx)*ATC_SIZE; + break; + case SLIMBUS_PORT_PROT: + case SERIAL_PORT_PROT: + case DMIC_PORT_PROT: + case MCPDMDL_PORT_PROT: + case MCPDMUL_PORT_PROT: + default: + break; + } + + /* upload the dma type */ + abe_port [id].dma = dma; +} + +/* + * ABE_DISENABLE_DMA_REQUEST + * Parameter: + * Operations: + * Return value: + */ +void abe_disable_enable_dma_request(abe_port_id id, abe_uint32 on_off) +{ + ABE_SIODescriptor desc; + ABE_SPingPongDescriptor desc_pp; + abe_uint8 desc_third_word[4], irq_dmareq_field; + abe_uint32 sio_desc_address; + abe_uint32 struct_offset; + + if (abe_port[id].protocol.protocol_switch == PINGPONG_PORT_PROT) { + irq_dmareq_field = (abe_uint8)(on_off * abe_port[id].protocol.p.prot_pingpong.irq_data); + sio_desc_address = D_PingPongDesc_ADDR; + struct_offset = (abe_uint32)&(desc_pp.data_size) - (abe_uint32)&(desc_pp); + + abe_block_copy(COPY_FROM_ABE_TO_HOST, ABE_DMEM, sio_desc_address + struct_offset, (abe_uint32 *)desc_third_word, 4); + desc_third_word[2] = irq_dmareq_field; + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, sio_desc_address + struct_offset, (abe_uint32 *)desc_third_word, 4); + } else { + sio_desc_address = dmem_port_descriptors + (id * sizeof(ABE_SIODescriptor)); + abe_block_copy (COPY_FROM_ABE_TO_HOST, ABE_DMEM, sio_desc_address, (abe_uint32*)&desc, sizeof (desc)); + + if (on_off) { + desc.atc_irq_data = (abe_uint8) abe_port[id].protocol.p.prot_dmareq.dma_data; + desc.on_off = 0x80; + } else { + desc.atc_irq_data = 0; + desc.on_off = 0; + } + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, sio_desc_address, + (abe_uint32*)&desc, sizeof (desc)); + } +} + +void abe_enable_dma_request(abe_port_id id) +{ + abe_disable_enable_dma_request(id, 1); +} + +/* + * ABE_DISABLE_DMA_REQUEST + * + * Parameter: + * Operations: + * Return value: + * + */ +void abe_disable_dma_request(abe_port_id id) +{ + abe_disable_enable_dma_request(id, 0); +} + + +/* + * ABE_ENABLE_ATC + * Parameter: + * Operations: + * Return value: + */ +void abe_enable_atc(abe_port_id id) +{ + just_to_avoid_the_many_warnings = (abe_port_id)id; +#if 0 + abe_satcdescriptor_aess desc; + abe_block_copy(COPY_FROM_ABE_TO_HOST, ABE_DMEM, + (abe_port[id]).protocol.p.prot_dmareq.desc_addr, + (abe_uint32*)&desc, sizeof (desc)); + desc.desen = 1; + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, + (abe_port[id]).protocol.p.prot_dmareq.desc_addr, + (abe_uint32*)&desc, sizeof (desc)); +#endif +} + + +/* + * ABE_DISABLE_ATC + * Parameter: + * Operations: + * Return value: + */ +void abe_disable_atc(abe_port_id id) +{ + abe_satcdescriptor_aess desc; + + abe_block_copy(COPY_FROM_ABE_TO_HOST, ABE_DMEM, + (abe_port[id]).protocol.p.prot_dmareq.desc_addr, + (abe_uint32*)&desc, sizeof (desc)); + desc.desen = 0; + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, + (abe_port[id]).protocol.p.prot_dmareq.desc_addr, + (abe_uint32*)&desc, sizeof (desc)); +} + +/* + * ABE_INIT_IO_TASKS + * + * Parameter : + * prot : protocol being used + * + * Operations : + * load the micro-task parameters doing to DMEM <==> SMEM data moves + * + * I/O descriptors input parameters : + * For Read from DMEM usually THR1/THR2 = X+1/X-1 + * For Write to DMEM usually THR1/THR2 = 2/0 + * UP_1/2 =X+1/X-1 + * + * Return value : + * + */ +void abe_init_io_tasks(abe_port_id id, abe_data_format_t *format, abe_port_protocol_t *prot) +{ + ABE_SIODescriptor desc; + ABE_SPingPongDescriptor desc_pp; + abe_uint32 x_io, direction, iter_samples, smem1, smem2, smem3, io_sub_id; + abe_uint32 copy_func_index, before_func_index, after_func_index; + abe_uint32 dmareq_addr, dmareq_field; + abe_uint32 sio_desc_address, datasize, iter, nsamp, datasize2, dOppMode32; + abe_uint32 atc_ptr_saved, atc_ptr_saved2, copy_func_index1; + abe_uint32 copy_func_index2, atc_desc_address1, atc_desc_address2; + short MultiFrame[PROCESSING_SLOTS][TASKS_IN_SLOT]; + + if (prot->protocol_switch == PINGPONG_PORT_PROT) { + if (MM_DL_PORT == id) { + // @@@@ reset local memory + abe_block_copy(COPY_FROM_ABE_TO_HOST, ABE_DMEM, + D_multiFrame_ADDR, + (abe_uint32*)MultiFrame, + sizeof (MultiFrame)); + MultiFrame[TASK_IO_MM_DL_SLT][TASK_IO_MM_DL_IDX] = + D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_PING_PONG; + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, + D_multiFrame_ADDR, (abe_uint32*)MultiFrame, + sizeof (MultiFrame)); + } else { + abe_dbg_param |= ERR_API; + abe_dbg_error_log (ABE_PARAMETER_ERROR); + } + + smem1 = (abe_uint8) abe_port[id].smem_buffer1; + copy_func_index = (abe_uint8) abe_dma_port_copy_subroutine_id (id); + dmareq_addr = abe_port[id].protocol.p.prot_pingpong.irq_addr; + dmareq_field = abe_port[id].protocol.p.prot_pingpong.irq_data; + datasize = abe_dma_port_iter_factor (format); + iter = abe_dma_port_iteration (format); + iter_samples = (iter / datasize); /* number of "samples" either mono or stereo */ + + /* load the IO descriptor */ + desc_pp.drift_ASRC = 0; /* no drift */ + desc_pp.drift_io = 0; /* no drift */ + desc_pp.hw_ctrl_addr = (abe_uint16) dmareq_addr; + desc_pp.copy_func_index = (abe_uint8) copy_func_index; + desc_pp.smem_addr = (abe_uint8) smem1; + desc_pp.atc_irq_data = (abe_uint8) dmareq_field; /* DMA req 0 is used for CBPr0 */ + desc_pp.x_io = (abe_uint8) iter_samples; /* size of block transfer */ + desc_pp.data_size = (abe_uint8) datasize; + desc_pp.workbuff_BaseAddr = (abe_uint16) (abe_base_address_pingpong [0]); /* address comunicated in Bytes */ + desc_pp.workbuff_Samples = (abe_uint16) iter_samples; /* size comunicated in XIO sample */ + desc_pp.nextbuff0_BaseAddr = (abe_uint16) (abe_base_address_pingpong [0]); + desc_pp.nextbuff0_Samples = (abe_uint16) ((abe_size_pingpong >> 2)/datasize); + desc_pp.nextbuff1_BaseAddr = (abe_uint16) (abe_base_address_pingpong [1]); + desc_pp.nextbuff1_Samples = (abe_uint16) ((abe_size_pingpong >> 2)/datasize); + desc_pp.counter = 1; + + /* send a DMA req to fill B0 with N samples + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_ATC, ABE_DMASTATUS_RAW, &(abe_port[id].protocol.p.prot_pingpong.irq_data), 4); */ + + sio_desc_address = D_PingPongDesc_ADDR; + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, sio_desc_address, + (abe_uint32*)&desc_pp, sizeof (desc_pp)); + } else { + io_sub_id = dmareq_addr = ABE_DMASTATUS_RAW; + dmareq_field = 0; + atc_desc_address1 = atc_desc_address2 = 0; + + datasize2=datasize = abe_dma_port_iter_factor(format); + x_io = (abe_uint8) abe_dma_port_iteration(format); + nsamp = (x_io / datasize); + + atc_ptr_saved2=atc_ptr_saved = DMIC_ATC_PTR_labelID + id; + + smem1 = abe_port[id].smem_buffer1; + smem3 = smem2 = abe_port[id].smem_buffer2; + + copy_func_index1 = (abe_uint8) abe_dma_port_copy_subroutine_id(id); + before_func_index = after_func_index = copy_func_index2 = NULL_COPY_CFPID; + + /* MM_DL managed in non-ping-pong mode */ + if (MM_DL_PORT == id) { + abe_block_copy(COPY_FROM_ABE_TO_HOST, ABE_DMEM, D_multiFrame_ADDR, + (abe_uint32*)MultiFrame, sizeof (MultiFrame)); + MultiFrame[TASK_IO_MM_DL_SLT][TASK_IO_MM_DL_IDX] = D_tasksList_ADDR + + sizeof(ABE_STask)*C_ABE_FW_TASK_IO_MM_DL; + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, D_multiFrame_ADDR, + (abe_uint32 *)MultiFrame, sizeof (MultiFrame)); + } + + switch (prot->protocol_switch) { + case DMIC_PORT_PROT: + /* DMIC port is read in two steps */ + x_io = x_io >> 1; + nsamp = nsamp >> 1; + atc_desc_address1 = ABE_ATC_DMIC_DMA_REQ*ATC_SIZE; + io_sub_id = IO_IP_CFPID; + break; + case MCPDMDL_PORT_PROT: + /* PDMDL port is written to in two steps */ + x_io = x_io >> 1; + atc_desc_address1 = ABE_ATC_MCPDMDL_DMA_REQ*ATC_SIZE; + io_sub_id = IO_IP_CFPID; + break; + case MCPDMUL_PORT_PROT: + atc_desc_address1 = ABE_ATC_MCPDMUL_DMA_REQ*ATC_SIZE; + io_sub_id = IO_IP_CFPID; + break; + case SLIMBUS_PORT_PROT: + atc_desc_address1 = abe_port[id].protocol.p.prot_slimbus.desc_addr1; + atc_desc_address2 = abe_port[id].protocol.p.prot_slimbus.desc_addr2; + copy_func_index2 = NULL_COPY_CFPID; +/* @@@@@@ +#define SPLIT_SMEM_CFPID 9 +#define MERGE_SMEM_CFPID 10 +#define SPLIT_TDM_12_CFPID 11 +#define MERGE_TDM_12_CFPID 12 +*/ + io_sub_id = IO_IP_CFPID; + case SERIAL_PORT_PROT: /* McBSP/McASP */ + atc_desc_address1 = (abe_int16) abe_port[id].protocol.p.prot_serial.desc_addr; + io_sub_id = IO_IP_CFPID; + break; + case DMAREQ_PORT_PROT: /* DMA w/wo CBPr */ + dmareq_addr = abe_port[id].protocol.p.prot_dmareq.dma_addr; + dmareq_field = 0; + atc_desc_address1 = abe_port[id].protocol.p.prot_dmareq.desc_addr; + io_sub_id = IO_DMAREQ_CFPID; + break; + default: + break; + } + + /* special situation of the PING_PONG protocol which has its own SIO descriptor format */ + /* Sequence of operations on ping-pong buffers B0/B1 + * ---------- time --------------------------------------------->>>> + * Host Application is ready to send data from DDR to B0 + * SDMA is initialized from "abe_connect_irq_ping_pong_port" to B0 + * ABE HAL init FW to B0 + * send DMAreq to fill B0 + * FIRMWARE starts sending B1 data, sends DMAreq v + * continue with B0, sends DMAreq v continue with B1 + * DMAreq v (direct access from HAL to AESS regs) + * v (from ABE_FW) v (from ABE_FW) + * SDMA | fills B0 | fills B1...| fills B0... + */ + + if (MM_UL_PORT == id) { + copy_func_index1 = COPY_MM_UL_CFPID; + before_func_index = ROUTE_MM_UL_CFPID; + } + + /* check for 8kHz/16kHz */ + if (VX_DL_PORT == id) { + abe_block_copy(COPY_FROM_ABE_TO_HOST, ABE_DMEM, D_multiFrame_ADDR, + (abe_uint32*)MultiFrame, sizeof (MultiFrame)); + if (abe_port[id].format.f == 8000) { + //@@@ MultiFrame[TASK_ASRC_VX_DL_SLT][TASK_ASRC_VX_DL_IDX] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_ASRC_VX_DL_8; + MultiFrame[TASK_VX_DL_SLT][TASK_VX_DL_IDX] = + D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_VX_DL_8_48; + smem1 = Voice_8k_DL_labelID; //@@@ IO_VX_DL_ASRC_labelID + } else { + //@@@ MultiFrame[TASK_ASRC_VX_DL_SLT][TASK_ASRC_VX_DL_IDX] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_ASRC_VX_DL_16; + MultiFrame[TASK_VX_DL_SLT][TASK_VX_DL_IDX] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_VX_DL_16_48; + smem1 = Voice_16k_DL_labelID; //@@@ IO_VX_DL_ASRC_labelID + } + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, D_multiFrame_ADDR, + (abe_uint32*)MultiFrame, sizeof (MultiFrame)); + } + /* check for 8kHz/16kHz */ + if (VX_UL_PORT == id) { + abe_block_copy(COPY_FROM_ABE_TO_HOST, ABE_DMEM, D_multiFrame_ADDR, (abe_uint32*)MultiFrame, sizeof(MultiFrame)); + if (abe_port[id].format.f == 8000) { + //@@@ MultiFrame[TASK_ASRC_VX_UL_SLT][TASK_ASRC_VX_UL_IDX] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_ASRC_VX_UL_8; + MultiFrame[TASK_VX_UL_SLT][TASK_VX_UL_IDX] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_VX_UL_48_8; + //@@@ MultiFrame[TASK_ECHO_SLT][TASK_ECHO_IDX] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_ECHO_REF_48_8; + //@@@ MultiFrame[TASK_ASRC_ECHO_SLT][TASK_ASRC_ECHO_IDX] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_ASRC_ECHO_REF_8; + smem1 = Voice_8k_UL_labelID; //@@@ XinASRC_UL_VX_labelID + } else { + //@@@ MultiFrame[TASK_ASRC_VX_UL_SLT][TASK_ASRC_VX_UL_IDX] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_ASRC_VX_UL_16; + MultiFrame[TASK_VX_UL_SLT][TASK_VX_UL_IDX] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_VX_UL_48_16; + //@@@ MultiFrame[TASK_ECHO_SLT][TASK_ECHO_IDX] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_ECHO_REF_48_16; + //@@@ MultiFrame[TASK_ASRC_ECHO_SLT][TASK_ASRC_ECHO_IDX] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_ASRC_ECHO_REF_16; + smem1 = Voice_16k_UL_labelID; //@@@ XinASRC_UL_VX_labelID + } + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, D_multiFrame_ADDR, (abe_uint32*)MultiFrame, sizeof(MultiFrame)); + } + + /* check for 8kHz/16kHz */ + if (BT_VX_DL_PORT == id) { + abe_block_copy(COPY_FROM_ABE_TO_HOST, ABE_DMEM, + D_multiFrame_ADDR, + (abe_uint32*)MultiFrame, + sizeof (MultiFrame)); + if (abe_port[id].format.f == 8000) { + MultiFrame[TASK_BT_DL_48_8_SLT][TASK_BT_DL_48_8_IDX] = + D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_BT_DL_48_8; + smem1 = BT_DL_8k_labelID; + } else { + MultiFrame[TASK_BT_DL_48_8_SLT][TASK_BT_DL_48_8_IDX] = + D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_BT_DL_48_16; + smem1 = BT_DL_16k_labelID; + } + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, + D_multiFrame_ADDR, (abe_uint32*)MultiFrame, + sizeof (MultiFrame)); + } + + /* check for 8kHz/16kHz */ + if (BT_VX_UL_PORT == id) { + abe_block_copy(COPY_FROM_ABE_TO_HOST, ABE_DMEM, D_multiFrame_ADDR, + (abe_uint32*)MultiFrame, sizeof (MultiFrame)); + if (abe_port[id].format.f == 8000) { + MultiFrame[TASK_BT_UL_8_48_SLT][TASK_BT_UL_8_48_IDX] = + D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_BT_UL_8_48; + smem1 = BT_UL_8k_labelID; + } else { + MultiFrame[TASK_BT_UL_8_48_SLT][TASK_BT_UL_8_48_IDX] = + D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_BT_UL_16_48; + smem1 = BT_UL_16k_labelID; + } + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, + D_multiFrame_ADDR, (abe_uint32*)MultiFrame, + sizeof (MultiFrame)); + } + + if (MM_DL_PORT == id) { + //@@@ abe_block_copy (COPY_FROM_ABE_TO_HOST, ABE_DMEM, D_multiFrame_ADDR, (abe_uint32*)MultiFrame, sizeof (MultiFrame)); + //@@@ MultiFrame[TASK_IO_MM_DL_SLT][TASK_IO_MM_DL_IDX] = D_tasksList_ADDR + sizeof(ABE_STask)*C_ABE_FW_TASK_IO2_MM_DL; + //@@@ abe_block_copy (COPY_FROM_HOST_TO_ABE, ABE_DMEM, D_multiFrame_ADDR, (abe_uint32*)MultiFrame, sizeof (MultiFrame)); + /* set the SMEM buffer @@@@@ programming sequence : OPP must be set before channel is defined */ + abe_block_copy (COPY_FROM_ABE_TO_HOST, ABE_DMEM, D_maxTaskBytesInSlot_ADDR, &dOppMode32, sizeof(abe_uint32)); + if (dOppMode32 == DOPPMODE32_OPP100) + smem1 = smem_mm_dl_opp100; /* ASRC input buffer, size 40 */ + else + smem1 = smem_mm_dl_opp25; /* at OPP 25/50 or without ASRC */ + } + /* MM_EXT_IN takes the PDM_UL path */ + if (MM_EXT_IN_PORT == id) { + /* set the PDM_UL SMEM buffer to /nul */ + sio_desc_address = dmem_port_descriptors + (PDM_UL_PORT * sizeof(ABE_SIODescriptor)); + abe_block_copy (COPY_FROM_ABE_TO_HOST, ABE_DMEM, sio_desc_address, (abe_uint32*)&desc, sizeof(desc)); + desc.smem_addr1 = (abe_uint16) Dummy_AM_labelID; + abe_block_copy (COPY_FROM_HOST_TO_ABE, ABE_DMEM, sio_desc_address, (abe_uint32*)&desc, sizeof(desc)); + } + + if (abe_port[id].protocol.direction == ABE_ATC_DIRECTION_IN) + direction = 0; + else + direction = 3; /* offset of the write pointer in the ATC descriptor */ + + desc.drift_ASRC = 0; + desc.drift_io = 0; + desc.io_type_idx = (abe_uint8) io_sub_id; + desc.samp_size = (abe_uint8) datasize; + //desc.unused1 = (abe_uint8)0; + //desc.unused2 = (abe_uint8)0; + + desc.hw_ctrl_addr = (abe_uint16) (dmareq_addr << 2); + desc.atc_irq_data = (abe_uint8) dmareq_field; + desc.flow_counter = (abe_uint16) 0; + + desc.direction_rw = (abe_uint8) direction; + desc.nsamp = (abe_uint8) nsamp; + desc.x_io = (abe_uint8) x_io; + desc.on_off = 0x80; // set ATC ON + + desc.split_addr1 = (abe_uint16) smem1; + desc.split_addr2 = (abe_uint16) smem2; + desc.split_addr3 = (abe_uint16) smem3; + desc.before_f_index = (abe_uint8) before_func_index; + desc.after_f_index = (abe_uint8) after_func_index; + + desc.smem_addr1 = (abe_uint16) smem1; + desc.atc_address1 = (abe_uint16) atc_desc_address1; + desc.atc_pointer_saved1 = (abe_uint16) atc_ptr_saved; + desc.data_size1 = (abe_uint8) datasize; + desc.copy_f_index1 = (abe_uint8) copy_func_index1; + + desc.smem_addr2 = (abe_uint16) smem2; + desc.atc_address2 = (abe_uint16) atc_desc_address2; + desc.atc_pointer_saved2 = (abe_uint16) atc_ptr_saved2; + desc.data_size2 = (abe_uint8) datasize2; + desc.copy_f_index2 = (abe_uint8) copy_func_index2; + + sio_desc_address = dmem_port_descriptors + (id * sizeof(ABE_SIODescriptor)); + abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_DMEM, + sio_desc_address, (abe_uint32*)&desc, sizeof(desc)); + } +} + +/* + * ABE_INIT_DMIC + * + * Parameter : + * x : d + * + * Operations : + * + * + * Return value : + * + */ +void abe_init_dmic(abe_uint32 x) +{ + just_to_avoid_the_many_warnings = x; +} + +/* + * ABE_INIT_MCPDM + * + * Parameter : + * x : d + * + * Operations : + * + * + * Return value : + * + */ +void abe_init_mcpdm(abe_uint32 x) +{ + just_to_avoid_the_many_warnings = x; +} + +/* + * ABE_RESET_FEATURE + * + * Parameter : + * x : index of the feature to be initialized + * + * Operations : + * reload the configuration + * + * Return value : + * + */ +void abe_reset_one_feature(abe_uint32 x) +{ + all_feature[x] = all_feature_init[x]; /* load default fields */ + /* abe_call_subroutine ((all_feature[x]).disable_feature, NOPARAMETER, NOPARAMETER, NOPARAMETER, NOPARAMETER); */ +} + +/* + * ABE_RESET_ALL_FEATURE + * + * Parameter : + * none + * + * Operations : + * load default configuration for all features + * struct { + * uint16 load_default_data; + * uint16 read_parameter; + * uint16 write_parameter; + * uint16 running_status; + * uint16 fw_input_buffer_address; + * uint16 fw_output_buffer_address; + * uint16 fw_scheduler_slot_position; + * uint16 fw_scheduler_subslot_position; + * uint16 min_opp; + * char name[NBCHARFEATURENAME]; + * } abe_feature_t; + * + * Return value : + * + */ +void abe_reset_all_features(void) +{ + abe_uint16 i; + + for (i = 0; i < FEAT_GAINS_DMIC1; i++) + abe_reset_one_feature(i); +} + +/* + * ABE_RESET_ALL_PORTS + * + * Parameter : + * none + * + * Operations : + * load default configuration for all features + * + * Return value : + * + */ +void abe_reset_all_ports(void) +{ + abe_uint16 i; + + for (i = 0; i < MAXNBABEPORTS; i++) + abe_reset_port(i); + + /* mixers' configuration */ + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_100MS, MIX_DL1_INPUT_MM_DL); + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_100MS, MIX_DL1_INPUT_MM_UL2); + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_100MS, MIX_DL1_INPUT_VX_DL); + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_100MS, MIX_DL1_INPUT_TONES); + + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_100MS, MIX_DL2_INPUT_TONES); + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_100MS, MIX_DL2_INPUT_VX_DL); + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_100MS, MIX_DL2_INPUT_MM_DL); + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_100MS, MIX_DL2_INPUT_MM_UL2); + + abe_write_mixer(MIXSDT, MUTE_GAIN, RAMP_100MS, MIX_SDT_INPUT_UP_MIXER); + abe_write_mixer(MIXSDT, GAIN_0dB , RAMP_100MS, MIX_SDT_INPUT_DL1_MIXER); + + abe_write_mixer(MIXECHO, GAIN_0dB, RAMP_100MS, GAIN_LEFT_OFFSET); + abe_write_mixer(MIXECHO, GAIN_0dB, RAMP_100MS, GAIN_RIGHT_OFFSET); + + abe_write_mixer(MIXAUDUL, MUTE_GAIN, RAMP_100MS, MIX_AUDUL_INPUT_MM_DL); + abe_write_mixer(MIXAUDUL, MUTE_GAIN, RAMP_100MS, MIX_AUDUL_INPUT_TONES); + abe_write_mixer(MIXAUDUL, GAIN_0dB, RAMP_100MS, MIX_AUDUL_INPUT_UPLINK); + abe_write_mixer(MIXAUDUL, MUTE_GAIN, RAMP_100MS, MIX_AUDUL_INPUT_VX_DL); + + abe_write_mixer(MIXVXREC, MUTE_GAIN, RAMP_100MS, MIX_VXREC_INPUT_TONES); + abe_write_mixer(MIXVXREC, MUTE_GAIN, RAMP_100MS, MIX_VXREC_INPUT_VX_DL); + abe_write_mixer(MIXVXREC, MUTE_GAIN, RAMP_100MS, MIX_VXREC_INPUT_MM_DL); + abe_write_mixer(MIXVXREC, MUTE_GAIN, RAMP_100MS, MIX_VXREC_INPUT_VX_UL); + + abe_write_gain(GAINS_DMIC1,GAIN_0dB, RAMP_100MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_DMIC1,GAIN_0dB, RAMP_100MS, GAIN_RIGHT_OFFSET); + abe_write_gain(GAINS_DMIC2,GAIN_0dB, RAMP_100MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_DMIC2,GAIN_0dB, RAMP_100MS, GAIN_RIGHT_OFFSET); + abe_write_gain(GAINS_DMIC3,GAIN_0dB, RAMP_100MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_DMIC3,GAIN_0dB, RAMP_100MS, GAIN_RIGHT_OFFSET); + abe_write_gain(GAINS_AMIC,GAIN_0dB, RAMP_100MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_AMIC, GAIN_0dB, RAMP_100MS, GAIN_RIGHT_OFFSET); + + abe_write_gain(GAINS_SPLIT, GAIN_0dB, RAMP_100MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_SPLIT, GAIN_0dB, RAMP_100MS, GAIN_RIGHT_OFFSET); + //abe_write_gain(GAINS_EANC ,GAIN_0dB , RAMP_100MS, GAIN_LEFT_OFFSET); + //abe_write_gain(GAINS_EANC, GAIN_0dB , RAMP_100MS, GAIN_RIGHT_OFFSET); + + /*@@@Gain set to -6dB due to McPDM Limitation*/ + /* cf CDDS 00635*/ + abe_write_gain(GAINS_DL1, GAIN_M6dB, RAMP_100MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_DL1, GAIN_M6dB, RAMP_100MS, GAIN_RIGHT_OFFSET); + abe_write_gain(GAINS_DL2, GAIN_M6dB, RAMP_100MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_DL2, GAIN_M6dB, RAMP_100MS, GAIN_RIGHT_OFFSET); +} + +/* + * ABE_CLEAN_TEMPORARY_BUFFERS + * + * Parameter : + * none + * + * Operations : + * clear temporary buffers + * + * Return value : + * + */ +void abe_clean_temporary_buffers(abe_port_id id) +{ + switch (id) { + case DMIC_PORT: + abe_reset_mem(ABE_DMEM, D_DMIC_UL_FIFO_ADDR,D_DMIC_UL_FIFO_sizeof); + abe_reset_mem(ABE_SMEM, S_DMIC0_96_48_data_ADDR << 3, S_DMIC0_96_48_data_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_DMIC1_96_48_data_ADDR << 3, S_DMIC1_96_48_data_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_DMIC2_96_48_data_ADDR << 3, S_DMIC1_96_48_data_sizeof << 3); + abe_reset_mem(ABE_CMEM, (C_GainsWRamp_ADDR+dmic1_gains_offset) << 2, 6 << 2); /* reset current gains */ + abe_reset_mem(ABE_SMEM, (S_GCurrent_ADDR+dmic1_gains_offset) << 3, 6 << 3); + break; + case PDM_UL_PORT: + abe_reset_mem(ABE_DMEM, D_McPDM_UL_FIFO_ADDR, D_McPDM_UL_FIFO_sizeof); + abe_reset_mem(ABE_SMEM, S_BT_UL_ADDR << 3, S_BT_UL_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_AMIC_96_48_data_ADDR << 3, S_AMIC_96_48_data_sizeof << 3); + abe_reset_mem(ABE_CMEM, (C_GainsWRamp_ADDR+amic_gains_offset) << 2, 2 << 2); /* reset current gains */ + abe_reset_mem(ABE_SMEM, (S_GCurrent_ADDR+amic_gains_offset) << 3, 6 << 3); + break; + case BT_VX_UL_PORT: // ABE <-- BT (8/16kHz) + abe_reset_mem(ABE_DMEM, D_BT_UL_FIFO_ADDR, D_BT_UL_FIFO_sizeof); + abe_reset_mem(ABE_SMEM, S_BT_UL_ADDR << 3, S_BT_UL_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_BT_UL_ADDR << 3, S_BT_UL_sizeof << 3); + break; + case MM_UL_PORT: + abe_reset_mem(ABE_DMEM, D_MM_UL_FIFO_ADDR, D_MM_UL_FIFO_sizeof); + abe_reset_mem(ABE_SMEM, S_MM_UL_ADDR << 3, S_MM_UL_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_MM_UL2_ADDR << 3, D_MM_UL2_FIFO_sizeof << 3); + break; + case MM_UL2_PORT: + abe_reset_mem(ABE_DMEM, D_MM_UL2_FIFO_ADDR, D_MM_UL2_FIFO_sizeof); + abe_reset_mem(ABE_SMEM, S_MM_UL2_ADDR << 3, S_MM_UL2_sizeof << 3); + break; + case VX_UL_PORT: + abe_reset_mem(ABE_DMEM, D_VX_UL_FIFO_ADDR, D_VX_UL_FIFO_sizeof); + abe_reset_mem(ABE_SMEM, S_VX_UL_ADDR << 3, S_VX_UL_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_VX_UL_48_8_BP_data_ADDR << 3, S_VX_UL_48_8_BP_data_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_VX_UL_48_8_LP_data_ADDR << 3, S_VX_UL_48_8_LP_data_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_VX_UL_48_16_HP_data_ADDR << 3, S_VX_UL_48_16_HP_data_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_VX_UL_48_16_LP_data_ADDR << 3, S_VX_UL_48_16_LP_data_sizeof << 3); + break; + case MM_DL_PORT: + abe_reset_mem(ABE_DMEM, D_MM_DL_FIFO_ADDR, D_MM_DL_FIFO_sizeof); + abe_reset_mem(ABE_SMEM, S_MM_DL_ADDR << 3, S_MM_DL_sizeof << 3); + break; + case VX_DL_PORT: + abe_reset_mem(ABE_DMEM, D_VX_DL_FIFO_ADDR, D_VX_DL_FIFO_sizeof); + abe_reset_mem(ABE_SMEM, S_VX_DL_ADDR << 3, S_VX_DL_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_VX_DL_8_48_BP_data_ADDR << 3, S_VX_DL_8_48_BP_data_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_VX_DL_8_48_LP_data_ADDR << 3, S_VX_DL_8_48_LP_data_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_VX_DL_16_48_HP_data_ADDR << 3, S_VX_DL_16_48_HP_data_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_VX_DL_16_48_LP_data_ADDR << 3, S_VX_DL_16_48_LP_data_sizeof << 3); + break; + case TONES_DL_PORT: + abe_reset_mem(ABE_DMEM, D_TONES_DL_FIFO_ADDR, D_TONES_DL_FIFO_sizeof); + abe_reset_mem(ABE_SMEM, S_Tones_ADDR << 3, S_Tones_sizeof << 3); + break; + case VIB_DL_PORT: + abe_reset_mem(ABE_DMEM, D_VIB_DL_FIFO_ADDR, D_VIB_DL_FIFO_sizeof); + abe_reset_mem(ABE_SMEM, S_VIBRA_ADDR << 3, S_VIBRA_sizeof << 3); + break; + case BT_VX_DL_PORT:// ABE --> BT (8/16kHz) + abe_reset_mem(ABE_DMEM, D_BT_DL_FIFO_ADDR, D_BT_DL_FIFO_sizeof); + abe_reset_mem(ABE_SMEM, S_BT_DL_ADDR << 3, S_BT_DL_sizeof << 3); + break; + case PDM_DL_PORT: + abe_reset_mem(ABE_DMEM, D_McPDM_DL_FIFO_ADDR, D_McPDM_DL_FIFO_sizeof); + abe_reset_mem(ABE_SMEM, S_DMIC2_96_48_data_ADDR << 3, S_DMIC1_96_48_data_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_DL2_M_LR_EQ_data_ADDR << 3, S_DL2_M_LR_EQ_data_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_DL1_M_EQ_data_ADDR << 3, S_DL1_M_EQ_data_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_EARP_48_96_LP_data_ADDR << 3, S_EARP_48_96_LP_data_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_IHF_48_96_LP_data_ADDR << 3, S_IHF_48_96_LP_data_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_APS_DL1_EQ_data_ADDR << 3, S_APS_DL1_EQ_data_sizeof << 3); + abe_reset_mem(ABE_SMEM, S_APS_DL2_EQ_data_ADDR << 3, S_APS_DL2_EQ_data_sizeof << 3); + break; + case MM_EXT_OUT_PORT: + abe_reset_mem(ABE_DMEM, D_MM_EXT_OUT_FIFO_ADDR, D_MM_EXT_OUT_FIFO_sizeof); + break; + case MM_EXT_IN_PORT: + abe_reset_mem(ABE_DMEM, D_MM_EXT_IN_FIFO_ADDR, D_MM_EXT_IN_FIFO_sizeof); + break; + default: + break; + } +} diff --git a/sound/soc/codecs/abe/abe_initxxx_labels.h b/sound/soc/codecs/abe/abe_initxxx_labels.h new file mode 100644 index 000000000000..d18907dbf6a6 --- /dev/null +++ b/sound/soc/codecs/abe/abe_initxxx_labels.h @@ -0,0 +1,293 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#ifndef _ABE_INITXXX_LABELS_H_ +#define _ABE_INITXXX_LABELS_H_ + +#define Dummy_Regs_labelID 0 +#define Dummy_AM_labelID 1 +#define Voice_8k_UL_labelID 2 +#define Voice_8k_DL_labelID 3 +#define ECHO_REF_8K_labelID 4 +#define Voice_16k_UL_labelID 5 +#define Voice_16k_DL_labelID 6 +#define ECHO_REF_16K_labelID 7 +#define MM_DL_labelID 8 +#define IO_VX_DL_ASRC_labelID 9 +#define IO_MM_DL_ASRC_labelID 10 +#define IO_VIBRA_DL_labelID 11 +#define ZERO_labelID 12 +#define GTarget_labelID 13 +#define GCurrent_labelID 14 +#define Gr_1_labelID 15 +#define Gr_2_labelID 16 +#define Gr_Regs_labelID 17 +#define DMIC0_Gain_labelID 18 +#define DMIC1_Gain_labelID 19 +#define DMIC2_Gain_labelID 20 +#define DMIC3_Gain_labelID 21 +#define AMIC_Gain_labelID 22 +#define DL1_Gain_labelID 23 +#define DL2_Gain_labelID 24 +#define DEFAULT_Gain_labelID 25 +#define DL1_M_G_Tones_labelID 26 +#define DL2_M_G_Tones_labelID 27 +#define Echo_M_G_labelID 28 +#define SDT_M_G_labelID 29 +#define VXREC_M_G_VX_DL_labelID 30 +#define UL_M_G_VX_DL_labelID 31 +#define DL1_M_labelID 32 +#define DL2_M_labelID 33 +#define MM_UL2_labelID 34 +#define VX_DL_labelID 35 +#define Tones_labelID 36 +#define DL_M_MM_UL2_VX_DL_labelID 37 +#define Echo_M_labelID 38 +#define VX_UL_labelID 39 +#define VX_UL_M_labelID 40 +#define SDT_F_labelID 41 +#define SDT_F_data_labelID 42 +#define SDT_Coef_labelID 43 +#define SDT_Regs_labelID 44 +#define SDT_M_labelID 45 +#define DL1_labelID 46 +#define DMIC1_labelID 47 +#define DMIC1_L_labelID 48 +#define DMIC1_R_labelID 49 +#define DMIC2_labelID 50 +#define DMIC2_L_labelID 51 +#define DMIC2_R_labelID 52 +#define DMIC3_labelID 53 +#define DMIC3_L_labelID 54 +#define DMIC3_R_labelID 55 +#define BT_UL_L_labelID 56 +#define BT_UL_R_labelID 57 +#define AMIC_labelID 58 +#define AMIC_L_labelID 59 +#define AMIC_R_labelID 60 +#define EANC_FBK_In_labelID 61 +#define EANC_FBK_Out_labelID 62 +#define EANC_FBK_L_labelID 63 +#define EANC_FBK_R_labelID 64 +#define EchoRef_L_labelID 65 +#define EchoRef_R_labelID 66 +#define MM_DL_L_labelID 67 +#define MM_DL_R_labelID 68 +#define MM_UL_labelID 69 +#define AMIC_96_labelID 70 +#define DMIC0_96_labelID 71 +#define DMIC1_96_labelID 72 +#define DMIC2_96_labelID 73 +#define DMIC_desc_labelID 74 +#define UL_MIC_48K_labelID 75 +#define EQ_DL_48K_labelID 76 +#define EQ_48K_labelID 77 +#define UP_DOWN_8_48_labelID 78 +#define McPDM_Out1_labelID 79 +#define McPDM_Out2_labelID 80 +#define McPDM_Out3_labelID 81 +#define VX_UL_MUX_labelID 82 +#define MM_UL2_MUX_labelID 83 +#define MM_UL_MUX_labelID 84 +#define XinASRC_DL_VX_labelID 85 +#define ASRC_DL_VX_Coefs_labelID 86 +#define ASRC_DL_VX_Alpha_labelID 87 +#define ASRC_DL_VX_VarsBeta_labelID 88 +#define ASRC_DL_VX_8k_Regs_labelID 89 +#define XinASRC_UL_VX_labelID 90 +#define ASRC_UL_VX_Coefs_labelID 91 +#define ASRC_UL_VX_Alpha_labelID 92 +#define ASRC_UL_VX_VarsBeta_labelID 93 +#define ASRC_UL_VX_8k_Regs_labelID 94 +#define UL_48_8_DEC_labelID 95 +#define UP_DOWN_16_48_labelID 96 +#define ASRC_DL_VX_16k_Regs_labelID 97 +#define ASRC_UL_VX_16k_Regs_labelID 98 +#define UL_48_16_DEC_labelID 99 +#define XinASRC_DL_MM_labelID 100 +#define ASRC_DL_MM_Coefs_labelID 101 +#define ASRC_DL_MM_Alpha_labelID 102 +#define ASRC_DL_MM_VarsBeta_labelID 103 +#define ASRC_DL_MM_Regs_labelID 104 +#define VX_REC_labelID 105 +#define VXREC_UL_M_Tones_VX_UL_labelID 106 +#define VX_REC_L_labelID 107 +#define VX_REC_R_labelID 108 +#define DL2_M_L_labelID 109 +#define DL2_M_R_labelID 110 +#define DL1_M_data_labelID 111 +#define DL1_M_Coefs_labelID 112 +#define DL2_M_LR_data_labelID 113 +#define DL2_M_LR_Coefs_labelID 114 +#define VX_DL_8_48_LP_COEFS_labelID 115 +#define VX_DL_8_48_BP_COEFS_labelID 116 +#define VX_DL_8_48_BP_DATA_labelID 117 +#define VX_DL_8_48_LP_DATA_labelID 118 +#define SRC_BP_8K_48K_labelID 119 +#define SRC_HP_16K_48K_labelID 120 +#define SRC_LP_48K_labelID 121 +#define EARP_48_96_LP_DATA_labelID 122 +#define SRC_48_96_LP_labelID 123 +#define IHF_48_96_LP_DATA_labelID 124 +#define VX_DL_16_48_HP_COEFS_labelID 125 +#define VX_DL_16_48_LP_COEFS_labelID 126 +#define VX_DL_16_48_HP_DATA_labelID 127 +#define VX_DL_16_48_LP_DATA_labelID 128 +#define VX_UL_48_8_LP_COEFS_labelID 129 +#define VX_UL_48_8_BP_DATA_labelID 130 +#define VX_UL_48_8_LP_DATA_labelID 131 +#define VX_UL_8_TEMP_labelID 132 +#define VX_UL_48_16_LP_COEFS_labelID 133 +#define VX_UL_48_16_HP_DATA_labelID 134 +#define VX_UL_48_16_LP_DATA_labelID 135 +#define EQ_VX_UL_16K_labelID 136 +#define VX_UL_16_TEMP_labelID 137 +#define pAPS_iir1_p23_labelID 138 +#define pAPS_iir1_p45_labelID 139 +#define APS_IIR_Regs_labelID 140 +#define pAPS_core_DL1_p1_labelID 141 +#define pAPS_core_DL1_p23_labelID 142 +#define pAPS_core_DL1_p45_labelID 143 +#define pAPS_core_DL1_r_labelID 144 +#define pAPS_DL2L_core_r_labelID 145 +#define pAPS_DL2R_core_r_labelID 146 +#define pAPS_COIL_core_DL1_p1_labelID 147 +#define pAPS_COIL_core_DL1_p23_labelID 148 +#define pAPS_COIL_core_DL1_p45_labelID 149 +#define pAPS_COIL_core_DL1_r_labelID 150 +#define XinASRC_ECHO_REF_labelID 151 +#define ASRC_ECHO_REF_Coefs_labelID 152 +#define ASRC_ECHO_REF_Alpha_labelID 153 +#define ASRC_ECHO_REF_VarsBeta_labelID 154 +#define ASRC_ECHO_REF_8k_Regs_labelID 155 +#define ASRC_ECHO_REF_16k_Regs_labelID 156 +#define DL2_L_APS_IIR_p23_labelID 157 +#define DL2_R_APS_IIR_p23_labelID 158 +#define DL2_L_APS_IIR_p45_labelID 159 +#define DL2_R_APS_IIR_p45_labelID 160 +#define DL2_L_APS_CORE_p1_labelID 161 +#define DL2_L_APS_CORE_p23_labelID 162 +#define DL2_L_APS_CORE_p45_labelID 163 +#define DL2_R_APS_CORE_p1_labelID 164 +#define DL2_R_APS_CORE_p23_labelID 165 +#define DL2_R_APS_CORE_p45_labelID 166 +#define DL2_L_APS_COIL_CORE_p1_labelID 167 +#define DL2_L_APS_COIL_CORE_p23_labelID 168 +#define DL2_L_APS_COIL_CORE_p45_labelID 169 +#define pAPS_COIL_DL2L_core_r_labelID 170 +#define DL2_R_APS_COIL_CORE_p1_labelID 171 +#define DL2_R_APS_COIL_CORE_p23_labelID 172 +#define DL2_R_APS_COIL_CORE_p45_labelID 173 +#define pAPS_COIL_DL2R_core_r_labelID 174 +#define DL1_APS_labelID 175 +#define DL2_L_APS_labelID 176 +#define DL2_R_APS_labelID 177 +#define ECHO_REF_48_16_HP_DATA_labelID 178 +#define ECHO_REF_48_16_LP_DATA_labelID 179 +#define ECHO_REF_48_8_BP_DATA_labelID 180 +#define ECHO_REF_48_8_LP_DATA_labelID 181 +#define ECHO_REF_DEC_labelID 182 +#define pEANC_p0_labelID 183 +#define pEANC_p1_labelID 184 +#define pEANC_p23_labelID 185 +#define pEANC_p45_labelID 186 +#define pEANC_reg1_labelID 187 +#define pEANC_reg2_labelID 188 +#define pEANC_reg3_labelID 189 +#define pEANC_r_labelID 190 +#define DL1_APS_EQ_p23_labelID 191 +#define DL1_APS_EQ_p45_labelID 192 +#define DL2_APS_EQ_p23_labelID 193 +#define DL2_APS_EQ_p45_labelID 194 +#define pDC_EANC_p23_labelID 195 +#define pDC_EANC_r_labelID 196 +#define pVIBRA1_p0_labelID 197 +#define pVIBRA1_p1_labelID 198 +#define pVIBRA1_p23_labelID 199 +#define pVIBRA1_p45_labelID 200 +#define pVibra1_pR1_labelID 201 +#define pVibra1_pR2_labelID 202 +#define pVibra1_pR3_labelID 203 +#define pVIBRA1_r_labelID 204 +#define pVIBRA2_p0_labelID 205 +#define pVIBRA2_p1_labelID 206 +#define pVIBRA2_p23_labelID 207 +#define pVIBRA2_p45_labelID 208 +#define pCtrl_p67_labelID 209 +#define pVIBRA2_r_labelID 210 +#define VIBRA_labelID 211 +#define PING_labelID 212 +#define PING_Regs_labelID 213 +#define UP_48_96_LP_COEFS_labelID 214 +#define AMIC_96_48_data_labelID 215 +#define DOWN_96_48_Coefs_labelID 216 +#define DOWN_96_48_Regs_labelID 217 +#define DMIC0_96_48_data_labelID 218 +#define DMIC1_96_48_data_labelID 219 +#define DMIC2_96_48_data_labelID 220 +#define EANC_FBK_96_48_data_labelID 221 +#define pDC_EANC_r2_labelID 222 +#define SIO_DMIC_labelID 223 +#define SIO_PDM_UL_labelID 224 +#define SIO_BT_VX_UL_labelID 225 +#define SIO_MM_UL_labelID 226 +#define SIO_MM_UL2_labelID 227 +#define SIO_VX_UL_labelID 228 +#define SIO_MM_DL_labelID 229 +#define SIO_VX_DL_labelID 230 +#define SIO_TONES_DL_labelID 231 +#define SIO_VIB_DL_labelID 232 +#define SIO_BT_VX_DL_labelID 233 +#define SIO_PDM_DL_labelID 234 +#define SIO_MM_EXT_OUT_labelID 235 +#define SIO_MM_EXT_IN_labelID 236 +#define DMIC_ATC_PTR_labelID 237 +#define MCPDM_UL_ATC_PTR_labelID 238 +#define BT_VX_UL_ATC_PTR_labelID 239 +#define MM_UL_ATC_PTR_labelID 240 +#define MM_UL2_ATC_PTR_labelID 241 +#define VX_UL_ATC_PTR_labelID 242 +#define MM_DL_ATC_PTR_labelID 243 +#define VX_DL_ATC_PTR_labelID 244 +#define TONES_DL_ATC_PTR_labelID 245 +#define VIB_DL_ATC_PTR_labelID 246 +#define BT_VX_DL_ATC_PTR_labelID 247 +#define PDM_DL_ATC_PTR_labelID 248 +#define MM_EXT_OUT_ATC_PTR_labelID 249 +#define MM_EXT_IN_ATC_PTR_labelID 250 +#define MCU_IRQ_FIFO_ptr_labelID 251 +#define DEBUG_ATC_ptrs_labelID 252 +#define DEBUG_IRQ_FIFO_reg_labelID 253 +#define UP_DOWN_48_96_labelID 254 +#define OSR96_2_labelID 255 +#define DEBUG_GAINS_labelID 256 +#define DBG_8K_PATTERN_labelID 257 +#define DBG_16K_PATTERN_labelID 258 +#define DBG_48K_PATTERN_labelID 259 +#define DBG_MCPDM_PATTERN_labelID 260 +#define SMEM_TEST_PATTERN_labelID 261 +#define UL_VX_UL_48_8K_labelID 262 +#define UL_VX_UL_48_16K_labelID 263 +#define BT_UL_8_48_BP_DATA_labelID 264 +#define BT_UL_8_48_LP_DATA_labelID 265 +#define BT_UL_16_48_HP_DATA_labelID 266 +#define BT_UL_16_48_LP_DATA_labelID 267 +#define BT_DL_48_8_BP_DATA_labelID 268 +#define BT_DL_48_8_LP_DATA_labelID 269 +#define BT_DL_48_16_HP_DATA_labelID 270 +#define BT_DL_48_16_LP_DATA_labelID 271 +#define BT_DL_labelID 272 +#define BT_UL_labelID 273 +#define BT_DL_8k_labelID 274 +#define BT_DL_16k_labelID 275 +#define BT_UL_8k_labelID 276 +#define BT_UL_16k_labelID 277 + +#endif /* _ABE_INITXXXX_LABELS_H_ */ diff --git a/sound/soc/codecs/abe/abe_irq.c b/sound/soc/codecs/abe/abe_irq.c new file mode 100644 index 000000000000..61bd1263c0da --- /dev/null +++ b/sound/soc/codecs/abe/abe_irq.c @@ -0,0 +1,71 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#include "abe_main.h" + +/* + * initialize the default values for call-backs to subroutines + * - FIFO IRQ call-backs for sequenced tasks + * - FIFO IRQ call-backs for audio player/recorders (ping-pong protocols) + * - Remote debugger interface + * - Error monitoring + * - Activity Tracing + */ + +/* + * ABE_IRQ_PING_PONG + * Parameter : + * No parameter + * + * Operations : + * Call the respective subroutine depending on the IRQ FIFO content: + * APS interrupts : IRQtag_APS to [31:28], APS_IRQs to [27:16], loopCounter to [15:0] + * SEQ interrupts : IRQtag_COUNT to [31:28], Count_IRQs to [27:16], loopCounter to [15:0] + * Ping-Pong Interrupts : IRQtag_PP to [31:28], PP_MCU_IRQ to [27:16], loopCounter to [15:0] + * Check for ping-pong subroutines (low-power players) + * + * Return value : + * None. + */ +void abe_irq_ping_pong(void) +{ + abe_call_subroutine(abe_irq_pingpong_player_id, NOPARAMETER, NOPARAMETER, NOPARAMETER, NOPARAMETER); +} + +/* + * ABE_IRQ_CHECK_FOR_SEQUENCES + * Parameter : + * No parameter + * + * Operations : + * check the active sequence list + * + * Return value : + * None. + */ +void abe_irq_check_for_sequences(abe_uint32 i) +{ +} + +/* + * ABE_IRQ_APS + * Parameter : + * No parameter + * + * Operations : + * call the application subroutines that updates the acoustics protection filters + * + * Return value : + * None. + */ +void abe_irq_aps(abe_uint32 aps_info) +{ + abe_call_subroutine(abe_irq_aps_adaptation_id, NOPARAMETER, NOPARAMETER, NOPARAMETER, NOPARAMETER); +} diff --git a/sound/soc/codecs/abe/abe_lib.c b/sound/soc/codecs/abe/abe_lib.c new file mode 100644 index 000000000000..a7f44fcc5799 --- /dev/null +++ b/sound/soc/codecs/abe/abe_lib.c @@ -0,0 +1,719 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#include "abe_main.h" +#include <linux/io.h> + +void __iomem *io_base; + +void abe_init_mem() +{ + io_base = ioremap(L4_ABE_44XX_PHYS, SZ_1M); +} + +#define ABE_PMEM_BASE_OFFSET_MPU 0xe0000 +#define ABE_CMEM_BASE_OFFSET_MPU 0xa0000 +#define ABE_SMEM_BASE_OFFSET_MPU 0xc0000 +#define ABE_DMEM_BASE_OFFSET_MPU 0x80000 +#define ABE_ATC_BASE_OFFSET_MPU 0xf1000 + +#if 0 +/* + * ABE_TRANSLATE_TO_XMEM_FORMAT + * + * Parameter : + * Operations : + * translates a floating point data to the cmem/smem/dmem data format + * Return value : + * None. + */ +void abe_translate_to_xmem_format(abe_int32 memory_bank, abe_float fc, abe_uint32 *c) +{ + abe_int32 l; + abe_float afc; + + l = 0; + afc = absolute(fc); + + switch (memory_bank) { + case ABE_CMEM: + if (afc >= 1.0 && afc < 32.0) { + /* ALU post shifter +6 */ + l = (abe_int32)(fc * (1 << 16)); + l = (l << 2) + 2; + } else if (afc >= 0.5 && afc < 1.0) { + /* ALU post shifter +1 */ + l = (abe_int32)(fc * (1 << 21)); + l = (l << 2) + 1; + } else if (afc >= 0.25 && afc < 0.5) { + /* ALU post shifter 0 */ + l = (abe_int32)(fc * (1 << 22)); + l = (l << 2) + 0; + } else if (afc < 0.25) { + /* ALU post shifter -6 */ + l = (abe_int32)(fc * (1 << 28)); + l = (l << 2) + 3; + } + break; + case ABE_SMEM: + /* Q23 data format */ + l = (abe_int32)(fc * (1 << 23)); + break; + case ABE_DMEM: + /* Q31 data format (1<<31)=0 */ + l = (abe_int32)(fc * 2* (1 << 30)); + break; + default: /* ABE_PMEM */ + /* Q31 data format */ + l = (abe_int32)(2 * fc * 2* (1 << 30)); + break; + } + + *c = l; +} + +/* + * ABE_TRANSLATE_GAIN_FORMAT + * + * Parameter : + * Operations : + * f: original format name for gain or frequency. + * 1=linear ABE => decibels + * 2=decibels => linear ABE firmware format + * + * lin = power(2, decibel/602); lin = [0.0001 .. 30.0] + * decibel = 6.02 * log2(lin), decibel = [-70 .. +30] + * + * g1: pointer to the original data + * g2: pointer to the translated gain data + * + * Return value : + * None. + */ +void abe_translate_gain_format(abe_uint32 f, abe_float g1, abe_float *g2) +{ + abe_float g, frac_part, gg1, gg2; + abe_int32 int_part, i; + + #define C_20LOG2 ((abe_float)6.020599913) + + gg1 = (g1); + int_part = 0; + frac_part = gg2 = 0; + + switch (f) { + case DECIBELS_TO_LINABE: + g = gg1 / C_20LOG2; + int_part = (abe_int32) g; + frac_part = g - int_part; + + gg2 = abe_power_of_two(frac_part); + + if (int_part > 0) + gg2 = gg2 * (1 << int_part); + else + gg2 = gg2 / (1 << (-int_part)); + + break; + case LINABE_TO_DECIBELS: + if (gg1 == 1.0) { + gg2 = 0.0; + return; + } + + /* find the power of 2 by iteration */ + if (gg1 > 1.0) { + for (i = 0; i < 63; i++) { + if ((1 << i) > gg1) { + int_part = (i-1); + frac_part = gg1 / (1 << int_part); + break; + } + } + gg2 = C_20LOG2 * (int_part + abe_log_of_two(frac_part)); + } else { + for (i = 0; i < 63; i++) { + if (((1 << i) * gg1) > 1) { + int_part = i; + frac_part = gg1 * (1 << int_part); + break; + } + } + /* compute the dB using polynomial + * interpolation in the [1..2] range + */ + gg2 = C_20LOG2 * (((-1)*int_part) + abe_log_of_two(frac_part));} + break; + } + + *g2 = gg2; + } + +/* + * ABE_TRANSLATE_RAMP_FORMAT + * + * Parameter : + * Operations : + * f: original format name for gain or frequency. + * 1=ABE IIR coef => microseconds + * 2=microseconds => ABE IIR coef + * + * g1: pointer to the original data + * g2: pointer to the translated gain data + * + * Return value : + * None. + */ +void abe_translate_ramp_format(abe_float ramp, abe_float *ramp_iir1) +{ + *ramp_iir1 = 0.125; +} + +/* + * ABE_TRANSLATE_EQU_FORMAT + * + * Parameter : + * Operations : + * Translate + * + * Return value : + * None. + */ +void abe_translate_equ_format(abe_equ_t *p, abe_float *iir, abe_uint32 n) +{ +#if 0 + switch (p->type +typedef struct { + abe_iir_t equ_param1; /* type of filter */ + abe_uint32 equ_param2; /* filter length */ + union { /* parameters are the direct and recursive coefficients in */ + abe_int32 type1 [NBEQ1]; /* Q6.26 integer fixed-point format. */ + struct { + abe_int32 freq [NBEQ2]; /* parameters are the frequency (type "freq") and Q factors */ + abe_int32 gain [NBEQ2]; /* (type "gain") of each band. */ + } type2; + } coef; + abe_int32 equ_param3; + } abe_equ_t; + + Fs = 48000; + f0 = 19000; + Q = sqrt(0.5) + dBgain = -40 + + + A = sqrt (power (10, dBgain/20)); + w0 = 2*pi*f0/Fs + alpha = sin(w0) / (2*Q); + + %PeakingEQ ========================================== + b_peak = print_ABE_data ([1+alpha*A -2*cos(w0) 1-alpha*A],3); + a_peak = print_ABE_data ([1+alpha/A -2*cos(w0) 1-alpha/A],3); + +#endif +} +#endif + +/* + * ABE_FPRINTF + * + * Parameter : + * character line to be printed + * + * Operations : + * + * Return value : + * None. + */ +#if 0 +void abe_fprintf(char *line) +{ + switch (abe_dbg_output) { + case NO_OUTPUT: + break; + case TERMINAL_OUTPUT: + break; + case LINE_OUTPUT: + break; + case DEBUG_TRACE_OUTPUT: + break; + default: + break; + } +} +#endif + +/* + * ABE_READ_FEATURE_FROM_PORT + * + * Parameter : + * x : d + * + * Operations : + * + * + * Return value : + * + */ +void abe_read_feature_from_port(abe_uint32 x) +{ + just_to_avoid_the_many_warnings = x; +} + +/* + * ABE_WRITE_FEATURE_TO_PORT + * + * Parameter : + * x : d + * + * Operations : + * + * + * Return value : + * + */ +void abe_write_feature_to_port(abe_uint32 x) +{ + just_to_avoid_the_many_warnings = x; +} + +/* + * ABE_READ_FIFO + * + * Parameter : + * x : d + * + * Operations : + * + * + * Return value : + * + */ +void abe_read_fifo(abe_uint32 x) +{ + just_to_avoid_the_many_warnings = x; +} + +/* + * ABE_WRITE_FIFO + * + * Parameter : + * x : d + * + * Operations : + * + * + * Return value : + * + */ +void abe_write_fifo(abe_uint32 x) +{ + just_to_avoid_the_many_warnings = x; +} + +/* + * ABE_BLOCK_COPY + * + * Parameter : + * direction of the data move (Read/Write) + * memory bank among PMEM, DMEM, CMEM, SMEM, ATC/IO + * address of the memory copy (byte addressing) + * long pointer to the data + * number of data to move + * + * Operations : + * block data move + * + * Return value : + * none + */ +void abe_block_copy(abe_int32 direction, abe_int32 memory_bank, abe_int32 address, abe_uint32 *data, abe_uint32 nb_bytes) +{ +#if PC_SIMULATION + abe_uint32 *smem_tmp, smem_offset, smem_base, nb_words48; + + if (direction == COPY_FROM_HOST_TO_ABE) { + switch (memory_bank) { + case ABE_PMEM: + target_server_write_pmem(address/4, data, nb_bytes/4); + break; + case ABE_CMEM: + target_server_write_cmem(address/4, data, nb_bytes/4); + break; + case ABE_ATC: + target_server_write_atc(address/4, data, nb_bytes/4); + break; + case ABE_SMEM: + nb_words48 = (nb_bytes +7)>>3; + /* temporary buffer manages the OCP access to 32bits boundaries */ + smem_tmp = malloc(nb_bytes + 64); + /* address is on SMEM 48bits lines boundary */ + smem_base = address - (address & 7); + target_server_read_smem(smem_base/8, smem_tmp, 2 + nb_words48); + smem_offset = address & 7; + memcpy(&(smem_tmp[smem_offset>>2]), data, nb_bytes); + target_server_write_smem(smem_base/8, smem_tmp, 2 + nb_words48); + free(smem_tmp); + break; + case ABE_DMEM: + target_server_write_dmem(address, data, nb_bytes); + break; + default: + abe_dbg_param |= ERR_LIB; + abe_dbg_error_log(ABE_BLOCK_COPY_ERR); + break; + } + } else { + switch (memory_bank) { + case ABE_PMEM: + target_server_read_pmem(address/4, data, nb_bytes/4); + break; + case ABE_CMEM: + target_server_read_cmem(address/4, data, nb_bytes/4); + break; + case ABE_ATC: + target_server_read_atc(address/4, data, nb_bytes/4); + break; + case ABE_SMEM: + nb_words48 = (nb_bytes +7)>>3; + /* temporary buffer manages the OCP access to 32bits boundaries */ + smem_tmp = malloc(nb_bytes + 64); + /* address is on SMEM 48bits lines boundary */ + smem_base = address - (address & 7); + target_server_read_smem(smem_base/8, smem_tmp, 2 + nb_words48); + smem_offset = address & 7; + memcpy(data, &(smem_tmp[smem_offset>>2]), nb_bytes); + free(smem_tmp); + break; + case ABE_DMEM: + target_server_read_dmem(address, data, nb_bytes); + break; + default: + abe_dbg_param |= ERR_LIB; + abe_dbg_error_log(ABE_BLOCK_COPY_ERR); + break; + } + } +#else + abe_uint32 i; + abe_uint32 base_address = 0, *src_ptr, *dst_ptr, n; + + switch (memory_bank) { + case ABE_PMEM: + base_address = (abe_uint32) io_base + ABE_PMEM_BASE_OFFSET_MPU; + break; + case ABE_CMEM: + base_address = (abe_uint32) io_base + ABE_CMEM_BASE_OFFSET_MPU; + break; + case ABE_SMEM: + base_address = (abe_uint32) io_base + ABE_SMEM_BASE_OFFSET_MPU; + break; + case ABE_DMEM: + base_address = (abe_uint32) io_base + ABE_DMEM_BASE_OFFSET_MPU; + break; + case ABE_ATC: + base_address = (abe_uint32) io_base + ABE_ATC_BASE_OFFSET_MPU; + break; + default: + base_address = (abe_uint32) io_base + ABE_SMEM_BASE_OFFSET_MPU; + abe_dbg_param |= ERR_LIB; + abe_dbg_error_log(ABE_BLOCK_COPY_ERR); + break; + } + + if (direction == COPY_FROM_HOST_TO_ABE) { + dst_ptr = (abe_uint32 *)(base_address + address); + src_ptr = (abe_uint32 *)data; + } else { + dst_ptr = (abe_uint32 *)data; + src_ptr = (abe_uint32 *)(base_address + address); + } + + n = (nb_bytes/4); + + for (i = 0; i < n; i++) + *dst_ptr++ = *src_ptr++; + +#endif +} +/* + * ABE_RESET_MEM + * + * Parameter : + * memory bank among DMEM, SMEM + * address of the memory copy (byte addressing) + * number of data to move + * + * Operations : + * reset memory + * + * Return value : + * none + */ + +void abe_reset_mem(abe_int32 memory_bank, abe_int32 address, abe_uint32 nb_bytes) +{ +#if PC_SIMULATION + extern void target_server_write_smem(abe_uint32 address_48bits, abe_uint32 *data, abe_uint32 nb_words_48bits); + extern void target_server_write_dmem(abe_uint32 address_byte, abe_uint32 *data, abe_uint32 nb_byte); + + abe_uint32 *smem_tmp, *data, smem_offset, smem_base, nb_words48; + + data = calloc(nb_bytes, 1); + + switch (memory_bank) { + case ABE_SMEM: + nb_words48 = (nb_bytes +7)>>3; + /* temporary buffer manages the OCP access to 32bits boundaries */ + smem_tmp = malloc (nb_bytes + 64); + /* address is on SMEM 48bits lines boundary */ + smem_base = address - (address & 7); + target_server_read_smem (smem_base/8, smem_tmp, 2 + nb_words48); + smem_offset = address & 7; + memcpy (&(smem_tmp[smem_offset>>2]), data, nb_bytes); + target_server_write_smem (smem_base/8, smem_tmp, 2 + nb_words48); + free (smem_tmp); + break; + case ABE_DMEM: + target_server_write_dmem(address, data, nb_bytes); + break; + default: + abe_dbg_param |= ERR_LIB; + abe_dbg_error_log(ABE_BLOCK_COPY_ERR); + } + free(data); +#else + abe_uint32 i; + abe_uint32 *dst_ptr, n; + abe_uint32 base_address = 0; + + switch (memory_bank) { + case ABE_SMEM: + base_address = (abe_uint32) io_base + ABE_SMEM_BASE_OFFSET_MPU; + break; + case ABE_DMEM: + base_address = (abe_uint32) io_base + ABE_DMEM_BASE_OFFSET_MPU; + break; + case ABE_CMEM: + base_address = (abe_uint32) io_base + ABE_CMEM_BASE_OFFSET_MPU; + break; + } + + dst_ptr = (abe_uint32 *) (base_address + address); + + n = (nb_bytes/4); + + for (i = 0; i < n; i++) + *dst_ptr++ = 0; +#endif +} + +/* + * ABE_MONITORING + * + * Parameter : + * + * Operations : + * checks the internal status of ABE and HAL + * + * Return value : + * Call Backs on Errors + */ +void abe_monitoring(void) +{ + abe_dbg_param = 0; +} + +/* + * ABE_FORMAT_SWITCH + * + * Parameter : + * + * Operations : + * translates the sampling and data length to ITER number for the DMA + * and the multiplier factor to apply during data move with DMEM + * + * Return value : + * Call Backs on Errors + */ +void abe_format_switch(abe_data_format_t *f, abe_uint32 *iter, abe_uint32 *mulfac) +{ + abe_uint32 n_freq; + +#if FW_SCHED_LOOP_FREQ==4000 + switch (f->f) { + /* nb of samples processed by scheduling loop */ + case 8000: n_freq = 2; break; + case 16000: n_freq = 4; break; + case 24000: n_freq = 6; break; + case 44100: n_freq = 12; break; + case 96000: n_freq = 24; break; + default /*case 48000*/: n_freq = 12; break; + } +#else + n_freq = 0; /* erroneous cases */ +#endif + switch (f->samp_format) { + case MONO_MSB: + *mulfac = 1; + break; + case STEREO_16_16: + *mulfac = 1; + break; + case STEREO_MSB: + *mulfac = 2; + break; + case THREE_MSB: + *mulfac = 3; + break; + case FOUR_MSB: + *mulfac = 4; + break; + case FIVE_MSB: + *mulfac = 5; + break; + case SIX_MSB: + *mulfac = 6; + break; + case SEVEN_MSB: + *mulfac = 7; + break; + case EIGHT_MSB: + *mulfac = 8; + break; + case NINE_MSB: + *mulfac = 9; + break; + default: + *mulfac = 1; + break; + } + + *iter = (n_freq * (*mulfac)); +} + +/* + * ABE_DMA_PORT_ITERATION + * + * Parameter : + * + * Operations : + * translates the sampling and data length to ITER number for the DMA + * + * Return value : + * Call Backs on Errors + */ +abe_uint32 abe_dma_port_iteration(abe_data_format_t *f) +{ + abe_uint32 iter, mulfac; + + abe_format_switch(f, &iter, &mulfac); + + return iter; +} + +/* + * ABE_DMA_PORT_ITER_FACTOR + * + * Parameter : + * + * Operations : + * returns the multiplier factor to apply during data move with DMEM + * + * Return value : + * Call Backs on Errors + */ +abe_uint32 abe_dma_port_iter_factor(abe_data_format_t *f) +{ + abe_uint32 iter, mulfac; + + abe_format_switch(f, &iter, &mulfac); + + return mulfac; +} + +/* + * ABE_DMA_PORT_COPY_SUBROUTINE_ID + * + * Parameter : + * + * Operations : + * returns the index of the function doing the copy in I/O tasks + * + * Return value : + * Call Backs on Errors + */ +abe_uint32 abe_dma_port_copy_subroutine_id(abe_port_id port_id) +{ + abe_uint32 sub_id; + if (abe_port[port_id].protocol.direction == ABE_ATC_DIRECTION_IN) { + switch (abe_port[port_id].format.samp_format) { + case MONO_MSB: + sub_id = COPY_D2S_MONO_CFPID; + break; /* VX_DL */ + case STEREO_16_16: + sub_id = COPY_D2S_LR_CFPID; + break; /* MM_DL */ + case STEREO_MSB: + sub_id = COPY_D2S_2_CFPID; break; /* AMIC, MM_DL, VIB */ + case SIX_MSB: + if (port_id == DMIC_PORT) { + sub_id = COPY_DMIC_CFPID; + break; + } + case THREE_MSB: + case FOUR_MSB: + case FIVE_MSB: + case SEVEN_MSB: + case EIGHT_MSB: + case NINE_MSB: + default: + sub_id = NULL_COPY_CFPID; + break; + } + } else { + switch (abe_port[port_id].format.samp_format) { + case MONO_MSB: + sub_id = COPY_S2D_MONO_CFPID; + break; /* VX_UL */ + case MONO_RSHIFTED_16: + sub_id = COPY_S2D_MONOS16_CFPID; + break; /* McBSP_TX Mono */ + case STEREO_RSHIFTED_16: + sub_id = COPY_S2D_2S16_CFPID; + break; /* McBSP_TX Stereo */ + case STEREO_MSB: + sub_id = COPY_S2D_2_CFPID; + break; /* MM_UL2 */ + case SIX_MSB: + if (port_id == PDM_DL_PORT) { + sub_id = COPY_MCPDM_DL_CFPID; + break; + } + if (port_id == MM_UL_PORT) { + sub_id = COPY_MM_UL_CFPID; + break; + } + case THREE_MSB: + case FOUR_MSB: + case FIVE_MSB: + case SEVEN_MSB: + case EIGHT_MSB: + case NINE_MSB: + sub_id = COPY_MM_UL_CFPID; + break; + case STEREO_16_16: + default: + sub_id = NULL_COPY_CFPID; + break; + } + } + return sub_id; +} diff --git a/sound/soc/codecs/abe/abe_lib.h b/sound/soc/codecs/abe/abe_lib.h new file mode 100644 index 000000000000..9dd64ce62d11 --- /dev/null +++ b/sound/soc/codecs/abe/abe_lib.h @@ -0,0 +1,124 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#ifdef __cplusplus +extern "C" { +#endif + +void abe_init_mem(void); +void abe_translate_gain_format(abe_uint32 f, abe_float g1, abe_float *g2); +void abe_translate_ramp_format(abe_float g1, abe_float *g2); + +/* + * ABE_FPRINTF + * + * Parameter : + * character line to be printed + * + * Operations : + * + * Return value : + * None. + */ +void abe_fprintf(char *line); + +/* + * ABE_READ_FEATURE_FROM_PORT + * + * Parameter : + * x : d + * + * Operations : + * + * + * Return value : + * + */ +void abe_read_feature_from_port(abe_uint32 x); + +/* + * ABE_WRITE_FEATURE_TO_PORT + * + * Parameter : + * x : d + * + * Operations : + * + * + * Return value : + * + */ +void abe_write_feature_to_port(abe_uint32 x); + +/* + * ABE_READ_FIFO + * + * Parameter : + * x : d + * + * Operations : + * + * + * Return value : + * + */ +void abe_read_fifo(abe_uint32 x); + +/* + * ABE_WRITE_FIFO + * + * Parameter : + * x : d + * + * Operations : + * + * + * Return value : + * + */ +void abe_write_fifo(abe_uint32 x); + +/* + * ABE_BLOCK_COPY + * + * Parameter : + * direction of the data move (Read/Write) + * memory bank among PMEM, DMEM, CMEM, SMEM, ATC/IO + * address of the memory copy (byte addressing) + * long pointer to the data + * number of data to move + * + * Operations : + * block data move + * + * Return value : + * none + */ +void abe_block_copy(abe_int32 direction, abe_int32 memory_bank, abe_int32 address, abe_uint32 *data, abe_uint32 nb); + +/* + * ABE_RESET_MEM + * + *Parameter: + * memory bank among DMEM, SMEM + * address of the memory copy (byte addressing) + * number of data to move + * + * Operations: + * reset memory + * + * Return value: + * none + */ +void abe_reset_mem(abe_int32 memory_bank, abe_int32 address, abe_uint32 nb_bytes); + +#ifdef __cplusplus +} +#endif diff --git a/sound/soc/codecs/abe/abe_main.c b/sound/soc/codecs/abe/abe_main.c new file mode 100644 index 000000000000..3423fe62e50a --- /dev/null +++ b/sound/soc/codecs/abe/abe_main.c @@ -0,0 +1,99 @@ +/* ============================================================================= +* Texas Instruments OMAP(TM) Platform Software +* (c) Copyright 2009 Texas Instruments Incorporated. All Rights Reserved. +* +* Use of this software is controlled by the terms and conditions found +* in the license agreement under which this software has been supplied. +* =========================================================================== */ +/** + * @file ABE_MAIN.C + * + * 'ABEMAIN.C' dummy main of the HAL + * + * @path + * @rev 01.00 + */ +/* ---------------------------------------------------------------------------- +*! +*! Revision History +*! =================================== +*! 27-Nov-2008 Original (LLF) +*! 05-Jun-2009 V05 release +* =========================================================================== */ + + +#if !PC_SIMULATION + + +#include "abe_main.h" +#include "abe_test.h" + +void main (void) +{ + + abe_dma_t dma_sink, dma_source; + abe_data_format_t format; + abe_uint32 base_address; + + abe_auto_check_data_format_translation(); + abe_reset_hal(); + abe_check_opp(); + abe_check_dma(); + + /* + To be added here : + Device driver initialization: + McPDM_DL : threshold=1, 6 slots activated + DMIC : threshold=1, 6 microphones activated + McPDM_UL : threshold=1, two microphones activated + */ + + + /* MM_DL INIT + connect a DMA channel to MM_DL port (ATC FIFO) + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port (MM_DL_PORT, &format, ABE_CBPR0_IDX, &dma_sink); + + connect a Ping-Pong SDMA protocol to MM_DL port with Ping-Pong 576 stereo samples + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_dmareq_ping_pong_port (MM_DL_PORT, &format, ABE_CBPR0_IDX, (576 * 4), &dma_sink); + + connect a Ping-Pong cache-flush protocol to MM_DL port with 50Hz (20ms) rate + */ + abe_add_subroutine(&abe_irq_pingpong_player_id, + (abe_subroutine2) abe_default_irq_pingpong_player, SUB_0_PARAM, (abe_uint32*)0 ); + format.f = 48000; + format.samp_format = STEREO_MSB; +/* ping-pong access to MM_DL at 48kHz Mono with 20ms packet sizes */ +#define N_SAMPLES ((int)(48000 * 0.020)) + abe_connect_irq_ping_pong_port(MM_DL_PORT, &format, abe_irq_pingpong_player_id, + N_SAMPLES, &base_address, PING_PONG_WITH_MCU_IRQ); + + /* VX_DL INIT + connect a DMA channel to VX_DL port (ATC FIFO) + */ + format.f = 8000; + format.samp_format = MONO_MSB; + abe_connect_cbpr_dmareq_port(VX_DL_PORT, &format, ABE_CBPR1_IDX, &dma_sink); + + /* VX_UL INIT + connect a DMA channel to VX_UL port (ATC FIFO) + */ + format.f = 8000; + format.samp_format = MONO_MSB; + abe_connect_cbpr_dmareq_port(VX_UL_PORT, &format, ABE_CBPR2_IDX, &dma_source); + + /* make the AE waking event to be the McPDM DMA requests */ + abe_write_event_generator(EVENT_MCPDM); + + abe_enable_data_transfer(MM_DL_PORT ); + abe_enable_data_transfer(VX_DL_PORT ); + abe_enable_data_transfer(VX_UL_PORT ); + abe_enable_data_transfer(PDM_UL_PORT); + abe_enable_data_transfer(PDM_DL1_PORT); + +} + +#endif diff --git a/sound/soc/codecs/abe/abe_main.h b/sound/soc/codecs/abe/abe_main.h new file mode 100644 index 000000000000..8ccfd48daf45 --- /dev/null +++ b/sound/soc/codecs/abe/abe_main.h @@ -0,0 +1,55 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#ifndef _ABE_MAIN_H_ +#define _ABE_MAIN_H_ + +#include "abe_dm_addr.h" +#include "abe_cm_addr.h" +#include "abe_def.h" +#include "abe_typ.h" +#include "abe_dbg.h" +#include "abe_ext.h" +#include "abe_lib.h" +#include "abe_ref.h" +#include "abe_api.h" +//#include "ABE_DAT.h" + +#include "abe_typedef.h" +#include "abe_functionsId.h" +#include "abe_taskId.h" +#include "abe_dm_addr.h" +#include "abe_sm_addr.h" +#include "abe_cm_addr.h" +#include "abe_initxxx_labels.h" + +#include "abe_fw.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define ABE_HAL_VERSION 0x00000002L +#define ABE_FW_VERSION 0x00000000L +#define ABE_HW_VERSION 0x00000000L + +#define HAL_TIME_STAMP 0 /* generates the time-stamps used for the AESS verification */ + +#define ABE_DEBUG_CHECKERS 0 /* pipe connection to the TARGET simulator */ +#define ABE_DEBUG_HWFILE 0 /* simulator data extracted from a text-file */ +#define ABE_DEBUG_LL_LOG 0 /* low-level log files */ + +#define ABE_DEBUG (ABE_DEBUG_CHECKERS | ABE_DEBUG_HWFILE | ABE_DEBUG_LL_LOG) + +#ifdef __cplusplus +} +#endif + +#endif /* _ABE_MAIN_H_ */ diff --git a/sound/soc/codecs/abe/abe_ref.h b/sound/soc/codecs/abe/abe_ref.h new file mode 100644 index 000000000000..2af9b213e559 --- /dev/null +++ b/sound/soc/codecs/abe/abe_ref.h @@ -0,0 +1,140 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#ifndef _ABE_REF_H_ +#define _ABE_REF_H_ + +/* + * 'ABE_PRO.H' all non-API prototypes for INI, IRQ, SEQ ... + */ +#ifdef __cplusplus +extern "C" { +#endif + +/* + * HAL EXTERNAL API + */ + +/* + * HAL INTERNAL API + */ +void abe_load_embedded_patterns(void); +void abe_build_scheduler_table(void); +void abe_reset_all_features(void); +void abe_reset_one_port(abe_uint32 x); +void abe_reset_all_ports(void); +void abe_reset_all_fifo(void); +void abe_reset_all_sequence(void); +abe_uint32 abe_dma_port_iteration(abe_data_format_t *format); +void abe_read_sys_clock(abe_micros_t *time); +void abe_enable_dma_request(abe_port_id id); +void abe_disable_dma_request(abe_port_id id); +void abe_enable_atc(abe_port_id id); +void abe_disable_atc(abe_port_id id); +void abe_init_atc(abe_port_id id); +void abe_init_io_tasks(abe_port_id id, abe_data_format_t *format, abe_port_protocol_t *prot); +void abe_init_dma_t(abe_port_id id, abe_port_protocol_t *prot); +abe_uint32 abe_dma_port_iter_factor(abe_data_format_t *f); +abe_uint32 abe_dma_port_copy_subroutine_id(abe_port_id i); +void abe_call_subroutine(abe_uint32 idx, abe_uint32 p1, abe_uint32 p2, abe_uint32 p3, abe_uint32 p4); +void abe_monitoring(void); +void abe_lock_execution(void); +void abe_unlock_execution(void); +void abe_hw_configuration(void); +void abe_add_subroutine(abe_uint32 *id, abe_subroutine2 f, abe_uint32 nparam, abe_uint32* params); +void abe_read_next_ping_pong_buffer(abe_port_id port, abe_uint32 *p, abe_uint32 *n); +void abe_irq_ping_pong(void); +void abe_irq_check_for_sequences(abe_uint32 seq_info); +void abe_default_irq_pingpong_player(void); +void abe_default_irq_pingping_player_32bits(void); +void abe_default_irq_aps_adaptation(void); +void abe_read_hardware_configuration(abe_use_case_id *u, abe_opp_t *o, abe_hw_config_init_t *hw); +void abe_irq_aps(abe_uint32 aps_info); +void abe_clean_temporary_buffers(abe_port_id id); + +void abe_translate_to_xmem_format(abe_int32 memory_bank, float fc, abe_uint32 *c); + +/* + * HAL INTERNAL DATA + */ + +extern abe_port_t abe_port[]; +extern abe_feature_t feature[]; +extern abe_subroutine2 callbacks[]; + +extern abe_port_t abe_port[]; +extern const abe_port_t abe_port_init[]; + +extern abe_feature_t all_feature[]; +extern const abe_feature_t all_feature_init[]; + +extern abe_seq_t all_sequence[]; +extern const abe_seq_t all_sequence_init[]; + +extern const abe_router_t abe_router_ul_table_preset[NBROUTE_CONFIG][NBROUTE_UL]; +extern abe_router_t abe_router_ul_table[NBROUTE_CONFIG_MAX][NBROUTE_UL]; + +extern abe_uint32 abe_dbg_output; +extern abe_uint32 abe_dbg_mask; +extern abe_uint32 abe_dbg_activity_log[DBG_LOG_SIZE]; +extern abe_uint32 abe_dbg_activity_log_write_pointer; +extern abe_uint32 abe_dbg_param; + +extern abe_uint32 abe_global_mcpdm_control; +extern abe_event_id abe_current_event_id; + +extern const abe_sequence_t seq_null; +extern abe_subroutine2 abe_all_subsubroutine[MAXNBSUBROUTINE]; /* table of new subroutines called in the sequence */ +extern abe_uint32 abe_all_subsubroutine_nparam[MAXNBSUBROUTINE]; /* number of parameters per calls */ +extern abe_uint32 abe_subroutine_id[MAXNBSUBROUTINE]; +extern abe_uint32* abe_all_subroutine_params[MAXNBSUBROUTINE]; +extern abe_uint32 abe_subroutine_write_pointer; +extern abe_sequence_t abe_all_sequence[MAXNBSEQUENCE]; /* table of all sequences */ +extern abe_uint32 abe_sequence_write_pointer; +extern abe_uint32 abe_nb_pending_sequences; /* current number of pending sequences (avoids to look in the table) */ +extern abe_uint32 abe_pending_sequences[MAXNBSEQUENCE]; /* pending sequences due to ressource collision */ +extern abe_uint32 abe_global_sequence_mask; /* mask of unsharable ressources among other sequences */ +extern abe_seq_t abe_active_sequence[MAXACTIVESEQUENCE][MAXSEQUENCESTEPS]; /* table of active sequences */ +extern abe_uint32 abe_irq_pingpong_player_id; /* index of the plugged subroutine doing ping-pong cache-flush DMEM accesses */ +extern abe_uint32 abe_irq_aps_adaptation_id; +extern abe_uint32 abe_base_address_pingpong[MAX_PINGPONG_BUFFERS]; /* base addresses of the ping pong buffers */ +extern abe_uint32 abe_size_pingpong; /* size of each ping/pong buffers */ +extern abe_uint32 abe_nb_pingpong; /* number of ping/pong buffer being used */ + +extern abe_uint32 abe_irq_dbg_read_ptr; + +extern volatile abe_uint32 just_to_avoid_the_many_warnings; +extern volatile abe_gain_t just_to_avoid_the_many_warnings_abe_gain_t; +extern volatile abe_ramp_t just_to_avoid_the_many_warnings_abe_ramp_t; +extern volatile abe_dma_t just_to_avoid_the_many_warnings_abe_dma_t; +extern volatile abe_port_id just_to_avoid_the_many_warnings_abe_port_id; +extern volatile abe_millis_t just_to_avoid_the_many_warnings_abe_millis_t; +extern volatile abe_micros_t just_to_avoid_the_many_warnings_abe_micros_t; +extern volatile abe_patch_rev just_to_avoid_the_many_warnings_abe_patch_rev; +extern volatile abe_sequence_t just_to_avoid_the_many_warnings_abe_sequence_t; +extern volatile abe_ana_port_id just_to_avoid_the_many_warnings_abe_ana_port_id; +extern volatile abe_time_stamp_t just_to_avoid_the_many_warnings_abe_time_stamp_t; +extern volatile abe_data_format_t just_to_avoid_the_many_warnings_abe_data_format_t; +extern volatile abe_port_protocol_t just_to_avoid_the_many_warnings_abe_port_protocol_t; +extern volatile abe_router_t just_to_avoid_the_many_warnings_abe_router_t; +extern volatile abe_router_id just_to_avoid_the_many_warnings_abe_router_id; + +extern const abe_int32 abe_dmic_40[C_98_48_LP_Coefs_sizeof]; +extern const abe_int32 abe_dmic_32[C_98_48_LP_Coefs_sizeof]; +extern const abe_int32 abe_dmic_25[C_98_48_LP_Coefs_sizeof]; +extern const abe_int32 abe_dmic_16[C_98_48_LP_Coefs_sizeof]; + +extern const abe_uint32 abe_db2lin_table []; + +#ifdef __cplusplus +} +#endif + +#endif /* _ABE_REF_H_ */ diff --git a/sound/soc/codecs/abe/abe_seq.c b/sound/soc/codecs/abe/abe_seq.c new file mode 100644 index 000000000000..e042fb317eec --- /dev/null +++ b/sound/soc/codecs/abe/abe_seq.c @@ -0,0 +1,284 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#include "abe_main.h" + +/* + * SEQUENCES + * struct { + * micros_t time; Waiting time before executing next line + * seq_code_t code Subroutine index interpreted in the HAL and translated to + * FW subroutine codes in case of ABE tasks + * int32 param[2] Two parameters + * char param_tag[2] Flags used for parameters when launching the sequences + * } seq_t + * + */ + +/* + * ABE_NULL_SUBROUTINE + * + * Operations : nothing + */ +void abe_null_subroutine_0(void) { } +void abe_null_subroutine_2 (abe_uint32 a, abe_uint32 b) { + just_to_avoid_the_many_warnings = a; + just_to_avoid_the_many_warnings = b; +} +void abe_null_subroutine_4 (abe_uint32 a, abe_uint32 b, abe_uint32 c, abe_uint32 d) { + just_to_avoid_the_many_warnings = a; + just_to_avoid_the_many_warnings = b; + just_to_avoid_the_many_warnings = c; + just_to_avoid_the_many_warnings = d; +} +/* + * abe_init_subroutine_table + * + * parameter : + * none + * + * operations : + * initializes the default table of pointers to subroutines + * + * return value : + * + */ +void abe_init_subroutine_table(void) +{ + abe_uint32 id; + + /* reset the table's pointers */ + abe_subroutine_write_pointer = 0; + /* the first index is the NULL task */ + abe_add_subroutine(&id,(abe_subroutine2) abe_null_subroutine_2, SUB_0_PARAM, (abe_uint32*)0); + /* write mixer has 3 parameters @@@ TBD*/ + abe_add_subroutine(&(abe_subroutine_id[SUB_WRITE_MIXER]), (abe_subroutine2) abe_write_mixer, SUB_4_PARAM, (abe_uint32*)0); + /* ping-pong player IRQ */ + abe_add_subroutine(&abe_irq_pingpong_player_id,(abe_subroutine2) abe_null_subroutine_0, SUB_0_PARAM, (abe_uint32*)0); + abe_add_subroutine(&abe_irq_aps_adaptation_id,(abe_subroutine2) abe_default_irq_aps_adaptation, SUB_0_PARAM, (abe_uint32*)0); +} + +/* + * ABE_ADD_SUBROUTINE + * + * Parameter : + * port id + * pointer to the subroutines + * number of parameters to push on the stack before call + * + * Operations : + * add one function pointer more and returns the index to it + * + * Return value : + * + */ +void abe_add_subroutine (abe_uint32 *id, abe_subroutine2 f, abe_uint32 nparam, abe_uint32* params) +{ + abe_uint32 i, i_found; + + if ((abe_subroutine_write_pointer >= MAXNBSUBROUTINE) || ((abe_uint32)f == 0)) { + abe_dbg_param |= ERR_SEQ; + abe_dbg_error_log(ABE_PARAMETER_OVERFLOW); + } else { + /* search if this subroutine address was not already + * declared, then return the previous index + */ + for (i_found = abe_subroutine_write_pointer, i = 0; i < abe_subroutine_write_pointer; i++) { + if (f == abe_all_subsubroutine[i]) + i_found = i; + } + + if (i_found == abe_subroutine_write_pointer) { + *id = abe_subroutine_write_pointer; + abe_all_subsubroutine[abe_subroutine_write_pointer] = (f); + abe_all_subroutine_params[abe_subroutine_write_pointer] = params; + abe_all_subsubroutine_nparam[abe_subroutine_write_pointer] = nparam; + abe_subroutine_write_pointer++; + } else { + abe_all_subroutine_params[i_found] = params; + *id = i_found; + } + } +} + +/* + * ABE_ADD_SEQUENCE + * + * Parameter : + * Id: returned sequence index after pluging a new sequence (index in the tables) + * s : sequence to be inserted + * + * Operations : + * Load a time-sequenced operations. + * + * Return value : + * None. + */ + +void abe_add_sequence(abe_uint32 *id, abe_sequence_t *s) +{ + abe_seq_t *seq_src, *seq_dst; + abe_uint32 i, no_end_of_sequence_found; + + seq_src = &(s->seq1); + seq_dst = &((abe_all_sequence[abe_sequence_write_pointer]).seq1); + + if ((abe_sequence_write_pointer >= MAXNBSEQUENCE) || ((abe_uint32)s == 0)) { + abe_dbg_param |= ERR_SEQ; + abe_dbg_error_log(ABE_PARAMETER_OVERFLOW); + } else { + *id = abe_subroutine_write_pointer; + (abe_all_sequence[abe_sequence_write_pointer]).mask = s->mask; /* copy the mask */ + + for (no_end_of_sequence_found = 1, i = 0; i < MAXSEQUENCESTEPS; i++, seq_src++, seq_dst++) { + (*seq_dst) = (*seq_src); /* sequence copied line by line */ + + if ((*(abe_int32 *)seq_src) == -1) { + /* stop when the line start with time=(-1) */ + no_end_of_sequence_found = 0; + break; + } + } + abe_subroutine_write_pointer++; + + if (no_end_of_sequence_found) + abe_dbg_error_log(ABE_SEQTOOLONG); + } +} + +/* + * ABE_RESET_ONE_SEQUENCE + * + * Parameter : + * sequence ID + * + * Operations : + * load default configuration for that sequence + * kill running activities + * + * Return value : + * + */ +void abe_reset_one_sequence(abe_uint32 id) +{ + just_to_avoid_the_many_warnings = id; +} + +/* + * ABE_RESET_ALL_SEQUENCE + * + * Parameter : + * none + * + * Operations : + * load default configuration for all sequences + * kill any running activities + * + * Return value : + * + */ +void abe_reset_all_sequence(void) +{ + abe_uint32 i; + + abe_init_subroutine_table(); + + /* arrange to have the first sequence index=0 to the NULL operation sequence */ + abe_add_sequence(&i, (abe_sequence_t *)&seq_null); + + /* reset the the collision protection mask */ + abe_global_sequence_mask = 0; + + /* reset the pending sequences list */ + for (abe_nb_pending_sequences = i = 0; i < MAXNBSEQUENCE; i++) + abe_pending_sequences[i] = 0; +} + +/* + * ABE_CALL_SUBROUTINE + * + * Parameter : + * index to the table of all registered Call-backs and subroutines + * + * Operations : + * run and log a subroutine + * + * Return value : + * None. + */ +void abe_call_subroutine(abe_uint32 idx, abe_uint32 p1, abe_uint32 p2, abe_uint32 p3, abe_uint32 p4) +{ + abe_subroutine0 f0; + abe_subroutine1 f1; + abe_subroutine2 f2; + abe_subroutine3 f3; + abe_subroutine4 f4; + abe_uint32* params; + + if (idx >= MAXNBSUBROUTINE) + return; + + switch (idx) { +#if 0 + /* call the subroutines defined at compilation time (const .. sequences) */ + case SUB_WRITE_MIXER_DL1 : + /@@@@ abe_write_mixer_dl1 (p1, p2, p3) + abe_fprintf ("write_mixer"); + break; +#endif + /* call the subroutines defined at execution time (dynamic sequences) */ + default : + switch(abe_all_subsubroutine_nparam[idx]) { + case SUB_0_PARAM: + f0 = (abe_subroutine0)abe_all_subsubroutine[idx]; + (*f0)(); + break; + case SUB_1_PARAM: + f1 = (abe_subroutine1) abe_all_subsubroutine[idx]; + params = abe_all_subroutine_params[abe_irq_pingpong_player_id]; + if (params != (abe_uint32*)0) + p1 = params[0]; + (*f1) (p1); + break; + case SUB_2_PARAM: + f2 = abe_all_subsubroutine[idx]; + params = abe_all_subroutine_params[abe_irq_pingpong_player_id]; + if (params != (abe_uint32*)0) { + p1 = params[0]; + p2 = params[1]; + } + (*f2) (p1, p2); + break; + case SUB_3_PARAM: + f3 = (abe_subroutine3) abe_all_subsubroutine[idx]; + params = abe_all_subroutine_params[abe_irq_pingpong_player_id]; + if (params != (abe_uint32*)0) { + p1 = params[0]; + p2 = params[1]; + p3 = params[2]; + } + (*f3) (p1, p2, p3); + break; + case SUB_4_PARAM: + f4 = (abe_subroutine4) abe_all_subsubroutine[idx]; + params = abe_all_subroutine_params[abe_irq_pingpong_player_id]; + if (params != (abe_uint32*)0) { + p1 = params[0]; + p2 = params[1]; + p3 = params[2]; + p4 = params[3]; + } + (*f4) (p1, p2, p3, p4); + break; + default: + break; + } + } +} diff --git a/sound/soc/codecs/abe/abe_seq.h b/sound/soc/codecs/abe/abe_seq.h new file mode 100644 index 000000000000..6e15531e920e --- /dev/null +++ b/sound/soc/codecs/abe/abe_seq.h @@ -0,0 +1,127 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +void abe_init_subroutine_table(void); + +/* + * Register Programming Examples + * + * 1. Power on sequence + * + * The modules HSLDO, NCP, LSLDO, LPPLL are enabled/disabled automatically by the TWL6040 power state machine after pin AUDPWRON transitions from 0 ' 1. No register writes are necessary. + * + * For the purposes of test it is possible to bypass the power state machine and manually enable these modules in the same order as described in Fig 2-XX. This can be done after VIO comes up and I2C register writes are possible. + * + * The manual sequence could be as follows + * LDOCTL = 0x04 (Enable HSLDO) + * NCPCTL = 0x03 (Enable NCP in auto mode) + * LDOCTL = 0x05 (Enable LSLDO) + * LPPLLCTL = 0x09 (Enable LPPLL with output frequency = 19.2MHz) + * + * Please see Fig 2-64 for details on details to be maintained between successive I2C register writes. + * + * Further if the system MCLK is active the HPPLL could be enabled instead of the LPPLL. + * (a) For a square wave where slicer is not required + * HPPLLCTL = 0x11 (Select HPPLL output, Enable HPPLL) + * (a) For a sine wave where slicer is required + * HPPLLCTL = 0x19 (Select HPPLL output, Enable Slicer, Enable HPPLL) + * + */ + +/* + * 2. Setting up a stereo UPLINK path through MICAMPL, MICAMPR input amplifiers + * AMICBCTL = 0x10 + * MICGAIN = 0x0F (Gain to 24 dB for L and R) + * HPPLLCTL = 0x19 (Select HPPLL output, Enable Slicer, Enable HPPLL) + * MICLCTL = 0x0D (Select MMIC input, Enable ADC) + * MICRCTL = 0x0D (Select SMIC input, Enable ADC) + * + */ + +/* + * 3. Setting up a stereo headset MP3 playback DNLINK path + * Please see section 2.3.1.1 for details + * + * (b) HP + * HSGAIN = 0x22 (-4 dB gain on L and R amplifiers) + * HSLCTL = 0x01 (Enable HSDAC L, HP mode) + * HSRCTL = 0x01 (Enable HSDAC R, HP mode) + * Wait 80us + * HSLCTL = 0x05 (Enable HSLDRV, HP mode) + * HSRCTL = 0x05 (Enable HSRDRV, HP mode) + * Wait 2ms + * HSLCTL = 0x25 (Close HSDACL switch) + * HSRCTL = 0x25 (Close HSDACR switch) + * + */ + +/* + * (a) LP + * HSGAIN = 0x22 (-4 dB gain on L and R amplifiers) + * HSLCTL = 0x03 (Enable HSDAC L, LP mode) + * HSRCTL = 0x03 (Enable HSDAC R, LP mode) + * Wait 80us + * HSLCTL = 0x0F (Enable HSLDRV, LP mode) + * HSRCTL = 0x0F (Enable HSRDRV, LP mode) + * Wait 2ms + * HSLCTL = 0x2F (Close HSDACL switch) + * HSRCTL = 0x2F (Close HSDACR switch) + * + */ + +/* + * 4. Setting up a stereo FM playback path on headset + * (a) HP + * LINEGAIN = 0x1B (0dB gain on L and R inputs) + * MICLCTL = 0x02 (Enable Left LINEAMP) + * MICRCTL = 0x02 (Enable Right LINEAMP) + * HSGAIN = 0x22 (-4 dB gain on L and R amplifiers) + * HSLCTL = 0x04 (Enable HSLDRV in HP mode) + * HSRCTL = 0x04 (Enable HSRDRV in HP mode) + * Wait 2ms + * HSLCTL = 0x44 (Close FMLOOP switch) + * HSRCTL = 0x44 (Close FMLOOP switch) + * + * + */ + +/* + * (b) LP + * LINEGAIN = 0x1B (0dB gain on L and R inputs) + * MICLCTL = 0x02 (Enable Left LINEAMP) + * MICRCTL = 0x02 (Enable Right LINEAMP) + * HSGAIN = 0x22 (-4 dB gain on L and R amplifiers) + * HSLCTL = 0x0C (Enable HSLDRV in LP mode) + * HSRCTL = 0x0C (Enable HSRDRV in LP mode) + * Wait 2ms + * HSLCTL = 0x4C (Close FMLOOP switch) + * HSRCTL = 0x4C (Close FMLOOP switch) + * + */ + + +/* + * 5. Setting up a handset call + * + * UPLINK + * + * AMICBCTL = 0x10 + * MICGAIN = 0x0F (Gain to 24 dB for L and R) + * HPPLLCTL = 0x19 (Select HPPLL output, Enable Slicer, Enable HPPLL) + * MICLCTL = 0x0D (Select MMIC input, Enable ADC) + * MICRCTL = 0x0D (Select SMIC input, Enable ADC) + * + * DNLINK + * + * HSLCTL = 0x01 (Enable HSDACL, HP mode) + * Wait 80us + * EARCTL = 0x03 (Enable EAR, Gain = min, by default enabling EAR connects HSDACL output to EAR) + * + */ diff --git a/sound/soc/codecs/abe/abe_sm_addr.h b/sound/soc/codecs/abe/abe_sm_addr.h new file mode 100644 index 000000000000..ce5c9eef7ca2 --- /dev/null +++ b/sound/soc/codecs/abe/abe_sm_addr.h @@ -0,0 +1,630 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#ifndef _ABE_SM_ADDR_H_ +#define _ABE_SM_ADDR_H_ + +#define init_SM_ADDR 0 +#define init_SM_ADDR_END 284 +#define init_SM_sizeof 285 + +#define S_Data0_ADDR 285 +#define S_Data0_ADDR_END 285 +#define S_Data0_sizeof 1 + +#define S_Temp_ADDR 286 +#define S_Temp_ADDR_END 286 +#define S_Temp_sizeof 1 + +#define S_PhoenixOffset_ADDR 287 +#define S_PhoenixOffset_ADDR_END 287 +#define S_PhoenixOffset_sizeof 1 + +#define S_GTarget1_ADDR 288 +#define S_GTarget1_ADDR_END 294 +#define S_GTarget1_sizeof 7 + +#define S_Gtarget_DL1_ADDR 295 +#define S_Gtarget_DL1_ADDR_END 296 +#define S_Gtarget_DL1_sizeof 2 + +#define S_Gtarget_DL2_ADDR 297 +#define S_Gtarget_DL2_ADDR_END 298 +#define S_Gtarget_DL2_sizeof 2 + +#define S_Gtarget_Echo_ADDR 299 +#define S_Gtarget_Echo_ADDR_END 299 +#define S_Gtarget_Echo_sizeof 1 + +#define S_Gtarget_SDT_ADDR 300 +#define S_Gtarget_SDT_ADDR_END 300 +#define S_Gtarget_SDT_sizeof 1 + +#define S_Gtarget_VxRec_ADDR 301 +#define S_Gtarget_VxRec_ADDR_END 302 +#define S_Gtarget_VxRec_sizeof 2 + +#define S_Gtarget_UL_ADDR 303 +#define S_Gtarget_UL_ADDR_END 304 +#define S_Gtarget_UL_sizeof 2 + +#define S_Gtarget_unused_ADDR 305 +#define S_Gtarget_unused_ADDR_END 305 +#define S_Gtarget_unused_sizeof 1 + +#define S_GCurrent_ADDR 306 +#define S_GCurrent_ADDR_END 323 +#define S_GCurrent_sizeof 18 + +#define S_GAIN_ONE_ADDR 324 +#define S_GAIN_ONE_ADDR_END 324 +#define S_GAIN_ONE_sizeof 1 + +#define S_Tones_ADDR 325 +#define S_Tones_ADDR_END 336 +#define S_Tones_sizeof 12 + +#define S_VX_DL_ADDR 337 +#define S_VX_DL_ADDR_END 348 +#define S_VX_DL_sizeof 12 + +#define S_MM_UL2_ADDR 349 +#define S_MM_UL2_ADDR_END 360 +#define S_MM_UL2_sizeof 12 + +#define S_MM_DL_ADDR 361 +#define S_MM_DL_ADDR_END 372 +#define S_MM_DL_sizeof 12 + +#define S_DL1_M_Out_ADDR 373 +#define S_DL1_M_Out_ADDR_END 384 +#define S_DL1_M_Out_sizeof 12 + +#define S_DL2_M_Out_ADDR 385 +#define S_DL2_M_Out_ADDR_END 396 +#define S_DL2_M_Out_sizeof 12 + +#define S_Echo_M_Out_ADDR 397 +#define S_Echo_M_Out_ADDR_END 408 +#define S_Echo_M_Out_sizeof 12 + +#define S_SDT_M_Out_ADDR 409 +#define S_SDT_M_Out_ADDR_END 420 +#define S_SDT_M_Out_sizeof 12 + +#define S_VX_UL_ADDR 421 +#define S_VX_UL_ADDR_END 432 +#define S_VX_UL_sizeof 12 + +#define S_VX_UL_M_ADDR 433 +#define S_VX_UL_M_ADDR_END 444 +#define S_VX_UL_M_sizeof 12 + +#define S_BT_DL_ADDR 445 +#define S_BT_DL_ADDR_END 456 +#define S_BT_DL_sizeof 12 + +#define S_BT_UL_ADDR 457 +#define S_BT_UL_ADDR_END 468 +#define S_BT_UL_sizeof 12 + +#define S_BT_DL_8k_ADDR 469 +#define S_BT_DL_8k_ADDR_END 470 +#define S_BT_DL_8k_sizeof 2 + +#define S_BT_DL_16k_ADDR 471 +#define S_BT_DL_16k_ADDR_END 474 +#define S_BT_DL_16k_sizeof 4 + +#define S_BT_UL_8k_ADDR 475 +#define S_BT_UL_8k_ADDR_END 476 +#define S_BT_UL_8k_sizeof 2 + +#define S_BT_UL_16k_ADDR 477 +#define S_BT_UL_16k_ADDR_END 480 +#define S_BT_UL_16k_sizeof 4 + +#define S_BT_UL_8_48_BP_data_ADDR 481 +#define S_BT_UL_8_48_BP_data_ADDR_END 493 +#define S_BT_UL_8_48_BP_data_sizeof 13 + +#define S_BT_UL_8_48_LP_data_ADDR 494 +#define S_BT_UL_8_48_LP_data_ADDR_END 506 +#define S_BT_UL_8_48_LP_data_sizeof 13 + +#define S_BT_UL_16_48_HP_data_ADDR 507 +#define S_BT_UL_16_48_HP_data_ADDR_END 513 +#define S_BT_UL_16_48_HP_data_sizeof 7 + +#define S_BT_UL_16_48_LP_data_ADDR 514 +#define S_BT_UL_16_48_LP_data_ADDR_END 526 +#define S_BT_UL_16_48_LP_data_sizeof 13 + +#define S_BT_DL_48_8_BP_data_ADDR 527 +#define S_BT_DL_48_8_BP_data_ADDR_END 539 +#define S_BT_DL_48_8_BP_data_sizeof 13 + +#define S_BT_DL_48_8_LP_data_ADDR 540 +#define S_BT_DL_48_8_LP_data_ADDR_END 552 +#define S_BT_DL_48_8_LP_data_sizeof 13 + +#define S_BT_DL_48_16_HP_data_ADDR 553 +#define S_BT_DL_48_16_HP_data_ADDR_END 559 +#define S_BT_DL_48_16_HP_data_sizeof 7 + +#define S_BT_DL_48_16_LP_data_ADDR 560 +#define S_BT_DL_48_16_LP_data_ADDR_END 572 +#define S_BT_DL_48_16_LP_data_sizeof 13 + +#define S_SDT_F_ADDR 573 +#define S_SDT_F_ADDR_END 584 +#define S_SDT_F_sizeof 12 + +#define S_SDT_F_data_ADDR 585 +#define S_SDT_F_data_ADDR_END 593 +#define S_SDT_F_data_sizeof 9 + +#define S_MM_DL_OSR_ADDR 594 +#define S_MM_DL_OSR_ADDR_END 617 +#define S_MM_DL_OSR_sizeof 24 + +#define S_24_zeros_ADDR 618 +#define S_24_zeros_ADDR_END 641 +#define S_24_zeros_sizeof 24 + +#define S_DMIC1_ADDR 642 +#define S_DMIC1_ADDR_END 653 +#define S_DMIC1_sizeof 12 + +#define S_DMIC2_ADDR 654 +#define S_DMIC2_ADDR_END 665 +#define S_DMIC2_sizeof 12 + +#define S_DMIC3_ADDR 666 +#define S_DMIC3_ADDR_END 677 +#define S_DMIC3_sizeof 12 + +#define S_AMIC_ADDR 678 +#define S_AMIC_ADDR_END 689 +#define S_AMIC_sizeof 12 + +#define S_EANC_FBK_in_ADDR 690 +#define S_EANC_FBK_in_ADDR_END 713 +#define S_EANC_FBK_in_sizeof 24 + +#define S_EANC_FBK_out_ADDR 714 +#define S_EANC_FBK_out_ADDR_END 725 +#define S_EANC_FBK_out_sizeof 12 + +#define S_DMIC1_L_ADDR 726 +#define S_DMIC1_L_ADDR_END 737 +#define S_DMIC1_L_sizeof 12 + +#define S_DMIC1_R_ADDR 738 +#define S_DMIC1_R_ADDR_END 749 +#define S_DMIC1_R_sizeof 12 + +#define S_DMIC2_L_ADDR 750 +#define S_DMIC2_L_ADDR_END 761 +#define S_DMIC2_L_sizeof 12 + +#define S_DMIC2_R_ADDR 762 +#define S_DMIC2_R_ADDR_END 773 +#define S_DMIC2_R_sizeof 12 + +#define S_DMIC3_L_ADDR 774 +#define S_DMIC3_L_ADDR_END 785 +#define S_DMIC3_L_sizeof 12 + +#define S_DMIC3_R_ADDR 786 +#define S_DMIC3_R_ADDR_END 797 +#define S_DMIC3_R_sizeof 12 + +#define S_BT_UL_L_ADDR 798 +#define S_BT_UL_L_ADDR_END 809 +#define S_BT_UL_L_sizeof 12 + +#define S_BT_UL_R_ADDR 810 +#define S_BT_UL_R_ADDR_END 821 +#define S_BT_UL_R_sizeof 12 + +#define S_AMIC_L_ADDR 822 +#define S_AMIC_L_ADDR_END 833 +#define S_AMIC_L_sizeof 12 + +#define S_AMIC_R_ADDR 834 +#define S_AMIC_R_ADDR_END 845 +#define S_AMIC_R_sizeof 12 + +#define S_EANC_FBK_L_ADDR 846 +#define S_EANC_FBK_L_ADDR_END 857 +#define S_EANC_FBK_L_sizeof 12 + +#define S_EANC_FBK_R_ADDR 858 +#define S_EANC_FBK_R_ADDR_END 869 +#define S_EANC_FBK_R_sizeof 12 + +#define S_EchoRef_L_ADDR 870 +#define S_EchoRef_L_ADDR_END 881 +#define S_EchoRef_L_sizeof 12 + +#define S_EchoRef_R_ADDR 882 +#define S_EchoRef_R_ADDR_END 893 +#define S_EchoRef_R_sizeof 12 + +#define S_MM_DL_L_ADDR 894 +#define S_MM_DL_L_ADDR_END 905 +#define S_MM_DL_L_sizeof 12 + +#define S_MM_DL_R_ADDR 906 +#define S_MM_DL_R_ADDR_END 917 +#define S_MM_DL_R_sizeof 12 + +#define S_MM_UL_ADDR 918 +#define S_MM_UL_ADDR_END 1037 +#define S_MM_UL_sizeof 120 + +#define S_AMIC_96k_ADDR 1038 +#define S_AMIC_96k_ADDR_END 1061 +#define S_AMIC_96k_sizeof 24 + +#define S_DMIC0_96k_ADDR 1062 +#define S_DMIC0_96k_ADDR_END 1085 +#define S_DMIC0_96k_sizeof 24 + +#define S_DMIC1_96k_ADDR 1086 +#define S_DMIC1_96k_ADDR_END 1109 +#define S_DMIC1_96k_sizeof 24 + +#define S_DMIC2_96k_ADDR 1110 +#define S_DMIC2_96k_ADDR_END 1133 +#define S_DMIC2_96k_sizeof 24 + +#define S_UL_VX_UL_48_8K_ADDR 1134 +#define S_UL_VX_UL_48_8K_ADDR_END 1145 +#define S_UL_VX_UL_48_8K_sizeof 12 + +#define S_UL_VX_UL_48_16K_ADDR 1146 +#define S_UL_VX_UL_48_16K_ADDR_END 1157 +#define S_UL_VX_UL_48_16K_sizeof 12 + +#define S_UL_MIC_48K_ADDR 1158 +#define S_UL_MIC_48K_ADDR_END 1169 +#define S_UL_MIC_48K_sizeof 12 + +#define S_Voice_8k_UL_ADDR 1170 +#define S_Voice_8k_UL_ADDR_END 1172 +#define S_Voice_8k_UL_sizeof 3 + +#define S_Voice_8k_DL_ADDR 1173 +#define S_Voice_8k_DL_ADDR_END 1174 +#define S_Voice_8k_DL_sizeof 2 + +#define S_McPDM_Out1_ADDR 1175 +#define S_McPDM_Out1_ADDR_END 1198 +#define S_McPDM_Out1_sizeof 24 + +#define S_McPDM_Out2_ADDR 1199 +#define S_McPDM_Out2_ADDR_END 1222 +#define S_McPDM_Out2_sizeof 24 + +#define S_McPDM_Out3_ADDR 1223 +#define S_McPDM_Out3_ADDR_END 1246 +#define S_McPDM_Out3_sizeof 24 + +#define S_Voice_16k_UL_ADDR 1247 +#define S_Voice_16k_UL_ADDR_END 1251 +#define S_Voice_16k_UL_sizeof 5 + +#define S_Voice_16k_DL_ADDR 1252 +#define S_Voice_16k_DL_ADDR_END 1255 +#define S_Voice_16k_DL_sizeof 4 + +#define S_XinASRC_DL_VX_ADDR 1256 +#define S_XinASRC_DL_VX_ADDR_END 1295 +#define S_XinASRC_DL_VX_sizeof 40 + +#define S_XinASRC_UL_VX_ADDR 1296 +#define S_XinASRC_UL_VX_ADDR_END 1335 +#define S_XinASRC_UL_VX_sizeof 40 + +#define S_XinASRC_DL_MM_ADDR 1336 +#define S_XinASRC_DL_MM_ADDR_END 1375 +#define S_XinASRC_DL_MM_sizeof 40 + +#define S_VX_REC_ADDR 1376 +#define S_VX_REC_ADDR_END 1387 +#define S_VX_REC_sizeof 12 + +#define S_VX_REC_L_ADDR 1388 +#define S_VX_REC_L_ADDR_END 1399 +#define S_VX_REC_L_sizeof 12 + +#define S_VX_REC_R_ADDR 1400 +#define S_VX_REC_R_ADDR_END 1411 +#define S_VX_REC_R_sizeof 12 + +#define S_DL2_M_L_ADDR 1412 +#define S_DL2_M_L_ADDR_END 1423 +#define S_DL2_M_L_sizeof 12 + +#define S_DL2_M_R_ADDR 1424 +#define S_DL2_M_R_ADDR_END 1435 +#define S_DL2_M_R_sizeof 12 + +#define S_DL2_M_LR_EQ_data_ADDR 1436 +#define S_DL2_M_LR_EQ_data_ADDR_END 1460 +#define S_DL2_M_LR_EQ_data_sizeof 25 + +#define S_DL1_M_EQ_data_ADDR 1461 +#define S_DL1_M_EQ_data_ADDR_END 1485 +#define S_DL1_M_EQ_data_sizeof 25 + +#define S_VX_DL_8_48_BP_data_ADDR 1486 +#define S_VX_DL_8_48_BP_data_ADDR_END 1498 +#define S_VX_DL_8_48_BP_data_sizeof 13 + +#define S_VX_DL_8_48_LP_data_ADDR 1499 +#define S_VX_DL_8_48_LP_data_ADDR_END 1511 +#define S_VX_DL_8_48_LP_data_sizeof 13 + +#define S_EARP_48_96_LP_data_ADDR 1512 +#define S_EARP_48_96_LP_data_ADDR_END 1526 +#define S_EARP_48_96_LP_data_sizeof 15 + +#define S_IHF_48_96_LP_data_ADDR 1527 +#define S_IHF_48_96_LP_data_ADDR_END 1541 +#define S_IHF_48_96_LP_data_sizeof 15 + +#define S_VX_DL_16_48_HP_data_ADDR 1542 +#define S_VX_DL_16_48_HP_data_ADDR_END 1548 +#define S_VX_DL_16_48_HP_data_sizeof 7 + +#define S_VX_DL_16_48_LP_data_ADDR 1549 +#define S_VX_DL_16_48_LP_data_ADDR_END 1561 +#define S_VX_DL_16_48_LP_data_sizeof 13 + +#define S_VX_UL_48_8_BP_data_ADDR 1562 +#define S_VX_UL_48_8_BP_data_ADDR_END 1574 +#define S_VX_UL_48_8_BP_data_sizeof 13 + +#define S_VX_UL_48_8_LP_data_ADDR 1575 +#define S_VX_UL_48_8_LP_data_ADDR_END 1587 +#define S_VX_UL_48_8_LP_data_sizeof 13 + +#define S_VX_UL_8_TEMP_ADDR 1588 +#define S_VX_UL_8_TEMP_ADDR_END 1589 +#define S_VX_UL_8_TEMP_sizeof 2 + +#define S_VX_UL_48_16_HP_data_ADDR 1590 +#define S_VX_UL_48_16_HP_data_ADDR_END 1596 +#define S_VX_UL_48_16_HP_data_sizeof 7 + +#define S_VX_UL_48_16_LP_data_ADDR 1597 +#define S_VX_UL_48_16_LP_data_ADDR_END 1609 +#define S_VX_UL_48_16_LP_data_sizeof 13 + +#define S_VX_UL_16_TEMP_ADDR 1610 +#define S_VX_UL_16_TEMP_ADDR_END 1613 +#define S_VX_UL_16_TEMP_sizeof 4 + +#define S_EANC_IIR_data_ADDR 1614 +#define S_EANC_IIR_data_ADDR_END 1630 +#define S_EANC_IIR_data_sizeof 17 + +#define S_EANC_SignalTemp_ADDR 1631 +#define S_EANC_SignalTemp_ADDR_END 1651 +#define S_EANC_SignalTemp_sizeof 21 + +#define S_EANC_Input_ADDR 1652 +#define S_EANC_Input_ADDR_END 1652 +#define S_EANC_Input_sizeof 1 + +#define S_EANC_Output_ADDR 1653 +#define S_EANC_Output_ADDR_END 1653 +#define S_EANC_Output_sizeof 1 + +#define S_APS_IIRmem1_ADDR 1654 +#define S_APS_IIRmem1_ADDR_END 1662 +#define S_APS_IIRmem1_sizeof 9 + +#define S_APS_M_IIRmem2_ADDR 1663 +#define S_APS_M_IIRmem2_ADDR_END 1665 +#define S_APS_M_IIRmem2_sizeof 3 + +#define S_APS_C_IIRmem2_ADDR 1666 +#define S_APS_C_IIRmem2_ADDR_END 1668 +#define S_APS_C_IIRmem2_sizeof 3 + +#define S_APS_DL1_OutSamples_ADDR 1669 +#define S_APS_DL1_OutSamples_ADDR_END 1670 +#define S_APS_DL1_OutSamples_sizeof 2 + +#define S_APS_DL1_COIL_OutSamples_ADDR 1671 +#define S_APS_DL1_COIL_OutSamples_ADDR_END 1672 +#define S_APS_DL1_COIL_OutSamples_sizeof 2 + +#define S_APS_DL2_L_OutSamples_ADDR 1673 +#define S_APS_DL2_L_OutSamples_ADDR_END 1674 +#define S_APS_DL2_L_OutSamples_sizeof 2 + +#define S_APS_DL2_L_COIL_OutSamples_ADDR 1675 +#define S_APS_DL2_L_COIL_OutSamples_ADDR_END 1676 +#define S_APS_DL2_L_COIL_OutSamples_sizeof 2 + +#define S_APS_DL2_R_OutSamples_ADDR 1677 +#define S_APS_DL2_R_OutSamples_ADDR_END 1678 +#define S_APS_DL2_R_OutSamples_sizeof 2 + +#define S_APS_DL2_R_COIL_OutSamples_ADDR 1679 +#define S_APS_DL2_R_COIL_OutSamples_ADDR_END 1680 +#define S_APS_DL2_R_COIL_OutSamples_sizeof 2 + +#define S_XinASRC_ECHO_REF_ADDR 1681 +#define S_XinASRC_ECHO_REF_ADDR_END 1720 +#define S_XinASRC_ECHO_REF_sizeof 40 + +#define S_ECHO_REF_16K_ADDR 1721 +#define S_ECHO_REF_16K_ADDR_END 1725 +#define S_ECHO_REF_16K_sizeof 5 + +#define S_ECHO_REF_8K_ADDR 1726 +#define S_ECHO_REF_8K_ADDR_END 1728 +#define S_ECHO_REF_8K_sizeof 3 + +#define S_DL1_ADDR 1729 +#define S_DL1_ADDR_END 1740 +#define S_DL1_sizeof 12 + +#define S_APS_DL2_L_IIRmem1_ADDR 1741 +#define S_APS_DL2_L_IIRmem1_ADDR_END 1749 +#define S_APS_DL2_L_IIRmem1_sizeof 9 + +#define S_APS_DL2_R_IIRmem1_ADDR 1750 +#define S_APS_DL2_R_IIRmem1_ADDR_END 1758 +#define S_APS_DL2_R_IIRmem1_sizeof 9 + +#define S_APS_DL2_L_M_IIRmem2_ADDR 1759 +#define S_APS_DL2_L_M_IIRmem2_ADDR_END 1761 +#define S_APS_DL2_L_M_IIRmem2_sizeof 3 + +#define S_APS_DL2_R_M_IIRmem2_ADDR 1762 +#define S_APS_DL2_R_M_IIRmem2_ADDR_END 1764 +#define S_APS_DL2_R_M_IIRmem2_sizeof 3 + +#define S_APS_DL2_L_C_IIRmem2_ADDR 1765 +#define S_APS_DL2_L_C_IIRmem2_ADDR_END 1767 +#define S_APS_DL2_L_C_IIRmem2_sizeof 3 + +#define S_APS_DL2_R_C_IIRmem2_ADDR 1768 +#define S_APS_DL2_R_C_IIRmem2_ADDR_END 1770 +#define S_APS_DL2_R_C_IIRmem2_sizeof 3 + +#define S_DL1_APS_ADDR 1771 +#define S_DL1_APS_ADDR_END 1782 +#define S_DL1_APS_sizeof 12 + +#define S_DL2_L_APS_ADDR 1783 +#define S_DL2_L_APS_ADDR_END 1794 +#define S_DL2_L_APS_sizeof 12 + +#define S_DL2_R_APS_ADDR 1795 +#define S_DL2_R_APS_ADDR_END 1806 +#define S_DL2_R_APS_sizeof 12 + +#define S_ECHO_REF_48_8_BP_data_ADDR 1807 +#define S_ECHO_REF_48_8_BP_data_ADDR_END 1819 +#define S_ECHO_REF_48_8_BP_data_sizeof 13 + +#define S_ECHO_REF_48_8_LP_data_ADDR 1820 +#define S_ECHO_REF_48_8_LP_data_ADDR_END 1832 +#define S_ECHO_REF_48_8_LP_data_sizeof 13 + +#define S_ECHO_REF_48_16_HP_data_ADDR 1833 +#define S_ECHO_REF_48_16_HP_data_ADDR_END 1839 +#define S_ECHO_REF_48_16_HP_data_sizeof 7 + +#define S_ECHO_REF_48_16_LP_data_ADDR 1840 +#define S_ECHO_REF_48_16_LP_data_ADDR_END 1852 +#define S_ECHO_REF_48_16_LP_data_sizeof 13 + +#define S_APS_DL1_EQ_data_ADDR 1853 +#define S_APS_DL1_EQ_data_ADDR_END 1861 +#define S_APS_DL1_EQ_data_sizeof 9 + +#define S_APS_DL2_EQ_data_ADDR 1862 +#define S_APS_DL2_EQ_data_ADDR_END 1870 +#define S_APS_DL2_EQ_data_sizeof 9 + +#define S_DC_DCvalue_ADDR 1871 +#define S_DC_DCvalue_ADDR_END 1871 +#define S_DC_DCvalue_sizeof 1 + +#define S_VIBRA_ADDR 1872 +#define S_VIBRA_ADDR_END 1877 +#define S_VIBRA_sizeof 6 + +#define S_Vibra2_in_ADDR 1878 +#define S_Vibra2_in_ADDR_END 1883 +#define S_Vibra2_in_sizeof 6 + +#define S_Vibra2_addr_ADDR 1884 +#define S_Vibra2_addr_ADDR_END 1884 +#define S_Vibra2_addr_sizeof 1 + +#define S_VibraCtrl_forRightSM_ADDR 1885 +#define S_VibraCtrl_forRightSM_ADDR_END 1908 +#define S_VibraCtrl_forRightSM_sizeof 24 + +#define S_Rnoise_mem_ADDR 1909 +#define S_Rnoise_mem_ADDR_END 1909 +#define S_Rnoise_mem_sizeof 1 + +#define S_Ctrl_ADDR 1910 +#define S_Ctrl_ADDR_END 1927 +#define S_Ctrl_sizeof 18 + +#define S_Vibra1_in_ADDR 1928 +#define S_Vibra1_in_ADDR_END 1933 +#define S_Vibra1_in_sizeof 6 + +#define S_Vibra1_temp_ADDR 1934 +#define S_Vibra1_temp_ADDR_END 1957 +#define S_Vibra1_temp_sizeof 24 + +#define S_VibraCtrl_forLeftSM_ADDR 1958 +#define S_VibraCtrl_forLeftSM_ADDR_END 1981 +#define S_VibraCtrl_forLeftSM_sizeof 24 + +#define S_Vibra1_mem_ADDR 1982 +#define S_Vibra1_mem_ADDR_END 1992 +#define S_Vibra1_mem_sizeof 11 + +#define S_VibraCtrl_Stereo_ADDR 1993 +#define S_VibraCtrl_Stereo_ADDR_END 2016 +#define S_VibraCtrl_Stereo_sizeof 24 + +#define S_AMIC_96_48_data_ADDR 2017 +#define S_AMIC_96_48_data_ADDR_END 2035 +#define S_AMIC_96_48_data_sizeof 19 + +#define S_DMIC0_96_48_data_ADDR 2036 +#define S_DMIC0_96_48_data_ADDR_END 2054 +#define S_DMIC0_96_48_data_sizeof 19 + +#define S_DMIC1_96_48_data_ADDR 2055 +#define S_DMIC1_96_48_data_ADDR_END 2073 +#define S_DMIC1_96_48_data_sizeof 19 + +#define S_DMIC2_96_48_data_ADDR 2074 +#define S_DMIC2_96_48_data_ADDR_END 2092 +#define S_DMIC2_96_48_data_sizeof 19 + +#define S_EANC_FBK_96_48_data_ADDR 2093 +#define S_EANC_FBK_96_48_data_ADDR_END 2111 +#define S_EANC_FBK_96_48_data_sizeof 19 + +#define S_DBG_8K_PATTERN_ADDR 2112 +#define S_DBG_8K_PATTERN_ADDR_END 2119 +#define S_DBG_8K_PATTERN_sizeof 8 + +#define S_DBG_16K_PATTERN_ADDR 2120 +#define S_DBG_16K_PATTERN_ADDR_END 2135 +#define S_DBG_16K_PATTERN_sizeof 16 + +#define S_DBG_48K_PATTERN_ADDR 2136 +#define S_DBG_48K_PATTERN_ADDR_END 2159 +#define S_DBG_48K_PATTERN_sizeof 24 + +#define S_DBG_MCPDM_PATTERN_ADDR 2160 +#define S_DBG_MCPDM_PATTERN_ADDR_END 2231 +#define S_DBG_MCPDM_PATTERN_sizeof 72 + +#endif /* _ABESM_ADDR_H_ */ diff --git a/sound/soc/codecs/abe/abe_sys.h b/sound/soc/codecs/abe/abe_sys.h new file mode 100644 index 000000000000..f4d50d2132ff --- /dev/null +++ b/sound/soc/codecs/abe/abe_sys.h @@ -0,0 +1,9 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ diff --git a/sound/soc/codecs/abe/abe_taskId.h b/sound/soc/codecs/abe/abe_taskId.h new file mode 100644 index 000000000000..4f6ace57a021 --- /dev/null +++ b/sound/soc/codecs/abe/abe_taskId.h @@ -0,0 +1,129 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#ifndef _ABE_TASKID_H_ +#define _ABE_TASKID_H_ + +#define C_ABE_FW_TASK_DL1_APS_CORE 0 +#define C_ABE_FW_TASK_DL1_APS_COIL_CORE 1 +#define C_ABE_FW_TASK_DL2_L_APS_CORE 2 +#define C_ABE_FW_TASK_DL2_L_APS_COIL_CORE 3 +#define C_ABE_FW_TASK_DL2_R_APS_CORE 4 +#define C_ABE_FW_TASK_DL2_R_APS_COIL_CORE 5 +#define C_ABE_FW_TASK_ASRC_VX_DL_8 6 +#define C_ABE_FW_TASK_ASRC_VX_DL_16 7 +#define C_ABE_FW_TASK_ASRC_MM_DL 8 +#define C_ABE_FW_TASK_ASRC_VX_UL_8 9 +#define C_ABE_FW_TASK_ASRC_VX_UL_16 10 +#define C_ABE_FW_TASK_ASRC_ECHO_REF_8 11 +#define C_ABE_FW_TASK_ASRC_ECHO_REF_16 12 +#define C_ABE_FW_TASK_DC_REMOVAL2 13 +#define C_ABE_FW_TASK_VX_UL_48_8_DEC 14 +#define C_ABE_FW_TASK_VX_UL_48_16_DEC 15 +#define C_ABE_FW_TASK_BT_DL_48_8_DEC 16 +#define C_ABE_FW_TASK_BT_DL_48_16_DEC 17 +#define C_ABE_FW_TASK_ECHO_REF_48_8_DEC 18 +#define C_ABE_FW_TASK_ECHO_REF_48_16_DEC 19 +#define C_ABE_FW_TASK_DL2_EQ 20 +#define C_ABE_FW_TASK_DL2_L_APS_IIR 21 +#define C_ABE_FW_TASK_DL2_R_APS_IIR 22 +#define C_ABE_FW_TASK_DL2_APS_EQ 23 +#define C_ABE_FW_TASK_ECHO_REF_48_16 24 +#define C_ABE_FW_TASK_ECHO_REF_48_8 25 +#define C_ABE_FW_TASK_GAIN_UPDATE 26 +#define C_ABE_FW_TASK_SideTone 27 +#define C_ABE_FW_TASK_VX_DL_8_48_BP 28 +#define C_ABE_FW_TASK_VX_DL_8_48_LP 29 +#define C_ABE_FW_TASK_VX_DL_16_48_HP 30 +#define C_ABE_FW_TASK_VX_DL_16_48_LP 31 +#define C_ABE_FW_TASK_VX_UL_48_8_LP 32 +#define C_ABE_FW_TASK_VX_UL_48_8_BP 33 +#define C_ABE_FW_TASK_VX_UL_48_16_LP 34 +#define C_ABE_FW_TASK_VX_UL_48_16_HP 35 +#define C_ABE_FW_TASK_BT_UL_8_48_BP 36 +#define C_ABE_FW_TASK_BT_UL_8_48_LP 37 +#define C_ABE_FW_TASK_BT_UL_16_48_HP 38 +#define C_ABE_FW_TASK_BT_UL_16_48_LP 39 +#define C_ABE_FW_TASK_BT_DL_48_8_LP 40 +#define C_ABE_FW_TASK_BT_DL_48_8_BP 41 +#define C_ABE_FW_TASK_BT_DL_48_16_LP 42 +#define C_ABE_FW_TASK_BT_DL_48_16_HP 43 +#define C_ABE_FW_TASK_DL1_EQ 44 +#define C_ABE_FW_TASK_DL1_APS_IIR 45 +#define C_ABE_FW_TASK_ECHO_REF_48_8_LP 46 +#define C_ABE_FW_TASK_ECHO_REF_48_8_BP 47 +#define C_ABE_FW_TASK_ECHO_REF_48_16_LP 48 +#define C_ABE_FW_TASK_ECHO_REF_48_16_HP 49 +#define C_ABE_FW_TASK_DL1_APS_EQ 50 +#define C_ABE_FW_TASK_IHF_48_96_LP 51 +#define C_ABE_FW_TASK_EARP_48_96_LP 52 +#define C_ABE_FW_TASK_DL1_GAIN 53 +#define C_ABE_FW_TASK_DL2_GAIN 54 +#define C_ABE_FW_TASK_IO_PING_PONG 55 +#define C_ABE_FW_TASK_IO_DMIC 56 +#define C_ABE_FW_TASK_IO_PDM_UL 57 +#define C_ABE_FW_TASK_IO_BT_VX_UL 58 +#define C_ABE_FW_TASK_IO_MM_UL 59 +#define C_ABE_FW_TASK_IO_MM_UL2 60 +#define C_ABE_FW_TASK_IO_VX_UL 61 +#define C_ABE_FW_TASK_IO_MM_DL 62 +#define C_ABE_FW_TASK_IO_VX_DL 63 +#define C_ABE_FW_TASK_IO_TONES_DL 64 +#define C_ABE_FW_TASK_IO_VIB_DL 65 +#define C_ABE_FW_TASK_IO_BT_VX_DL 66 +#define C_ABE_FW_TASK_IO_PDM_DL 67 +#define C_ABE_FW_TASK_IO_MM_EXT_OUT 68 +#define C_ABE_FW_TASK_IO_MM_EXT_IN 69 +#define C_ABE_FW_TASK_DEBUG_IRQFIFO 70 +#define C_ABE_FW_TASK_EchoMixer 71 +#define C_ABE_FW_TASK_SDTMixer 72 +#define C_ABE_FW_TASK_DL1Mixer 73 +#define C_ABE_FW_TASK_DL2Mixer 74 +#define C_ABE_FW_TASK_VXRECMixer 75 +#define C_ABE_FW_TASK_ULMixer 76 +#define C_ABE_FW_TASK_VIBRA_PACK 77 +#define C_ABE_FW_TASK_VX_DL_8_48_0SR 78 +#define C_ABE_FW_TASK_VX_DL_16_48_0SR 79 +#define C_ABE_FW_TASK_BT_UL_8_48_0SR 80 +#define C_ABE_FW_TASK_BT_UL_16_48_0SR 81 +#define C_ABE_FW_TASK_IHF_48_96_0SR 82 +#define C_ABE_FW_TASK_EARP_48_96_0SR 83 +#define C_ABE_FW_TASK_AMIC_SPLIT 84 +#define C_ABE_FW_TASK_DMIC1_SPLIT 85 +#define C_ABE_FW_TASK_DMIC2_SPLIT 86 +#define C_ABE_FW_TASK_DMIC3_SPLIT 87 +#define C_ABE_FW_TASK_VXREC_SPLIT 88 +#define C_ABE_FW_TASK_BT_UL_SPLIT 89 +#define C_ABE_FW_TASK_MM_SPLIT 90 +#define C_ABE_FW_TASK_DL2_APS_SPLIT 91 +#define C_ABE_FW_TASK_VIBRA_SPLIT 92 +#define C_ABE_FW_TASK_EANC_FBK_SPLIT 93 +#define C_ABE_FW_TASK_VX_UL_ROUTING 94 +#define C_ABE_FW_TASK_MM_UL2_ROUTING 95 +#define C_ABE_FW_TASK_VIBRA1 96 +#define C_ABE_FW_TASK_VIBRA2 97 +#define C_ABE_FW_TASK_BT_UL_16_48 98 +#define C_ABE_FW_TASK_BT_UL_8_48 99 +#define C_ABE_FW_TASK_BT_DL_48_16 100 +#define C_ABE_FW_TASK_BT_DL_48_8 101 +#define C_ABE_FW_TASK_VX_DL_16_48 102 +#define C_ABE_FW_TASK_VX_DL_8_48 103 +#define C_ABE_FW_TASK_VX_UL_48_16 104 +#define C_ABE_FW_TASK_VX_UL_48_8 105 +#define C_ABE_FW_TASK_DBG_SYNC 106 +#define C_ABE_FW_TASK_APS_DL1_IRQs 107 +#define C_ABE_FW_TASK_APS_DL2_L_IRQs 108 +#define C_ABE_FW_TASK_APS_DL2_R_IRQs 109 +#define C_ABE_FW_TASK_AMIC_96_48_LP 110 +#define C_ABE_FW_TASK_DMIC1_96_48_LP 111 +#define C_ABE_FW_TASK_DMIC2_96_48_LP 112 +#define C_ABE_FW_TASK_DMIC3_96_48_LP 113 + +#endif /* _ABE_TASKID_H_ */ diff --git a/sound/soc/codecs/abe/abe_test.c b/sound/soc/codecs/abe/abe_test.c new file mode 100644 index 000000000000..4c7ea4a338fd --- /dev/null +++ b/sound/soc/codecs/abe/abe_test.c @@ -0,0 +1,866 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#include <stdio.h> +#include <stdlib.h> +#include <math.h> +#include "ABE_MAIN.h" +#include "ABE_DEF.h" + +void abe_test_scenario_1(void); +void abe_test_scenario_2(void); +void abe_test_scenario_3(void); +void abe_test_scenario_4(void); + +/* +* @fn ABE_TEST_SCENARIO() +*/ +void abe_test_scenario(abe_int32 scenario_id) +{ + switch (scenario_id) { + case 1: + abe_test_scenario_1(); + break; + case 2: + abe_test_scenario_2(); + break; + case 3: + abe_test_scenario_3(); + break; + case 4: + abe_test_scenario_4(); + break; + } +} + +/* +* @fn abe_test_read_time () +*/ +abe_uint32 abe_test_read_time(void) +{ + abe_uint32 time; + abe_block_copy(COPY_FROM_ABE_TO_HOST, ABE_DMEM, D_slotCounter_ADDR, + (abe_uint32*)&time, sizeof (time)); + return (time & 0xFFFF); +} + +/* +* @fn ABE_TEST_SCENARIO_1 () +* +* DMA AUDIO PLAYER + DMA VOICE CALL 16kHz +*/ +void abe_test_scenario_1(void) +{ + static abe_int32 time_offset, state; + abe_data_format_t format; + abe_dma_t dma_sink; + abe_uint32 current_time; + abe_use_case_id UC2[] = { + ABE_AUDIO_PLAYER_ON_HEADSET_OR_EARPHONE, + ABE_RINGER_TONES, + (abe_use_case_id)0 + }; + // abe_use_case_id UC5[] = {ABE_AUDIO_PLAYER_ON_HEADSET_OR_EARPHONE, (abe_use_case_id)0}; + abe_opp_t OPP; + abe_hw_config_init_t CONFIG; + + /* Scenario 1- 16kHz first */ + switch (state) { + case 0: + state ++; + time_offset = abe_test_read_time(); + abe_reset_hal(); + abe_load_fw(); + + /* check HW config and OPP config */ + abe_read_hardware_configuration(UC2, &OPP, &CONFIG); + /* sets the OPP100 on FW05.xx */ + abe_set_opp_processing(OPP); + /* "tick" of the audio engine */ + abe_write_event_generator(CONFIG.HAL_EVENT_SELECTION); + + abe_set_router_configuration(UPROUTE, UPROUTE_CONFIG_AMIC, + (abe_router_t *) abe_router_ul_table_preset[UPROUTE_CONFIG_BT]); + + format.f = 48000; + format.samp_format = SIX_MSB; + abe_connect_cbpr_dmareq_port(MM_UL_PORT, &format, ABE_CBPR3_IDX, &dma_sink); + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(MM_UL2_PORT, &format, ABE_CBPR4_IDX, &dma_sink); + format.f = 8000; + format.samp_format = MONO_MSB; + abe_connect_cbpr_dmareq_port(VX_UL_PORT, &format, ABE_CBPR2_IDX, &dma_sink); + /* enable all DMIC aquisition */ + abe_enable_data_transfer(MM_UL_PORT); + /* enable large-band DMIC aquisition */ + abe_enable_data_transfer(MM_UL2_PORT); + abe_enable_data_transfer(VX_UL_PORT); + + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(TONES_DL_PORT, &format, ABE_CBPR5_IDX, &dma_sink); + format.f = 8000; + format.samp_format = MONO_MSB; + abe_connect_cbpr_dmareq_port(VX_DL_PORT, &format, ABE_CBPR1_IDX, &dma_sink); + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(MM_DL_PORT, &format, ABE_CBPR0_IDX, &dma_sink); + format.f = 24000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(VIB_DL_PORT, &format, ABE_CBPR6_IDX, &dma_sink); + abe_enable_data_transfer(TONES_DL_PORT); + abe_enable_data_transfer(VX_DL_PORT); + /* enable all the data paths */ + abe_enable_data_transfer(MM_DL_PORT); + abe_enable_data_transfer(VIB_DL_PORT); + + /* SERIAL PORTS TEST */ + format.f = 8000; + format.samp_format = MONO_MSB; + abe_connect_serial_port(BT_VX_UL_PORT, &format, MCBSP1_RX); + format.f = 8000; + format.samp_format = MONO_RSHIFTED_16; + abe_connect_serial_port(BT_VX_DL_PORT, &format, MCBSP1_TX); + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_serial_port(MM_EXT_IN_PORT, &format, MCBSP2_RX); + format.f = 48000; + format.samp_format = MONO_RSHIFTED_16; + abe_connect_serial_port(MM_EXT_OUT_PORT, &format, MCBSP2_TX); + abe_enable_data_transfer(BT_VX_UL_PORT); + abe_enable_data_transfer(BT_VX_DL_PORT); + abe_enable_data_transfer(MM_EXT_IN_PORT); + abe_enable_data_transfer(MM_EXT_OUT_PORT); + + /* DMIC ATC can be enabled even if the DMIC */ + abe_enable_data_transfer(DMIC_PORT); + abe_enable_data_transfer(PDM_DL_PORT); + abe_enable_data_transfer(PDM_UL_PORT); + + /* mixers' configuration = voice on earphone + music on hands-free path */ + abe_write_mixer(MIXDL1, GAIN_0dB, RAMP_0MS, MIX_DL1_INPUT_MM_DL); + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_0MS, MIX_DL1_INPUT_MM_UL2); + abe_write_mixer(MIXDL1, GAIN_0dB, RAMP_0MS, MIX_DL1_INPUT_VX_DL); + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_0MS, MIX_DL1_INPUT_TONES); + + abe_write_mixer(MIXDL2, GAIN_0dB, RAMP_0MS, MIX_DL2_INPUT_TONES); + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_0MS, MIX_DL2_INPUT_VX_DL); + abe_write_mixer(MIXDL2, GAIN_0dB, RAMP_0MS, MIX_DL2_INPUT_MM_DL); + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_0MS, MIX_DL2_INPUT_MM_UL2); + + abe_write_mixer(MIXSDT, MUTE_GAIN, RAMP_0MS, MIX_SDT_INPUT_UP_MIXER); + abe_write_mixer(MIXSDT, GAIN_0dB, RAMP_0MS, MIX_SDT_INPUT_DL1_MIXER); + + abe_write_mixer(MIXECHO, GAIN_0dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_mixer(MIXECHO, GAIN_0dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + + abe_write_mixer(MIXAUDUL, MUTE_GAIN, RAMP_0MS, MIX_AUDUL_INPUT_MM_DL); + abe_write_mixer(MIXAUDUL, MUTE_GAIN, RAMP_0MS, MIX_AUDUL_INPUT_TONES); + abe_write_mixer(MIXAUDUL, GAIN_0dB, RAMP_0MS, MIX_AUDUL_INPUT_UPLINK); + abe_write_mixer(MIXAUDUL, MUTE_GAIN, RAMP_0MS, MIX_AUDUL_INPUT_VX_DL); + + abe_write_mixer(MIXVXREC, MUTE_GAIN, RAMP_0MS, MIX_VXREC_INPUT_TONES); + abe_write_mixer(MIXVXREC, GAIN_M6dB, RAMP_0MS, MIX_VXREC_INPUT_VX_DL); + abe_write_mixer(MIXVXREC, MUTE_GAIN, RAMP_0MS, MIX_VXREC_INPUT_MM_DL); + abe_write_mixer(MIXVXREC, GAIN_M6dB, RAMP_0MS, MIX_VXREC_INPUT_VX_UL); + break; + case 1: + current_time = abe_test_read_time(); + if ((current_time - time_offset) < 100) + break; + else + state ++; + break; + case 2: + current_time = abe_test_read_time(); + if ((current_time - time_offset) < 100000) + break; + else + state ++; // Internal buffer analysis + break; + default: + state = 0; + break; + } +} + +/* +* @fn ABE_TEST_SCENARIO_2 () +* +* DMA AUDIO PLAYER + DMA VOICE CALL 8kHz +*/ +void abe_test_scenario_2 (void) +{ + static abe_int32 time_offset, state; + abe_data_format_t format; + abe_dma_t dma_sink; + abe_uint32 current_time; + abe_use_case_id UC2[] = {ABE_AUDIO_PLAYER_ON_HEADSET_OR_EARPHONE, ABE_RINGER_TONES, (abe_use_case_id)0}; + abe_opp_t OPP; + abe_hw_config_init_t CONFIG; + + /* Scenario 1- 16kHz first */ + switch (state) + { + case 0: + state ++; + + time_offset = abe_test_read_time(); + abe_reset_hal(); + abe_load_fw(); + + /* check HW config and OPP config */ + abe_read_hardware_configuration(UC2, &OPP, &CONFIG); + abe_set_opp_processing(OPP); /* sets the OPP100 on FW05.xx */ + /* "tick" of the audio engine */ + abe_write_event_generator(CONFIG.HAL_EVENT_SELECTION); + + abe_set_router_configuration(UPROUTE, + UPROUTE_CONFIG_AMIC, + (abe_router_t *) abe_router_ul_table_preset[UPROUTE_CONFIG_AMIC]); + + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(MM_UL_PORT, &format, ABE_CBPR3_IDX, &dma_sink); + + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(MM_UL2_PORT, &format, ABE_CBPR4_IDX, &dma_sink); + format.f = 8000; + format.samp_format = MONO_MSB; + abe_connect_cbpr_dmareq_port(VX_UL_PORT, &format, ABE_CBPR2_IDX, &dma_sink); + abe_enable_data_transfer(MM_UL_PORT); /* enable all DMIC aquisition */ + abe_enable_data_transfer(MM_UL2_PORT); /* enable large-band DMIC aquisition */ + abe_enable_data_transfer(VX_UL_PORT); + + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(TONES_DL_PORT, &format, ABE_CBPR5_IDX, &dma_sink); + format.f = 8000; + format.samp_format = MONO_MSB; + abe_connect_cbpr_dmareq_port(VX_DL_PORT, &format, ABE_CBPR1_IDX, &dma_sink); + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(MM_DL_PORT, &format, ABE_CBPR0_IDX, &dma_sink); + format.f = 24000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(VIB_DL_PORT,&format, ABE_CBPR6_IDX, &dma_sink); + abe_enable_data_transfer(TONES_DL_PORT); + abe_enable_data_transfer(VX_DL_PORT); + abe_enable_data_transfer(MM_DL_PORT); /* enable all the data paths */ + abe_enable_data_transfer(VIB_DL_PORT); + + abe_enable_data_transfer(DMIC_PORT); /* DMIC ATC can be enabled even if the DMIC */ + abe_enable_data_transfer(PDM_DL_PORT); + abe_enable_data_transfer(PDM_UL_PORT); + + /* mixers' configuration = voice on earphone + music on hands-free path */ + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_0MS, MIX_DL1_INPUT_TONES); + abe_write_mixer(MIXDL1, GAIN_M6dB, RAMP_0MS, MIX_DL1_INPUT_VX_DL); + abe_write_mixer(MIXDL1, GAIN_M6dB, RAMP_0MS, MIX_DL1_INPUT_MM_DL); + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_0MS, MIX_DL1_INPUT_MM_UL2); + + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_0MS, MIX_DL2_INPUT_TONES); + abe_write_mixer(MIXDL2, GAIN_M6dB, RAMP_0MS, MIX_DL2_INPUT_VX_DL); + abe_write_mixer(MIXDL2, GAIN_M6dB, RAMP_0MS, MIX_DL2_INPUT_MM_DL); + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_0MS, MIX_DL2_INPUT_MM_UL2); + + abe_write_mixer(MIXSDT, MUTE_GAIN, RAMP_0MS, MIX_SDT_INPUT_UP_MIXER); + abe_write_mixer(MIXSDT, GAIN_0dB, RAMP_0MS, MIX_SDT_INPUT_DL1_MIXER); + + abe_write_mixer(MIXECHO, GAIN_0dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_mixer(MIXECHO, GAIN_0dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + + abe_write_mixer(MIXAUDUL, MUTE_GAIN, RAMP_0MS, MIX_AUDUL_INPUT_TONES); + abe_write_mixer(MIXAUDUL, GAIN_0dB, RAMP_0MS, MIX_AUDUL_INPUT_UPLINK); + abe_write_mixer(MIXAUDUL, MUTE_GAIN, RAMP_0MS, MIX_AUDUL_INPUT_MM_DL); + abe_write_mixer(MIXAUDUL, MUTE_GAIN, RAMP_0MS, MIX_AUDUL_INPUT_VX_DL); + + abe_write_mixer(MIXVXREC, MUTE_GAIN, RAMP_0MS, MIX_VXREC_INPUT_TONES); + abe_write_mixer(MIXVXREC, GAIN_M6dB, RAMP_0MS, MIX_VXREC_INPUT_VX_DL); + abe_write_mixer(MIXVXREC, MUTE_GAIN, RAMP_0MS, MIX_VXREC_INPUT_MM_DL); + abe_write_mixer(MIXVXREC, GAIN_M6dB, RAMP_0MS, MIX_VXREC_INPUT_VX_UL); + break; + case 1: + current_time = abe_test_read_time(); + if ((current_time - time_offset) < 100) + break; + else + state ++; + break; + case 2: + current_time = abe_test_read_time(); + if ((current_time - time_offset) < 100000) + break; + else + state ++; + break; + default: + state = 0; + break; + } +} +/** +* @fn ABE_TEST_SCENARIO_3 () +* +* IRQ AUDIO PLAYER 44100Hz OPP 25% +*/ +void abe_test_scenario_3 (void) +{ + static abe_int32 time_offset, state, gain=0x040000, i; + abe_data_format_t format; + abe_uint32 data_sink; + abe_use_case_id UC2[] = {ABE_AUDIO_PLAYER_ON_HEADSET_OR_EARPHONE, ABE_RINGER_TONES, (abe_use_case_id)0}; + // abe_use_case_id UC5[] = {ABE_AUDIO_PLAYER_ON_HEADSET_OR_EARPHONE, (abe_use_case_id)0}; + abe_opp_t OPP; + abe_hw_config_init_t CONFIG; + + /* Scenario 1- 16kHz first */ + switch (state) { + case 0: + state ++; + time_offset = abe_test_read_time(); + abe_reset_hal(); + abe_load_fw(); + + abe_read_hardware_configuration(UC2, &OPP, &CONFIG); /* check HW config and OPP config */ + abe_set_opp_processing(ABE_OPP25); /* sets the OPP25 on FW05.xx */ + abe_write_event_generator(EVENT_44100); /* "tick" of the audio engine */ + + /* connect a Ping-Pong cache-flush protocol to MM_DL port */ +#define N_SAMPLES_BYTES (25 *8) /* half-buffer size in bytes, 32/32 data format */ + format.f = 44100; + format.samp_format = STEREO_MSB; + abe_add_subroutine(&abe_irq_pingpong_player_id, + (abe_subroutine2) abe_default_irq_pingpong_player_32bits, + SUB_0_PARAM, (abe_uint32*)0); + + abe_connect_irq_ping_pong_port(MM_DL_PORT, &format, + abe_irq_pingpong_player_id, N_SAMPLES_BYTES, + &data_sink, PING_PONG_WITH_MCU_IRQ); + + abe_enable_data_transfer(MM_DL_PORT); /* enable all the data paths */ + abe_enable_data_transfer(PDM_DL_PORT); + + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_serial_port(MM_EXT_OUT_PORT, &format, MCBSP2_TX); + abe_enable_data_transfer(MM_EXT_OUT_PORT); + + /* mixers' configuration */ + abe_write_mixer(MIXDL1, GAIN_0dB, RAMP_0MS, MIX_DL1_INPUT_TONES); + abe_write_mixer(MIXDL1, GAIN_0dB, RAMP_0MS, MIX_DL1_INPUT_MM_DL); + break; + } +} +/** +* @fn ABE_TEST_SCENARIO_4 () +* +* DMA AUDIO PLAYER + DMA VOICE CALL 8kHz OPP 50% +*/ +void abe_test_scenario_4 (void) +{ + static abe_int32 time_offset, state; + abe_data_format_t format; + abe_dma_t dma_sink; + abe_uint32 current_time; + abe_use_case_id UC2[] = { + ABE_AUDIO_PLAYER_ON_HEADSET_OR_EARPHONE, + ABE_RINGER_TONES, + (abe_use_case_id)0 + }; + // abe_use_case_id UC5[] = {ABE_AUDIO_PLAYER_ON_HEADSET_OR_EARPHONE, (abe_use_case_id)0}; + abe_opp_t OPP; + abe_hw_config_init_t CONFIG; + + /* Scenario 1- 16kHz first */ + switch (state) { + case 0: + state ++; + time_offset = abe_test_read_time(); + + /* check HW config and OPP config */ + abe_read_hardware_configuration(UC2, &OPP, &CONFIG); + /* sets the OPP100 on FW05.xx */ + abe_set_opp_processing(OPP); + /* "tick" of the audio engine */ + abe_write_event_generator(CONFIG.HAL_EVENT_SELECTION); + + abe_set_router_configuration(UPROUTE, UPROUTE_CONFIG_AMIC, + (abe_router_t *) abe_router_ul_table_preset[UPROUTE_CONFIG_AMIC]); + + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(MM_UL_PORT, &format, ABE_CBPR3_IDX, &dma_sink); + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(MM_UL2_PORT, &format, ABE_CBPR4_IDX, &dma_sink); + format.f = 8000; + format.samp_format = MONO_MSB; + abe_connect_cbpr_dmareq_port(VX_UL_PORT, &format, ABE_CBPR2_IDX, &dma_sink); + /* enable all DMIC aquisition */ + abe_enable_data_transfer(MM_UL_PORT); + /* enable large-band DMIC aquisition */ + abe_enable_data_transfer(MM_UL2_PORT); + abe_enable_data_transfer(VX_UL_PORT); + + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(TONES_DL_PORT, &format, ABE_CBPR5_IDX, &dma_sink); + format.f = 8000; + format.samp_format = MONO_MSB; + abe_connect_cbpr_dmareq_port(VX_DL_PORT, &format, ABE_CBPR1_IDX, &dma_sink); + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(MM_DL_PORT, &format, ABE_CBPR0_IDX, &dma_sink); + format.f = 24000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(VIB_DL_PORT, &format, ABE_CBPR6_IDX, &dma_sink); + abe_enable_data_transfer(TONES_DL_PORT); + abe_enable_data_transfer(VX_DL_PORT); + /* enable all the data paths */ + abe_enable_data_transfer(MM_DL_PORT); + abe_enable_data_transfer(VIB_DL_PORT); + + /* DMIC ATC can be enabled even if the DMIC */ + abe_enable_data_transfer(DMIC_PORT); + abe_enable_data_transfer(PDM_DL_PORT); + abe_enable_data_transfer(PDM_UL_PORT); + + /* mixers' configuration = voice on earphone + music on hands-free path */ + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_0MS, MIX_DL1_INPUT_TONES); + abe_write_mixer(MIXDL1, GAIN_M6dB, RAMP_0MS, MIX_DL1_INPUT_VX_DL); + abe_write_mixer(MIXDL1, GAIN_M6dB, RAMP_0MS, MIX_DL1_INPUT_MM_DL); + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_0MS, MIX_DL1_INPUT_MM_UL2); + + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_0MS, MIX_DL2_INPUT_TONES); + abe_write_mixer(MIXDL2, GAIN_M6dB, RAMP_0MS, MIX_DL2_INPUT_VX_DL); + abe_write_mixer(MIXDL2, GAIN_M6dB, RAMP_0MS, MIX_DL2_INPUT_MM_DL); + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_0MS, MIX_DL2_INPUT_MM_UL2); + + abe_write_mixer(MIXSDT, MUTE_GAIN, RAMP_0MS, MIX_SDT_INPUT_UP_MIXER); + abe_write_mixer(MIXSDT, GAIN_0dB, RAMP_0MS, MIX_SDT_INPUT_DL1_MIXER); + + abe_write_mixer(MIXECHO, GAIN_0dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_mixer(MIXECHO, GAIN_0dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + + abe_write_mixer(MIXAUDUL, MUTE_GAIN, RAMP_0MS, MIX_AUDUL_INPUT_TONES); + abe_write_mixer(MIXAUDUL, GAIN_0dB, RAMP_0MS, MIX_AUDUL_INPUT_UPLINK); + abe_write_mixer(MIXAUDUL, MUTE_GAIN, RAMP_0MS, MIX_AUDUL_INPUT_MM_DL); + abe_write_mixer(MIXAUDUL, MUTE_GAIN, RAMP_0MS, MIX_AUDUL_INPUT_VX_DL); + + abe_write_mixer(MIXVXREC, MUTE_GAIN, RAMP_0MS, MIX_VXREC_INPUT_TONES); + abe_write_mixer(MIXVXREC, GAIN_M6dB, RAMP_0MS, MIX_VXREC_INPUT_VX_DL); + abe_write_mixer(MIXVXREC, MUTE_GAIN, RAMP_0MS, MIX_VXREC_INPUT_MM_DL); + abe_write_mixer(MIXVXREC, GAIN_M6dB, RAMP_0MS, MIX_VXREC_INPUT_VX_UL); + + abe_write_gain(GAINS_DMIC1, GAIN_0dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_DMIC1, GAIN_0dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + abe_write_gain(GAINS_DMIC2, GAIN_0dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_DMIC2, GAIN_0dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + abe_write_gain(GAINS_DMIC3, GAIN_0dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_DMIC3, GAIN_0dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + abe_write_gain(GAINS_AMIC, GAIN_0dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_AMIC, GAIN_0dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + + abe_write_gain(GAINS_SPLIT , GAIN_0dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_SPLIT, GAIN_0dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + //abe_write_gain(GAINS_EANC , GAIN_0dB, RAMP_0MS, GAIN_LEFT_OFFSET); + //abe_write_gain(GAINS_EANC, GAIN_0dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + abe_write_gain(GAINS_DL1, GAIN_0dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_DL1, GAIN_0dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + abe_write_gain(GAINS_DL2, GAIN_0dB, RAMP_0MS, GAIN_LEFT_OFFSET); + abe_write_gain(GAINS_DL2, GAIN_0dB, RAMP_0MS, GAIN_RIGHT_OFFSET); + break; + case 1: + current_time = abe_test_read_time(); + if ((current_time - time_offset) < 100) + break; + else + state ++; /* Gains switch */ + break; + case 2: + current_time = abe_test_read_time(); + if ((current_time - time_offset) < 100000) + break; + else + state ++; /* Internal buffer analysis */ + break; + default: + state = 0; + break; + } +} + +#if 0 + + /* + * build the default uplink router configurations + */ + abe_set_router_configuration(UPROUTE, UPROUTE_CONFIG_AMIC, + (abe_router_t *) abe_router_ul_table_preset[UPROUTE_CONFIG_AMIC]); +#if 0 + abe_set_router_configuration(UPROUTE, UPROUTE_CONFIG_DMIC1, + (abe_router_t *) abe_router_ul_table_preset[UPROUTE_CONFIG_DMIC1]); + abe_set_router_configuration(UPROUTE, UPROUTE_CONFIG_DMIC2, + (abe_router_t *) abe_router_ul_table_preset[UPROUTE_CONFIG_DMIC2]); + abe_set_router_configuration(UPROUTE, UPROUTE_CONFIG_DMIC3, + (abe_router_t *) abe_router_ul_table_preset[UPROUTE_CONFIG_DMIC3]); +#endif + /* meaningful other microphone configuration can be added here */ + /* init hardware components */ + abe_hw_configuration(); + + /* enable the VX_UL path with Analog microphones from Phoenix */ + /* MM_DL INIT + connect a DMA channel to MM_DL port (ATC FIFO) */ + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(MM_DL_PORT, &format, ABE_CBPR0_IDX, &dma_sink); + + /* VX_DL INIT + connect a DMA channel to VX_DL port (ATC FIFO) */ + format.f = 16000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(VX_DL_PORT, &format, ABE_CBPR1_IDX, &dma_sink); + + /* VX_UL INIT + connect a DMA channel to VX_UL port (ATC FIFO) */ + format.f = 16000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(VX_UL_PORT, &format, ABE_CBPR2_IDX, &dma_sink); + + /* MM_UL2 INIT + connect a DMA channel to MM_UL2 port (ATC FIFO) */ + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(MM_UL2_PORT, &format, ABE_CBPR4_IDX, &dma_sink); + + /* MM_UL INIT + connect a DMA channel to MM_UL port (ATC FIFO) */ + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(MM_UL_PORT, &format, ABE_CBPR3_IDX, &dma_sink); + + /* TONES INIT + connect a DMA channel to TONES port (ATC FIFO) */ + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(TONES_DL_PORT, &format, ABE_CBPR5_IDX, &dma_sink); + + /* VIBRA/HAPTICS INIT + connect a DMA channel to VIBRA/HAPTICS port (ATC FIFO) */ + format.f = 24000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(VIB_DL_PORT, &format, ABE_CBPR6_IDX, &dma_sink); + + /* mixers' default configuration = voice on earphone + music on hands-free path */ + case 2: + /* Scenario 2- 8kHz first */ + switch (time10us) { + case 1: + /* check HW config and OPP config */ + abe_read_hardware_configuration(UC2, &OPP, &CONFIG); + /* sets the OPP100 on FW05.xx */ + abe_set_opp_processing(OPP); + /* "tick" of the audio engine */ + abe_write_event_generator(CONFIG.HAL_EVENT_SELECTION); + // enables VOICECALL-MMDL-MMUL-8/16kHz-ROUTING + abe_reset_hal(); + format.f = 8000; + format.samp_format = MONO_MSB; + abe_connect_cbpr_dmareq_port(VX_DL_PORT, &format, ABE_CBPR1_IDX, &dma_sink); + format.f = 8000; + format.samp_format = MONO_MSB; + abe_connect_cbpr_dmareq_port(VX_UL_PORT, &format, ABE_CBPR2_IDX, &dma_sink); + + abe_write_mixer(MIXDL1, GAIN_0dB, RAMP_1MS, MIX_DL1_INPUT_VX_DL); + abe_write_mixer(MIXDL2, GAIN_0dB, RAMP_50MS, MIX_DL2_INPUT_MM_DL); + + /* enable large-band DMIC aquisition */ + abe_enable_data_transfer(MM_UL2_PORT); + /* enable all DMIC aquisition */ + abe_enable_data_transfer(MM_UL_PORT); + /* enable all the data paths */ + abe_enable_data_transfer(MM_DL_PORT); + abe_enable_data_transfer(VX_DL_PORT); + abe_enable_data_transfer(VX_UL_PORT); + abe_enable_data_transfer(PDM_UL_PORT); + /* DMIC ATC can be enabled even if the DMIC */ + abe_enable_data_transfer(DMIC_PORT); + abe_enable_data_transfer(PDM_DL_PORT); + abe_enable_data_transfer(TONES_DL_PORT); + break; + case 100: + abe_write_mixer(MIXDL1, GAIN_M6dB, RAMP_0MS, MIX_DL1_INPUT_TONES); + abe_write_mixer(MIXDL1, GAIN_M6dB, RAMP_1MS, MIX_DL1_INPUT_VX_DL); + abe_write_mixer(MIXDL1, GAIN_M6dB, RAMP_2MS, MIX_DL1_INPUT_MM_DL); + abe_write_mixer(MIXDL1, GAIN_M6dB, RAMP_5MS, MIX_DL1_INPUT_MM_UL2); + break; + case 1200: + abe_set_router_configuration(UPROUTE, UPROUTE_CONFIG_DMIC1, + (abe_router_t *) abe_router_ul_table_preset[UPROUTE_CONFIG_DMIC1]); + break; + case 8000: // end + fcloseall(); + exit(-2); + } + /* case scenario_id ==2 */ + break; + case 3: + /* Scenario 3 PING-PONG DMAreq */ + switch (time10us) { + case 1: + /* Ping-Pong access through MM_DL using Left/Right 16bits/16bits data format */ + /* To be added here : Device driver initialization following + abe_read_hardware_configuration() returned data + McPDM_DL : 6 slots activated (5 + Commands) + DMIC : 6 microphones activated + McPDM_UL : 2 microphones activated (No status) + */ + abe_read_hardware_configuration(UC5, &OPP, &CONFIG); + abe_set_opp_processing(OPP); + abe_write_event_generator(CONFIG.HAL_EVENT_SELECTION); + + /* MM_DL INIT (overwrite the previous default initialization made above */ + format.f = 48000; + format.samp_format = MONO_MSB; + + /* connect a Ping-Pong SDMA protocol to MM_DL port with Ping-Pong 12 mono + * samples (12x4 bytes for each ping & pong size)*/ + abe_connect_dmareq_ping_pong_port(MM_DL_PORT, &format, ABE_CBPR0_IDX, (12 * 4), &dma_sink); + + /* mixers' configuration = voice on earphone + music on hands-free path */ + abe_write_mixer(MIXDL1, GAIN_0dB, RAMP_2MS, MIX_DL1_INPUT_MM_DL); + abe_write_mixer(MIXDL2, GAIN_0dB, RAMP_50MS, MIX_DL2_INPUT_MM_DL); + + /* Here : connect the sDMA to "dma_sink" content */ + /* enable all the data paths */ + abe_enable_data_transfer(MM_DL_PORT); + abe_enable_data_transfer(PDM_DL_PORT); + break; + case 8000: // end + fcloseall(); + exit(-3); + } + /* case scenario_id ==3 */ + break; + case 40: + /* Scenario 4.0 PING_PONG+ IRQ TO MCU */ + switch (time10us) { + case 1: + /* check HW config and OPP config */ + abe_read_hardware_configuration(UC5, &OPP, &CONFIG); + /* sets the OPP100 on FW05.xx */ + abe_set_opp_processing(OPP); + /* "tick" of the audio engine */ + abe_write_event_generator(CONFIG.HAL_EVENT_SELECTION); + + /* MM_DL INIT (overwrite the previous default initialization made above */ + format.f = 48000; + format.samp_format = STEREO_16_16; + + /* connect a Ping-Pong cache-flush protocol to MM_DL port with 50Hz (20ms) rate */ + abe_add_subroutine(&abe_irq_pingpong_player_id, + (abe_subroutine2) abe_default_irq_pingpong_player, SUB_0_PARAM, (abe_uint32*)0); + + #define N_SAMPLES_BYTES (24 *4) // @@@@ to be tuned + abe_connect_irq_ping_pong_port(MM_DL_PORT, &format, + abe_irq_pingpong_player_id, N_SAMPLES_BYTES, &data_sink, PING_PONG_WITH_MCU_IRQ); + + abe_write_mixer(MIXDL1, GAIN_0dB, RAMP_0MS, MIX_DL1_INPUT_TONES); + abe_write_mixer(MIXDL1, GAIN_0dB, RAMP_0MS, MIX_DL1_INPUT_VX_DL); + abe_write_mixer(MIXDL1, GAIN_0dB, RAMP_0MS, MIX_DL1_INPUT_MM_DL); + abe_write_mixer(MIXDL1, GAIN_0dB, RAMP_0MS, MIX_DL1_INPUT_MM_UL2); + abe_write_mixer(MIXDL2, GAIN_0dB, RAMP_0MS, MIX_DL2_INPUT_TONES); + abe_write_mixer(MIXDL2, GAIN_0dB, RAMP_0MS, MIX_DL2_INPUT_VX_DL); + abe_write_mixer(MIXDL2, GAIN_0dB, RAMP_0MS, MIX_DL2_INPUT_MM_DL); + abe_write_mixer(MIXDL2, GAIN_0dB, RAMP_0MS, MIX_DL2_INPUT_MM_UL2); + + abe_write_mixer(MIXSDT, GAIN_0dB, RAMP_0MS, MIX_SDT_INPUT_UP_MIXER); + abe_write_mixer(MIXSDT, MUTE_GAIN, RAMP_0MS, MIX_SDT_INPUT_DL1_MIXER); + + /* enable all the data paths */ + abe_enable_data_transfer(MM_DL_PORT); + abe_enable_data_transfer(PDM_DL_PORT); + break; + case 1200: + abe_set_router_configuration(UPROUTE, UPROUTE_CONFIG_DMIC1, + (abe_router_t *) abe_router_ul_table_preset[UPROUTE_CONFIG_DMIC1]); + break; + case 2400: // end + fcloseall(); + exit(-4); + } + /* case scenario_id ==4 */ + break; + case 41: + /* Scenario 4.1 PING_PONG+ IRQ TO MCU 32BITS */ + switch (time10us) { + case 1: + /* check HW config and OPP config */ + abe_read_hardware_configuration(UC5, &OPP, &CONFIG); + /* sets the OPP100 on FW05.xx */ + abe_set_opp_processing(OPP); + /* "tick" of the audio engine */ + abe_write_event_generator(CONFIG.HAL_EVENT_SELECTION); + + /* MM_DL INIT(overwrite the previous default initialization made above */ + format.f = 48000; + format.samp_format = STEREO_MSB; + + /* connect a Ping-Pong cache-flush protocol to MM_DL port with 50Hz (20ms) rate */ + abe_add_subroutine(&abe_irq_pingpong_player_id, + (abe_subroutine2) abe_default_irq_pingpong_player_32bits, SUB_0_PARAM, (abe_uint32*)0); + + #define N_SAMPLES_BYTES (24 * 4) // @@@@ to be tuned + abe_connect_irq_ping_pong_port(MM_DL_PORT, &format, + abe_irq_pingpong_player_id, N_SAMPLES_BYTES, &data_sink, PING_PONG_WITH_MCU_IRQ); + + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_0MS, MIX_DL1_INPUT_TONES); + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_0MS, MIX_DL1_INPUT_VX_DL); + abe_write_mixer(MIXDL1, GAIN_0dB, RAMP_0MS, MIX_DL1_INPUT_MM_DL); + abe_write_mixer(MIXDL1, MUTE_GAIN, RAMP_0MS, MIX_DL1_INPUT_MM_UL2); + + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_0MS, MIX_DL2_INPUT_TONES); + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_0MS, MIX_DL2_INPUT_VX_DL); + abe_write_mixer(MIXDL2, GAIN_0dB, RAMP_0MS, MIX_DL2_INPUT_MM_DL); + abe_write_mixer(MIXDL2, MUTE_GAIN, RAMP_0MS, MIX_DL2_INPUT_MM_UL2); + + abe_write_mixer(MIXSDT, GAIN_0dB, RAMP_0MS, MIX_SDT_INPUT_UP_MIXER); + abe_write_mixer(MIXSDT, MUTE_GAIN, RAMP_0MS, MIX_SDT_INPUT_DL1_MIXER); + + /* enable all the data paths */ + abe_enable_data_transfer(MM_DL_PORT ); + abe_enable_data_transfer(PDM_DL_PORT); + + break; + case 1200: + abe_set_router_configuration(UPROUTE, UPROUTE_CONFIG_DMIC1, + (abe_router_t *) abe_router_ul_table_preset[UPROUTE_CONFIG_DMIC1]); + break; + + case 2400: // end + fcloseall(); + exit(-4); + } + /* case scenario_id ==4 */ + break; + + case 5: + /* Scenario 5 CHECK APS ADAPTATION ALGO */ + switch (time10us) { + case 1: + /* check HW config and OPP config */ + abe_read_hardware_configuration(UC5, &OPP, &CONFIG); + /* sets the OPP100 on FW05.xx */ + abe_set_opp_processing(OPP); + /* "tick" of the audio engine */ + abe_write_event_generator(CONFIG.HAL_EVENT_SELECTION); + + /* MM_DL INIT(overwrite the previous default initialization made above */ + format.f = 48000; + format.samp_format = STEREO_16_16; + + /* connect a Ping-Pong cache-flush protocol to MM_DL port with 50Hz (20ms) rate */ + abe_add_subroutine(&abe_irq_pingpong_player_id, + (abe_subroutine2) abe_default_irq_pingpong_player, SUB_0_PARAM, (abe_uint32*)0); + + #define N_SAMPLES_BYTES (24 *4) // @@@@ to be tuned + abe_connect_irq_ping_pong_port(MM_DL_PORT, + &format, abe_irq_pingpong_player_id, N_SAMPLES_BYTES, + &data_sink, PING_PONG_WITH_MCU_IRQ); + + /* mixers' configuration = voice on earphone + music on hands-free path */ + abe_write_mixer(MIXDL1, GAIN_0dB, RAMP_2MS, MIX_DL1_INPUT_MM_DL); + abe_write_mixer(MIXDL2, GAIN_0dB, RAMP_50MS, MIX_DL2_INPUT_MM_DL); + + /* enable all the data paths */ + abe_enable_data_transfer(MM_DL_PORT); + abe_enable_data_transfer(PDM_DL_PORT); + + /* connect a Ping-Pong cache-flush protocol to MM_DL port with 50Hz (20ms) rate */ + abe_add_subroutine(&abe_irq_aps_adaptation_id, + (abe_subroutine2) abe_default_irq_aps_adaptation, SUB_0_PARAM, (abe_uint32*)0); + break; + } /* case scenario_id ==5 */ + + abe_set_router_configuration(UPROUTE, UPROUTE_CONFIG_AMIC, + (abe_router_t *) abe_router_ul_table_preset[UPROUTE_CONFIG_AMIC]); + abe_set_router_configuration(UPROUTE, UPROUTE_CONFIG_DMIC1, + (abe_router_t *) abe_router_ul_table_preset[UPROUTE_CONFIG_DMIC1]); + abe_set_router_configuration(UPROUTE, UPROUTE_CONFIG_DMIC2, + (abe_router_t *) abe_router_ul_table_preset[UPROUTE_CONFIG_DMIC2]); + abe_set_router_configuration(UPROUTE, UPROUTE_CONFIG_DMIC3, + (abe_router_t *) abe_router_ul_table_preset[UPROUTE_CONFIG_DMIC3]); + case UC31_VOICE_CALL_8KMONO: + abe_disable_data_transfer(VX_DL_PORT); + abe_disable_data_transfer(VX_UL_PORT); + format.f = 8000; + format.samp_format = MONO_MSB; + abe_connect_cbpr_dmareq_port(VX_DL_PORT, &format, ABE_CBPR1_IDX, &dma_sink); + format.f = 8000; + format.samp_format = MONO_MSB; + abe_connect_cbpr_dmareq_port(VX_UL_PORT, &format, ABE_CBPR2_IDX, &dma_sink); + abe_enable_data_transfer(VX_DL_PORT); + abe_enable_data_transfer(VX_UL_PORT); + case UC32_VOICE_CALL_8KSTEREO: + format.f = 8000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(VX_DL_PORT, &format, ABE_CBPR1_IDX, &dma_sink); + format.f = 8000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(VX_UL_PORT, &format, ABE_CBPR2_IDX, &dma_sink); + case UC33_VOICE_CALL_16KMONO: + format.f = 16000; + format.samp_format = MONO_MSB; + abe_connect_cbpr_dmareq_port(VX_DL_PORT, &format, ABE_CBPR1_IDX, &dma_sink); + format.f = 16000; + format.samp_format = MONO_MSB; + abe_connect_cbpr_dmareq_port(VX_UL_PORT, &format, ABE_CBPR2_IDX, &dma_sink); + case UC34_VOICE_CALL_16KSTEREO: + format.f = 16000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(VX_DL_PORT, &format, ABE_CBPR1_IDX, &dma_sink); + format.f = 16000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(VX_UL_PORT, &format, ABE_CBPR2_IDX, &dma_sink); + case UC35_MMDL_MONO: + format.f = 48000; + format.samp_format = MONO_MSB; + abe_connect_cbpr_dmareq_port(MM_DL_PORT, &format, ABE_CBPR0_IDX, &dma_sink); + case UC36_MMDL_STEREO: + format.f = 48000; + format.samp_format = STEREO_MSB; + abe_connect_cbpr_dmareq_port(MM_DL_PORT, &format, ABE_CBPR0_IDX, &dma_sink); + case UC37_MMUL2_MONO: + format.f = 48000; + format.samp_format = MONO_MSB; + abe_connect_cbpr_dmareq_port(MM_UL2_PORT, &format, ABE_CBPR4_IDX, &dma_sink); + case UC38_MMUL2_STEREO: + format.f = 48000; + format.samp_format = MONO_MSB; + abe_connect_cbpr_dmareq_port(MM_UL2_PORT, &format, ABE_CBPR4_IDX, &dma_sink); + case UC91_ASRC_DRIFT1: + abe_set_asrc_drift_control(VX_UL_PORT, FORCED_DRIFT_CONTROL); + abe_write_asrc(VX_UL_PORT, 100); + abe_set_asrc_drift_control(VX_DL_PORT, FORCED_DRIFT_CONTROL); + abe_write_asrc(VX_DL_PORT, 200); + abe_set_asrc_drift_control(MM_DL_PORT, FORCED_DRIFT_CONTROL); + abe_write_asrc(MM_DL_PORT, 300); + case UC92_ASRC_DRIFT2: + abe_set_asrc_drift_control(VX_UL_PORT, FORCED_DRIFT_CONTROL); + abe_write_asrc(VX_UL_PORT, -100); + abe_set_asrc_drift_control(VX_DL_PORT, FORCED_DRIFT_CONTROL); + abe_write_asrc(VX_DL_PORT, -200); + abe_set_asrc_drift_control(MM_DL_PORT, FORCED_DRIFT_CONTROL); + abe_write_asrc(MM_DL_PORT, -300); +#endif diff --git a/sound/soc/codecs/abe/abe_test.h b/sound/soc/codecs/abe/abe_test.h new file mode 100644 index 000000000000..b84ee3dafcde --- /dev/null +++ b/sound/soc/codecs/abe/abe_test.h @@ -0,0 +1,28 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#ifndef _ABE_TEST_H_ +#define _ABE_TEST_H_ + +/* + * HAL test API + */ +void abe_auto_check_data_format_translation(void); +void abe_check_opp(void); +void abe_check_dma(void); +void abe_debug_and_non_regression(void); +void abe_check_mixers_gain_update(void); +void abe_test_scenario(abe_int32 scenario_id); + +/* + * HAL test DATA + */ + +#endif /* _ABE_TEST_H_ */ diff --git a/sound/soc/codecs/abe/abe_typ.h b/sound/soc/codecs/abe/abe_typ.h new file mode 100644 index 000000000000..73c45ae3ed9a --- /dev/null +++ b/sound/soc/codecs/abe/abe_typ.h @@ -0,0 +1,661 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#include "abe_def.h" +#include "abe_ext.h" +#ifndef _ABE_TYP_H_ +#define _ABE_TYP_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * BASIC TYPES + */ + +typedef char abe_flag; +typedef unsigned char abe_uint8; +typedef char abe_int8; +typedef unsigned short abe_uint16; +typedef short abe_int16; +typedef unsigned long abe_uint32; +typedef long abe_int32; +typedef float abe_float; +typedef double abe_double; + +typedef abe_uint32 abe_errc_t; +typedef abe_int32 abe_millibel; + +//typedef abe_uint32 abe_millisecond; +//typedef abe_uint32 abe_milliHertz; +//typedef abe_uint32 abe_millimeter; +//typedef abe_uint32 abe_millidegree; +//typedef abe_uint32 abe_permille; +//typedef abe_uint32 abe_microsecond; + +typedef abe_uint32 abe_result; +typedef abe_millibel abe_gain_t; /* smoothed gain amplitude and ramp */ +typedef abe_uint32 abe_ramp_t; + +typedef abe_uint32 abe_freq_t; /* 4 bytes millihertz */ +typedef abe_uint32 abe_millis_t; /* 4 bytes milliseconds */ +typedef abe_uint32 abe_micros_t; /* 4 bytes microseconds */ + +typedef abe_uint32 abe_dbg_mask_t; /* 4 bytes Bit field indicating the type of informations to be traced */ +typedef abe_uint32 abe_time_stamp_t; /* 4 bytes infinite loop 32bits counter incremented on each firmware loop */ + /* scheduling task loops (250us / 272us with respectively 48kHz / 44.1kHz on Phoenix). */ +typedef abe_uint32 abe_dbg_t; /* debug filter */ + +typedef abe_uint32 abe_seq_code_t; /* Index to the table of sequences */ +typedef abe_uint32 abe_sub_code_t; /* Index to the table of subroutines called in the sequence */ + +typedef void (* abe_subroutine0)(void); /* subroutine with no parameter */ +typedef void (* abe_subroutine1)(abe_uint32); /* subroutine with one parameter */ +typedef void (* abe_subroutine2)(abe_uint32, abe_uint32); /* subroutine with two parameters */ +typedef void (* abe_subroutine3)(abe_uint32, abe_uint32, abe_uint32); /* subroutine with three parameters */ +typedef void (* abe_subroutine4)(abe_uint32, abe_uint32, abe_uint32, abe_uint32); /* subroutine with four parameters */ + +/* + * CODE PORTABILITY - FUTURE PATCHES + * + * 32bits field for having the code compatible with future revisions of the hardware (audio integration) + * or evolution of the software partitionning. Used for the highest level APIs (launch_sequences) + */ +typedef abe_uint32 abe_patch_rev; + +/* + * ENUMS + */ + +/* + * MEMORY CONFIG TYPE + * + * 0: Ultra Lowest power consumption audio player + * 1: OPP 25% (simple multimedia features) + * 2: OPP 50% (multimedia and voice calls) + * 3: OPP100% (EANC, multimedia complex use-cases) + */ +typedef enum { + ABE_AUDIO_PLAYER_ON_HEADSET_OR_EARPHONE = 1, + ABE_DRIFT_MANAGEMENT_FOR_AUDIO_PLAYER, + ABE_DRIFT_MANAGEMENT_FOR_VOICE_CALL, + ABE_VOICE_CALL_ON_HEADSET_OR_EARPHONE_OR_BT, + ABE_MULTIMEDIA_AUDIO_RECORDER, + ABE_VIBRATOR_OR_HAPTICS, + ABE_VOICE_CALL_ON_HANDS_FREE_SPEAKER, + ABE_RINGER_TONES, + ABE_VOICE_CALL_WITH_EARPHONE_ACTIVE_NOISE_CANCELLER, + + ABE_LAST_USE_CASE +} abe_use_case_id; + +/* + * OPP TYPE + * + * 0: Ultra Lowest power consumption audio player + * 1: OPP 25% (simple multimedia features) + * 2: OPP 50% (multimedia and voice calls) + * 3: OPP100% (EANC, multimedia complex use-cases) + */ +typedef enum { + ABE_OPP0 = 0, + ABE_OPP25, ABE_OPP50, ABE_OPP100 +} abe_opp_t; + +/* + * IIR TYPE + * + * 0: Ultra Lowest power consumption audio player + * 1: OPP 25% (simple multimedia features) + */ +typedef enum { + ABE_IIR_TYPE_1 = 0, + ABE_IIR_TYPE_2 +} abe_iir_t; + +/* + * DMIC DECIMATION RATIO + * + */ +typedef enum { + ABE_DEC16 = 16, + ABE_DEC25 = 25, + ABE_DEC32 = 32, + ABE_DEC40 = 40 +} abe_dmic_ratio_t; + +/* + * SAMPLES TYPE + * + * mono 16bits sample LSB aligned, 16 MSB bits are unused + * mono right shifted to 16bits LSBs on a 32bits DMEM FIFO for McBSP TX purpose. + * mono sample MSB aligned (16/24/32bits) + * two successive mono samples in one 32bits container + * Two L/R 16bits samples in a 32bits container, + * Two channels defined with two MSB aligned samples + * Three channels defined with three MSB aligned samples (MIC) + * Four channels defined with four MSB aligned samples (MIC) + * . . . + * Eight channels defined with six MSB aligned samples (MIC) + */ +typedef enum { + MONO_MSB = 1, + MONO_RSHIFTED_16, STEREO_RSHIFTED_16, /* only used for McBSP_TX */ + STEREO_16_16, + STEREO_MSB, THREE_MSB, FOUR_MSB, FIVE_MSB, SIX_MSB, SEVEN_MSB, EIGHT_MSB, NINE_MSB, TEN_MSB, +} abe_samp_t; + +/* + * PORT PROTOCOL TYPE + */ +typedef enum { + SLIMBUS_PORT_PROT = 1, + SERIAL_PORT_PROT, + DMIC_PORT_PROT, + MCPDMDL_PORT_PROT, + MCPDMUL_PORT_PROT, + PINGPONG_PORT_PROT, + DMAREQ_PORT_PROT, + FIFO_PORT_PROT, +} abe_port_protocol_switch_id; + +/* + * PORT IDs, this list is aligned with the FW data mapping + */ +typedef enum { + DMIC_PORT = 0, + PDM_UL_PORT, /* analog MICs */ + BT_VX_UL_PORT, /* BT uplink (8/16 kHz)*/ + + /* AE source ports - Uplink */ + MM_UL_PORT, /* up to 5 stereo channels */ + MM_UL2_PORT, /* stereo FM record path (4) */ + VX_UL_PORT, /* stereo FM record path */ + + /* AE sink ports - Downlink */ + MM_DL_PORT, /* multimedia player audio path */ + VX_DL_PORT, + TONES_DL_PORT, /* 8 */ + VIB_DL_PORT, + + /* AE source ports - Downlink */ + BT_VX_DL_PORT, + PDM_DL_PORT, /* ABE --> BT (8/16kHz) */ + MM_EXT_OUT_PORT, /* 12 */ + MM_EXT_IN_PORT, + + LAST_PORT_ID /* dummy port used to declare the other tasks of the scheduler */ +} abe_port_id; + +/* + * Definition for the compatibility with HAL05xx + */ +#define PDM_DL1_PORT PDM_DL_PORT +#define PDM_DL2_PORT PDM_DL_PORT +#define PDM_VIB_PORT PDM_DL_PORT +#define DMIC_PORT1 DMIC_PORT +#define DMIC_PORT2 DMIC_PORT +#define DMIC_PORT3 DMIC_PORT + +/* + * ANA_PORT_ID Analog companion audio port + */ +typedef enum { + EAR_PHOENIX = 1, + HS_L, HS_R, + IHF_L, IHF_R, + VIBRA1, VIBRA2 +} abe_ana_port_id ; + +typedef abe_int32 headset_offset_t; /* Calibration data from the analog companion */ + +/* + * Signal processing module names - EQ APS MIX ROUT + */ +#define FEAT_EQ1 1 /* equalizer downlink path headset + earphone */ +#define FEAT_EQ2L FEAT_EQ1+1 /* equalizer downlink path integrated handsfree LEFT */ +#define FEAT_EQ2R FEAT_EQ2L+1 /* equalizer downlink path integrated handsfree RIGHT */ +#define FEAT_EQSDT FEAT_EQ2R+1 /* equalizer downlink path side-tone */ +#define FEAT_EQMIC FEAT_EQSDT+1 /* equalizer uplink path first DMIC pair */ +#define FEAT_APS1 FEAT_EQMIC+1 /* Acoustic protection for headset */ +#define FEAT_APS2 FEAT_APS1+1 /* acoustic protection high-pass filter for handsfree "Left" */ +#define FEAT_APS3 FEAT_APS2+1 /* acoustic protection high-pass filter for handsfree "Right" */ +#define FEAT_ASRC1 FEAT_APS3+1 /* asynchronous sample-rate-converter for the downlink voice path */ +#define FEAT_ASRC2 FEAT_ASRC1+1 /* asynchronous sample-rate-converter for the uplink voice path */ +#define FEAT_ASRC3 FEAT_ASRC2+1 /* asynchronous sample-rate-converter for the multimedia player */ +#define FEAT_ASRC4 FEAT_ASRC3+1 /* asynchronous sample-rate-converter for the echo reference */ +#define FEAT_MIXDL1 FEAT_ASRC4+1 /* mixer of the headset and earphone path */ +#define FEAT_MIXDL2 FEAT_MIXDL1+1 /* mixer of the hands-free path */ +#define FEAT_MIXAUDUL FEAT_MIXDL2+1 /* mixer for audio being sent on the voice_ul path */ +#define FEAT_MIXVXREC FEAT_MIXAUDUL+1 /* mixer for voice communication recording */ +#define FEAT_MIXSDT FEAT_MIXVXREC+1 /* mixer for side-tone */ +#define FEAT_MIXECHO FEAT_MIXSDT+1 /* mixer for echo reference */ +#define FEAT_UPROUTE FEAT_MIXECHO+1 /* router of the uplink path */ +#define FEAT_GAINS FEAT_UPROUTE+1 /* all gains */ +#define FEAT_GAINS_DMIC1 FEAT_GAINS+1 +#define FEAT_GAINS_DMIC2 FEAT_GAINS_DMIC1+1 +#define FEAT_GAINS_DMIC3 FEAT_GAINS_DMIC2+1 +#define FEAT_GAINS_AMIC FEAT_GAINS_DMIC3+1 +#define FEAT_GAINS_SPLIT FEAT_GAINS_AMIC+1 +#define FEAT_GAINS_DL1 FEAT_GAINS_SPLIT+1 +#define FEAT_GAINS_DL2 FEAT_GAINS_DL1+1 +#define FEAT_GAIN_EANC FEAT_GAINS_DL2+1 /* active noise canceller */ +#define FEAT_SEQ FEAT_GAIN_EANC+1 /* sequencing queue of micro tasks */ +#define FEAT_CTL FEAT_SEQ+1 /* Phoenix control queue through McPDM */ + +#define MAXNBFEATURE FEAT_CTL /* list of features of the firmware */ + +typedef enum { + EQ1 = FEAT_EQ1, /* equalizer downlink path headset + earphone */ + EQ2L = FEAT_EQ2L, /* equalizer downlink path integrated handsfree LEFT */ + EQ2R = FEAT_EQ2R, + EQSDT = FEAT_EQSDT, /* equalizer downlink path side-tone */ + EQMIC = FEAT_EQMIC, +} abe_equ_id; + +typedef enum { + APS1 = FEAT_APS1, /* Acoustic protection for headset */ + APS2L = FEAT_APS2, + APS2R = FEAT_APS3 +} abe_aps_id; + +typedef enum { + ASRC1 = FEAT_ASRC1, /* asynchronous sample-rate-converter for the downlink voice path */ + ASRC2 = FEAT_ASRC2, /* asynchronous sample-rate-converter for the uplink voice path */ + ASRC3 = FEAT_ASRC3, /* asynchronous sample-rate-converter for the multimedia player */ + ASRC4 = FEAT_ASRC4, /* asynchronous sample-rate-converter for the voice uplink echo_reference */ +} abe_asrc_id; + +typedef enum { + MIXDL1 = FEAT_MIXDL1, + MIXDL2 = FEAT_MIXDL2, + MIXSDT = FEAT_MIXSDT, + MIXECHO = FEAT_MIXECHO, + MIXEANC = FEAT_GAIN_EANC, + MIXAUDUL = FEAT_MIXAUDUL, + MIXVXREC = FEAT_MIXVXREC, +} abe_mixer_id; + +typedef enum { + UPROUTE = FEAT_UPROUTE, /* there is only one router up to now */ +} abe_router_id; + +typedef enum { + GAINS = FEAT_GAINS, /* Misc tasks of the scheduler */ + SEQUENCE = FEAT_SEQ, + CONTROL = FEAT_CTL +} abe_schd_id; + +/* + * GAIN IDs + */ +typedef enum { + GAINS_DMIC1 = FEAT_GAINS_DMIC1, + GAINS_DMIC2 = FEAT_GAINS_DMIC2, + GAINS_DMIC3 = FEAT_GAINS_DMIC3, + GAINS_AMIC = FEAT_GAINS_AMIC, + GAINS_SPLIT = FEAT_GAINS_SPLIT, + GAINS_DL1 = FEAT_GAINS_DL1, + GAINS_DL2 = FEAT_GAINS_DL2, + GAINS_EANC = FEAT_GAIN_EANC, +} abe_gain_id; + +#if 0 +typedef enum { + VX_DL_IN_GAIN = 1, /* mixer's gain */ + MM_DL_IN_GAIN, + TONES_DL_IN_GAIN, + MM_VX_DL_IN_GAIN, + MM_IHF_DL_IN_GAIN, /* mixer's gain */ + MM_HS_DL_OUT_GAIN, /* Output Left gain */ + MM_IHF_L_DL_OUT_GAIN, /* Output Left gain */ + MM_IHF_R_DL_OUT_GAIN, /* Output Right gain */ + MM_VIB1_DL_GAIN, + MM_VIB2_DL_GAIN, /* no gain in fact */ + DMIC_UL_IN_GAIN_0, + DMIC_UL_IN_GAIN_1, /* today = same GAIN on DMIC pairs */ + DMIC_UL_IN_GAIN_2, + DMIC_UL_IN_GAIN_3, + DMIC_UL_IN_GAIN_4, + DMIC_UL_IN_GAIN_5, + AMIC_UL_IN_GAIN_L, + AMIC_UL_IN_GAIN_R, /* today = same gain on AMIC pair */ + ECHO_REF_GAIN, + BT_VX_DL_OUT_GAIN, + BT_VX_UL_IN_GAIN, +} abe_gain_id; +#endif + +/* + * EVENT GENERATORS + */ +typedef enum { + EVENT_MCPDM = 1, + EVENT_DMIC, EVENT_TIMER, + EVENT_McBSP, EVENT_McASP, EVENT_SLIMBUS, EVENT_44100, EVENT_DEFAULT, +} abe_event_id; + +/* + * SERIAL PORTS IDs + */ +typedef enum { + MCBSP1_TX = MCBSP1_DMA_TX, + MCBSP1_RX = MCBSP1_DMA_RX, + MCBSP2_TX = MCBSP2_DMA_TX, + MCBSP2_RX = MCBSP2_DMA_RX, + MCBSP3_TX = MCBSP3_DMA_TX, + MCBSP3_RX = MCBSP3_DMA_RX, +} abe_mcbsp_id; + + +/* + * TYPES USED FOR APIS + */ + +/* + * HARDWARE CONFIG TYPE + */ +typedef struct { + abe_uint32 AESS_EVENT_GENERATOR_COUNTER__COUNTER_VALUE; /* EVENT_GENERATOR_COUNTER_DEFAULT gives about 96kHz */ + abe_uint32 AESS_EVENT_SOURCE_SELECTION__SELECTION; /* 0: DMAreq, 1:Counter */ + abe_uint32 AESS_AUDIO_ENGINE_SCHEDULER__DMA_REQ_SELECTION; /* 5bits DMAreq selection */ + abe_event_id HAL_EVENT_SELECTION; + + abe_uint32 MCPDM_CTRL__DIV_SEL; /* 0: 96kHz 1:192kHz */ + abe_uint32 MCPDM_CTRL__CMD_INT; /* 0: no command in the FIFO, 1: 6 data on each lines (with commands) */ + abe_uint32 MCPDM_CTRL__PDMOUTFORMAT; /* 0:MSB aligned 1:LSB aligned */ + abe_uint32 MCPDM_CTRL__PDM_DN5_EN; + abe_uint32 MCPDM_CTRL__PDM_DN4_EN; + abe_uint32 MCPDM_CTRL__PDM_DN3_EN; + abe_uint32 MCPDM_CTRL__PDM_DN2_EN; + abe_uint32 MCPDM_CTRL__PDM_DN1_EN; + abe_uint32 MCPDM_CTRL__PDM_UP3_EN; + abe_uint32 MCPDM_CTRL__PDM_UP2_EN; + abe_uint32 MCPDM_CTRL__PDM_UP1_EN; + abe_uint32 MCPDM_FIFO_CTRL_DN__DN_TRESH; + abe_uint32 MCPDM_FIFO_CTRL_UP__UP_TRESH; + + abe_uint32 DMIC_CTRL__DMIC_CLK_DIV; /* 0:2.4MHz 1:3.84MHz */ + abe_uint32 DMIC_CTRL__DMICOUTFORMAT; /* 0:MSB aligned 1:LSB aligned */ + abe_uint32 DMIC_CTRL__DMIC_UP3_EN; + abe_uint32 DMIC_CTRL__DMIC_UP2_EN; + abe_uint32 DMIC_CTRL__DMIC_UP1_EN; + abe_uint32 DMIC_FIFO_CTRL__DMIC_TRESH; /* 1*(DMIC_UP1_EN+ 2+ 3)*2 OCP read access every 96/88.1 KHz. */ + + abe_uint32 MCBSP_SPCR1_REG__RJUST; /* 1:MSB 2:LSB aligned */ + abe_uint32 MCBSP_THRSH2_REG_REG__XTHRESHOLD; + abe_uint32 MCBSP_THRSH1_REG_REG__RTHRESHOLD; +} abe_hw_config_init_t; + +/* + * EANC_T + * + * TBD : coefficients of the EANC + */ +typedef struct { + abe_int32 dmic_index; + abe_int32 fir_coef[NBEANC1]; + abe_int32 lambda; + abe_int32 iir_filter[NBEANC2]; + abe_int32 loop_gain; +} abe_eanc_t; + +/* + * EQU_T + * + * coefficients of the equalizer + */ +typedef struct { + abe_iir_t equ_type; /* type of filter */ + abe_uint32 equ_length; /* filter length */ + union { /* parameters are the direct and recursive coefficients in */ + abe_int32 type1[NBEQ1]; /* Q6.26 integer fixed-point format. */ + struct { + abe_int32 freq [NBEQ2]; /* center frequency of the band [Hz] */ + abe_int32 gain [NBEQ2]; /* gain of each band. [dB]*/ + abe_int32 q [NBEQ2]; /* Q factor of this band [dB] */ + } type2; + } coef; + abe_int32 equ_param3; +} abe_equ_t; + +/* + * APS_T + * + * coefficients of the Acoustics Protection and Safety + */ +typedef struct { + abe_int32 coef1[NBAPS1]; + abe_int32 coef2[NBAPS2]; +} abe_aps_t; + +typedef struct { + abe_millibel e1; /* structure of two energy_t estimation for coil and membrane */ + abe_millibel e2; +} abe_aps_energy_t; + +/* + * ROUTER_T + * + * table of indexes in unsigned bytes + */ +typedef abe_uint32 abe_router_t; + +/* + * DATA_FORMAT_T + * + * used in port declaration + */ +typedef struct { + abe_freq_t f; /* Sampling frequency of the stream */ + abe_samp_t samp_format; /* Sample format type */ +} abe_data_format_t; + +/* + * PORT_PROTOCOL_T + * + * port declaration + */ +typedef struct { + abe_uint32 direction; /* Direction=0 means input from AESS point of view */ + abe_port_protocol_switch_id protocol_switch; /* Protocol type (switch) during the data transfers */ + union { + struct { /* Slimbus peripheral connected to ATC */ + abe_uint32 desc_addr1; /* Address of ATC Slimbus descriptor's index */ + abe_uint32 desc_addr2; /* Second ATC index for SlimBus reception (or NULL) */ + abe_uint32 buf_addr1; /* DMEM address 1 in bytes */ + abe_uint32 buf_addr2; /* DMEM address 2 in bytes */ + abe_uint32 buf_size; /* DMEM buffer size size in bytes */ + abe_uint32 iter; /* ITERation on each DMAreq signals */ + } prot_slimbus; + + struct { + abe_uint32 desc_addr; /* McBSP/McASP peripheral connected to ATC */ + abe_uint32 buf_addr; /* Address of ATC McBSP/McASP descriptor's in bytes */ + abe_uint32 buf_size; /* DMEM address in bytes */ + abe_uint32 iter; /* ITERation on each DMAreq signals */ + } prot_serial; + + struct { /* DMIC peripheral connected to ATC */ + abe_uint32 buf_addr; /* DMEM address in bytes */ + abe_uint32 buf_size; /* DMEM buffer size in bytes */ + abe_uint32 nbchan; /* Number of activated DMIC */ + } prot_dmic; + + struct { /* McPDMDL peripheral connected to ATC */ + abe_uint32 buf_addr; /* DMEM address in bytes */ + abe_uint32 buf_size; /* DMEM size in bytes */ + abe_uint32 control; /* Control allowed on McPDM DL */ + } prot_mcpdmdl; + + struct { /* McPDMUL peripheral connected to ATC */ + abe_uint32 buf_addr; /* DMEM address size in bytes */ + abe_uint32 buf_size; /* DMEM buffer size size in bytes */ + } prot_mcpdmul; + + struct { /* Ping-Pong interface to the Host using cache-flush */ + abe_uint32 desc_addr; /* Address of ATC descriptor's */ + abe_uint32 buf_addr; /* DMEM buffer base address in bytes */ + abe_uint32 buf_size; /* DMEM size in bytes for each ping and pong buffers */ + abe_uint32 irq_addr; /* IRQ address (either DMA (0) MCU (1) or DSP(2)) */ + abe_uint32 irq_data; /* IRQ data content loaded in the AESS IRQ register */ + abe_uint32 callback; /* Call-back function upon IRQ reception */ + } prot_pingpong; + + struct { /* DMAreq line to CBPr */ + abe_uint32 desc_addr; /* Address of ATC descriptor's */ + abe_uint32 buf_addr; /* DMEM buffer address in bytes */ + abe_uint32 buf_size; /* DMEM buffer size size in bytes */ + abe_uint32 iter; /* ITERation on each DMAreq signals */ + abe_uint32 dma_addr; /* DMAreq address */ + abe_uint32 dma_data; /* DMA/AESS = 1 << #DMA */ + } prot_dmareq; + + struct { /* Circular buffer - direct addressing to DMEM */ + abe_uint32 buf_addr; /* DMEM buffer base address in bytes */ + abe_uint32 buf_size; /* DMEM buffer size in bytes */ + abe_uint32 dma_addr; /* DMAreq address */ + abe_uint32 dma_data; /* DMA/AESS = 1 << #DMA */ + } prot_circular_buffer; + }p; +} abe_port_protocol_t; + +/* + * DMA_T + * + * dma structure for easing programming + */ +typedef struct { + void *data; /* OCP L3 pointer to the first address of the */ + /* destination buffer (either DMA or Ping-Pong read/write pointers). */ + void *l3_dmem; /* address L3 when addressing the DMEM buffer instead of CBPr */ + void *l4_dmem; /* address L3 translated to L4 the ARM memory space */ + abe_uint32 iter; /* number of iterations for the DMA data moves. */ +} abe_dma_t; + +typedef struct { + abe_uint32 data; /* Offset to the first address of the */ + abe_uint32 iter; /* number of iterations for the DMA data moves. */ +} abe_dma_t_offset; + +/* + * SEQ_T + * + * struct { + * micros_t time; Waiting time before executing next line + * seq_code_t code Subroutine index interpreted in the HAL and translated to + * FW subroutine codes in case of ABE tasks + * int32 param[2] Two parameters + * } seq_t + * + */ +typedef struct { + abe_micros_t delta_time; + abe_sub_code_t code; + abe_uint32 param[4]; + abe_uint8 tag; +} abe_seq_t; + +typedef struct { + abe_uint32 mask; + abe_seq_t seq1; + abe_seq_t seq2; +} abe_sequence_t; + +/* + * DRIFT_T + * + * ASRC drift parameter in [ppm] value + */ +typedef abe_int32 abe_drift_t; + +/* + * INTERNAL DATA TYPES + */ + +/* + * ABE_IRQ_DATA_T + * + * IRQ FIFO content declaration + * APS interrupts: + * IRQtag_APS to [31:28], APS_IRQs to [27:16], loopCounter to [15:0] + * SEQ interrupts: + * IRQtag_COUNT to [31:28], Count_IRQs to [27:16], loopCounter to [15:0] + * Ping-Pong Interrupts: + * IRQtag_PP to [31:28], PP_MCU_IRQ to [27:16], loopCounter to [15:0] + */ +typedef struct { + unsigned int counter: 16; + unsigned int data: 12; + unsigned int tag: 4; +} abe_irq_data_t; + +/* + * ABE_PORT_T status / format / sampling / protocol(call_back) / features / gain / name .. + * + */ +typedef struct { + abe_uint16 status; /* running / idled */ + abe_data_format_t format; /* Sample format type */ + abe_drift_t drift; /* API : for ASRC */ + abe_uint16 callback; /* optionnal call-back index for errors and ack */ + abe_uint16 smem_buffer1; /* IO tasks buffers */ + abe_uint16 smem_buffer2; + abe_port_protocol_t protocol; + abe_dma_t_offset dma; /* pointer and iteration counter of the xDMA */ + abe_uint16 feature_index [MAXFEATUREPORT]; /* list of features associated to a port (EQ, APS, ... , ends with 0) */ + // abe_millibel gain_calibration; /* gain tuning, default=0dB */ + char name[NBCHARPORTNAME]; +} abe_port_t; + +/* + * ABE_SUBROUTINE_T + * + */ +typedef struct { + abe_uint32 sub_id; + abe_int32 param[4]; +} abe_subroutine_t; + +/* + * ABE_PORT_INFO_T + * + * OPP, subroutines to call on reset + */ +typedef struct { + abe_opp_t min_opp; + abe_subroutine_t sub1; + abe_subroutine_t sub2; +} abe_port_info_t; + +/* + * ABE_FEATURE_T + * + */ +typedef struct { + abe_uint16 enable_with_default_data; + abe_uint16 disable_feature; + abe_uint16 read_parameter; + abe_uint16 write_parameter; + abe_uint16 running_status; + abe_uint16 fw_input_buffer_address; + abe_uint16 fw_output_buffer_address; + abe_uint16 fw_scheduler_slot_position; + abe_uint16 fw_scheduler_subslot_position; + abe_opp_t min_opp; + char name[NBCHARFEATURENAME]; +} abe_feature_t; + +#ifdef __cplusplus +} +#endif + +#endif /* _ABE_TYP_H_ */ diff --git a/sound/soc/codecs/abe/abe_typedef.h b/sound/soc/codecs/abe/abe_typedef.h new file mode 100644 index 000000000000..a3877ddbd936 --- /dev/null +++ b/sound/soc/codecs/abe/abe_typedef.h @@ -0,0 +1,187 @@ +/* + * ========================================================================== + * Texas Instruments OMAP(TM) Platform Firmware + * (c) Copyright 2009, Texas Instruments Incorporated. All Rights Reserved. + * + * Use of this firmware is controlled by the terms and conditions found + * in the license agreement under which this firmware has been supplied. + * ========================================================================== + */ + +#ifndef _ABE_TYPEDEF_H_ +#define _ABE_TYPEDEF_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "abe_define.h" + +/* + * Basic types definition +*/ +typedef unsigned char ABE_uchar; +typedef char ABE_char; +typedef unsigned short ABE_uint16; +typedef short ABE_int16; +typedef long ABE_int32; +typedef unsigned long ABE_uint32; + +typedef ABE_uchar* pABE_uchar; +typedef ABE_char* pABE_char; +typedef ABE_uint16* pABE_uint16; +typedef ABE_int16* pABE_int16; +typedef ABE_int32* pABE_int32; +typedef ABE_uint32* pABE_uint32; + +/* + * Hard-coded data generated in the XLS sheet (to be removed later@@@@) + */ +#ifdef __chess__ +typedef struct abeatcdescTag { + unsigned long a; + unsigned long b; +} ABE_SAtcDescriptor; +typedef void (*pABE_voidFunction)()clobbers(R0, R1, R2, R3, R4, R5, R6, R7, R13); +typedef void (*pABE_voidFunctionsList[])()clobbers(R0, R1, R2, R3, R4, R5, R6, R7, R13); +typedef void (*pABE_cmdFunction)() clobbers(R0, R1, R2, R3, R4, R5, R6, R7, R13); +typedef void (*pABE_cmdFunctionsList[])() clobbers(R0, R1, R2, R3, R4, R5, R6, R7, R13); +typedef void (*pABE_copyFunction)(ABE_uint16 chess_storage(R13))clobbers(R13); +typedef void (*pABE_copyFunctionsList[])(ABE_uint16 chess_storage(R13))clobbers(R13); +#endif +/* + * Commonly used structures + */ + +typedef struct abetaskTag{ + ABE_uint16 iF; /* 0 Index of called function */ + ABE_uint16 A0; /* 2 for INITPTR of A0 */ + ABE_uint16 A1; /* 4 for INITPTR of A1 */ + ABE_uint16 A2_3; /* 6 for INITPTR of A2 & A3 */ + ABE_uint16 A4_5; /* 8 for INITPTR of A4 & A5 */ + ABE_uint16 R; /* 10 for INITREG of R0, R1, R2, R3 */ + ABE_uint16 misc0; /* 12 */ + ABE_uint16 misc1; /* 14 */ +} ABE_STask; +typedef ABE_STask* pABE_STask; +typedef ABE_STask** ppABE_STask; + +typedef struct { + ABE_uint16 drift_ASRC; /* 0 */ + ABE_uint16 drift_io; /* 2 */ + ABE_uchar io_type_idx; /* 4 */ + ABE_uchar samp_size; /* 5 */ + ABE_uchar unused1; /* 6 */ + ABE_uchar unused2; /* 7 */ + + ABE_uint16 hw_ctrl_addr; /* 8 */ + ABE_uchar atc_irq_data; /* 10 */ + ABE_uchar direction_rw; /* 11 */ + ABE_uchar flow_counter; /* 12 */ + ABE_uchar nsamp; /* 13 */ + ABE_uchar x_io; /* 14 */ + ABE_uchar on_off; /* 15 */ + + ABE_uint16 split_addr1; /* 16 */ + ABE_uint16 split_addr2; /* 18 */ + ABE_uint16 split_addr3; /* 20 */ + ABE_uchar before_f_index; /* 22 */ + ABE_uchar after_f_index; /* 23 */ + + ABE_uint16 smem_addr1; /* 24 */ + ABE_uint16 atc_address1; /* 26 */ + ABE_uint16 atc_pointer_saved1; /* 28 */ + ABE_uchar data_size1; /* 30 */ + ABE_uchar copy_f_index1; /* 31 */ + + ABE_uint16 smem_addr2; /* 32 */ + ABE_uint16 atc_address2; /* 34 */ + ABE_uint16 atc_pointer_saved2; /* 36 */ + ABE_uchar data_size2; /* 38 */ + ABE_uchar copy_f_index2; /* 39 */ + +} ABE_SIODescriptor; + + +#define drift_asrc_ 0 /* [w] asrc output used for the next asrc call (+/- 1 / 0) */ +#define drift_io_ 2 /* [w] asrc output used for controlling the number of samples to be exchanged (+/- 1 / 0) */ +#define io_type_idx_ 4 /* address of the IO subroutine */ +#define samp_size_ 5 +#define unused1 6 +#define unused2 7 +#define hw_ctrl_addr_ 8 /* dmareq address or host irq buffer address (atc address) */ +#define atc_irq_data_ 10 /* data content to be loaded to "hw_ctrl_addr" */ +#define direction_rw_ 11 /* read dmem =0, write dmem =3 (atc offset of the access pointer) */ +#define flow_counter_ 12 /* flow error counter */ +#define nsamp_ 13 /* number of samples (either mono stereo...) */ +#define x_io_ 14 /* x number of raw DMEM data moved */ +#define on_off_ 15 + +#define split_addr1_ 16 /* internal smem buffer initptr pointer index */ +#define split_addr2_ 18 /* internal smem buffer initptr pointer index */ +#define split_addr3_ 20 /* internal smem buffer initptr pointer index */ +#define before_f_index_ 22 /* index of the copy subroutine */ +#define after_f_index_ 23 /* index of the copy subroutine */ + +#define minidesc1_ 24 +#define rel_smem_ 0 /* internal smem buffer initptr pointer index */ +#define rel_atc_ 2 /* atc descriptor address (byte address x4) */ +#define rel_atc_saved 4 /* location of the saved ATC pointer (+debug info) */ +#define rel_size_ 6 /* size of each sample (1:mono/1616 2:stereo ) */ +#define rel_f_ 7 /* index of the copy subroutine */ + +#define s_mem_mm_ul 24 +#define s_mm_ul_size 30 + +#define minidesc2_ 32 +#define Struct_Size 40 + +typedef ABE_SIODescriptor* pABE_SIODescriptor; +typedef ABE_SIODescriptor** ppABE_SIODescriptor; + +typedef struct abepingpongdescriptorTag{ + ABE_uint16 drift_ASRC; /* 0 [W] asrc output used for the next ASRC call (+/- 1 / 0)*/ + ABE_uint16 drift_io; /* 2 [W] asrc output used for controlling the number of samples to be exchanged (+/- 1 / 0) */ + ABE_uint16 hw_ctrl_addr; /* 4 DMAReq address or HOST IRQ buffer address (ATC ADDRESS) */ + ABE_uchar copy_func_index; /* 6 index of the copy subroutine */ + ABE_uchar x_io; /* 7 X number of SMEM samples to move */ + ABE_uchar data_size; /* 8 0 for mono data, 1 for stereo data */ + ABE_uchar smem_addr; /* 9 internal SMEM buffer INITPTR pointer index */ + ABE_uchar atc_irq_data; /* 10 data content to be loaded to "hw_ctrl_addr" */ + ABE_uchar counter; /* 11 ping/pong buffer flag */ + ABE_uint16 workbuff_BaseAddr; /* 12 current Base address of the working buffer */ + ABE_uint16 workbuff_Samples; /* 14 samples left in the working buffer */ + ABE_uint16 nextbuff0_BaseAddr; /* 6 Base address of the ping/pong buffer 0 */ + ABE_uint16 nextbuff0_Samples; /* 18 samples available in the ping/pong buffer 0 */ + ABE_uint16 nextbuff1_BaseAddr; /* 20 Base address of the ping/pong buffer 1 */ + ABE_uint16 nextbuff1_Samples; /* 22 samples available in the ping/pong buffer 1 */ +} ABE_SPingPongDescriptor; + +typedef ABE_SPingPongDescriptor* pABE_SPingPongDescriptor; + +#ifdef __chess__ +#define drift_ASRC 0 /* [W] asrc output used for the next ASRC call (+/- 1 / 0)*/ +#define drift_io 2 /* [W] asrc output used for controlling the number of samples to be exchanged (+/- 1 / 0) */ +#define hw_ctrl_addr 4 /* DMAReq address or HOST IRQ buffer address (ATC ADDRESS) */ +#define copy_func_index 6 /* index of the copy subroutine */ +#define x_io 7 /* X number of SMEM samples to move */ +#define data_size 8 /* 0 for mono data, 1 for stereo data */ +#define smem_addr 9 /* internal SMEM buffer INITPTR pointer index */ +#define atc_irq_data 10 /* data content to be loaded to "hw_ctrl_addr" */ +#define atc_address 11 /* ATC descriptor address */ +#define threshold_1 12 /* THR1; For stereo data, THR1 is provided by HAL as THR1<<1 */ +#define threshold_2 13 /* THR2; For stereo data, THR2 is provided by HAL as THR2<<1 */ +#define update_1 14 /* UP_1; For stereo data, UP_1 is provided by HAL as UP_1<<1 */ +#define update_2 15 /* UP_2; For stereo data, UP_2 is provided by HAL as UP_2<<1 */ +#define flow_counter 16 /* Flow error counter */ +#define direction_rw 17 /* Read DMEM =0, Write DMEM =3 (ATC offset of the access pointer) */ +#define counter 11 /* ping/pong buffer flag */ +#define workbuff_BaseAddr 12 /* current Base address of the working buffer */ +#define workbuff_Samples 14 /* samples left in the working buffer */ +#define nextbuff0_BaseAddr 16 /* Base address of the ping/pong buffer 0 */ +#define nextbuff0_Samples 18 /* samples available in the ping/pong buffer 0 */ +#define nextbuff1_BaseAddr 20 /* Base address of the ping/pong buffer 1 */ +#define nextbuff1_Samples 22 /* samples available in the ping/pong buffer 1 */ +#endif + +#endif /* _ABE_TYPEDEF_H_ */ diff --git a/sound/soc/codecs/abe/abehal.dsp b/sound/soc/codecs/abe/abehal.dsp new file mode 100644 index 000000000000..e350f139a678 --- /dev/null +++ b/sound/soc/codecs/abe/abehal.dsp @@ -0,0 +1,242 @@ +# Microsoft Developer Studio Project File - Name="ABEHAL" - Package Owner=<4> +# Microsoft Developer Studio Generated Build File, Format Version 6.00 +# ** DO NOT EDIT ** + +# TARGTYPE "Win32 (x86) Console Application" 0x0103 + +CFG=ABEHAL - Win32 Debug +!MESSAGE This is not a valid makefile. To build this project using NMAKE, +!MESSAGE use the Export Makefile command and run +!MESSAGE +!MESSAGE NMAKE /f "ABEHAL.mak". +!MESSAGE +!MESSAGE You can specify a configuration when running NMAKE +!MESSAGE by defining the macro CFG on the command line. For example: +!MESSAGE +!MESSAGE NMAKE /f "ABEHAL.mak" CFG="ABEHAL - Win32 Debug" +!MESSAGE +!MESSAGE Possible choices for configuration are: +!MESSAGE +!MESSAGE "ABEHAL - Win32 Release" (based on "Win32 (x86) Console Application") +!MESSAGE "ABEHAL - Win32 Debug" (based on "Win32 (x86) Console Application") +!MESSAGE + +# Begin Project +# PROP AllowPerConfigDependencies 0 +# PROP Scc_ProjName "ABEHAL" +# PROP Scc_LocalPath "m:\a0918484_L1doc\ABE_Firmware\HAL\src" +CPP=cl.exe +RSC=rc.exe + +!IF "$(CFG)" == "ABEHAL - Win32 Release" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 0 +# PROP BASE Output_Dir "Release" +# PROP BASE Intermediate_Dir "Release" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 0 +# PROP Output_Dir "Release" +# PROP Intermediate_Dir "Release" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c +# ADD CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c +# ADD BASE RSC /l 0x3009 /d "NDEBUG" +# ADD RSC /l 0x3009 /d "NDEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /machine:I386 +# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /machine:I386 + +!ELSEIF "$(CFG)" == "ABEHAL - Win32 Debug" + +# PROP BASE Use_MFC 0 +# PROP BASE Use_Debug_Libraries 1 +# PROP BASE Output_Dir "Debug" +# PROP BASE Intermediate_Dir "Debug" +# PROP BASE Target_Dir "" +# PROP Use_MFC 0 +# PROP Use_Debug_Libraries 1 +# PROP Output_Dir "Debug" +# PROP Intermediate_Dir "Debug" +# PROP Ignore_Export_Lib 0 +# PROP Target_Dir "" +# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /GZ /c +# ADD CPP /nologo /W4 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /FR /YX /FD /GZ /c +# ADD BASE RSC /l 0x3009 /d "_DEBUG" +# ADD RSC /l 0x3009 /d "_DEBUG" +BSC32=bscmake.exe +# ADD BASE BSC32 /nologo +# ADD BSC32 /nologo +LINK32=link.exe +# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /debug /machine:I386 /pdbtype:sept +# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /subsystem:console /debug /machine:I386 /pdbtype:sept + +!ENDIF + +# Begin Target + +# Name "ABEHAL - Win32 Release" +# Name "ABEHAL - Win32 Debug" +# Begin Group "Source Files" + +# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" +# Begin Source File + +SOURCE=.\ABE_API.c +# End Source File +# Begin Source File + +SOURCE=.\ABE_DBG.c +# End Source File +# Begin Source File + +SOURCE=.\ABE_EXT.c +# End Source File +# Begin Source File + +SOURCE=.\ABE_INI.c +# End Source File +# Begin Source File + +SOURCE=.\ABE_IRQ.c +# End Source File +# Begin Source File + +SOURCE=.\ABE_LIB.c +# End Source File +# Begin Source File + +SOURCE=.\ABE_MAIN.c +# End Source File +# Begin Source File + +SOURCE=.\ABE_SEQ.c +# End Source File +# Begin Source File + +SOURCE=.\ABE_TEST.C +# End Source File +# End Group +# Begin Group "Header Files" + +# PROP Default_Filter "h;hpp;hxx;hm;inl" +# Begin Source File + +SOURCE=.\ABE_API.H +# End Source File +# Begin Source File + +SOURCE=.\ABE_CM_ADDR.h +# End Source File +# Begin Source File + +SOURCE=.\ABE_COF.H +# End Source File +# Begin Source File + +SOURCE=.\ABE_DAT.H +# End Source File +# Begin Source File + +SOURCE=.\ABE_DBG.H +# End Source File +# Begin Source File + +SOURCE=.\ABE_DEF.H +# End Source File +# Begin Source File + +SOURCE=.\ABE_define.h +# End Source File +# Begin Source File + +SOURCE=.\ABE_DM_ADDR.h +# End Source File +# Begin Source File + +SOURCE=.\ABE_EXT.h +# End Source File +# Begin Source File + +SOURCE=.\ABE_functionsId.h +# End Source File +# Begin Source File + +SOURCE=.\ABE_FW.H +# End Source File +# Begin Source File + +SOURCE=.\ABE_INITxxx_labels.h +# End Source File +# Begin Source File + +SOURCE=.\ABE_LIB.H +# End Source File +# Begin Source File + +SOURCE=.\ABE_MAIN.H +# End Source File +# Begin Source File + +SOURCE=.\ABE_REF.H +# End Source File +# Begin Source File + +SOURCE=.\ABE_SEQ.H +# End Source File +# Begin Source File + +SOURCE=.\ABE_SM_ADDR.h +# End Source File +# Begin Source File + +SOURCE=.\ABE_SYS.H +# End Source File +# Begin Source File + +SOURCE=.\ABE_taskId.h +# End Source File +# Begin Source File + +SOURCE=.\ABE_TEST.h +# End Source File +# Begin Source File + +SOURCE=.\ABE_TYP.H +# End Source File +# Begin Source File + +SOURCE=.\ABE_typedef.h +# End Source File +# Begin Source File + +SOURCE=.\C_ABE_FW.CM +# End Source File +# Begin Source File + +SOURCE=.\C_ABE_FW.lDM +# End Source File +# Begin Source File + +SOURCE=.\C_ABE_FW.PM +# End Source File +# Begin Source File + +SOURCE=.\C_ABE_FW.SM32 +# End Source File +# Begin Source File + +SOURCE=.\CodingStyle.txt +# End Source File +# End Group +# Begin Group "Resource Files" + +# PROP Default_Filter "ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe" +# End Group +# End Target +# End Project diff --git a/sound/soc/codecs/abe/abehal.dsw b/sound/soc/codecs/abe/abehal.dsw new file mode 100644 index 000000000000..f28cce8c49d5 --- /dev/null +++ b/sound/soc/codecs/abe/abehal.dsw @@ -0,0 +1,33 @@ +Microsoft Developer Studio Workspace File, Format Version 6.00 +# WARNING: DO NOT EDIT OR DELETE THIS WORKSPACE FILE! + +############################################################################### + +Project: "ABEHAL"=.\ABEHAL.dsp - Package Owner=<4> + +Package=<5> +{{{ + begin source code control + ABEHAL + m:\a0918484_L1doc\ABE_Firmware\HAL\src + end source code control +}}} + +Package=<4> +{{{ +}}} + +############################################################################### + +Global: + +Package=<5> +{{{ +}}} + +Package=<3> +{{{ +}}} + +############################################################################### + diff --git a/sound/soc/codecs/twl6040.h b/sound/soc/codecs/twl6040.h new file mode 100644 index 000000000000..42f3f56286ff --- /dev/null +++ b/sound/soc/codecs/twl6040.h @@ -0,0 +1,143 @@ +/* + * ALSA SoC TWL6040 codec driver + * + * Author: Misael Lopez Cruz <x0052729@ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#ifndef __TWL6040_H__ +#define __TWL6040_H__ + +#define TWL6040_REG_ASICID 0x01 +#define TWL6040_REG_ASICREV 0x02 +#define TWL6040_REG_INTID 0x03 +#define TWL6040_REG_INTMR 0x04 +#define TWL6040_REG_NCPCTL 0x05 +#define TWL6040_REG_LDOCTL 0x06 +#define TWL6040_REG_HPPLLCTL 0x07 +#define TWL6040_REG_LPPLLCTL 0x08 +#define TWL6040_REG_LPPLLDIV 0x09 +#define TWL6040_REG_AMICBCTL 0x0A +#define TWL6040_REG_DMICBCTL 0x0B +#define TWL6040_REG_MICLCTL 0x0C +#define TWL6040_REG_MICRCTL 0x0D +#define TWL6040_REG_MICGAIN 0x0E +#define TWL6040_REG_LINEGAIN 0x0F +#define TWL6040_REG_HSLCTL 0x10 +#define TWL6040_REG_HSRCTL 0x11 +#define TWL6040_REG_HSGAIN 0x12 +#define TWL6040_REG_EARCTL 0x13 +#define TWL6040_REG_HFLCTL 0x14 +#define TWL6040_REG_HFLGAIN 0x15 +#define TWL6040_REG_HFRCTL 0x16 +#define TWL6040_REG_HFRGAIN 0x17 +#define TWL6040_REG_VIBCTLL 0x18 +#define TWL6040_REG_VIBDATL 0x19 +#define TWL6040_REG_VIBCTLR 0x1A +#define TWL6040_REG_VIBDATR 0x1B +#define TWL6040_REG_HKCTL1 0x1C +#define TWL6040_REG_HKCTL2 0x1D +#define TWL6040_REG_GPOCTL 0x1E +#define TWL6040_REG_ALB 0x1F +#define TWL6040_REG_DLB 0x20 +#define TWL6040_REG_TRIM1 0x28 +#define TWL6040_REG_TRIM2 0x29 +#define TWL6040_REG_TRIM3 0x2A +#define TWL6040_REG_HSOTRIM 0x2B +#define TWL6040_REG_HFOTRIM 0x2C +#define TWL6040_REG_ACCCTL 0x2D +#define TWL6040_REG_STATUS 0x2E +#define TWL6040_REG_SHADOW 0x2F + +#define TWL6040_CACHEREGNUM (TWL6040_REG_SHADOW + 1) + +#define TWL6040_VIOREGNUM 18 +#define TWL6040_VDDREGNUM 21 + +/* INTID (0x03) fields */ + +#define TWL6040_THINT 0x01 +#define TWL6040_PLUGINT 0x02 +#define TWL6040_UNPLUGINT 0x04 +#define TWL6040_HOOKINT 0x08 +#define TWL6040_HFINT 0x10 +#define TWL6040_VIBINT 0x20 +#define TWL6040_READYINT 0x40 + +/* INTMR (0x04) fields */ + +#define TWL6040_READYMSK 0x40 +#define TWL6040_ALLINT_MSK 0x7B + +/* NCPCTL (0x05) fields */ + +#define TWL6040_NCPENA 0x01 +#define TWL6040_NCPOPEN 0x40 + +/* LDOCTL (0x06) fields */ + +#define TWL6040_LSLDOENA 0x01 +#define TWL6040_HSLDOENA 0x04 +#define TWL6040_REFENA 0x40 +#define TWL6040_OSCENA 0x80 + +/* HPPLLCTL (0x07) fields */ + +#define TWL6040_HPLLENA 0x01 +#define TWL6040_HPLLRST 0x02 +#define TWL6040_HPLLBP 0x04 +#define TWL6040_HPLLSQRENA 0x08 +#define TWL6040_HPLLSQRBP 0x10 +#define TWL6040_MCLK_12000KHZ (0 << 5) +#define TWL6040_MCLK_19200KHZ (1 << 5) +#define TWL6040_MCLK_26000KHZ (2 << 5) +#define TWL6040_MCLK_38400KHZ (3 << 5) +#define TWL6040_MCLK_MSK 0x60 + +/* LPPLLCTL (0x08) fields */ + +#define TWL6040_LPLLENA 0x01 +#define TWL6040_LPLLRST 0x02 +#define TWL6040_LPLLSEL 0x04 +#define TWL6040_LPLLFIN 0x08 +#define TWL6040_HPLLSEL 0x10 + +/* HSLCTL (0x10) fields */ + +#define TWL6040_HSDACMODEL 0x02 +#define TWL6040_HSDRVMODEL 0x08 + +/* HSRCTL (0x11) fields */ + +#define TWL6040_HSDACMODER 0x02 +#define TWL6040_HSDRVMODER 0x08 + +/* ACCCTL (0x2D) fields */ + +#define TWL6040_RESETSPLIT 0x04 + +#define TWL6040_SYSCLK_SEL_LPPLL 1 +#define TWL6040_SYSCLK_SEL_HPPLL 2 + +#define TWL6040_HPPLL_ID 1 +#define TWL6040_LPPLL_ID 2 + +/* STATUS (0x2E) fields */ + +#define TWL6040_PLUGCOMP 0x02 + +#endif /* End of __TWL6040_H__ */ diff --git a/sound/soc/omap/Kconfig b/sound/soc/omap/Kconfig index f11963c21873..a82127abce76 100644 --- a/sound/soc/omap/Kconfig +++ b/sound/soc/omap/Kconfig @@ -6,9 +6,13 @@ config SND_OMAP_SOC_MCBSP tristate select OMAP_MCBSP -config SND_OMAP_SOC_MCPDM +config OMAP_MCPDM tristate +config SND_OMAP_SOC_ABE + tristate + select OMAP_MCPDM + config SND_OMAP_SOC_N810 tristate "SoC Audio support for Nokia N810" depends on SND_OMAP_SOC && MACH_NOKIA_N810 && I2C @@ -88,6 +92,28 @@ config SND_OMAP_SOC_SDP3430 Say Y if you want to add support for SoC audio on Texas Instruments SDP3430. +config SND_OMAP_SOC_SDP4430 + tristate "SoC Audio support for Texas Instruments SDP4430" + depends on TWL4030_CORE && SND_OMAP_SOC && MACH_OMAP_4430SDP + select SND_OMAP_SOC_ABE + select SND_SOC_ABE_TWL6040 + select SND_OMAP_SOC_MCBSP + help + Say Y if you want to add support for SoC audio on Texas Instruments + SDP4430. + +config SND_OMAP_SOC_HDMI + tristate "SoC Audio support for HDMI interface on SDP4430" + depends on SND_OMAP_SOC_SDP4430 && OMAP2_DSS_HDMI + help + Say Y if you want to add support for HDMI interface on SDP4430 + +config SND_OMAP_VOICE_TEST + bool "SoC Audio support for test Voice Call" + depends on TWL4030_CORE && SND_OMAP_SOC && MACH_OMAP_4430SDP + help + Say Y if you want to test modem voice call + config SND_OMAP_SOC_OMAP3_PANDORA tristate "SoC Audio support for OMAP3 Pandora" depends on TWL4030_CORE && SND_OMAP_SOC && MACH_OMAP3_PANDORA diff --git a/sound/soc/omap/Makefile b/sound/soc/omap/Makefile index 0bc00ca14b37..f3390dcac31e 100644 --- a/sound/soc/omap/Makefile +++ b/sound/soc/omap/Makefile @@ -1,11 +1,13 @@ # OMAP Platform Support snd-soc-omap-objs := omap-pcm.o snd-soc-omap-mcbsp-objs := omap-mcbsp.o -snd-soc-omap-mcpdm-objs := omap-mcpdm.o mcpdm.o +snd-soc-omap-abe-objs := omap-abe.o mcpdm.o +snd-soc-omap-hdmi-objs:= omap-hdmi.o obj-$(CONFIG_SND_OMAP_SOC) += snd-soc-omap.o obj-$(CONFIG_SND_OMAP_SOC_MCBSP) += snd-soc-omap-mcbsp.o -obj-$(CONFIG_SND_OMAP_SOC_MCPDM) += snd-soc-omap-mcpdm.o +obj-$(CONFIG_SND_OMAP_SOC_ABE) += snd-soc-omap-abe.o +obj-$(CONFIG_SND_OMAP_SOC_HDMI) += snd-soc-omap-hdmi.o # OMAP Machine Support snd-soc-n810-objs := n810.o @@ -16,6 +18,7 @@ snd-soc-omap2evm-objs := omap2evm.o snd-soc-omap3evm-objs := omap3evm.o snd-soc-am3517evm-objs := am3517evm.o snd-soc-sdp3430-objs := sdp3430.o +snd-soc-sdp4430-objs := sdp4430.o snd-soc-omap3pandora-objs := omap3pandora.o snd-soc-omap3beagle-objs := omap3beagle.o snd-soc-zoom2-objs := zoom2.o @@ -29,6 +32,7 @@ obj-$(CONFIG_SND_OMAP_SOC_OMAP2EVM) += snd-soc-omap2evm.o obj-$(CONFIG_SND_OMAP_SOC_OMAP3EVM) += snd-soc-omap3evm.o obj-$(CONFIG_SND_OMAP_SOC_AM3517EVM) += snd-soc-am3517evm.o obj-$(CONFIG_SND_OMAP_SOC_SDP3430) += snd-soc-sdp3430.o +obj-$(CONFIG_SND_OMAP_SOC_SDP4430) += snd-soc-sdp4430.o obj-$(CONFIG_SND_OMAP_SOC_OMAP3_PANDORA) += snd-soc-omap3pandora.o obj-$(CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE) += snd-soc-omap3beagle.o obj-$(CONFIG_SND_OMAP_SOC_ZOOM2) += snd-soc-zoom2.o diff --git a/sound/soc/omap/mcpdm.c b/sound/soc/omap/mcpdm.c index 1dab4c14874d..d2bb50adca75 100644 --- a/sound/soc/omap/mcpdm.c +++ b/sound/soc/omap/mcpdm.c @@ -1,5 +1,5 @@ /* - * mcpdm.c -- McPDM interface driver + * mcpdm.c -- McPDM interface driver * * Author: Jorge Eduardo Candelaria <x0107209@ti.com> * Copyright (C) 2009 - Texas Instruments, Inc. @@ -28,10 +28,10 @@ #include <linux/slab.h> #include <linux/interrupt.h> #include <linux/err.h> -#include <linux/clk.h> #include <linux/delay.h> #include <linux/io.h> #include <linux/irq.h> +#include <linux/pm_runtime.h> #include "mcpdm.h" @@ -39,47 +39,49 @@ static struct omap_mcpdm *mcpdm; static inline void omap_mcpdm_write(u16 reg, u32 val) { - __raw_writel(val, mcpdm->io_base + reg); + __raw_writel(val, mcpdm->io_base + reg); } static inline int omap_mcpdm_read(u16 reg) { - return __raw_readl(mcpdm->io_base + reg); + return __raw_readl(mcpdm->io_base + reg); } +#ifdef MCPDM_DEBUG static void omap_mcpdm_reg_dump(void) { - dev_dbg(mcpdm->dev, "***********************\n"); - dev_dbg(mcpdm->dev, "IRQSTATUS_RAW: 0x%04x\n", - omap_mcpdm_read(MCPDM_IRQSTATUS_RAW)); - dev_dbg(mcpdm->dev, "IRQSTATUS: 0x%04x\n", - omap_mcpdm_read(MCPDM_IRQSTATUS)); - dev_dbg(mcpdm->dev, "IRQENABLE_SET: 0x%04x\n", - omap_mcpdm_read(MCPDM_IRQENABLE_SET)); - dev_dbg(mcpdm->dev, "IRQENABLE_CLR: 0x%04x\n", - omap_mcpdm_read(MCPDM_IRQENABLE_CLR)); - dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n", - omap_mcpdm_read(MCPDM_IRQWAKE_EN)); - dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n", - omap_mcpdm_read(MCPDM_DMAENABLE_SET)); - dev_dbg(mcpdm->dev, "DMAENABLE_CLR: 0x%04x\n", - omap_mcpdm_read(MCPDM_DMAENABLE_CLR)); - dev_dbg(mcpdm->dev, "DMAWAKEEN: 0x%04x\n", - omap_mcpdm_read(MCPDM_DMAWAKEEN)); - dev_dbg(mcpdm->dev, "CTRL: 0x%04x\n", - omap_mcpdm_read(MCPDM_CTRL)); - dev_dbg(mcpdm->dev, "DN_DATA: 0x%04x\n", - omap_mcpdm_read(MCPDM_DN_DATA)); - dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n", - omap_mcpdm_read(MCPDM_UP_DATA)); - dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n", - omap_mcpdm_read(MCPDM_FIFO_CTRL_DN)); - dev_dbg(mcpdm->dev, "FIFO_CTRL_UP: 0x%04x\n", - omap_mcpdm_read(MCPDM_FIFO_CTRL_UP)); - dev_dbg(mcpdm->dev, "DN_OFFSET: 0x%04x\n", - omap_mcpdm_read(MCPDM_DN_OFFSET)); - dev_dbg(mcpdm->dev, "***********************\n"); + dev_dbg(mcpdm->dev, "***********************\n"); + dev_dbg(mcpdm->dev, "IRQSTATUS_RAW: 0x%04x\n", + omap_mcpdm_read(MCPDM_IRQSTATUS_RAW)); + dev_dbg(mcpdm->dev, "IRQSTATUS: 0x%04x\n", + omap_mcpdm_read(MCPDM_IRQSTATUS)); + dev_dbg(mcpdm->dev, "IRQENABLE_SET: 0x%04x\n", + omap_mcpdm_read(MCPDM_IRQENABLE_SET)); + dev_dbg(mcpdm->dev, "IRQENABLE_CLR: 0x%04x\n", + omap_mcpdm_read(MCPDM_IRQENABLE_CLR)); + dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n", + omap_mcpdm_read(MCPDM_IRQWAKE_EN)); + dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n", + omap_mcpdm_read(MCPDM_DMAENABLE_SET)); + dev_dbg(mcpdm->dev, "DMAENABLE_CLR: 0x%04x\n", + omap_mcpdm_read(MCPDM_DMAENABLE_CLR)); + dev_dbg(mcpdm->dev, "DMAWAKEEN: 0x%04x\n", + omap_mcpdm_read(MCPDM_DMAWAKEEN)); + dev_dbg(mcpdm->dev, "CTRL: 0x%04x\n", + omap_mcpdm_read(MCPDM_CTRL)); + dev_dbg(mcpdm->dev, "DN_DATA: 0x%04x\n", + omap_mcpdm_read(MCPDM_DN_DATA)); + dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n", + omap_mcpdm_read(MCPDM_UP_DATA)); + dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n", + omap_mcpdm_read(MCPDM_FIFO_CTRL_DN)); + dev_dbg(mcpdm->dev, "FIFO_CTRL_UP: 0x%04x\n", + omap_mcpdm_read(MCPDM_FIFO_CTRL_UP)); + dev_dbg(mcpdm->dev, "DN_OFFSET: 0x%04x\n", + omap_mcpdm_read(MCPDM_DN_OFFSET)); + dev_dbg(mcpdm->dev, "***********************\n"); } +#endif /* * Takes the McPDM module in and out of reset state. @@ -87,26 +89,26 @@ static void omap_mcpdm_reg_dump(void) */ static void omap_mcpdm_reset_capture(int reset) { - int ctrl = omap_mcpdm_read(MCPDM_CTRL); + int ctrl = omap_mcpdm_read(MCPDM_CTRL); - if (reset) - ctrl |= SW_UP_RST; - else - ctrl &= ~SW_UP_RST; + if (reset) + ctrl |= SW_UP_RST; + else + ctrl &= ~SW_UP_RST; - omap_mcpdm_write(MCPDM_CTRL, ctrl); + omap_mcpdm_write(MCPDM_CTRL, ctrl); } static void omap_mcpdm_reset_playback(int reset) { - int ctrl = omap_mcpdm_read(MCPDM_CTRL); + int ctrl = omap_mcpdm_read(MCPDM_CTRL); - if (reset) - ctrl |= SW_DN_RST; - else - ctrl &= ~SW_DN_RST; + if (reset) + ctrl |= SW_DN_RST; + else + ctrl &= ~SW_DN_RST; - omap_mcpdm_write(MCPDM_CTRL, ctrl); + omap_mcpdm_write(MCPDM_CTRL, ctrl); } /* @@ -115,14 +117,14 @@ static void omap_mcpdm_reset_playback(int reset) */ void omap_mcpdm_start(int stream) { - int ctrl = omap_mcpdm_read(MCPDM_CTRL); + int ctrl = omap_mcpdm_read(MCPDM_CTRL); - if (stream) - ctrl |= mcpdm->up_channels; - else - ctrl |= mcpdm->dn_channels; + if (stream) + ctrl |= mcpdm->up_channels; + else + ctrl |= mcpdm->dn_channels; - omap_mcpdm_write(MCPDM_CTRL, ctrl); + omap_mcpdm_write(MCPDM_CTRL, ctrl); } /* @@ -131,14 +133,14 @@ void omap_mcpdm_start(int stream) */ void omap_mcpdm_stop(int stream) { - int ctrl = omap_mcpdm_read(MCPDM_CTRL); + int ctrl = omap_mcpdm_read(MCPDM_CTRL); - if (stream) - ctrl &= ~mcpdm->up_channels; - else - ctrl &= ~mcpdm->dn_channels; + if (stream) + ctrl &= ~mcpdm->up_channels; + else + ctrl &= ~mcpdm->dn_channels; - omap_mcpdm_write(MCPDM_CTRL, ctrl); + omap_mcpdm_write(MCPDM_CTRL, ctrl); } /* @@ -147,38 +149,38 @@ void omap_mcpdm_stop(int stream) */ int omap_mcpdm_capture_open(struct omap_mcpdm_link *uplink) { - int irq_mask = 0; - int ctrl; + int irq_mask = 0; + int ctrl; - if (!uplink) - return -EINVAL; + if (!uplink) + return -EINVAL; - mcpdm->uplink = uplink; + mcpdm->uplink = uplink; - /* Enable irq request generation */ - irq_mask |= uplink->irq_mask & MCPDM_UPLINK_IRQ_MASK; - omap_mcpdm_write(MCPDM_IRQENABLE_SET, irq_mask); + /* Enable irq request generation */ + irq_mask |= uplink->irq_mask & MCPDM_UPLINK_IRQ_MASK; + omap_mcpdm_write(MCPDM_IRQENABLE_SET, irq_mask); - /* Configure uplink threshold */ - if (uplink->threshold > UP_THRES_MAX) - uplink->threshold = UP_THRES_MAX; + /* Configure uplink threshold */ + if (uplink->threshold > UP_THRES_MAX) + uplink->threshold = UP_THRES_MAX; - omap_mcpdm_write(MCPDM_FIFO_CTRL_UP, uplink->threshold); + omap_mcpdm_write(MCPDM_FIFO_CTRL_UP, uplink->threshold); - /* Configure DMA controller */ - omap_mcpdm_write(MCPDM_DMAENABLE_SET, DMA_UP_ENABLE); + /* Configure DMA controller */ + omap_mcpdm_write(MCPDM_DMAENABLE_SET, DMA_UP_ENABLE); - /* Set pdm out format */ - ctrl = omap_mcpdm_read(MCPDM_CTRL); - ctrl &= ~PDMOUTFORMAT; - ctrl |= uplink->format & PDMOUTFORMAT; + /* Set pdm out format */ + ctrl = omap_mcpdm_read(MCPDM_CTRL); + ctrl &= ~PDMOUTFORMAT; + ctrl |= uplink->format & PDMOUTFORMAT; - /* Uplink channels */ - mcpdm->up_channels = uplink->channels & (PDM_UP_MASK | PDM_STATUS_MASK); + /* Uplink channels */ + mcpdm->up_channels = uplink->channels & (PDM_UP_MASK | PDM_STATUS_MASK); - omap_mcpdm_write(MCPDM_CTRL, ctrl); + omap_mcpdm_write(MCPDM_CTRL, ctrl); - return 0; + return 0; } /* @@ -187,38 +189,38 @@ int omap_mcpdm_capture_open(struct omap_mcpdm_link *uplink) */ int omap_mcpdm_playback_open(struct omap_mcpdm_link *downlink) { - int irq_mask = 0; - int ctrl; + int irq_mask = 0; + int ctrl; - if (!downlink) - return -EINVAL; + if (!downlink) + return -EINVAL; - mcpdm->downlink = downlink; + mcpdm->downlink = downlink; - /* Enable irq request generation */ - irq_mask |= downlink->irq_mask & MCPDM_DOWNLINK_IRQ_MASK; - omap_mcpdm_write(MCPDM_IRQENABLE_SET, irq_mask); + /* Enable irq request generation */ + irq_mask |= downlink->irq_mask & MCPDM_DOWNLINK_IRQ_MASK; + omap_mcpdm_write(MCPDM_IRQENABLE_SET, irq_mask); - /* Configure uplink threshold */ - if (downlink->threshold > DN_THRES_MAX) - downlink->threshold = DN_THRES_MAX; + /* Configure uplink threshold */ + if (downlink->threshold > DN_THRES_MAX) + downlink->threshold = DN_THRES_MAX; - omap_mcpdm_write(MCPDM_FIFO_CTRL_DN, downlink->threshold); + omap_mcpdm_write(MCPDM_FIFO_CTRL_DN, downlink->threshold); - /* Enable DMA request generation */ - omap_mcpdm_write(MCPDM_DMAENABLE_SET, DMA_DN_ENABLE); + /* Enable DMA request generation */ + omap_mcpdm_write(MCPDM_DMAENABLE_SET, DMA_DN_ENABLE); - /* Set pdm out format */ - ctrl = omap_mcpdm_read(MCPDM_CTRL); - ctrl &= ~PDMOUTFORMAT; - ctrl |= downlink->format & PDMOUTFORMAT; + /* Set pdm out format */ + ctrl = omap_mcpdm_read(MCPDM_CTRL); + ctrl &= ~PDMOUTFORMAT; + ctrl |= downlink->format & PDMOUTFORMAT; - /* Downlink channels */ - mcpdm->dn_channels = downlink->channels & (PDM_DN_MASK | PDM_CMD_MASK); + /* Downlink channels */ + mcpdm->dn_channels = downlink->channels & (PDM_DN_MASK | PDM_CMD_MASK); - omap_mcpdm_write(MCPDM_CTRL, ctrl); + omap_mcpdm_write(MCPDM_CTRL, ctrl); - return 0; + return 0; } /* @@ -227,24 +229,24 @@ int omap_mcpdm_playback_open(struct omap_mcpdm_link *downlink) */ int omap_mcpdm_capture_close(struct omap_mcpdm_link *uplink) { - int irq_mask = 0; + int irq_mask = 0; - if (!uplink) - return -EINVAL; + if (!uplink) + return -EINVAL; - /* Disable irq request generation */ - irq_mask |= uplink->irq_mask & MCPDM_UPLINK_IRQ_MASK; - omap_mcpdm_write(MCPDM_IRQENABLE_CLR, irq_mask); + /* Disable irq request generation */ + irq_mask |= uplink->irq_mask & MCPDM_UPLINK_IRQ_MASK; + omap_mcpdm_write(MCPDM_IRQENABLE_CLR, irq_mask); - /* Disable DMA request generation */ - omap_mcpdm_write(MCPDM_DMAENABLE_CLR, DMA_UP_ENABLE); + /* Disable DMA request generation */ + omap_mcpdm_write(MCPDM_DMAENABLE_CLR, DMA_UP_ENABLE); - /* Clear Downlink channels */ - mcpdm->up_channels = 0; + /* Clear Downlink channels */ + mcpdm->up_channels = 0; - mcpdm->uplink = NULL; + mcpdm->uplink = NULL; - return 0; + return 0; } /* @@ -253,124 +255,146 @@ int omap_mcpdm_capture_close(struct omap_mcpdm_link *uplink) */ int omap_mcpdm_playback_close(struct omap_mcpdm_link *downlink) { - int irq_mask = 0; + int irq_mask = 0; - if (!downlink) - return -EINVAL; + if (!downlink) + return -EINVAL; - /* Disable irq request generation */ - irq_mask |= downlink->irq_mask & MCPDM_DOWNLINK_IRQ_MASK; - omap_mcpdm_write(MCPDM_IRQENABLE_CLR, irq_mask); + /* Disable irq request generation */ + irq_mask |= downlink->irq_mask & MCPDM_DOWNLINK_IRQ_MASK; + omap_mcpdm_write(MCPDM_IRQENABLE_CLR, irq_mask); - /* Disable DMA request generation */ - omap_mcpdm_write(MCPDM_DMAENABLE_CLR, DMA_DN_ENABLE); + /* Disable DMA request generation */ + omap_mcpdm_write(MCPDM_DMAENABLE_CLR, DMA_DN_ENABLE); - /* clear Downlink channels */ - mcpdm->dn_channels = 0; + /* clear Downlink channels */ + mcpdm->dn_channels = 0; - mcpdm->downlink = NULL; + mcpdm->downlink = NULL; - return 0; + return 0; } static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id) { - struct omap_mcpdm *mcpdm_irq = dev_id; - int irq_status; - - irq_status = omap_mcpdm_read(MCPDM_IRQSTATUS); - - /* Acknowledge irq event */ - omap_mcpdm_write(MCPDM_IRQSTATUS, irq_status); - - if (irq & MCPDM_DN_IRQ_FULL) { - dev_err(mcpdm_irq->dev, "DN FIFO error %x\n", irq_status); - omap_mcpdm_reset_playback(1); - omap_mcpdm_playback_open(mcpdm_irq->downlink); - omap_mcpdm_reset_playback(0); - } - - if (irq & MCPDM_DN_IRQ_EMPTY) { - dev_err(mcpdm_irq->dev, "DN FIFO error %x\n", irq_status); - omap_mcpdm_reset_playback(1); - omap_mcpdm_playback_open(mcpdm_irq->downlink); - omap_mcpdm_reset_playback(0); - } - - if (irq & MCPDM_DN_IRQ) { - dev_dbg(mcpdm_irq->dev, "DN write request\n"); - } - - if (irq & MCPDM_UP_IRQ_FULL) { - dev_err(mcpdm_irq->dev, "UP FIFO error %x\n", irq_status); - omap_mcpdm_reset_capture(1); - omap_mcpdm_capture_open(mcpdm_irq->uplink); - omap_mcpdm_reset_capture(0); - } - - if (irq & MCPDM_UP_IRQ_EMPTY) { - dev_err(mcpdm_irq->dev, "UP FIFO error %x\n", irq_status); - omap_mcpdm_reset_capture(1); - omap_mcpdm_capture_open(mcpdm_irq->uplink); - omap_mcpdm_reset_capture(0); - } - - if (irq & MCPDM_UP_IRQ) { - dev_dbg(mcpdm_irq->dev, "UP write request\n"); - } - - return IRQ_HANDLED; + struct omap_mcpdm *mcpdm_irq = dev_id; + int irq_status; + + irq_status = omap_mcpdm_read(MCPDM_IRQSTATUS); + + /* Acknowledge irq event */ + omap_mcpdm_write(MCPDM_IRQSTATUS, irq_status); + + if (irq & MCPDM_DN_IRQ_FULL) { + dev_err(mcpdm_irq->dev, "DN FIFO error %x\n", irq_status); + omap_mcpdm_reset_playback(1); + omap_mcpdm_playback_open(mcpdm_irq->downlink); + omap_mcpdm_reset_playback(0); + } + + if (irq & MCPDM_DN_IRQ_EMPTY) { + dev_err(mcpdm_irq->dev, "DN FIFO error %x\n", irq_status); + omap_mcpdm_reset_playback(1); + omap_mcpdm_playback_open(mcpdm_irq->downlink); + omap_mcpdm_reset_playback(0); + } + + if (irq & MCPDM_DN_IRQ) { + dev_dbg(mcpdm_irq->dev, "DN write request\n"); + } + + if (irq & MCPDM_UP_IRQ_FULL) { + dev_err(mcpdm_irq->dev, "UP FIFO error %x\n", irq_status); + omap_mcpdm_reset_capture(1); + omap_mcpdm_capture_open(mcpdm_irq->uplink); + omap_mcpdm_reset_capture(0); + } + + if (irq & MCPDM_UP_IRQ_EMPTY) { + dev_err(mcpdm_irq->dev, "UP FIFO error %x\n", irq_status); + omap_mcpdm_reset_capture(1); + omap_mcpdm_capture_open(mcpdm_irq->uplink); + omap_mcpdm_reset_capture(0); + } + + if (irq & MCPDM_UP_IRQ) { + dev_dbg(mcpdm_irq->dev, "UP write request\n"); + } + + return IRQ_HANDLED; } int omap_mcpdm_request(void) { - int ret; - - clk_enable(mcpdm->clk); - - spin_lock(&mcpdm->lock); - - if (!mcpdm->free) { - dev_err(mcpdm->dev, "McPDM interface is in use\n"); - spin_unlock(&mcpdm->lock); - ret = -EBUSY; - goto err; - } - mcpdm->free = 0; - - spin_unlock(&mcpdm->lock); - - /* Disable lines while request is ongoing */ - omap_mcpdm_write(MCPDM_CTRL, 0x00); - - ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler, - 0, "McPDM", (void *)mcpdm); - if (ret) { - dev_err(mcpdm->dev, "Request for McPDM IRQ failed\n"); - goto err; - } - - return 0; + struct platform_device *pdev; + struct omap_mcpdm_platform_data *pdata; + int ret; + + pdev = to_platform_device(mcpdm->dev); + pdata = pdev->dev.platform_data; + + pm_runtime_get_sync(&pdev->dev); +#ifndef CONFIG_PM_RUNTIME + if (pdata->device_enable) + pdata->device_enable(pdev); +#endif + spin_lock(&mcpdm->lock); + + if (!mcpdm->free) { + dev_err(mcpdm->dev, "McPDM interface is in use\n"); + spin_unlock(&mcpdm->lock); + ret = -EBUSY; + goto err; + } + mcpdm->free = 0; + + spin_unlock(&mcpdm->lock); + + /* Disable lines while request is ongoing */ + omap_mcpdm_write(MCPDM_CTRL, 0x00); + + ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler, + 0, "McPDM", (void *)mcpdm); + if (ret) { + dev_err(mcpdm->dev, "Request for McPDM IRQ failed\n"); + goto err; + } + + return 0; err: - clk_disable(mcpdm->clk); - return ret; + pm_runtime_put_sync(&pdev->dev); +#ifndef CONFIG_PM_RUNTIME + if (pdata->device_idle) + pdata->device_idle(pdev); +#endif + return ret; } void omap_mcpdm_free(void) { - spin_lock(&mcpdm->lock); - if (mcpdm->free) { - dev_err(mcpdm->dev, "McPDM interface is already free\n"); - spin_unlock(&mcpdm->lock); - return; - } - mcpdm->free = 1; - spin_unlock(&mcpdm->lock); - - clk_disable(mcpdm->clk); - - free_irq(mcpdm->irq, (void *)mcpdm); + struct platform_device *pdev; + struct omap_mcpdm_platform_data *pdata; + + pdev = to_platform_device(mcpdm->dev); + pdata = pdev->dev.platform_data; + + spin_lock(&mcpdm->lock); + if (mcpdm->free) { + dev_err(mcpdm->dev, "McPDM interface is already free\n"); + spin_unlock(&mcpdm->lock); + return; + } + mcpdm->free = 1; + spin_unlock(&mcpdm->lock); + + pm_runtime_put_sync(&pdev->dev); +#ifndef CONFIG_PM_RUNTIME + if (pdata->device_idle) + pdata->device_idle(pdev); +#endif + + free_irq(mcpdm->irq, (void *)mcpdm); } /* Enable/disable DC offset cancelation for the analog @@ -378,108 +402,107 @@ void omap_mcpdm_free(void) */ int omap_mcpdm_set_offset(int offset1, int offset2) { - int offset; + int offset; - if ((offset1 > DN_OFST_MAX) || (offset2 > DN_OFST_MAX)) - return -EINVAL; + if ((offset1 > DN_OFST_MAX) || (offset2 > DN_OFST_MAX)) + return -EINVAL; - offset = (offset1 << DN_OFST_RX1) | (offset2 << DN_OFST_RX2); + offset = (offset1 << DN_OFST_RX1) | (offset2 << DN_OFST_RX2); - /* offset cancellation for channel 1 */ - if (offset1) - offset |= DN_OFST_RX1_EN; - else - offset &= ~DN_OFST_RX1_EN; + /* offset cancellation for channel 1 */ + if (offset1) + offset |= DN_OFST_RX1_EN; + else + offset &= ~DN_OFST_RX1_EN; - /* offset cancellation for channel 2 */ - if (offset2) - offset |= DN_OFST_RX2_EN; - else - offset &= ~DN_OFST_RX2_EN; + /* offset cancellation for channel 2 */ + if (offset2) + offset |= DN_OFST_RX2_EN; + else + offset &= ~DN_OFST_RX2_EN; - omap_mcpdm_write(MCPDM_DN_OFFSET, offset); + omap_mcpdm_write(MCPDM_DN_OFFSET, offset); - return 0; + return 0; } static int __devinit omap_mcpdm_probe(struct platform_device *pdev) { - struct resource *res; - int ret = 0; - - mcpdm = kzalloc(sizeof(struct omap_mcpdm), GFP_KERNEL); - if (!mcpdm) { - ret = -ENOMEM; - goto exit; - } - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (res == NULL) { - dev_err(&pdev->dev, "no resource\n"); - goto err_resource; - } - - spin_lock_init(&mcpdm->lock); - mcpdm->free = 1; - mcpdm->io_base = ioremap(res->start, resource_size(res)); - if (!mcpdm->io_base) { - ret = -ENOMEM; - goto err_resource; - } - - mcpdm->irq = platform_get_irq(pdev, 0); - - mcpdm->clk = clk_get(&pdev->dev, "pdm_ck"); - if (IS_ERR(mcpdm->clk)) { - ret = PTR_ERR(mcpdm->clk); - dev_err(&pdev->dev, "unable to get pdm_ck: %d\n", ret); - goto err_clk; - } - - mcpdm->dev = &pdev->dev; - platform_set_drvdata(pdev, mcpdm); - - return 0; - -err_clk: - iounmap(mcpdm->io_base); + struct resource *res; + int ret = 0; + + mcpdm = kzalloc(sizeof(struct omap_mcpdm), GFP_KERNEL); + if (!mcpdm) { + ret = -ENOMEM; + goto exit; + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (res == NULL) { + dev_err(&pdev->dev, "no resource\n"); + goto err_resource; + } + + spin_lock_init(&mcpdm->lock); + mcpdm->free = 1; + + mcpdm->io_base = ioremap(res->start, resource_size(res)); + if (!mcpdm->io_base) { + ret = -ENOMEM; + goto err_resource; + } + + mcpdm->irq = platform_get_irq(pdev, 0); + if (!mcpdm->irq) { + ret = -EINVAL; + goto err_irq; + } + + mcpdm->dev = &pdev->dev; + platform_set_drvdata(pdev, mcpdm); + + return 0; + +err_irq: + iounmap(mcpdm->io_base); err_resource: - kfree(mcpdm); + kfree(mcpdm); exit: - return ret; + return ret; } static int __devexit omap_mcpdm_remove(struct platform_device *pdev) { - struct omap_mcpdm *mcpdm_ptr = platform_get_drvdata(pdev); + struct omap_mcpdm *mcpdm_ptr = platform_get_drvdata(pdev); + struct omap_mcpdm_platform_data *pdata = pdev->dev.platform_data; - platform_set_drvdata(pdev, NULL); + platform_set_drvdata(pdev, NULL); - clk_put(mcpdm_ptr->clk); + pm_runtime_put_sync(&pdev->dev); +#ifndef CONFIG_PM_RUNTIME + if (pdata->device_shutdown) + pdata->device_shutdown(pdev); +#endif + iounmap(mcpdm_ptr->io_base); - iounmap(mcpdm_ptr->io_base); + mcpdm_ptr->free = 0; + mcpdm_ptr->dev = NULL; - mcpdm_ptr->clk = NULL; - mcpdm_ptr->free = 0; - mcpdm_ptr->dev = NULL; + kfree(mcpdm_ptr); - kfree(mcpdm_ptr); - - return 0; + return 0; } static struct platform_driver omap_mcpdm_driver = { - .probe = omap_mcpdm_probe, - .remove = __devexit_p(omap_mcpdm_remove), - .driver = { - .name = "omap-mcpdm", - }, + .probe = omap_mcpdm_probe, + .remove = __devexit_p(omap_mcpdm_remove), + .driver = { + .name = "omap-mcpdm", + }, }; -static struct platform_device *omap_mcpdm_device; - static int __init omap_mcpdm_init(void) { - return platform_driver_register(&omap_mcpdm_driver); + return platform_driver_register(&omap_mcpdm_driver); } arch_initcall(omap_mcpdm_init); diff --git a/sound/soc/omap/mcpdm.h b/sound/soc/omap/mcpdm.h index 7bb326ef0886..ab649ab970b8 100644 --- a/sound/soc/omap/mcpdm.h +++ b/sound/soc/omap/mcpdm.h @@ -21,123 +21,126 @@ /* McPDM registers */ -#define MCPDM_REVISION 0x00 -#define MCPDM_SYSCONFIG 0x10 -#define MCPDM_IRQSTATUS_RAW 0x24 -#define MCPDM_IRQSTATUS 0x28 -#define MCPDM_IRQENABLE_SET 0x2C -#define MCPDM_IRQENABLE_CLR 0x30 -#define MCPDM_IRQWAKE_EN 0x34 -#define MCPDM_DMAENABLE_SET 0x38 -#define MCPDM_DMAENABLE_CLR 0x3C -#define MCPDM_DMAWAKEEN 0x40 -#define MCPDM_CTRL 0x44 -#define MCPDM_DN_DATA 0x48 -#define MCPDM_UP_DATA 0x4C -#define MCPDM_FIFO_CTRL_DN 0x50 -#define MCPDM_FIFO_CTRL_UP 0x54 -#define MCPDM_DN_OFFSET 0x58 +#define MCPDM_REVISION 0x00 +#define MCPDM_SYSCONFIG 0x10 +#define MCPDM_IRQSTATUS_RAW 0x24 +#define MCPDM_IRQSTATUS 0x28 +#define MCPDM_IRQENABLE_SET 0x2C +#define MCPDM_IRQENABLE_CLR 0x30 +#define MCPDM_IRQWAKE_EN 0x34 +#define MCPDM_DMAENABLE_SET 0x38 +#define MCPDM_DMAENABLE_CLR 0x3C +#define MCPDM_DMAWAKEEN 0x40 +#define MCPDM_CTRL 0x44 +#define MCPDM_DN_DATA 0x48 +#define MCPDM_UP_DATA 0x4C +#define MCPDM_FIFO_CTRL_DN 0x50 +#define MCPDM_FIFO_CTRL_UP 0x54 +#define MCPDM_DN_OFFSET 0x58 /* * MCPDM_IRQ bit fields * IRQSTATUS_RAW, IRQSTATUS, IRQENABLE_SET, IRQENABLE_CLR */ -#define MCPDM_DN_IRQ (1 << 0) -#define MCPDM_DN_IRQ_EMPTY (1 << 1) -#define MCPDM_DN_IRQ_ALMST_EMPTY (1 << 2) -#define MCPDM_DN_IRQ_FULL (1 << 3) +#define MCPDM_DN_IRQ (1 << 0) +#define MCPDM_DN_IRQ_EMPTY (1 << 1) +#define MCPDM_DN_IRQ_ALMST_EMPTY (1 << 2) +#define MCPDM_DN_IRQ_FULL (1 << 3) -#define MCPDM_UP_IRQ (1 << 8) -#define MCPDM_UP_IRQ_EMPTY (1 << 9) -#define MCPDM_UP_IRQ_ALMST_FULL (1 << 10) -#define MCPDM_UP_IRQ_FULL (1 << 11) +#define MCPDM_UP_IRQ (1 << 8) +#define MCPDM_UP_IRQ_EMPTY (1 << 9) +#define MCPDM_UP_IRQ_ALMST_FULL (1 << 10) +#define MCPDM_UP_IRQ_FULL (1 << 11) -#define MCPDM_DOWNLINK_IRQ_MASK 0x00F -#define MCPDM_UPLINK_IRQ_MASK 0xF00 +#define MCPDM_DOWNLINK_IRQ_MASK 0x00F +#define MCPDM_UPLINK_IRQ_MASK 0xF00 /* * MCPDM_DMAENABLE bit fields */ -#define DMA_DN_ENABLE 0x1 -#define DMA_UP_ENABLE 0x2 +#define DMA_DN_ENABLE 0x1 +#define DMA_UP_ENABLE 0x2 /* * MCPDM_CTRL bit fields */ -#define PDM_UP1_EN 0x0001 -#define PDM_UP2_EN 0x0002 -#define PDM_UP3_EN 0x0004 -#define PDM_DN1_EN 0x0008 -#define PDM_DN2_EN 0x0010 -#define PDM_DN3_EN 0x0020 -#define PDM_DN4_EN 0x0040 -#define PDM_DN5_EN 0x0080 -#define PDMOUTFORMAT 0x0100 -#define CMD_INT 0x0200 -#define STATUS_INT 0x0400 -#define SW_UP_RST 0x0800 -#define SW_DN_RST 0x1000 -#define PDM_UP_MASK 0x007 -#define PDM_DN_MASK 0x0F8 -#define PDM_CMD_MASK 0x200 -#define PDM_STATUS_MASK 0x400 - - -#define PDMOUTFORMAT_LJUST (0 << 8) -#define PDMOUTFORMAT_RJUST (1 << 8) +#define PDM_UP1_EN 0x0001 +#define PDM_UP2_EN 0x0002 +#define PDM_UP3_EN 0x0004 +#define PDM_DN1_EN 0x0008 +#define PDM_DN2_EN 0x0010 +#define PDM_DN3_EN 0x0020 +#define PDM_DN4_EN 0x0040 +#define PDM_DN5_EN 0x0080 +#define PDMOUTFORMAT 0x0100 +#define CMD_INT 0x0200 +#define STATUS_INT 0x0400 +#define SW_UP_RST 0x0800 +#define SW_DN_RST 0x1000 +#define PDM_UP_MASK 0x007 +#define PDM_DN_MASK 0x0F8 +#define PDM_CMD_MASK 0x200 +#define PDM_STATUS_MASK 0x400 + + +#define PDMOUTFORMAT_LJUST (0 << 8) +#define PDMOUTFORMAT_RJUST (1 << 8) /* * MCPDM_FIFO_CTRL bit fields */ -#define UP_THRES_MAX 0xF -#define DN_THRES_MAX 0xF +#define UP_THRES_MAX 0xF +#define DN_THRES_MAX 0xF /* * MCPDM_DN_OFFSET bit fields */ -#define DN_OFST_RX1_EN 0x0001 -#define DN_OFST_RX2_EN 0x0100 +#define DN_OFST_RX1_EN 0x0001 +#define DN_OFST_RX2_EN 0x0100 -#define DN_OFST_RX1 1 -#define DN_OFST_RX2 9 -#define DN_OFST_MAX 0x1F +#define DN_OFST_RX1 1 +#define DN_OFST_RX2 9 +#define DN_OFST_MAX 0x1F -#define MCPDM_UPLINK 1 -#define MCPDM_DOWNLINK 2 +#define MCPDM_UPLINK 1 +#define MCPDM_DOWNLINK 2 struct omap_mcpdm_link { - int irq_mask; - int threshold; - int format; - int channels; + int irq_mask; + int threshold; + int format; + int channels; }; struct omap_mcpdm_platform_data { - unsigned long phys_base; - u16 irq; + unsigned long phys_base; + u16 irq; + + int (*device_enable) (struct platform_device *pdev); + int (*device_shutdown) (struct platform_device *pdev); + int (*device_idle) (struct platform_device *pdev); }; struct omap_mcpdm { - struct device *dev; - unsigned long phys_base; - void __iomem *io_base; - u8 free; - int irq; - - spinlock_t lock; - struct omap_mcpdm_platform_data *pdata; - struct clk *clk; - struct omap_mcpdm_link *downlink; - struct omap_mcpdm_link *uplink; - struct completion irq_completion; - - int dn_channels; - int up_channels; + struct device *dev; + unsigned long phys_base; + void __iomem *io_base; + u8 free; + int irq; + + spinlock_t lock; + struct omap_mcpdm_platform_data *pdata; + struct omap_mcpdm_link *downlink; + struct omap_mcpdm_link *uplink; + struct completion irq_completion; + + int dn_channels; + int up_channels; }; extern void omap_mcpdm_start(int stream); diff --git a/sound/soc/omap/omap-abe.c b/sound/soc/omap/omap-abe.c new file mode 100644 index 000000000000..63e97a8a873b --- /dev/null +++ b/sound/soc/omap/omap-abe.c @@ -0,0 +1,780 @@ +/* + * omap-abe.c -- OMAP ALSA SoC DAI driver using Audio Backend + * + * Copyright (C) 2009 Texas Instruments + * + * Contact: Misael Lopez Cruz <x0052729@ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/device.h> +#include <linux/delay.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/initval.h> +#include <sound/soc.h> + +#include <plat/control.h> +#include <plat/dma-44xx.h> +#include <plat/dma.h> +#include "mcpdm.h" +#include "omap-pcm.h" +#include "omap-abe.h" +#include "../codecs/abe/abe_main.h" + +#ifdef CONFIG_SND_OMAP_VOICE_TEST +#include "omap-mcbsp.h" +#include <plat/mcbsp.h> +#endif + +#define OMAP_ABE_FORMATS (SNDRV_PCM_FMTBIT_S32_LE) + +#ifdef CONFIG_SND_OMAP_VOICE_TEST +static struct omap_pcm_dma_data omap_mcbsp_dai_dma_params[NUM_LINKS][2]; + +static const int omap44xx_dma_reqs[][2] = { + { OMAP44XX_DMA_MCBSP1_TX, OMAP44XX_DMA_MCBSP1_RX }, + { OMAP44XX_DMA_MCBSP2_TX, OMAP44XX_DMA_MCBSP2_RX }, + { OMAP44XX_DMA_MCBSP3_TX, OMAP44XX_DMA_MCBSP3_RX }, + { OMAP44XX_DMA_MCBSP4_TX, OMAP44XX_DMA_MCBSP4_RX }, +}; + +static const unsigned long omap44xx_mcbsp_port[][2] = { + { OMAP44XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR, + OMAP44XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR }, + { OMAP44XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR, + OMAP44XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR }, + { OMAP44XX_MCBSP3_BASE + OMAP_MCBSP_REG_DXR, + OMAP44XX_MCBSP3_BASE + OMAP_MCBSP_REG_DRR }, + { OMAP44XX_MCBSP4_BASE + OMAP_MCBSP_REG_DXR, + OMAP44XX_MCBSP4_BASE + OMAP_MCBSP_REG_DRR }, +}; +#endif +struct omap_mcpdm_data { + struct omap_mcpdm_link *links; + int active[2]; + int requested; +#ifdef CONFIG_SND_OMAP_VOICE_TEST + int mcbsp_requested; + struct omap_mcbsp_reg_cfg regs; + unsigned int fmt; + unsigned int in_freq; + int clk_div; +#endif +}; + +static struct omap_mcpdm_link omap_mcpdm_links[] = { + /* downlink */ + { + .irq_mask = MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL, + .threshold = 1, + .format = PDMOUTFORMAT_LJUST, + .channels = PDM_DN_MASK | PDM_CMD_MASK, + }, + /* uplink */ + { + .irq_mask = MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL, + .threshold = 1, + .format = PDMOUTFORMAT_LJUST, + .channels = PDM_UP1_EN | PDM_UP2_EN | + PDM_DN_MASK | PDM_CMD_MASK, + }, +}; + +static struct omap_mcpdm_data mcpdm_data = { + .links = omap_mcpdm_links, + .active = {0}, + .requested = 0, +#ifdef CONFIG_SND_OMAP_VOICE_TEST + .mcbsp_requested = 0, + .clk_div = 0, +#endif +}; + +/* + * Stream DMA parameters + */ +static struct omap_pcm_dma_data omap_abe_dai_dma_params[] = { + { + .name = "Audio playback", + .dma_req = OMAP44XX_DMA_ABE_REQ_0, + .data_type = OMAP_DMA_DATA_TYPE_S32, + .sync_mode = OMAP_DMA_SYNC_PACKET, + }, + { + .name = "Audio capture", + .dma_req = OMAP44XX_DMA_ABE_REQ_2, + .data_type = OMAP_DMA_DATA_TYPE_S32, + .sync_mode = OMAP_DMA_SYNC_PACKET, + }, +}; + +static int omap_abe_dai_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + struct omap_mcpdm_data *mcpdm_priv = cpu_dai->private_data; + int err = 0; + + if (!mcpdm_priv->requested++) + err = omap_mcpdm_request(); + + return err; +} + +static int omap_abe_dai_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + struct omap_mcpdm_data *mcpdm_priv = cpu_dai->private_data; + struct omap_mcpdm_link *mcpdm_links = mcpdm_priv->links; + int stream = substream->stream; + int err = 0; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (substream->stream) { + if (!mcpdm_priv->active[stream]++) { + err = omap_mcpdm_capture_open(&mcpdm_links[stream]); + omap_mcpdm_start(stream); + } + } + break; + + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + break; + default: + err = -EINVAL; + } + + return err; +} + +static void omap_abe_dai_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + struct omap_mcpdm_data *mcpdm_priv = cpu_dai->private_data; + + if (!--mcpdm_priv->requested) + omap_mcpdm_free(); +} + +static int omap_abe_dai_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + struct omap_mcpdm_data *mcpdm_priv = cpu_dai->private_data; + struct omap_mcpdm_link *mcpdm_links = mcpdm_priv->links; + int err=0, stream = substream->stream, dma_req; + abe_dma_t dma_params; + + /* get abe dma data */ + switch (cpu_dai->id) { + case OMAP_ABE_MM_DAI: + if (stream == SNDRV_PCM_STREAM_CAPTURE) { + abe_read_port_address(MM_UL2_PORT, &dma_params); + dma_req = OMAP44XX_DMA_ABE_REQ_4; + } else { + abe_read_port_address(MM_DL_PORT, &dma_params); + dma_req = OMAP44XX_DMA_ABE_REQ_0; + } + break; + case OMAP_ABE_TONES_DL_DAI: + if (stream == SNDRV_PCM_STREAM_CAPTURE) { + return -EINVAL; + } else { + abe_read_port_address(TONES_DL_PORT, &dma_params); + dma_req = OMAP44XX_DMA_ABE_REQ_5; + } + break; + case OMAP_ABE_VOICE_DAI: + if (stream == SNDRV_PCM_STREAM_CAPTURE) { + abe_read_port_address(VX_UL_PORT, &dma_params); + dma_req = OMAP44XX_DMA_ABE_REQ_2; + } else { + abe_read_port_address(VX_DL_PORT, &dma_params); + dma_req = OMAP44XX_DMA_ABE_REQ_1; + } + break; + case OMAP_ABE_DIG_UPLINK_DAI: + if (stream == SNDRV_PCM_STREAM_CAPTURE) { + abe_read_port_address(MM_UL_PORT, &dma_params); + dma_req = OMAP44XX_DMA_ABE_REQ_3; + + } else { + return -EINVAL; + } + break; + case OMAP_ABE_VIB_DAI: + if (stream == SNDRV_PCM_STREAM_CAPTURE) { + return -EINVAL; + } else { + abe_read_port_address(VIB_DL_PORT, &dma_params); + dma_req = OMAP44XX_DMA_ABE_REQ_6; + } + break; + default: + return -EINVAL; + } + + omap_abe_dai_dma_params[stream].dma_req = dma_req; + omap_abe_dai_dma_params[stream].port_addr = + (unsigned long)dma_params.data; + omap_abe_dai_dma_params[stream].packet_size = dma_params.iter; + snd_soc_dai_set_dma_data(cpu_dai, substream, + &omap_abe_dai_dma_params[stream]); + + if (!substream->stream) { + if (!mcpdm_priv->active[stream]++) { + err = omap_mcpdm_playback_open(&mcpdm_links[stream]); + msleep(5); + omap_mcpdm_start(stream); + } + /* Increment by 2 because 2 calls of HW free */ + mcpdm_priv->active[stream]++; + } + + return err; +} + +static int omap_abe_dai_hw_free(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + struct omap_mcpdm_data *mcpdm_priv = cpu_dai->private_data; + struct omap_mcpdm_link *mcpdm_links = mcpdm_priv->links; + int stream = substream->stream; + int err = 0; + + if (mcpdm_priv->active[stream] == 1) { + if (stream == SNDRV_PCM_STREAM_PLAYBACK) { + err = omap_mcpdm_playback_close(&mcpdm_links[stream]); + if (mcpdm_priv->active[0] == 0) + err = omap_mcpdm_capture_close(&mcpdm_links[stream]); + } + else { + if (mcpdm_priv->active[1] == 0) + err = omap_mcpdm_capture_close(&mcpdm_links[stream]); + } + omap_mcpdm_stop(stream); + mcpdm_priv->active[stream] = 0; + } else if (mcpdm_priv->active[stream] != 0) { + mcpdm_priv->active[stream]--; + } + + return err; +} + +#ifdef CONFIG_SND_OMAP_VOICE_TEST +static int omap_abe_vx_dai_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + struct omap_mcpdm_data *mcpdm_priv = cpu_dai->private_data; + int err = 0, bus_id = 1, max_period, dma_op_mode; + + if (!mcpdm_priv->requested++) { + err = omap_mcpdm_request(); + } + if (!mcpdm_priv->mcbsp_requested++) { + omap_mcbsp_request(bus_id); + + dma_op_mode = omap_mcbsp_get_dma_op_mode(bus_id); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + max_period = omap_mcbsp_get_max_rx_threshold(bus_id); + else + max_period = omap_mcbsp_get_max_tx_threshold(bus_id); + + max_period++; + max_period <<= 1; + + if (dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) + snd_pcm_hw_constraint_minmax(substream->runtime, + SNDRV_PCM_HW_PARAM_PERIOD_BYTES, + 32, max_period); + } + + return err; +} + +static void omap_abe_vx_dai_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + struct omap_mcpdm_data *mcpdm_priv = cpu_dai->private_data; + int bus_id = 1; + + if (!--mcpdm_priv->requested) + omap_mcpdm_free(); + + if (!--mcpdm_priv->mcbsp_requested) + omap_mcbsp_free(bus_id); +} + +static int omap_abe_vx_dai_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + struct omap_mcpdm_data *mcpdm_priv = cpu_dai->private_data; + struct omap_mcpdm_link *mcpdm_links = mcpdm_priv->links; + int stream = substream->stream, bus_id = 1; + int err = 0; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + if (substream->stream) { + if (!mcpdm_priv->active[stream]++) { + err = omap_mcpdm_capture_open(&mcpdm_links[stream]); + omap_mcpdm_start(stream); + } + omap_mcbsp_start(bus_id, stream, !stream); + } + break; + + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + break; + default: + err = -EINVAL; + } + + return err; +} + +static int omap_abe_vx_dai_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + struct omap_mcpdm_data *mcpdm_priv = cpu_dai->private_data; + struct omap_mcpdm_link *mcpdm_links = mcpdm_priv->links; + int err = 0, stream = substream->stream, dma_req, dma, bus_id = 1, id = 1; + int wlen, channels, wpf, sync_mode = OMAP_DMA_SYNC_ELEMENT; + unsigned long port; + abe_dma_t dma_params; + struct omap_mcbsp_reg_cfg *regs = &mcpdm_priv->regs; + unsigned int format, framesize, master, div; + + /* get abe dma data */ + switch (cpu_dai->id) { + case OMAP_ABE_VOICE_DAI: + if (stream == SNDRV_PCM_STREAM_CAPTURE) { + abe_read_port_address(VX_UL_PORT, &dma_params); + dma_req = OMAP44XX_DMA_ABE_REQ_2; + } else { + abe_read_port_address(VX_DL_PORT, &dma_params); + dma_req = OMAP44XX_DMA_ABE_REQ_1; + } + break; + default: + return -EINVAL; + } + + omap_abe_dai_dma_params[stream].dma_req = dma_req; + omap_abe_dai_dma_params[stream].port_addr = + (unsigned long)dma_params.data; + omap_abe_dai_dma_params[stream].packet_size = dma_params.iter; + snd_soc_dai_set_dma_data(cpu_dai, substream, + &omap_abe_dai_dma_params[stream]); + + dma = omap44xx_dma_reqs[bus_id][substream->stream]; + port = omap44xx_mcbsp_port[bus_id][substream->stream]; + + omap_mcbsp_dai_dma_params[id][substream->stream].name = + substream->stream ? "Audio Capture" : "Audio Playback"; + omap_mcbsp_dai_dma_params[id][substream->stream].dma_req = dma; + omap_mcbsp_dai_dma_params[id][substream->stream].port_addr = port; + omap_mcbsp_dai_dma_params[id][substream->stream].sync_mode = sync_mode; + omap_mcbsp_dai_dma_params[id][substream->stream].data_type = + OMAP_DMA_DATA_TYPE_S16; + + format = mcpdm_priv->fmt & SND_SOC_DAIFMT_FORMAT_MASK; + + /* FIX-ME: Using mono format per default */ + wpf = channels = 1; + if (channels == 2 && format == SND_SOC_DAIFMT_I2S) { + /* Use dual-phase frames */ + regs->rcr2 |= RPHASE; + regs->xcr2 |= XPHASE; + /* Set 1 word per (McBSP) frame for phase1 and phase2 */ + wpf--; + regs->rcr2 |= RFRLEN2(wpf - 1); + regs->xcr2 |= XFRLEN2(wpf - 1); + } + + regs->rcr1 |= RFRLEN1(wpf - 1); + regs->xcr1 |= XFRLEN1(wpf - 1); + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + case SNDRV_PCM_FORMAT_S32_LE: + /* Set word lengths */ + wlen = 16; + regs->rcr2 |= RWDLEN2(OMAP_MCBSP_WORD_16); + regs->rcr1 |= RWDLEN1(OMAP_MCBSP_WORD_16); + regs->xcr2 |= XWDLEN2(OMAP_MCBSP_WORD_16); + regs->xcr1 |= XWDLEN1(OMAP_MCBSP_WORD_16); + break; + default: + /* Unsupported PCM format */ + return -EINVAL; + } + + /* In McBSP master modes, FRAME (i.e. sample rate) is generated + * by _counting_ BCLKs. Calculate frame size in BCLKs */ + master = mcpdm_priv->fmt & SND_SOC_DAIFMT_MASTER_MASK; + if (master == SND_SOC_DAIFMT_CBS_CFS) { + div = mcpdm_priv->clk_div ? mcpdm_priv->clk_div : 1; + framesize = (mcpdm_priv->in_freq / div) / params_rate(params); + + if (framesize < wlen * channels) { + printk(KERN_ERR "%s: not enough bandwidth for desired rate and" + "channels\n", __func__); + return -EINVAL; + } + } else { + framesize = wlen * channels; + } + + /* Set FS period and length in terms of bit clock periods */ + switch (format) { + case SND_SOC_DAIFMT_I2S: + regs->srgr2 |= FPER(framesize - 1); + regs->srgr1 |= FWID((framesize >> 1) - 1); + break; + case SND_SOC_DAIFMT_DSP_A: + case SND_SOC_DAIFMT_DSP_B: + regs->srgr2 |= FPER(framesize - 1); + regs->srgr1 |= FWID(0); + break; + } + + omap_mcbsp_config(bus_id, &mcpdm_priv->regs); + if (!substream->stream) { + if (!mcpdm_priv->active[stream]++) { + err = omap_mcpdm_playback_open(&mcpdm_links[stream]); + msleep(5); + omap_mcpdm_start(stream); + } + omap_mcbsp_start(bus_id, stream, !stream); + /* Increment by 2 because 2 calls of HW free */ + mcpdm_priv->active[stream]++; + } + + return err; +} + +static int omap_abe_vx_dai_hw_free(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + struct omap_mcpdm_data *mcpdm_priv = cpu_dai->private_data; + struct omap_mcpdm_link *mcpdm_links = mcpdm_priv->links; + int stream = substream->stream; + int err=0, bus_id = 1; + + if (mcpdm_priv->active[stream] == 1) { + if (stream == SNDRV_PCM_STREAM_PLAYBACK) { + err = omap_mcpdm_playback_close(&mcpdm_links[stream]); + if (mcpdm_priv->active[0] == 0) + err = omap_mcpdm_capture_close(&mcpdm_links[stream]); + } + else { + if (mcpdm_priv->active[1] == 0) + err = omap_mcpdm_capture_close(&mcpdm_links[stream]); + } + omap_mcpdm_stop(stream); + /* Stop McBSP */ + omap_mcbsp_stop(bus_id, !stream, stream); + mcpdm_priv->active[stream] = 0; + } else if (mcpdm_priv->active[stream] != 0) { + mcpdm_priv->active[stream]--; + } + + return err; +} + +/* + * This must be called before _set_clkdiv and _set_sysclk since McBSP register + * cache is initialized here + */ +static int omap_abe_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, + unsigned int fmt) +{ + struct omap_mcpdm_data *mcpdm_priv = cpu_dai->private_data; + struct omap_mcbsp_reg_cfg *regs = &mcpdm_priv->regs; + unsigned int temp_fmt = fmt; + + mcpdm_priv->fmt = fmt; + memset(regs, 0, sizeof(*regs)); + /* Generic McBSP register settings */ + regs->spcr2 |= XINTM(3) | FREE; + regs->spcr1 |= RINTM(3); + + if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) { + regs->xccr = DXENDLY(1) | XDMAEN; + regs->rccr = RFULL_CYCLE | RDMAEN; + } + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + /* 1-bit data delay */ + regs->rcr2 |= RDATDLY(1); + regs->xcr2 |= XDATDLY(1); + break; + case SND_SOC_DAIFMT_DSP_A: + /* 1-bit data delay */ + regs->rcr2 |= RDATDLY(1); + regs->xcr2 |= XDATDLY(1); + /* Invert FS polarity configuration */ + temp_fmt ^= SND_SOC_DAIFMT_NB_IF; + break; + case SND_SOC_DAIFMT_DSP_B: + /* 0-bit data delay */ + regs->rcr2 |= RDATDLY(0); + regs->xcr2 |= XDATDLY(0); + /* Invert FS polarity configuration */ + temp_fmt ^= SND_SOC_DAIFMT_NB_IF; + break; + default: + /* Unsupported data format */ + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + /* McBSP master. Set FS and bit clocks as outputs */ + regs->pcr0 |= FSXM | FSRM | + CLKXM | CLKRM; + /* Sample rate generator drives the FS */ + regs->srgr2 |= FSGM; + break; + case SND_SOC_DAIFMT_CBM_CFM: + /* McBSP slave */ + break; + default: + /* Unsupported master/slave configuration */ + return -EINVAL; + } + + /* Set bit clock (CLKX/CLKR) and FS polarities */ + switch (temp_fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + /* + * Normal BCLK + FS. + * FS active low. TX data driven on falling edge of bit clock + * and RX data sampled on rising edge of bit clock. + */ + regs->pcr0 |= FSXP | FSRP | + CLKXP | CLKRP; + break; + case SND_SOC_DAIFMT_NB_IF: + regs->pcr0 |= CLKXP | CLKRP; + break; + case SND_SOC_DAIFMT_IB_NF: + regs->pcr0 |= FSXP | FSRP; + break; + case SND_SOC_DAIFMT_IB_IF: + break; + default: + return -EINVAL; + } + + return 0; +} + +static int omap_abe_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai, + int clk_id, unsigned int freq, + int dir) +{ + struct omap_mcpdm_data *mcpdm_priv = cpu_dai->private_data; + struct omap_mcbsp_reg_cfg *regs = &mcpdm_priv->regs; + int err = 0; + + mcpdm_priv->in_freq = freq; + switch (clk_id) { + case OMAP_MCBSP_SYSCLK_CLK: + regs->srgr2 |= CLKSM; + break; + case OMAP_MCBSP_SYSCLK_CLKS_FCLK: + if (cpu_is_omap44xx()) { + regs->srgr2 |= CLKSM; + break; + } + default: + err = -ENODEV; + } + + return err; +} + +static int omap_abe_mcbsp_dai_set_clkdiv(struct snd_soc_dai *cpu_dai, + int div_id, int div) +{ + struct omap_mcpdm_data *mcpdm_priv = cpu_dai->private_data; + struct omap_mcbsp_reg_cfg *regs = &mcpdm_priv->regs; + + if (div_id != OMAP_MCBSP_CLKGDV) + return -ENODEV; + + regs->srgr1 |= CLKGDV(div - 1); + + return 0; +} +#endif + +static struct snd_soc_dai_ops omap_abe_dai_ops = { + .startup = omap_abe_dai_startup, + .shutdown = omap_abe_dai_shutdown, + .trigger = omap_abe_dai_trigger, + .hw_params = omap_abe_dai_hw_params, + .hw_free = omap_abe_dai_hw_free, +}; + +static struct snd_soc_dai_ops omap_abe_vx_dai_ops = { +#ifdef CONFIG_SND_OMAP_VOICE_TEST + .startup = omap_abe_vx_dai_startup, + .shutdown = omap_abe_vx_dai_shutdown, + .hw_params = omap_abe_vx_dai_hw_params, + .hw_free = omap_abe_vx_dai_hw_free, + .trigger = omap_abe_vx_dai_trigger, + .set_fmt = omap_abe_mcbsp_dai_set_dai_fmt, + .set_sysclk = omap_abe_mcbsp_dai_set_dai_sysclk, + .set_clkdiv = omap_abe_mcbsp_dai_set_clkdiv, +#else + .startup = omap_abe_dai_startup, + .shutdown = omap_abe_dai_shutdown, + .trigger = omap_abe_dai_trigger, + .hw_params = omap_abe_dai_hw_params, + .hw_free = omap_abe_dai_hw_free, +#endif +}; + +struct snd_soc_dai omap_abe_dai[] = { + { + .name = "omap-abe-mm", + .id = OMAP_ABE_MM_DAI, + .playback = { + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, + .formats = OMAP_ABE_FORMATS, + }, + .capture = { + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_48000, + .formats = OMAP_ABE_FORMATS, + }, + .ops = &omap_abe_dai_ops, + .private_data = &mcpdm_data, + }, + { + .name = "omap-abe-tone-dl", + .id = OMAP_ABE_TONES_DL_DAI, + .playback = { + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, + .formats = OMAP_ABE_FORMATS, + }, + .ops = &omap_abe_dai_ops, + .private_data = &mcpdm_data, + }, + { + .name = "omap-abe-voice", + .id = OMAP_ABE_VOICE_DAI, + .playback = { + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, + .formats = OMAP_ABE_FORMATS, + }, + .capture = { + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, + .formats = OMAP_ABE_FORMATS, + }, + .ops = &omap_abe_vx_dai_ops, + .private_data = &mcpdm_data, + }, + { + .name = "omap-abe-dig-ul", + .id = OMAP_ABE_DIG_UPLINK_DAI, + .capture = { + .channels_min = 2, + .channels_max = 8, + .rates = SNDRV_PCM_RATE_48000, + .formats = OMAP_ABE_FORMATS, + }, + .ops = &omap_abe_dai_ops, + .private_data = &mcpdm_data, + }, + { + .name = "omap-abe-vib", + .id = OMAP_ABE_VIB_DAI, + .playback = { + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_48000, + .formats = OMAP_ABE_FORMATS, + }, + .ops = &omap_abe_dai_ops, + .private_data = &mcpdm_data, + }, +}; +EXPORT_SYMBOL_GPL(omap_abe_dai); + +static int __init snd_omap_abe_init(void) +{ + return snd_soc_register_dais(omap_abe_dai, ARRAY_SIZE(omap_abe_dai)); +} +module_init(snd_omap_abe_init); + +static void __exit snd_omap_abe_exit(void) +{ + snd_soc_unregister_dais(omap_abe_dai, ARRAY_SIZE(omap_abe_dai)); +} +module_exit(snd_omap_abe_exit); + +MODULE_AUTHOR("Misael Lopez Cruz <x0052729@ti.com>"); +MODULE_DESCRIPTION("OMAP ABE SoC Interface"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/omap/omap-abe.h b/sound/soc/omap/omap-abe.h new file mode 100644 index 000000000000..44f23940601f --- /dev/null +++ b/sound/soc/omap/omap-abe.h @@ -0,0 +1,35 @@ +/* + * omap-abe.h + * + * Copyright (C) 2009 Texas Instruments + * + * Contact: Misael Lopez Cruz <x0052729@ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#ifndef __OMAP_MCPDM_H__ +#define __OMAP_MCPDM_H__ + +#define OMAP_ABE_MM_DAI 0 +#define OMAP_ABE_TONES_DL_DAI 1 +#define OMAP_ABE_VOICE_DAI 2 +#define OMAP_ABE_DIG_UPLINK_DAI 3 +#define OMAP_ABE_VIB_DAI 4 + +extern struct snd_soc_dai omap_abe_dai[]; + +#endif /* End of __OMAP_MCPDM_H__ */ diff --git a/sound/soc/omap/omap-hdmi.c b/sound/soc/omap/omap-hdmi.c new file mode 100644 index 000000000000..e7b39ac685ba --- /dev/null +++ b/sound/soc/omap/omap-hdmi.c @@ -0,0 +1,241 @@ +/* + * omap-hdmi.c -- OMAP ALSA SoC DAI driver for HDMI audio + * + * Copyright (C) 2009 Texas Instruments + * + * Contact: Jorge Candelaria <x0107209@ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/device.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/initval.h> +#include <sound/soc.h> + +#include <plat/control.h> +#include <plat/dma.h> +#include "omap-pcm.h" +#include "omap-hdmi.h" + +#define CONFIG_HDMI_NO_IP_MODULE +#define OMAP_HDMI_RATES (SNDRV_PCM_RATE_48000) + +/* Currently, we support only 16b samples at HDMI */ +#define OMAP_HDMI_FORMATS (SNDRV_PCM_FMTBIT_S16_LE) + +#ifdef CONFIG_HDMI_NO_IP_MODULE +#include <plat/hdmi_lib.h> +#else +struct hdmi_ip_driver hdmi_audio_core; +#endif + +static struct omap_pcm_dma_data omap_hdmi_dai_dma_params = { + .name = "HDMI playback", + .dma_req = OMAP44XX_DMA_DSS_HDMI_REQ, + .port_addr = HDMI_WP + HDMI_WP_AUDIO_DATA, + .sync_mode = OMAP_DMA_SYNC_PACKET, +}; + +static int omap_hdmi_dai_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + int err = 0; +#ifdef CONFIG_HDMI_NO_IP_MODULE + err = hdmi_w1_wrapper_enable(HDMI_WP); +#else + if (hdmi_audio_core.module_loaded) + err = hdmi_audio_core.wrapper_enable(HDMI_WP); + else + printk(KERN_WARNING "Warning: hdmi_core.ko is not enabled"); +#endif + return err; +} + +static void omap_hdmi_dai_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + int err = 0; +#ifdef CONFIG_HDMI_NO_IP_MODULE + err = hdmi_w1_wrapper_disable(HDMI_WP); +#else + if (hdmi_audio_core.module_loaded) + err = hdmi_audio_core.wrapper_disable(HDMI_WP); + else + printk(KERN_WARNING "Warning: hdmi_core.ko is not enabled"); +#endif + return err; +} + +static int omap_hdmi_dai_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + int err = 0; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: +#ifdef CONFIG_HDMI_NO_IP_MODULE + err = hdmi_w1_start_audio_transfer(HDMI_WP); +#else + if (hdmi_audio_core.module_loaded) + err = hdmi_audio_core.start_audio(HDMI_WP); + else + printk(KERN_WARNING "Warning: hdmi_core.ko is " + "not enabled"); +#endif + break; + + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: +#ifdef CONFIG_HDMI_NO_IP_MODULE + err = hdmi_w1_stop_audio_transfer(HDMI_WP); +#else + if (hdmi_audio_core.module_loaded) + err = hdmi_audio_core.stop_audio(HDMI_WP); + else + printk(KERN_WARNING "Warning: hdmi_core.ko is " + "not enabled"); +#endif + break; + default: + err = -EINVAL; + } + + return err; +} + +static int omap_hdmi_dai_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + int err = 0; + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + case SNDRV_PCM_FORMAT_S32_LE: + omap_hdmi_dai_dma_params.data_type = OMAP_DMA_DATA_TYPE_S32; + break; + + default: + err = -EINVAL; + } + omap_hdmi_dai_dma_params.packet_size = 0x20; + + snd_soc_dai_set_dma_data(cpu_dai, substream, + &omap_hdmi_dai_dma_params); + + return err; +} + +static struct snd_soc_dai_ops omap_hdmi_dai_ops = { + .startup = omap_hdmi_dai_startup, + .shutdown = omap_hdmi_dai_shutdown, + .trigger = omap_hdmi_dai_trigger, + .hw_params = omap_hdmi_dai_hw_params, +}; + +struct snd_soc_dai omap_hdmi_dai = { + .name = "omap-hdmi-dai", + .id = -1, + .playback = { + .channels_min = 2, + /* currently we support only stereo HDMI */ + .channels_max = 2, + .rates = OMAP_HDMI_RATES, + .formats = OMAP_HDMI_FORMATS, + }, + .ops = &omap_hdmi_dai_ops, +}; +EXPORT_SYMBOL_GPL(omap_hdmi_dai); + +static int __init snd_omap_hdmi_init(void) +{ +#ifdef CONFIG_HDMI_NO_IP_MODULE + hdmi_lib_init(); +#else + hdmi_audio_core_stub_init(); +#endif + return snd_soc_register_dai(&omap_hdmi_dai); +} +module_init(snd_omap_hdmi_init); + +static void __exit snd_omap_hdmi_exit(void) +{ + snd_soc_unregister_dai(&omap_hdmi_dai); +} +module_exit(snd_omap_hdmi_exit); + +#ifndef CONFIG_HDMI_NO_IP_MODULE + +/* stub */ +int audio_stub_lib_init(void) +{ + printk(KERN_WARNING "ERR: please install HDMI IP kernel module\n"); + return -1; +} +void audio_stub_lib_exit(void) +{ + printk(KERN_WARNING "HDMI module does not exist!\n"); +} + +#define EXPORT_SYMTAB + +/* HDMI panel driver */ +void hdmi_audio_core_stub_init(void) +{ + hdmi_audio_core.stop_video = NULL; + hdmi_audio_core.start_video = NULL; + hdmi_audio_core.wrapper_enable = NULL; + hdmi_audio_core.wrapper_disable = NULL; + hdmi_audio_core.stop_audio = NULL; + hdmi_audio_core.start_audio = NULL; + hdmi_audio_core.config_video = NULL; + hdmi_audio_core.set_wait_pll = NULL; + hdmi_audio_core.set_wait_pwr = NULL; + hdmi_audio_core.set_wait_srst = NULL; + hdmi_audio_core.read_edid = NULL; + hdmi_audio_core.ip_init = audio_stub_lib_init; + hdmi_audio_core.ip_exit = audio_stub_lib_exit; + hdmi_audio_core.module_loaded = 0; +} + +void hdmi_audio_core_lib_set(struct hdmi_ip_driver *ipc) +{ + hdmi_audio_core.module_loaded = ipc->module_loaded; + if (ipc->module_loaded) { + hdmi_audio_core.wrapper_enable = ipc->wrapper_enable; + hdmi_audio_core.wrapper_disable = ipc->wrapper_disable; + hdmi_audio_core.start_audio = ipc->start_audio; + hdmi_audio_core.stop_audio = ipc->stop_audio; + } +} +EXPORT_SYMBOL(hdmi_audio_core_lib_set); + +#endif + + +MODULE_AUTHOR("Jorge Candelaria <x0107209@ti.com"); +MODULE_DESCRIPTION("OMAP HDMI SoC Interface"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/omap/omap-hdmi.h b/sound/soc/omap/omap-hdmi.h new file mode 100644 index 000000000000..34142c9a551e --- /dev/null +++ b/sound/soc/omap/omap-hdmi.h @@ -0,0 +1,54 @@ +/* + * omap-hdmi.h + * + * Copyright (C) 2009 Texas Instruments + * + * Contact: Jorge Candelaria <x0107209@ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#ifndef __OMAP_HDMI_H__ +#define __OMAP_HDMI_H__ + +extern struct snd_soc_dai omap_hdmi_dai; + +#ifndef CONFIG_HDMI_NO_IP_MODULE + +#define HDMI_WP 0x58006000 +#define HDMI_WP_AUDIO_DATA 0x8Cul + +struct hdmi_ip_driver { + int (*stop_video)(u32); + int (*start_video)(u32); + int (*wrapper_enable)(u32); + int (*wrapper_disable)(u32); + int (*stop_audio)(u32); + int (*start_audio)(u32); + int (*config_video)(struct hdmi_timing_t, u32, u32); + int (*set_wait_pll)(u32, enum hdmi_pllpwr_cmd); + int (*set_wait_pwr)(u32, enum hdmi_phypwr_cmd); + int (*set_wait_srst)(void); + int (*read_edid)(u32, u8 *d); + int (*ip_init)(void); + void (*ip_exit)(void); + int module_loaded; +}; + +extern void hdmi_audio_core_stub_init(void); +#endif + +#endif /* End of __OMAP_HDMI_H__ */ diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index 8ad9dc901007..4ae59353eb8e 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -104,6 +104,17 @@ static const int omap24xx_dma_reqs[][2] = { static const int omap24xx_dma_reqs[][2] = {}; #endif +#if defined(CONFIG_ARCH_OMAP4) +static const int omap44xx_dma_reqs[][2] = { + { OMAP44XX_DMA_MCBSP1_TX, OMAP44XX_DMA_MCBSP1_RX }, + { OMAP44XX_DMA_MCBSP2_TX, OMAP44XX_DMA_MCBSP2_RX }, + { OMAP44XX_DMA_MCBSP3_TX, OMAP44XX_DMA_MCBSP3_RX }, + { OMAP44XX_DMA_MCBSP4_TX, OMAP44XX_DMA_MCBSP4_RX }, +}; +#else +static const int omap44xx_dma_reqs[][2] = {}; +#endif + #if defined(CONFIG_ARCH_OMAP2420) static const unsigned long omap2420_mcbsp_port[][2] = { { OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1, @@ -170,6 +181,21 @@ static void omap_mcbsp_set_threshold(struct snd_pcm_substream *substream) omap_mcbsp_set_rx_threshold(mcbsp_data->bus_id, samples - 1); } +#if defined(CONFIG_ARCH_OMAP4) +static const unsigned long omap44xx_mcbsp_port[][2] = { + { OMAP44XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR, + OMAP44XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR }, + { OMAP44XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR, + OMAP44XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR }, + { OMAP44XX_MCBSP3_BASE + OMAP_MCBSP_REG_DXR, + OMAP44XX_MCBSP3_BASE + OMAP_MCBSP_REG_DRR }, + { OMAP44XX_MCBSP4_BASE + OMAP_MCBSP_REG_DXR, + OMAP44XX_MCBSP4_BASE + OMAP_MCBSP_REG_DRR }, +}; +#else +static const unsigned long omap44xx_mcbsp_port[][2] = {}; +#endif + static int omap_mcbsp_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { @@ -182,7 +208,7 @@ static int omap_mcbsp_dai_startup(struct snd_pcm_substream *substream, if (!cpu_dai->active) err = omap_mcbsp_request(bus_id); - if (cpu_is_omap343x()) { + if (cpu_is_omap343x() || cpu_is_omap44xx()) { int dma_op_mode = omap_mcbsp_get_dma_op_mode(bus_id); int max_period; @@ -287,6 +313,9 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, if (omap_mcbsp_get_dma_op_mode(bus_id) == MCBSP_DMA_MODE_THRESHOLD) sync_mode = OMAP_DMA_SYNC_FRAME; + } else if (cpu_is_omap44xx()) { + dma = omap44xx_dma_reqs[bus_id][substream->stream]; + port = omap44xx_mcbsp_port[bus_id][substream->stream]; } else { return -ENODEV; } @@ -295,8 +324,18 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, omap_mcbsp_dai_dma_params[id][substream->stream].dma_req = dma; omap_mcbsp_dai_dma_params[id][substream->stream].port_addr = port; omap_mcbsp_dai_dma_params[id][substream->stream].sync_mode = sync_mode; - omap_mcbsp_dai_dma_params[id][substream->stream].data_type = - OMAP_DMA_DATA_TYPE_S16; + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + omap_mcbsp_dai_dma_params[id][substream->stream].data_type = + OMAP_DMA_DATA_TYPE_S16; + break; + case SNDRV_PCM_FORMAT_S32_LE: + omap_mcbsp_dai_dma_params[id][substream->stream].data_type = + OMAP_DMA_DATA_TYPE_S32; + break; + default: + return -EINVAL; + } snd_soc_dai_set_dma_data(cpu_dai, substream, &omap_mcbsp_dai_dma_params[id][substream->stream]); @@ -330,6 +369,14 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, regs->xcr2 |= XWDLEN2(OMAP_MCBSP_WORD_16); regs->xcr1 |= XWDLEN1(OMAP_MCBSP_WORD_16); break; + case SNDRV_PCM_FORMAT_S32_LE: + /* Set word lengths */ + wlen = 32; + regs->rcr2 |= RWDLEN2(OMAP_MCBSP_WORD_32); + regs->rcr1 |= RWDLEN1(OMAP_MCBSP_WORD_32); + regs->xcr2 |= XWDLEN2(OMAP_MCBSP_WORD_32); + regs->xcr1 |= XWDLEN1(OMAP_MCBSP_WORD_32); + break; default: /* Unsupported PCM format */ return -EINVAL; @@ -389,11 +436,11 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, regs->spcr2 |= XINTM(3) | FREE; regs->spcr1 |= RINTM(3); /* RFIG and XFIG are not defined in 34xx */ - if (!cpu_is_omap34xx()) { + if (!cpu_is_omap34xx() && !cpu_is_omap44xx()) { regs->rcr2 |= RFIG; regs->xcr2 |= XFIG; } - if (cpu_is_omap2430() || cpu_is_omap34xx()) { + if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) { regs->xccr = DXENDLY(1) | XDMAEN | XDISABLE; regs->rccr = RFULL_CYCLE | RDMAEN | RDISABLE; } @@ -582,6 +629,10 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai, regs->srgr2 |= CLKSM; break; case OMAP_MCBSP_SYSCLK_CLKS_FCLK: + if (cpu_is_omap44xx()) { + regs->srgr2 |= CLKSM; + break; + } case OMAP_MCBSP_SYSCLK_CLKS_EXT: err = omap_mcbsp_dai_set_clks_src(mcbsp_data, clk_id); break; @@ -623,13 +674,15 @@ static struct snd_soc_dai_ops omap_mcbsp_dai_ops = { .channels_min = 1, \ .channels_max = 16, \ .rates = OMAP_MCBSP_RATES, \ - .formats = SNDRV_PCM_FMTBIT_S16_LE, \ + .formats = SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S32_LE, \ }, \ .capture = { \ .channels_min = 1, \ .channels_max = 16, \ .rates = OMAP_MCBSP_RATES, \ - .formats = SNDRV_PCM_FMTBIT_S16_LE, \ + .formats = SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S32_LE, \ }, \ .ops = &omap_mcbsp_dai_ops, \ .private_data = &mcbsp_data[(link_id)].bus_id, \ @@ -641,8 +694,10 @@ struct snd_soc_dai omap_mcbsp_dai[] = { #if NUM_LINKS >= 3 OMAP_MCBSP_DAI_BUILDER(2), #endif -#if NUM_LINKS == 5 +#if NUM_LINKS >= 4 OMAP_MCBSP_DAI_BUILDER(3), +#endif +#if NUM_LINKS == 5 OMAP_MCBSP_DAI_BUILDER(4), #endif }; diff --git a/sound/soc/omap/omap-mcbsp.h b/sound/soc/omap/omap-mcbsp.h index 6c363e5f4387..178c7c73d05f 100644 --- a/sound/soc/omap/omap-mcbsp.h +++ b/sound/soc/omap/omap-mcbsp.h @@ -50,6 +50,10 @@ enum omap_mcbsp_div { #undef NUM_LINKS #define NUM_LINKS 3 #endif +#if defined(CONFIG_ARCH_OMAP4) +#undef NUM_LINKS +#define NUM_LINKS 4 +#endif #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) #undef NUM_LINKS #define NUM_LINKS 5 diff --git a/sound/soc/omap/omap-mcpdm.c b/sound/soc/omap/omap-mcpdm.c index b7f4f7e015f3..1fe5a2ad6bb5 100644 --- a/sound/soc/omap/omap-mcpdm.c +++ b/sound/soc/omap/omap-mcpdm.c @@ -109,36 +109,6 @@ static void omap_mcpdm_dai_shutdown(struct snd_pcm_substream *substream, omap_mcpdm_free(); } -static int omap_mcpdm_dai_trigger(struct snd_pcm_substream *substream, int cmd, - struct snd_soc_dai *dai) -{ - struct snd_soc_pcm_runtime *rtd = substream->private_data; - struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; - struct omap_mcpdm_data *mcpdm_priv = cpu_dai->private_data; - int stream = substream->stream; - int err = 0; - - switch (cmd) { - case SNDRV_PCM_TRIGGER_START: - case SNDRV_PCM_TRIGGER_RESUME: - case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: - if (!mcpdm_priv->active++) - omap_mcpdm_start(stream); - break; - - case SNDRV_PCM_TRIGGER_STOP: - case SNDRV_PCM_TRIGGER_SUSPEND: - case SNDRV_PCM_TRIGGER_PAUSE_PUSH: - if (!--mcpdm_priv->active) - omap_mcpdm_stop(stream); - break; - default: - err = -EINVAL; - } - - return err; -} - static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) @@ -183,6 +153,8 @@ static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream, err = omap_mcpdm_capture_open(&mcpdm_links[stream]); } + omap_mcpdm_start(stream); + return err; } @@ -201,13 +173,14 @@ static int omap_mcpdm_dai_hw_free(struct snd_pcm_substream *substream, else err = omap_mcpdm_capture_close(&mcpdm_links[stream]); + omap_mcpdm_stop(stream); + return err; } static struct snd_soc_dai_ops omap_mcpdm_dai_ops = { .startup = omap_mcpdm_dai_startup, .shutdown = omap_mcpdm_dai_shutdown, - .trigger = omap_mcpdm_dai_trigger, .hw_params = omap_mcpdm_dai_hw_params, .hw_free = omap_mcpdm_dai_hw_free, }; diff --git a/sound/soc/omap/omap-pcm.c b/sound/soc/omap/omap-pcm.c index 1e521904ea64..995c963fa17e 100644 --- a/sound/soc/omap/omap-pcm.c +++ b/sound/soc/omap/omap-pcm.c @@ -233,6 +233,11 @@ static int omap_pcm_trigger(struct snd_pcm_substream *substream, int cmd) case SNDRV_PCM_TRIGGER_PAUSE_PUSH: prtd->period_index = -1; omap_stop_dma(prtd->dma_ch); + /* Since we are using self linking, there is a + chance that the DMA as re-enabled the channel + just after disabling it */ + while (omap_get_dma_active_status(prtd->dma_ch)) + omap_stop_dma(prtd->dma_ch); break; default: ret = -EINVAL; @@ -279,6 +284,14 @@ static int omap_pcm_open(struct snd_pcm_substream *substream) if (ret < 0) goto out; + /* ABE needs a step of 24 * 4 data bits, and HDMI 32 * 4 + * Ensure buffer size satisfies both constraints. + */ + ret = snd_pcm_hw_constraint_step(runtime, 0, + SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 384); + if (ret < 0) + goto out; + prtd = kzalloc(sizeof(*prtd), GFP_KERNEL); if (prtd == NULL) { ret = -ENOMEM; diff --git a/sound/soc/omap/sdp4430.c b/sound/soc/omap/sdp4430.c new file mode 100644 index 000000000000..1373a9164217 --- /dev/null +++ b/sound/soc/omap/sdp4430.c @@ -0,0 +1,400 @@ +/* + * sdp4430.c -- SoC audio for TI OMAP4430 SDP + * + * Author: Misael Lopez Cruz <x0052729@ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#include <linux/clk.h> +#include <linux/platform_device.h> +#include <sound/core.h> +#include <sound/pcm.h> +#include <sound/soc.h> +#include <sound/soc-dapm.h> +#include <sound/jack.h> + +#include <asm/mach-types.h> +#include <plat/hardware.h> +#include <plat/mux.h> + +#include "mcpdm.h" +#include "omap-abe.h" +#include "omap-pcm.h" +#include "omap-mcbsp.h" +#include "../codecs/twl6040.h" +#include "../codecs/abe-twl6040.h" + +#ifdef CONFIG_SND_OMAP_SOC_HDMI +#include "omap-hdmi.h" +#endif + +static int twl6040_power_mode; +static struct snd_soc_card snd_soc_sdp4430; + +static int sdp4430_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *codec_dai = rtd->dai->codec_dai; + int clk_id, freq; + int ret; + + if (twl6040_power_mode) { + clk_id = TWL6040_SYSCLK_SEL_HPPLL; + freq = 38400000; + } else { + clk_id = TWL6040_SYSCLK_SEL_LPPLL; + freq = 32768; + } + + /* set the codec mclk */ + ret = snd_soc_dai_set_sysclk(codec_dai, clk_id, freq, + SND_SOC_CLOCK_IN); + if (ret) { + printk(KERN_ERR "can't set codec system clock\n"); + return ret; + } + + return 0; +} + +static struct snd_soc_ops sdp4430_ops = { + .hw_params = sdp4430_hw_params, +}; + +#ifdef CONFIG_SND_OMAP_VOICE_TEST +static int sdp4430_voice_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *codec_dai = rtd->dai->codec_dai; + struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; + int clk_id, freq; + int ret; + + if (twl6040_power_mode) { + clk_id = TWL6040_SYSCLK_SEL_HPPLL; + freq = 38400000; + } else { + clk_id = TWL6040_SYSCLK_SEL_LPPLL; + freq = 32768; + } + + /* set the codec mclk */ + ret = snd_soc_dai_set_sysclk(codec_dai, clk_id, freq, + SND_SOC_CLOCK_IN); + if (ret) { + printk(KERN_ERR "can't set codec system clock\n"); + return ret; + } + + /* Set cpu DAI configuration */ + ret = snd_soc_dai_set_fmt(cpu_dai, + SND_SOC_DAIFMT_I2S | + SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBM_CFM); + if (ret < 0) { + printk(KERN_ERR "can't set cpu DAI configuration\n"); + return ret; + } + + /* Set McBSP clock to external */ + ret = snd_soc_dai_set_sysclk(cpu_dai, OMAP_MCBSP_SYSCLK_CLKS_FCLK, + 64 * params_rate(params), + SND_SOC_CLOCK_IN); + if (ret < 0) { + printk(KERN_ERR "can't set cpu system clock\n"); + return ret; + } + + ret = snd_soc_dai_set_clkdiv(cpu_dai, OMAP_MCBSP_CLKGDV, 193); + if (ret < 0) { + printk(KERN_ERR "can't set cpu clock div\n"); + return ret; + } + + return 0; +} + +static struct snd_soc_ops sdp4430_voice_ops = { + .hw_params = sdp4430_voice_hw_params, +}; +#endif + +/* Headset jack */ +static struct snd_soc_jack hs_jack; + +/*Headset jack detection DAPM pins */ +static struct snd_soc_jack_pin hs_jack_pins[] = { + { + .pin = "Headset Mic", + .mask = SND_JACK_MICROPHONE, + }, + { + .pin = "Headset Stereophone", + .mask = SND_JACK_HEADPHONE, + }, +}; + +static int sdp4430_get_power_mode(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.integer.value[0] = twl6040_power_mode; + return 0; +} + +static int sdp4430_set_power_mode(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + if (twl6040_power_mode == ucontrol->value.integer.value[0]) + return 0; + + twl6040_power_mode = ucontrol->value.integer.value[0]; + + return 1; +} + +static const char *power_texts[] = {"Low-Power", "High-Performance"}; + +static const struct soc_enum sdp4430_enum[] = { + SOC_ENUM_SINGLE_EXT(2, power_texts), +}; + +static const struct snd_kcontrol_new sdp4430_controls[] = { + SOC_ENUM_EXT("TWL6040 Power Mode", sdp4430_enum[0], + sdp4430_get_power_mode, sdp4430_set_power_mode), +}; + +/* SDP4430 machine DAPM */ +static const struct snd_soc_dapm_widget sdp4430_twl6040_dapm_widgets[] = { + SND_SOC_DAPM_MIC("Ext Mic", NULL), + SND_SOC_DAPM_SPK("Ext Spk", NULL), + SND_SOC_DAPM_MIC("Headset Mic", NULL), + SND_SOC_DAPM_HP("Headset Stereophone", NULL), + SND_SOC_DAPM_SPK("Earphone Spk", NULL), + SND_SOC_DAPM_INPUT("Aux/FM Stereo In"), +}; + +static const struct snd_soc_dapm_route audio_map[] = { + /* External Mics: MAINMIC, SUBMIC with bias*/ + {"MAINMIC", NULL, "Main Mic Bias"}, + {"SUBMIC", NULL, "Main Mic Bias"}, + {"Main Mic Bias", NULL, "Ext Mic"}, + + /* External Speakers: HFL, HFR */ + {"Ext Spk", NULL, "HFL"}, + {"Ext Spk", NULL, "HFR"}, + + /* Headset Mic: HSMIC with bias */ + {"HSMIC", NULL, "Headset Mic Bias"}, + {"Headset Mic Bias", NULL, "Headset Mic"}, + + /* Headset Stereophone (Headphone): HSOL, HSOR */ + {"Headset Stereophone", NULL, "HSOL"}, + {"Headset Stereophone", NULL, "HSOR"}, + + /* Earphone speaker */ + {"Earphone Spk", NULL, "EP"}, + + /* Aux/FM Stereo In: AFML, AFMR */ + {"AFML", NULL, "Aux/FM Stereo In"}, + {"AFMR", NULL, "Aux/FM Stereo In"}, +}; + +static int sdp4430_twl6040_init(struct snd_soc_codec *codec) +{ + int ret; + + /* Add SDP4430 specific controls */ + ret = snd_soc_add_controls(codec, sdp4430_controls, + ARRAY_SIZE(sdp4430_controls)); + if (ret) + return ret; + + /* Add SDP4430 specific widgets */ + ret = snd_soc_dapm_new_controls(codec, sdp4430_twl6040_dapm_widgets, + ARRAY_SIZE(sdp4430_twl6040_dapm_widgets)); + if (ret) + return ret; + + /* Set up SDP4430 specific audio path audio_map */ + snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); + + /* SDP4430 connected pins */ + snd_soc_dapm_enable_pin(codec, "Ext Mic"); + snd_soc_dapm_enable_pin(codec, "Ext Spk"); + snd_soc_dapm_enable_pin(codec, "AFML"); + snd_soc_dapm_enable_pin(codec, "AFMR"); + snd_soc_dapm_disable_pin(codec, "Headset Mic"); + snd_soc_dapm_disable_pin(codec, "Headset Stereophone"); + + ret = snd_soc_dapm_sync(codec); + if (ret) + return ret; + + /*Headset jack detection */ + ret = snd_soc_jack_new(&snd_soc_sdp4430, "Headset Jack", + SND_JACK_HEADSET, &hs_jack); + if (ret) + return ret; + + ret = snd_soc_jack_add_pins(&hs_jack, ARRAY_SIZE(hs_jack_pins), + hs_jack_pins); + + twl6040_hs_jack_detect(codec, &hs_jack, SND_JACK_HEADSET); + + return ret; +} + +#ifdef CONFIG_SND_OMAP_SOC_HDMI +struct snd_soc_dai null_dai = { + .name = "null", + .playback = { + .stream_name = "Playback", + .channels_min = 2, + .channels_max = 8, + .rates = SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE, + }, +}; +#endif + +/* Digital audio interface glue - connects codec <--> CPU */ +static struct snd_soc_dai_link sdp4430_dai[] = { + { + .name = "abe-twl6040", + .stream_name = "Multimedia", + .cpu_dai = &omap_abe_dai[OMAP_ABE_MM_DAI], + .codec_dai = &abe_dai[0], + .init = sdp4430_twl6040_init, + .ops = &sdp4430_ops, + }, + { + .name = "abe-twl6040", + .stream_name = "Tones DL", + .cpu_dai = &omap_abe_dai[OMAP_ABE_TONES_DL_DAI], + .codec_dai = &abe_dai[1], + .ops = &sdp4430_ops, + }, + { + .name = "abe-twl6040", + .stream_name = "Voice", + .cpu_dai = &omap_abe_dai[OMAP_ABE_VOICE_DAI], + .codec_dai = &abe_dai[2], +#ifdef CONFIG_SND_OMAP_VOICE_TEST + .ops = &sdp4430_voice_ops, +#else + .ops = &sdp4430_ops, +#endif + }, + { + .name = "abe-twl6040", + .stream_name = "Digital Uplink", + .cpu_dai = &omap_abe_dai[OMAP_ABE_DIG_UPLINK_DAI], + .codec_dai = &abe_dai[3], + .ops = &sdp4430_ops, + }, + { + .name = "abe-twl6040", + .stream_name = "Vibrator", + .cpu_dai = &omap_abe_dai[OMAP_ABE_VIB_DAI], + .codec_dai = &abe_dai[4], + .ops = &sdp4430_ops, + }, +#ifdef CONFIG_SND_OMAP_SOC_HDMI + { + .name = "hdmi", + .stream_name = "HDMI", + .cpu_dai = &omap_hdmi_dai, + .codec_dai = &null_dai, + }, +#endif +}; + +/* Audio machine driver */ +static struct snd_soc_card snd_soc_sdp4430 = { + .name = "SDP4430", + .platform = &omap_soc_platform, + .dai_link = sdp4430_dai, + .num_links = ARRAY_SIZE(sdp4430_dai), +}; + +/* Audio subsystem */ +static struct snd_soc_device sdp4430_snd_devdata = { + .card = &snd_soc_sdp4430, + .codec_dev = &soc_codec_dev_abe_twl6040, +}; + +static struct platform_device *sdp4430_snd_device; + +static int __init sdp4430_soc_init(void) +{ + int ret; + + if (!machine_is_omap_4430sdp()) { + pr_debug("Not SDP4430!\n"); + return -ENODEV; + } + printk(KERN_INFO "SDP4430 SoC init\n"); + +#ifdef CONFIG_SND_OMAP_SOC_HDMI + snd_soc_register_dais(&null_dai, 1); +#endif + + sdp4430_snd_device = platform_device_alloc("soc-audio", -1); + if (!sdp4430_snd_device) { + printk(KERN_ERR "Platform device allocation failed\n"); + return -ENOMEM; + } + + platform_set_drvdata(sdp4430_snd_device, &sdp4430_snd_devdata); + sdp4430_snd_devdata.dev = &sdp4430_snd_device->dev; + + ret = platform_device_add(sdp4430_snd_device); + if (ret) + goto err; + + ret = snd_soc_dai_set_sysclk(sdp4430_dai[0].codec_dai, + TWL6040_SYSCLK_SEL_HPPLL, 38400000, + SND_SOC_CLOCK_IN); + if (ret) { + printk(KERN_ERR "can't set codec system clock\n"); + goto err; + } + + /* Codec starts in HP mode */ + twl6040_power_mode = 1; + + return 0; + +err: + printk(KERN_ERR "Unable to add platform device\n"); + platform_device_put(sdp4430_snd_device); + return ret; +} +module_init(sdp4430_soc_init); + +static void __exit sdp4430_soc_exit(void) +{ + platform_device_unregister(sdp4430_snd_device); +} +module_exit(sdp4430_soc_exit); + +MODULE_AUTHOR("Misael Lopez Cruz <x0052729@ti.com>"); +MODULE_DESCRIPTION("ALSA SoC SDP4430"); +MODULE_LICENSE("GPL"); + diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index ad7f9528d751..9cf39cecfb3e 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c @@ -566,16 +566,18 @@ static int soc_codec_close(struct snd_pcm_substream *substream) platform->pcm_ops->close(substream); cpu_dai->runtime = NULL; - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { - /* start delayed pop wq here for playback streams */ - codec_dai->pop_wait = 1; - schedule_delayed_work(&card->delayed_work, - msecs_to_jiffies(card->pmdown_time)); - } else { - /* capture streams can be powered down now */ - snd_soc_dapm_stream_event(codec, - codec_dai->capture.stream_name, - SND_SOC_DAPM_STREAM_STOP); + if (!codec->active) { + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + /* start delayed pop wq here for playback streams */ + codec_dai->pop_wait = 1; + schedule_delayed_work(&card->delayed_work, + msecs_to_jiffies(card->pmdown_time)); + } else { + /* capture streams can be powered down now */ + snd_soc_dapm_stream_event(codec, + codec_dai->capture.stream_name, + SND_SOC_DAPM_STREAM_STOP); + } } mutex_unlock(&pcm_mutex); @@ -749,8 +751,8 @@ static int soc_pcm_hw_free(struct snd_pcm_substream *substream) mutex_lock(&pcm_mutex); /* apply codec digital mute */ - if (!codec->active) - snd_soc_dai_digital_mute(codec_dai, 1); + /* Codec to take of no active stream */ + snd_soc_dai_digital_mute(codec_dai, 1); /* free any machine hw params */ if (machine->ops && machine->ops->hw_free) |