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2022-01-29arm64: dts: imx8mq: fix lcdif port nodeAlexander Stein
The port node does not have a unit-address, remove it. This fixes the warnings: lcd-controller@30320000: 'port' is a required property lcd-controller@30320000: 'port@0' does not match any of the regexes: 'pinctrl-[0-9]+' Fixes: commit d0081bd02a03 ("arm64: dts: imx8mq: Add NWL MIPI DSI controller") Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-29arm64: dts: imx8mq: fix mipi_csi bidirectional port numbersMartin Kepplinger
The port numbers for the imx8mq mipi csi controller are wrong and the mipi driver can't find any media devices as port@1 is connected to the CSI bridge, not port@0. And port@0 is connected to the source - the sensor. Fix this. Fixes: bcadd5f66c2a ("arm64: dts: imx8mq: add mipi csi phy and csi bridge descriptions") Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-01-10Merge tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM SoC devicetree updates from Arnd Bergmann: "As usual, this is the bulk of the updates for the SoC tree, adding more devices to existing files, addressing issues from ever improving automated checking, and fixing minor issues. The most interesting bits as usual are the new platforms. All the newly supported SoCs belong into existing families this time: - Qualcomm gets support for two newly announced platforms, both of which can now work in production environments: the SDX65 5G modem that can run a minimal Linux on its Cortex-A7 core, and the Snapdragon 8 Gen 1, their latest high-end phone SoC. - Renesas adds support for R-Car S4-8, the most recent automotive Server/Communication SoC. - TI adds support for J721s2, a new automotive SoC in the K3 family. - Mediatek MT7986a/b is a SoC used in Wifi routers, the latest generation following their popular MT76xx series. Only basic support is added for now. - NXP i.MX8 ULP8 is a new low-power variant of the widespread i.MX8 series. - TI SPEAr320s is a minor variant of the old SPEAr320 SoC that we have supported for a long time. New boards with the existing SoCs include - Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers - AT91/SAMA5 based evaluation board - NXP gains twenty new development and industrial boards for their i.MX and Layerscape SoCs - Intel IXP4xx now supports the final two machines in device tree that were previously only supported in old style board files. - Mediatek MT6589 is used in the Fairphone FP1 phone from 2013, while MT8183 is used in the Acer Chromebook 314. - Qualcomm gains support for the reference machines using the two new SoCs, plus a number of Chromebook variants and phones based on the Snapdragon 7c, 845 and 888 SoCs, including various Sony Xperia devices and the Microsoft Surface Duo 2. - ST STM32 now supports the Engicam i.Core STM32MP1 carrier board. - Tegra now boots various older Android devices based on 32-bit chips out of the box, including a number of ASUS Transformer tablets. There is also a new Jetson AGX Orin developer kit. - Apple support adds the missing device trees for all the remaining M1 Macbook and iMac variants, though not yet the M1 Pro/Max versions. - Allwinner now supports another version of the Tanix TX6 set-top box based on the H6 SoC. - Broadcom gains support for the Netgear RAXE500 Wireless router based on BCM4908" * tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (574 commits) Revert "ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U" arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX arm64: dts: qcom: sm8450-qrd: Enable USB nodes arm64: dts: qcom: sm8450: Add usb nodes ARM: dts: aspeed: add LCLK setting into LPC KCS nodes dt-bindings: ipmi: bt-bmc: add 'clocks' as a required property ARM: dts: aspeed: add LCLK setting into LPC IBT node ARM: dts: aspeed: p10: Add TPM device ARM: dts: aspeed: p10: Enable USB host ports ARM: dts: aspeed: Add TYAN S8036 BMC machine ARM: dts: aspeed: tyan-s7106: Add uart_routing and fix vuart config ARM: dts: aspeed: Adding Facebook Bletchley BMC ARM: dts: aspeed: g220a: Enable secondary flash ARM: dts: Add openbmc-flash-layout-64-alt.dtsi ARM: dts: aspeed: Add secure boot controller node dt-bindings: aspeed: Add Secure Boot Controller bindings ARM: dts: Remove "spidev" nodes dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850 dt-bindings: arm: samsung: Document E850-96 board binding dt-bindings: Add vendor prefix for WinLink ...
2021-12-08arm64: dts: imx8m: remove unused "nvmem_macaddr_swap" property for FECJoakim Zhang
Remove unused "nvmem_macaddr_swap" property for FEC, there is no info in both dt-binding and driver, so it's safe to remove it. Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-06arm64: dts: imx8mq: fix the schema check errors for fsl,tmu-calibrationDavid Heidelberg
fsl,tmu-calibration is in u32-matrix. Use matching property syntax. No functional changes. Fixes warnings as: $ make dtbs_check ... arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dt.yaml: tmu@30260000: \ fsl,tmu-calibration:0: Additional items are not allowed (1, 41, 2, 47, \ 3, 53, 4, 61, 5, 67, 6, 75, 7, 81, 8, 87, 9, 95, 10, 103, 11, 111, 65536, \ 27, 65537, 35, 65538, 43, 65539, 51, 65540, 59, 65541, 67, 65542, 75, \ 65543, 85, 65544, 93, 65545, 103, 65546, 112, 131072, 23, 131073, 35, \ 131074, 45, 131075, 55, 131076, 65, 131077, 75, 131078, 87, 131079, 99, \ 131080, 111, 196608, 21, 196609, 33, 196610, 45, 196611, 57, 196612, 69, \ 196613, 83, 196614, 95, 196615, 113 were unexpected) From schema: Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml ... Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-06arm64: dts: imx8mq: remove interconnect property from lcdifMartin Kepplinger
The mxsfb driver handling imx8mq lcdif doesn't yet request the interconnect bandwidth that's needed at runtime when the description is present in the DT node. So remove that description and bring it back when it's supported. Fixes: ad1abc8a03fd ("arm64: dts: imx8mq: Add interconnect for lcdif") Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-11-23arm64: dts: imx8m: add cache infoPeng Fan
i.MX8M Family use A53 Cores and has 32KB ICache with 32KB DCache. - Icache is 2-way set associative - Dcache is 4-way set associative - L2cache is 16-way set associative - Line size are 64bytes Except i.MX8MQ has 1MB L2 Cache, others has 512KB L2 Cache. So add the cache info in device tree and let use could see that from /sys/devices/system/cpu/cpu[x]/cache/ Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-09-22arm64: dts: imx8mq: fix the schema check errorsRichard Zhu
No functional changes, but the ranges should be grouped by region. Otherwise, schema dtbs_check would report the following errors. "/linux-imx/arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: pcie@33800000: ranges: 'oneOf' conditional failed, one must be fixed: /linux-imx/arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: pcie@33800000: ranges: 'oneOf' conditional failed, one must be fixed: [[2164260864, 0, 0, 536346624, 0, 65536, 2181038080, 0, 402653184, 402653184, 0, 133169152]] is not of type 'boolean' True was expected [[2164260864, 0, 0, 536346624, 0, 65536, 2181038080, 0, 402653184, 402653184, 0, 133169152]] is not of type 'null' [2164260864, 0, 0, 536346624, 0, 65536, 2181038080, 0, 402653184, 402653184, 0, 133169152] is too long From schema: //linux-imx/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml" Refer to commit 281f1f99cf3a ("PCI: dwc: Detect number of iATU windows"). The num-viewport is not required anymore, remove them totally. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-08-14arm64: dts: imx8m: drop interrupt-affinity for pmuPeng Fan
i.MX8M use PPI for pmu, interrupt-affinity is not needed. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-08-14arm64: dts: imx8mq: add mipi csi phy and csi bridge descriptionsMartin Kepplinger
Describe the 2 available CSI interfaces on the i.MX8MQ with the MIPI-CSI2 receiver (new driver) and the CSI Bridge that provides the user buffers (existing driver). An image sensor is to be connected to the MIPIs' second port, to be described in board files. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-06-12arm64: dts: imx8mq: assign PCIe clocksLucas Stach
This fixes multiple issues with the current non-existent PCIe clock setup: The controller can run at up to 250MHz, so use a parent that provides this clock. The PHY needs an exact 100MHz reference clock to function if the PCIe refclock is not fed in via the refclock pads. While this mode is not supported (yet) in the driver it doesn't hurt to make sure we are providing a clock with the right rate. The AUX clock is specified to have a maximum clock rate of 10MHz. So the current setup, which drives it straight from the 25MHz oscillator is actually overclocking the AUX input. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-29arm64: dts: imx8mq: use_dt_domains for pci nodePeng Fan
We are using Jailhouse Hypervsior which has virtual pci node that use dt domains. so also use dt domains for pci node, this will avoid conflict with Jailhouse Hypervisor to trigger the following error: pr_err("Inconsistent \"linux,pci-domain\" property in DT\n"); Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-18arm64: dts: imx8m: add fsl,stop-mode property for FECJoakim Zhang
Add fsl,stop-mode property for FEC to enable stop mode. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-18arm64: dts: imx8m: add mac address for FECJoakim Zhang
Add mac address in efuse, so that FEC driver can parse it from nvmem cell. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-18arm64: dts: imx8mq: assign clock parents for FECJoakim Zhang
Assign clock parents for FEC, set "ptp" clock to 100M, "enet_clk_ref" to 125M. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-18arm64: dts: imx8mq: Add eCSPI DMA supportFabio Estevam
eCSPI ports have DMA capability. Describe the eCSPI DMA properties. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-15arm64: dts: imx8mq: Add interconnect for lcdifMartin Kepplinger
Add interconnect ports for lcdif to set bus capabilities. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-15arm64: dts: imx8mq: Add interconnect provider propertyMartin Kepplinger
Add #interconnect-cells on main &noc so that it will probe the interconnect provider. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Acked-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-15arm64: dts: imx8mq: Add NOC nodeLeonard Crestez
Add initial support for dynamic frequency scaling of the main NOC on imx8mq. Make DDRC the parent of the NOC (using passive governor) so that the main NOC is automatically scaled together with DDRC by default. Support for proactive scaling via interconnect will come on top. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Acked-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: imx8m: add NVMEM provider and consumer to read soc unique IDAlice Guo
In order to be able to use NVMEM APIs to read soc unique ID, add the nvmem data cell and name for nvmem-cells to the "soc" node, and add a nvmem node which provides soc unique ID to efuse@30350000. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: imx8m: add SoC ID compatibleAlice Guo
Add compatible string to .dtsi files for binding of imx8_soc_info and device. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-01-11arm64: dts: imx8mq: Add clock parents for mipi dphyGuido Günther
This makes sure the clock tree setup for the dphy is not dependent on other components. Without this change bringing up the display can fail like kernel: phy phy-30a00300.dphy.2: Invalid CM/CN/CO values: 165/217/1 kernel: phy phy-30a00300.dphy.2: for hs_clk/ref_clk=451656000/593999998 ~ 165/217 if LCDIF doesn't set up that part of the clock tree first. This was noticed when testing the Librem 5 devkit with defconfig. It doesn't happen when modules are built in. Signed-off-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-11-30arm64: dts: imx8mq-evk: Add spdif sound card supportShengjiu Wang
There are two spdif IP on imx8mq, spdif1 is for normal spdif device, spdif2 is for HDMI ARC interface. Enable these spdif sound card in this patch. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-11-30arm64: dts: imx8mq: Configure clock rate for audio pllsShengjiu Wang
Configure clock rate for audio plls. audio pll1 is used as parent clock for clocks that is multiple of 8kHz. audio pll2 is used as parent clock for clocks that is multiple of 11kHz. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-10-24Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM Devicetree updates from Olof Johansson: "As usual, most of the changes are to devicetrees. Besides smaller fixes, some refactorings and cleanups, some of the new platforms and chips (or significant features) supported are below: Broadcom boards: - Cisco Meraki MR32 (BCM53016-based) - BCM2711 (RPi4) display pipeline support Actions Semi boards: - Caninos Loucos Labrador SBC (S500-based) - RoseapplePi SBC (S500-based) Allwinner SoCs/boards: - A100 SoC with Perf1 board - Mali, DMA, Cetrus and IR support for R40 SoC Amlogic boards: - Libretch S905x CC V2 board - Hardkernel ODROID-N2+ board Aspeed boards/platforms: - Wistron Mowgli (AST2500-based, Power9 OpenPower server) - Facebook Wedge400 (AST2500-based, ToR switch) Hisilicon SoC: - SD5203 SoC Nvidia boards: - Tegra234 VDK, for pre-silicon Orin SoC NXP i.MX boards: - Librem 5 phone - i.MX8MM DDR4 EVK - Variscite VAR-SOM-MX8MN SoM - Symphony board - Tolino Shine 2 HD - TQMa6 SoM - Y Soft IOTA Orion Rockchip boards: - NanoPi R2S board - A95X-Z2 board - more Rock-Pi4 variants STM32 boards: - Odyssey SOM board (STM32MP157CAC-based) - DH DRC02 board Toshiba SoCs/boards: - Visconti SoC and TPMV7708 board" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (638 commits) ARM: dts: nspire: Fix SP804 users arm64: dts: lg: Fix SP804 users arm64: dts: lg: Fix SP805 clocks ARM: mstar: Fix up the fallout from moving the dts/dtsi files ARM: mstar: Add mstar prefix to all of the dtsi/dts files ARM: mstar: Add interrupt to pm_uart ARM: mstar: Add interrupt controller to base dtsi ARM: dts: meson8: remove two invalid interrupt lines from the GPU node arm64: dts: ti: k3-j7200-common-proc-board: Add USB support arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function arm64: dts: ti: k3-j7200-main: Add USB controller arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux dt-bindings: ti-serdes-mux: Add defines for J7200 SoC ARM: dts: hisilicon: add SD5203 dts ARM: dts: hisilicon: fix the system controller compatible nodes arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 arm64: dts: zynqmp: Remove undocumented u-boot properties arm64: dts: zynqmp: Remove additional compatible string for i2c IPs arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml ...
2020-09-13arm64: dts: imx8mq: Add missing interrupts to GPCKrzysztof Kozlowski
The i.MX General Power Controller v2 device node was missing interrupts property necessary to route its interrupt to GIC. This also fixes the dbts_check warnings like: arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpc@303a0000: {'compatible': ... '$nodename': ['gpc@303a0000']} is not valid under any of the given schemas arch/arm64/boot/dts/freescale/imx8mq-evk.dt.yaml: gpc@303a0000: 'interrupts' is a required property Fixes: fdbcc04da246 ("arm64: dts: imx8mq: add GPC power domains") Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-08-31arm64: dts: imx8mq: Fix TMU interrupt propertyKrzysztof Kozlowski
"interrupt" is not a valid property. Using proper name fixes dtbs_check warning: arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dt.yaml: tmu@30260000: 'interrupts' is a required property Fixes: e464fd2ba4d4 ("arm64: dts: imx8mq: enable the multi sensor TMU") Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-08-23arm64: dts: imx8mq: Add NWL MIPI DSI controllerGuido Günther
Add a node for the Northwest Logic MIPI DSI IP core, "disabled" by default. This also adds the necessary port to LCDIF. Signed-off-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Fabio Estevam <festevam@gmail.com> Tested-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-08-23arm64: dts: imx8m: Add the ENET PPS interruptFabio Estevam
The i.MX8M SoCs have a fourth ENET interrupt dedicated to PPS (Pulse Per Second). Add support for it. Suggested-by: Rogerio Nunes <rogerio.nunes@nxp.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-23arm64: dts: imx8m: add mu nodePeng Fan
Add mu node to let A53 could communicate with M Core. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-23arm64: dts: imx8m: change ocotp node name on i.MX8M SoCsAnson Huang
Change OCOTP node name from ocotp-ctrl to efuse to be compliant with yaml schema, it requires the nodename to be one of "eeprom|efuse|nvram". Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-18arm64: dts: imx8mq: Add ethernet aliasPeng Fan
Add ethernet alias, so bootloader code can use this to find the primary ethernet device, and set the MAC address. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-18arm64: dts: imx8mq: Add mmc aliasesPeng Fan
Add mmc aliases for kernel usage Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-16arm64: dts: imx8mq: enable Hantro G1/G2 VPUPhilipp Zabel
Add the i.MX8MQ VPU module which comprises Hantro G1 and G2 video decoder cores and a reset/control block. Hook up the bus clock to the VPU power domain to enable handshakes, and configure the core clocks to 600 MHz and the bus clock to 800 MHz by default. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com> Tested-by: Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-06-04Merge tag 'arm-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds
Pull ARM devicetree updates from Arnd Bergmann: "This is the set of device tree changes, mostly covering new hardware support, with 577 patches touching a little over 500 files. There are five new Arm SoCs supported in this release, all of them for existing SoC families: - Realtek RTD1195, RTD1395 and RTD1619 -- three SoCs used in both NAS devices and Android Set-top-box designs, along with the "Horseradish", "Lion Skin" and "Mjolnir" reference platforms; the Mele X1000 and Xnano X5 set-top-boxes and the Banana Pi BPi-M4 single-board computer. - Renesas RZ/G1H (r8a7742) -- a high-end 32-bit industrial SoC and the iW-RainboW-G21D-Qseven-RZG1H board/SoM - Rockchips RK3326 -- low-end 64-bit SoC along with the Odroid-GO Advance game console Newly added machines on already supported SoCs are: - AMLogic S905D based Smartlabs SML-5442TW TV box - AMLogic S905X3 based ODROID-C4 SBC - AMLogic S922XH based Beelink GT-King Pro TV box - Allwinner A20 based Olimex A20-OLinuXino-LIME-eMMC SBC - Aspeed ast2500 based BMCs in Facebook x86 "Yosemite V2" and YADRO OpenPower P9 "Nicole" - Marvell Kirkwood based Check Point L-50 router - Mediatek MT8173 based Elm/Hana Chromebook laptops - Microchip SAMA5D2 "Industrial Connectivity Platform" reference board - NXP i.MX8m based Beacon i.MX8m-Mini SoM development kit - Octavo OSDMP15x based Linux Automation MC-1 development board - Qualcomm SDM630 based Xiaomi Redmi Note 7 phone - Realtek RTD1295 based Xnano X5 TV Box - STMicroelectronics STM32MP1 based Stinger96 single-board computer and IoT Box - Samsung Exynos4210 based based Samsung Galaxy S2 phone - Socionext Uniphier based Akebi96 SBC - TI Keystone based K2G Evaluation board - TI am5729 based Beaglebone-AI development board Include device descriptions for additional hardware support in existing SoCs and machines based on all major SoC platforms: - AMlogic Meson - Allwinner sunxi - Arm Juno/VFP/Vexpress/Integrator - Broadcom bcm283x/bcm2711 - Hisilicon hi6220 - Marvell EBU - Mediatek MT27xx, MT76xx, MT81xx and MT67xx - Microchip SAMA5D2 - NXP i.MX6/i.MX7/i.MX8 and Layerscape - Nvidia Tegra - Qualcomm Snapdragon - Renesas r8a77961, r8a7791 - Rockchips RK32xx/RK33xx - ST-Ericsson ux500 - STMicroelectronics SMT32 - Samsung Exynos and S5PV210 - Socionext Uniphier - TI OMAP5/DRA7 and Keystone" * tag 'arm-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (564 commits) ARM: dts: keystone: Rename "msmram" node to "sram" arm: dts: mt2712: add uart APDMA to device tree arm64: dts: mt8183: add mmc node arm64: dts: mt2712: add ethernet device node arm64: tegra: Make the RTC a wakeup source on Jetson Nano and TX1 ARM: dts: mmp3: Add the fifth SD HCI ARM: dts: berlin*: Fix up the SDHCI node names ARM: dts: mmp3: Fix USB & USB PHY node names ARM: dts: mmp3: Fix L2 cache controller node name ARM: dts: mmp*: Fix up encoding of the /rtc interrupts property ARM: dts: pxa*: Fix up encoding of the /rtc interrupts property ARM: dts: pxa910: Fix the gpio interrupt cell number ARM: dts: pxa3xx: Fix up encoding of the /gpio interrupts property ARM: dts: pxa168: Fix the gpio interrupt cell number ARM: dts: pxa168: Add missing address/size cells to i2c nodes ARM: dts: dove: Fix interrupt controller node name ARM: dts: kirkwood: Fix interrupt controller node name arm64: dts: Add SC9863A emmc and sd card nodes arm64: dts: Add SC9863A clock nodes arm64: dts: mt6358: add PMIC MT6358 related nodes ...
2020-05-20arm64: dts: imx8mq: Add src node interruptsAnson Huang
Interrupts is a required property according to SRC binding, add it for SRC node. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-05-20arm64: dts: imx8m: assign clocks for A53Peng Fan
Assign IMX8M*_CLK_A53_SRC's parent to system pll1 and assign IMX8M*_CLK_A53_CORE's parent to arm pll out as what is done in drivers/clk/imx/clk-imx8m*.c, then we could remove the settings in driver which triggers lockdep warning. Reported-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-25arm64: dts: imx8m: Fix AIPS reg propertiesFabio Estevam
Commit dc3efc6ff0d5 ("arm64: dts: imx8m: fix aips dts node") caused several dtc warnings like these when building with W=1: arch/arm64/boot/dts/freescale/imx8mm.dtsi:265.23-542.5: Warning (simple_bus_reg): /soc@0/bus@30000000: simple-bus unit address format error, expected "301f0000" arch/arm64/boot/dts/freescale/imx8mm.dtsi:544.23-602.5: Warning (simple_bus_reg): /soc@0/bus@30400000: simple-bus unit address format error, expected "305f0000" arch/arm64/boot/dts/freescale/imx8mm.dtsi:604.23-862.5: Warning (simple_bus_reg): /soc@0/bus@30800000: simple-bus unit address format error, expected "309f0000" arch/arm64/boot/dts/freescale/imx8mm.dtsi:864.23-909.5: Warning (simple_bus_reg): /soc@0/bus@32c00000: simple-bus unit address format error, expected "32df0000" Fix them by using the correct address base and size in the AIPS reg properties. Fixes: dc3efc6ff0d5 ("arm64: dts: imx8m: fix aips dts node") Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-16arm64: dts: imx8m: fix aips dts nodePeng Fan
Per binding doc fsl,aips-bus.yaml, compatible and reg is required. And for reg, the AIPS configuration space should be used, not all the AIPS bus space. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11arm64: dts: imx8mq-phanbell: Add gpio-fan/thermal supportVitor Massaru Iha
It was based on Google Source Code for Coral Edge TPU Mendel release: https://coral.googlesource.com/linux-imx/ It was tested on Coral Dev Board using this command: sudo stress --cpu 4 --timeout 3600 Signed-off-by: Vitor Massaru Iha <vitor@massaru.org> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11arm64: dts: imx8mq: Align iomuxc node nameAnson Huang
Node name should be generic, use "pinctrl" instead of "iomuxc" for all i.MX8M SoCs. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11arm64: dts: imx8mq: add snvs clock to pwrkeyAndré Draszik
On i.MX8MM, the SNVS requires a clock. This is similar to the clock bound to the SNVS RTC node, but if the SNVS RTC driver isn't enabled, then SNVS doesn't work, and as such the pwrkey driver doesn't work (i.e. hangs the kernel, as the clock isn't enabled). Also see commit ec2a844ef7c1 ("ARM: dts: imx7s: add snvs rtc clock") for a similar fix. Signed-off-by: André Draszik <git@andred.net> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23arm64: dts: imx8m: drop "fsl,aips-bus" and "fsl,imx8mq-aips-bus"Peng Fan
There is no binding doc for these compatible string "fsl,imx8mq-aips-bus" and "fsl,aips-bus", "simple-bus" is enough for aips usage, so drop the upper two. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-09arm64: dts: imx8mq: add missing SAI nodesLucas Stach
Currently only SAI2 is present in the DT. Add all the other SAI instances present on the SoC. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-09arm64: dts: imx8mq: Add eLCDIF controllerGuido Günther
Add a node for the eLCDIF controller, "disabled" by default. Signed-off-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-09arm64: dts: imx8mq: increase NOC clock to 800 MHzPhilipp Zabel
The NOC clock defaults to 400 MHz. Increase it to 800 MHz for improved memory performance. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-09arm64: dts: imx8m: Add ddr controller nodesLeonard Crestez
This is used by the imx-ddrc devfreq driver to implement dynamic frequency scaling of DRAM. Support for proactive scaling via interconnect will come later. The high-performance bus masters which need that (display, vpu, gpu) are mostly not yet enabled in upstream anyway. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-11-06Merge tag 'imx-dt64-tmu-5.5' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt LX2160A TMU support for 5.5: - Add TMU (Thermal Monitoring Unit) device node to enable thermal support on LX2160A SoC. * tag 'imx-dt64-tmu-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: arm64: dts: lx2160a: add tmu device node ARM: imx_v6_v7_defconfig: Enable CONFIG_DRM_MSM arm64: dts: imx8mn: Use correct clock for usdhc's ipg clk arm64: dts: imx8mm: Use correct clock for usdhc's ipg clk arm64: dts: imx8mq: Use correct clock for usdhc's ipg clk ARM: dts: imx7s: Correct GPT's ipg clock source ARM: dts: vf610-zii-scu4-aib: Specify 'i2c-mux-idle-disconnect' ARM: dts: imx6q-logicpd: Re-Enable SNVS power key arm64: dts: lx2160a: Correct CPU core idle state name arm64: dts: zii-ultra: fix ARM regulator states soc: imx: imx-scu: Getting UID from SCU should have response Link: https://lore.kernel.org/r/20191105150315.15477-6-shawnguo@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
2019-10-28arm64: dts: imx8mq: Move usdhc clocks assignment to board DTAnson Huang
usdhc's clock rate is different according to different devices connected, so clock rate assignment should be placed in board DT according to different devices connected on each usdhc port. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-14arm64: dts: imx8mq: Use correct clock for usdhc's ipg clkAnson Huang
On i.MX8MQ, usdhc's ipg clock is from IMX8MQ_CLK_IPG_ROOT, assign it explicitly instead of using IMX8MQ_CLK_DUMMY. Fixes: 748f908cc882 ("arm64: add basic DTS for i.MX8MQ") Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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