index
:
bcachefs.git
9p_mempool
alloc_tags
alloc_tags_rfc
alloc_tags_v2
bcache2
bcachefs-5.17
bcachefs-btree-key-cache
bcachefs-buffered-write-locking
bcachefs-dev-lifetime
bcachefs-developer-guide
bcachefs-disk-accounting-rewrite
bcachefs-disk-accounting-rewrite-1
bcachefs-for-6.9
bcachefs-for-upstream
bcachefs-for-v6.7
bcachefs-garbage
bcachefs-icache
bcachefs-memalloc-profiling
bcachefs-sysfs-ioctls
bcachefs-testing
bcachefs-v4.13
bcachefs-v4.15
bcachefs-v4.16
bcachefs-v4.18
bcachefs-v4.19
bcachefs-v4.19-backport
bcachefs-v4.19-backport-2.0
bcachefs-v4.19-backport-2019-hotfix
bcachefs-v4.19-backport-2022-hotfix
bcachefs-v4.19-backport-compat
bcachefs-v4.20
bcachefs-v5.0
bcachefs-v5.10
bcachefs-v5.10-snapshots
bcachefs-v5.11
bcachefs-v5.15
bcachefs-v5.16
bcachefs-v5.19
bcachefs-v5.7
bcachefs-v5.9
bcachefs-v6.0
bcachefs-v6.3
bcachefs-v6.4
bcachefs-v6.5
bcachefs_bi_depth
bcachefs_subvol_ioctls
bio_folio_iter
bkey_unpack
btree_root_fix
buffered-io-2
casefold
codetags
codetags_v0
codetags_v1
compat
folio_iter_batched
for-next
fs-uuid-ioctl
header_cleanup
i_blocks_debug
inode_work
lazy_percpu_counters
lockdep_cmp_fn
lockdep_debug
master
mean_and_variance_fixups
memalloc-prof-v7
memalloc_prof_debug
memalloc_prof_v1
memalloc_prof_v2
memalloc_prof_v3
memalloc_prof_v4
memalloc_prof_v5
printbuf_v2
printbuf_v3
printbuf_v3_bcachefs
printbuf_v4
printbuf_v5
printbuf_v6
rcu_pending
ringbuffer
shrinker_to_text
time_stats_twf
tracing_to_printbuf
u128
vmalloc_size
xfs_no_data_io
zones
Unnamed repository; edit this file 'description' to name the repository.
Kent Overstreet
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
arch
/
riscv
/
kernel
/
traps.c
Age
Commit message (
Expand
)
Author
2020-04-09
Merge tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/...
Linus Torvalds
2020-04-03
riscv: Unaligned load/store handling for M_MODE
Damien Le Moal
2020-03-31
RISC-V: Add supported for ordered booting method using HSM
Atish Patra
2020-03-26
riscv: add macro to get instruction length
Zong Li
2020-03-16
irqchip/sifive-plic: Enable/Disable external interrupts upon cpu online/offline
Atish Patra
2020-02-18
RISC-V: Don't enable all interrupts in trap_init()
Anup Patel
2019-11-05
riscv: abstract out CSR names for supervisor vs machine mode
Christoph Hellwig
2019-10-28
riscv: for C functions called only from assembly, mark with __visible
Paul Walmsley
2019-10-28
riscv: add missing header file includes
Paul Walmsley
2019-10-25
riscv: cleanup do_trap_break
Christoph Hellwig
2019-10-14
riscv: remove the switch statement in do_trap_break()
Vincent Chen
2019-10-07
riscv: Correct the handling of unexpected ebreak in do_trap_break()
Vincent Chen
2019-10-07
riscv: avoid sending a SIGTRAP to a user thread trapped in WARN()
Vincent Chen
2019-10-07
riscv: avoid kernel hangs when trapped in BUG()
Vincent Chen
2019-07-08
Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds
2019-06-05
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
Thomas Gleixner
2019-05-29
signal: Remove the task parameter from force_sig_fault
Eric W. Biederman
2019-05-29
signal: Explicitly call force_sig_fault on current
Eric W. Biederman
2019-05-29
signal/riscv: Remove tsk parameter from do_trap
Eric W. Biederman
2019-05-16
riscv: Support BUG() in kernel module
Vincent Chen
2019-05-16
riscv: Add the support for c.ebreak check in is_valid_bugaddr()
Vincent Chen
2019-05-16
RISC-V: Access CSRs using CSR numbers
Anup Patel
2019-04-25
riscv: remove duplicate macros from ptrace.h
Christoph Hellwig
2018-08-13
RISC-V: Don't increment sepc after breakpoint.
Jim Wilson
2018-06-16
Merge tag 'riscv-for-linus-4.18-merge_window' of git://git.kernel.org/pub/scm...
Linus Torvalds
2018-06-07
riscv: no __user for probe_kernel_address()
Luc Van Oostenryck
2018-04-25
signal/riscv: Replace do_trap_siginfo with force_sig_fault
Eric W. Biederman
2018-04-25
signal/riscv: Use force_sig_fault where appropriate
Eric W. Biederman
2018-04-25
signal: Ensure every siginfo we send has all bits initialized
Eric W. Biederman
2017-09-26
RISC-V: Init and Halt Code
Palmer Dabbelt