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AgeCommit message (Expand)Author
2020-05-21RISC-V: gp_in_global needs register keywordPalmer Dabbelt
2020-05-12riscv: stacktrace: Fix undefined reference to `walk_stackframe'Kefeng Wang
2020-05-12riscv: perf: RISCV_BASE_PMU should be independentKefeng Wang
2020-05-11riscv: perf_event: Make some funciton staticKefeng Wang
2020-05-04riscv: force __cpu_up_ variables to put in data sectionZong Li
2020-05-04riscv: add Linux note to vdsoAndreas Schwab
2020-05-04RISC-V: Add bitmap reprensenting ISA features common across CPUsAnup Patel
2020-05-04RISC-V: Export riscv_cpuid_to_hartid_mask() APIAnup Patel
2020-04-21riscv: sbi: Fix undefined reference to sbi_shutdownKefeng Wang
2020-04-21riscv: sbi: Correct sbi_shutdown() and sbi_clear_ipi() exportKefeng Wang
2020-04-21riscv: fix vdso build with lldIlie Halip
2020-04-21RISC-V: stacktrace: Declare sp_in_global outside ifdefGuenter Roeck
2020-04-09Merge tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds
2020-04-03Merge tag 'spdx-5.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gre...Linus Torvalds
2020-04-03riscv: Add SOC early init supportDamien Le Moal
2020-04-03riscv: Unaligned load/store handling for M_MODEDamien Le Moal
2020-03-31RISC-V: Support cpu hotplugAtish Patra
2020-03-31RISC-V: Add supported for ordered booting method using HSMAtish Patra
2020-03-31RISC-V: Export SBI error to linux error mapping functionAtish Patra
2020-03-31RISC-V: Add cpu_ops and modify default booting methodAtish Patra
2020-03-31RISC-V: Move relocate and few other functions out of __initAtish Patra
2020-03-31RISC-V: Implement new SBI v0.2 extensionsAtish Patra
2020-03-31RISC-V: Introduce a new config for SBI v0.1Atish Patra
2020-03-31RISC-V: Add basic support for SBI v0.2Atish Patra
2020-03-30Merge tag 'irq-core-2020-03-30' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds
2020-03-26riscv: patch code by fixmap mappingZong Li
2020-03-26riscv: introduce interfaces to patch kernel codeZong Li
2020-03-26riscv: add macro to get instruction lengthZong Li
2020-03-26riscv: add alignment for text, rodata and data sectionsZong Li
2020-03-26riscv: move exception table immediately after RO_DATAZong Li
2020-03-25.gitignore: add SPDX License IdentifierMasahiro Yamada
2020-03-18riscv: fix the IPI missing issue in nommu modeGreentime Hu
2020-03-16irqchip/sifive-plic: Enable/Disable external interrupts upon cpu online/offlineAtish Patra
2020-03-05riscv: fix seccomp reject syscall code pathTycho Andersen
2020-03-03RISC-V: Inline the assembly register save/restore macrosPalmer Dabbelt
2020-03-03RISC-V: Stop relying on GCC's register allocator's hueristicsPalmer Dabbelt
2020-03-03RISC-V: Stop putting .sbss in .sdataPalmer Dabbelt
2020-03-03riscv: force hart_lottery to put in .sdata sectionZong Li
2020-03-03riscv: avoid the PIC offset of static percpu data in module beyond 2G limitsVincent Chen
2020-02-18RISC-V: Don't enable all interrupts in trap_init()Anup Patel
2020-02-18riscv: set pmp configuration if kernel is running in M-modeGreentime Hu
2020-01-31Merge tag 'riscv-for-linus-5.6-mw0' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds
2020-01-29Merge tag 'tty-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/greg...Linus Torvalds
2020-01-28Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds
2020-01-22riscv: Add KASAN supportNick Hu
2020-01-18riscv: delete temporary filesIlie Halip
2020-01-15riscv: make sure the cores stay looping in .Lsecondary_parkGreentime Hu
2020-01-14arch/riscv/setup: Drop dummy_con initializationArvind Sankar
2020-01-12Merge tag 'riscv/for-v5.5-rc6' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds
2020-01-12riscv: Fixup obvious bug for fp-regs resetGuo Ren