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path: root/drivers/gpu/drm/amd/display
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2019-08-23drm/amd/display: fix odm validationDmytro Laktyushkin
Update bw validation to use prev and next odm pipe pointers for populating dml inputs. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: fix odm stream releaseDmytro Laktyushkin
Need to memset all odm pipes when calling dc_remove_stream_from_ctx Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: fix dcn20 odm dpp programmingDmytro Laktyushkin
dcn20 requires special casing for odm. This change treats odm as alternative to mpc tree on dcn20. This is planned to be fixed in a future refactor Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: Fix number of slices not being checked for dscNikola Cornij
[why] num_slices_h was not being checked [How] Fix the typo and check num_slices_h Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: fix odm pipe copyDmytro Laktyushkin
ODM next and prev pipe were missing from dc_copy_state Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: fix trigger not generated for freesyncYogesh Mohan Marimuthu
[Why] In newer hardware MANUAL_FLOW_CONTROL is not a trigger bit. Due to this front porch is fixed and in these hardware freesync does not work. [How] Change the programming to generate a pulse so that the event will be triggered, front porch will be cut short and freesync will work. Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: fix stuck test pattern on right half of displayZi Yu Liao
[why] With visual confirm enabled, displays where ODM combine is enabled has a test pattern stuck on the right half of the display even though the display is unblanked. [how] Add a condition to not show the colour ramp test pattern when the display is unblanked. Signed-off-by: Zi Yu Liao <ziyu.liao@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: support spdifCharlene Liu
[Description] port spdif fix to staging: spdif hardwired to afmt inst 1. spdif func pointer spdif resource allocation (reserve last audio endpoint for spdif only) Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: Refactoring VTEMAhmad Othman
[Why] Video Timing Extended Metadata packet (VTEM) is not specific to freesync. So move it out of freesync module [How] - Moved VTEM from freesync module to info_packet module - Created new structure for VTEM parameters that can be used for VRR and FVA Signed-off-by: Ahmad Othman <ahmad.othman@amd.com> Reviewed-by: Chris Park <Chris.Park@amd.com> Acked-by: Ahmad Othman <Ahmad.Othman@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: 3.2.47Anthony Koo
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: remove unused functionQingqing Zhuo
[Why] This function is not being used, it was left in when introducing DCN2 [How] Remove the function Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: cleaned up coding error in init_hwMartin Leung
[why] during a refactor a redundant code that has unknown behaviour was added. [how] removed old bad code Fixes: 8a31820b1218 ("drm/amd/display: Make init_hw and init_pipes generic for seamless boot") Signed-off-by: Martin Leung <martin.leung@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: Add VM page fault handle implementationJaehyun Chung
[How] Allocate memory for default page and program memory block addr into default page addr register. Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: refactor Device ID for external chipsQingqing Zhuo
IEEE OUI will now be used while referring to certain vendors. instead of normal index Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: Zero-out dsc init regsNikola Cornij
[why] Before a statically allocated PPS data structure, that did get zeroed-out at startup, had been re-used for making packed PPS SDP. With S3 fix, using a non-initialized PPS data structure was introduced, while wrongly assuming it'd get initialized before it's populated. As a consequence 'vbr_enable' and perhaps some other fields are left uninitialized when making packed PPS SDP. This can affect 'simple_422' as well because of the way PPS SDP packing is done (the fields are not masked first, only shifted). The behavior will be different, depending on the content of uninitialized data. [how] Zero-out PPS data structure at initialization time before it's populated Fixes: 1a9e3d4569fc ("drm/amd/display: Set DSC before DIG front-end is connected to its back-end") Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: Implement voltage limitation stubJoseph Gravenor
add new function to get the voltage at the end of dcn_validate_bandwidth, to check against the highest voltage we allow. Created a stub to allow for optimizations Signed-off-by: Joseph Gravenor <joseph.gravenor@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Sun peng Li <Sunpeng.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: add null checks before loggingWyatt Wood
Adding NULL checks to various parameters in log_tf, to avoid nullptr errors Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: Nikola Cornij <Nikola.Cornij@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: set Hratio and VRatio in dmlIlya Bakoulin
Set the writeback Hratio and Vratio in dml. Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: fix dp stream enableDmytro Laktyushkin
A previous odm change broke stream enable by always setting n_multiply as if odm was on. This fixes the check for odm by making sure opp count is >1 rather than not 0. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: load iram for abm 2.3Josip Pavic
[Why] ABM 2.3 firmware expects information in iRAM that differs from previous versions of ABM, so a mechanism is required to provide it with that information. [How] Extend the existing iRAM definition to include parameters added by ABM 2.3, and load it if DMCU is running ABM 2.3. Signed-off-by: Josip Pavic <Josip.Pavic@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: fix MPO HUBP underflow with Scatter GatherZi Yu Liao
[why] With Scatter Gather enabled, HUBP underflows during MPO enabled video playback. hubp_init has a register write that fixes this problem, but the register is cleared when HUBP gets power gated. [how] Make a call to hubp_init during enable_plane, so that the fix can be applied after HUBP powers back on again. Signed-off-by: Zi Yu Liao <ziyu.liao@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: fix audio endpoint not getting disabled issueSu Sung Chung
[Why] Disable_audio_stream gets enum option as a paramenter which will decide if we free acquired resources or not. However checks for the option is guarded by the other condition which check if audio stream is getting diabled more than once. With both conditions combined, if we attempt to disable audio stream twice in a row, first with keep and second with free as an option, we will never free any resources, which will make system think there is audio endpoint connected even after we plug out the device [How] Get rid of option as parameter to disable_audio_stream and move the part of the code that free acquired resources to outside where to keep or to free resources is actually determined Signed-off-by: Su Sung Chung <Su.Chung@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: Delete dead code in command_table_helperJulian Parkin
[Why] dig_encoder_sel_to_atom will always return zero on any ASIC version past DCE80 since programming of the FE selection is handled by driver, but the translation code was left in the function, making it look like a coding error. [How] Remove code that has no effect, and replace with a comment describing why it returns zero. Signed-off-by: Julian Parkin <julian.parkin@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: re structure odm to allow 4 to 1 supportDmytro Laktyushkin
Currently odm is handled using top_bottom pipe by special casing the differing opps to differentiate from mpc combine. Since top/bottom pipe list was made to track mpc muxing this creates difficulties in adding a 4 pipe odm case support. Rather than continue using mpc combine list, this change reworks odm to use it's own linked list to keep track of odm combine pipes. This also opens up options for using mpo with odm, if a practical use case is ever found. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amdgpu/display: add flag for multi-display mclk switchingAlex Deucher
Add a dcfeaturemask flag for mclk switching. Disable by default; enable once the feature has seen more testing. Set amdgpu.dcfeaturemask=2 on the kernel command line in grub to enable this. Acked-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: update bw_calcs to take pipe sync into account (v3)Alex Deucher
Properly set all_displays_in_sync so that when the data is propagated to powerplay, it's set properly and we can enable mclk switching when all monitors are in sync. v2: fix logic, clean up v3: check for blending chains, simplify logic Acked-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22drm/amd/display: fix calc_pll_max_vco_constructDmytro Laktyushkin
This was broken by a previous change switching to cached fw_info. Fixed by inverting a valid bool check. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=111432 Fixes: 9adc8050bf3c ("drm/amd/display: make firmware info only load once during dc_bios create") Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22drm/amd/display: fix a potential null pointer dereferenceColin Ian King
Currently the pointer init_data is dereferenced on the assignment of fw_info before init_data is sanity checked to see if it is null. Fix te potential null pointer dereference on init_data by only performing dereference after it is null checked. Addresses-Coverity: ("Dereference before null check") Fixes: 9adc8050bf3c ("drm/amd/display: make firmware info only load once during dc_bios create") Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22drm/amd/display: Enable SST DSC in DMDavid Francis
In create_stream_for_sink, check for SST DP connectors Parse DSC caps to DC format, then, if DSC is supported, compute the config DSC hardware will be programmed by dc_commit_state Tested-by: Mikita Lipski <Mikita.Lipski@amd.com> Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22Revert "drm/amd/display: Fix underscan not using proper scaling"David Francis
This reverts commit 80e80ec817f161560b4159608fb41bd289abede3. This commit fixed an issue with underscan commits not updating all needed timing values, but through various refactors it is no longer necessary. It causes corruption on odm combine by overwriting the halved h_active in the stream timing Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22Revert "drm/amd/display: add global master update lock for DCN2"David Francis
This reverts commit 6c5be4ac630805d3a3b20157a0c6421ef815fe78. This commit was accidentally promoted twice Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22Revert "drm/amd/display: navi10 bring up skip dsc encoder config"David Francis
This reverts commit ec8763486dd3d2fb585c2e6747520406e7dcef98. Re-enable enc2_dp_set_dsc_config. This function caused warnings due to missing register definitions. With the registers added, this now works Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-22Revert "drm/amd/display: skip dsc config for navi10 bring up"David Francis
This reverts commit 9e14d4f17e23ce46d346a6a22a295b4a65b9d918. optc dsc config was causing warnings due to missing register definitions. With the registers restored, the function can be re-enabled The reverted commit also disabled sanity checks and dsc power gating. The sanity check warnings are not associated with dsc, and power gating on dsc still has an issue on non-dsc monitors where the dsc hardware block is never init and so cannot respond to power gating requests. Therefore, those are left as is Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-21drm/amd/display: remove duplicated include from dc_link.cYueHaibing
Remove duplicated include. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-21drm/amd/display: Fix 32-bit divide error in wait_for_alt_modeNathan Chancellor
When building arm32 allyesconfig: ld.lld: error: undefined symbol: __aeabi_uldivmod >>> referenced by dc_link.c >>> gpu/drm/amd/display/dc/core/dc_link.o:(wait_for_alt_mode) in archive drivers/built-in.a >>> referenced by dc_link.c >>> gpu/drm/amd/display/dc/core/dc_link.o:(wait_for_alt_mode) in archive drivers/built-in.a time_taken_in_ns is of type unsigned long long so we need to use div_u64 to avoid this error. Fixes: b5b1f4554904 ("drm/amd/display: Enable type C hotplug") Reported-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-21drm/amd/display: Lock the CRTC when setting CRC sourceNicholas Kazlauskas
[Why] We need to ensure that we're holding the lock on the CRTC when setting the CRC source since we're modifying the CRTC state directly. We also need to wait for any outstanding non-blocking commits to finish so they aren't reading state that's potentially being modified - non-blocking commits don't hold the CRTC lock while doing commit tail work. [How] Lock the CRTC using its mutex. While holding the lock check if there's any commit active on the CRTC - if there is, it's non-blocking and we should wait until it's finished by waiting for hw_done to be signaled since that's the last point where we touch CRTC state. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-21drm/amd/display: Split out DC programming for CRC captureNicholas Kazlauskas
[Why] Calling amdgpu_dm_crtc_set_crc_source in amdgpu_dm directly has the consequence of adding additional vblank references or starting DPRX CRC capture more than once without calling stop first. Vblank references for CRC capture should be managed entirely by opening and closing the CRC file from userspace. Stream state also shouldn't be required on the CRC so we can close the file after the CRTC has been disabled. [How] Do DC programming required for configuring CRC capture separately from setting the source. Whenever we re-enable or reset a CRC this programming should be reapplied. CRC vblank reference handling in amdgpu_dm can be entirely dropped after this. Stream state also no longer needs to be required since we can just defer the programming to when the stream is actually enabled. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-21drm/amd/display: Use connector list for finding DPRX CRC auxNicholas Kazlauskas
[Why] This change is a refactor in preparation for adding locking and removing the requirement for a stream state on the CRTC for enabling CRC capture to fix igt@kms_plane_multiple@* warnings. [How] We can get the aux by finding the matching connector for the CRTC with the assumption that we're not doing cloning. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-21drm/amd/display: Check return code for CRC drm_crtc_vblank_getNicholas Kazlauskas
[Why] The call to drm_crtc_vblank_get can fail if vblank is disabled and we try to increment the reference. Since drm_crtc_vblank_get internally drops the reference when it fails it means the subsequent drm_crtc_vblank_put(...) when closing the file drops a zero reference. This was found via igt@kms_plane@pixel-format-pipe-A-planes. [How] Check the return code and return it on failure. We wouldn't have been able to enable CRC reading anyway since vblank wasn't enabled. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: David Francis <David.Francis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-21drm/amd/display: Calculate bpc based on max_requested_bpcNicholas Kazlauskas
[Why] The only place where state->max_bpc is updated on the connector is at the start of atomic check during drm_atomic_connector_check. It isn't updated when adding the connectors to the atomic state after the fact. It also doesn't necessarily reflect the right value when called in amdgpu during mode validation outside of atomic check. This can cause the wrong bpc to be used even if the max_requested_bpc is the correct value. [How] Don't rely on state->max_bpc reflecting the real bpc value and just do the min(...) based on display info bpc and max_requested_bpc. Fixes: 01933ba42d3d ("drm/amd/display: Use current connector state if NULL when checking bpc") Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-21Merge tag 'drm-misc-next-2019-08-19' of ↵Dave Airlie
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 5.4: UAPI Changes: Cross-subsystem Changes: Core Changes: - dma-buf: add reservation_object_fences helper, relax reservation_object_add_shared_fence, remove reservation_object seq number (and then restored) - dma-fence: Shrinkage of the dma_fence structure, Merge dma_fence_signal and dma_fence_signal_locked, Store the timestamp in struct dma_fence in a union with cb_list Driver Changes: - More dt-bindings YAML conversions - More removal of drmP.h includes - dw-hdmi: Support get_eld and various i2s improvements - gm12u320: Few fixes - meson: Global cleanup - panfrost: Few refactors, Support for GPU heap allocations - sun4i: Support for DDC enable GPIO - New panels: TI nspire, NEC NL8048HL11, LG Philips LB035Q02, Sharp LS037V7DW01, Sony ACX565AKM, Toppoly TD028TTEC1 Toppoly TD043MTEA1 Signed-off-by: Dave Airlie <airlied@redhat.com> [airlied: fixup dma_resv rename fallout] From: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190819141923.7l2adietcr2pioct@flea
2019-08-15drm/amd/display: Load NV12 SOC BB from firmwareLeo Li
[Why] Previous SOC bounding box firmware loading logic was for NV10, when we still had it in firmware. Now that it's brought into driver code, and NV12 BB is in firmware, this logic needs to be repurposed for NV12. [How] Set SOC_BOUNDING_BOX_VALID to false, and add the dcn_2_0_nv12_soc BB struct. In init_soc_bounding_box, load firmware to nv12 BB instead. In addition, conditionally update and patch the BB, depending on ASIC REV. Signed-off-by: Leo Li <sunpeng.li@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-15drm/amd/display: Enable MPO with pre-blend color processing (RGB)Michael Strauss
[Why] DCN10 performs color processing before MPC combination, causes color shift in RGB colorspaces when positive brightness offset is applied However, YCbCr is still unfixed and remains disabled [How] Add layerIndex to dc_plane_state and dc_plane_info structs Re-enable MPO when brightness is adjusted and colorspace is not YCbCr Set rear plane's brightness offset to 0 when front plane visible Signed-off-by: Michael Strauss <michael.strauss@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Acked-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-15drm/amd/display: audio cannot switch to internal when display turns offyanyan kang
[why] disable_az_endpoint has been skipped because dc->debug.az_endpoint_mute_only = true. [how] set dc->debug.az_endpoint_mute_only false when PPLIB’s PME notification function pointer is not NULL at the dcn10_resource construct function,because right now SMU/PPLIB and DAL all have the AZ D3 force PME notification implemented. AZ D3 should work. Signed-off-by: yanyan kang <Yanyan.Kang@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-15drm/amd/display: check hpd before retry verify link capWenjing Liu
[why] During detection link training if a display is disconnected, the current code will retry 3 times of link training on disconnected link before giving up. [how] Before each retry check for HPD status, only retry verify link cap when HPD is still high. Also put a 10ms delay between each retry to improve the chance of success. Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Abdoulaye Berthe <Abdoulaye.Berthe@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-15drm/amd/display: enable dcn_mem_pwr as golden setting updatesCharlene Liu
Enable dcn_mem_pwr as golden setting updates Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-15drm/amd/display: 3.2.46Anthony Koo
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-15drm/amd/display: fix dcn20 global sync dml param extractionDmytro Laktyushkin
Currently the paremeters are extracted as if dml is calculating using pipes as we pass them in. in reality, dml internally merges pipes into planes if pipe split is detected. This change adds reverse logic to dcn20_calculate_dlg_params so that the global sync parameters can be correctly extracted for all the pipes when pipe split is enabled. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-15drm/amd/display: 3.2.45Anthony Koo
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-15drm/amd/display: Add and refine DSC logs in enable sequenceNikola Cornij
[why] Some logs messages were not precise and some new log messages were needed after "get packed PPS" function was introduced Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>