From 1934ffd08d79ad746dbb1e2fcaeb76950be57be6 Mon Sep 17 00:00:00 2001 From: Peter De Schrijver Date: Tue, 25 Jul 2017 13:34:10 +0300 Subject: clk: tegra: don't warn for pll_d2 defaults unnecessarily If the PLL is on, only warn if the defaults are not yet set. Otherwise be silent. Signed-off-by: Peter De Schrijver Reviewed-by: Timo Alho Tested-by: Thierry Reding Acked-by: Thierry Reding Signed-off-by: Stephen Boyd --- drivers/clk/tegra/clk-tegra210.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c index a4d7d94b6436..1e470ca154f6 100644 --- a/drivers/clk/tegra/clk-tegra210.c +++ b/drivers/clk/tegra/clk-tegra210.c @@ -718,8 +718,6 @@ static void plldss_defaults(const char *pll_name, struct tegra_clk_pll *plldss, plldss->params->defaults_set = true; if (val & PLL_ENABLE) { - pr_warn("%s already enabled. Postponing set full defaults\n", - pll_name); /* * PLL is ON: check if defaults already set, then set those @@ -758,6 +756,10 @@ static void plldss_defaults(const char *pll_name, struct tegra_clk_pll *plldss, (~PLLDSS_MISC1_CFG_EN_SDM)); } + if (!plldss->params->defaults_set) + pr_warn("%s already enabled. Postponing set full defaults\n", + pll_name); + /* Enable lock detect */ if (val & PLLDSS_BASE_LOCK_OVERRIDE) { val &= ~PLLDSS_BASE_LOCK_OVERRIDE; -- cgit v1.2.3