From 02c0dc0f60fa04a20267e8512af6614f179de0fc Mon Sep 17 00:00:00 2001 From: Alexandre Torgue Date: Fri, 23 Jul 2021 15:28:06 +0200 Subject: docs: arm: stm32: introduce STM32MP13 SoCs STM32MP13 SoCs are derivative of STM32MP15 SoCs. They embed one Cortex-A7 plus standard connectivity. Signed-off-by: Alexandre Torgue Acked-by: Arnd Bergmann --- Documentation/arm/index.rst | 1 + Documentation/arm/stm32/stm32mp13-overview.rst | 37 ++++++++++++++++++++++++++ 2 files changed, 38 insertions(+) create mode 100644 Documentation/arm/stm32/stm32mp13-overview.rst (limited to 'Documentation/arm') diff --git a/Documentation/arm/index.rst b/Documentation/arm/index.rst index d4f34ae9e6f4..2bda5461a80b 100644 --- a/Documentation/arm/index.rst +++ b/Documentation/arm/index.rst @@ -55,6 +55,7 @@ SoC-specific documents stm32/stm32h750-overview stm32/stm32f769-overview stm32/stm32f429-overview + stm32/stm32mp13-overview stm32/stm32mp157-overview sunxi diff --git a/Documentation/arm/stm32/stm32mp13-overview.rst b/Documentation/arm/stm32/stm32mp13-overview.rst new file mode 100644 index 000000000000..3bb9492dad49 --- /dev/null +++ b/Documentation/arm/stm32/stm32mp13-overview.rst @@ -0,0 +1,37 @@ +=================== +STM32MP13 Overview +=================== + +Introduction +------------ + +The STM32MP131/STM32MP133/STM32MP135 are Cortex-A MPU aimed at various applications. +They feature: + +- One Cortex-A7 application core +- Standard memories interface support +- Standard connectivity, widely inherited from the STM32 MCU family +- Comprehensive security support + +More details: + +- Cortex-A7 core running up to @900MHz +- FMC controller to connect SDRAM, NOR and NAND memories +- QSPI +- SD/MMC/SDIO support +- 2*Ethernet controller +- CAN +- ADC/DAC +- USB EHCI/OHCI controllers +- USB OTG +- I2C, SPI, CAN busses support +- Several general purpose timers +- Serial Audio interface +- LCD controller +- DCMIPP +- SPDIFRX +- DFSDM + +:Authors: + +- Alexandre Torgue -- cgit v1.2.3 From c0c3fed3ae9f725b68c32b7975c8c3fee9f1d80c Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Mon, 4 Oct 2021 14:05:54 +0200 Subject: ARM: at91: Documentation: add sama7g5 family Add the new SAMA7G5 ARMv7 based SoC family from Microchip to the AT91 documentation. Signed-off-by: Nicolas Ferre --- Documentation/arm/microchip.rst | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'Documentation/arm') diff --git a/Documentation/arm/microchip.rst b/Documentation/arm/microchip.rst index 9c013299fd3b..388f69998844 100644 --- a/Documentation/arm/microchip.rst +++ b/Documentation/arm/microchip.rst @@ -137,6 +137,18 @@ the Microchip website: http://www.microchip.com. http://ww1.microchip.com/downloads/en/DeviceDoc/DS60001476B.pdf + * ARM Cortex-A7 based SoCs + - sama7g5 family + + - sama7g51 + - sama7g52 + - sama7g53 + - sama7g54 (device superset) + + * Datasheet + + Coming soon + * ARM Cortex-M7 MCUs - sams70 family -- cgit v1.2.3 From 9da778c5db55a8b7433f740b8de513ae964bae1d Mon Sep 17 00:00:00 2001 From: Kavyasree Kotagiri Date: Mon, 4 Oct 2021 16:29:24 +0530 Subject: ARM: at91: Documentation: add lan966 family Add the new LAN966 ARMv7 based SoC family from Microchip. Signed-off-by: Kavyasree Kotagiri Acked-by: Alexandre Belloni [nicolas.ferre@microchip.com: move entry as part of new Cortex-A7 core type] Signed-off-by: Nicolas Ferre Link: https://lore.kernel.org/r/20211004105926.5696-3-kavyasree.kotagiri@microchip.com --- Documentation/arm/microchip.rst | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'Documentation/arm') diff --git a/Documentation/arm/microchip.rst b/Documentation/arm/microchip.rst index 388f69998844..e721d855f2c9 100644 --- a/Documentation/arm/microchip.rst +++ b/Documentation/arm/microchip.rst @@ -149,6 +149,14 @@ the Microchip website: http://www.microchip.com. Coming soon + - lan966 family + - lan9662 + - lan9668 + + * Datasheet + + Coming soon + * ARM Cortex-M7 MCUs - sams70 family -- cgit v1.2.3