From 400f6af048930bce01419f5d1e50bebc03429e35 Mon Sep 17 00:00:00 2001 From: Tanmay Shah Date: Mon, 14 Nov 2022 15:39:36 -0800 Subject: arm64: dts: xilinx: zynqmp: Add RPU subsystem device node RPU subsystem can be configured in cluster-mode or split mode. Also each r5 core has separate power domains. Signed-off-by: Tanmay Shah Acked-by: Michal Simek Link: https://lore.kernel.org/r/20221114233940.2096237-3-tanmay.shah@amd.com Signed-off-by: Mathieu Poirier --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'arch') diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index a549265e55f6..c0f60833c0ae 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -100,6 +100,22 @@ }; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + rproc_0_fw_image: memory@3ed00000 { + no-map; + reg = <0x0 0x3ed00000 0x0 0x40000>; + }; + + rproc_1_fw_image: memory@3ef00000 { + no-map; + reg = <0x0 0x3ef00000 0x0 0x40000>; + }; + }; + zynqmp_ipi: zynqmp_ipi { compatible = "xlnx,zynqmp-ipi-mailbox"; interrupt-parent = <&gic>; @@ -203,6 +219,23 @@ ranges; }; + remoteproc { + compatible = "xlnx,zynqmp-r5fss"; + xlnx,cluster-mode = <1>; + + r5f-0 { + compatible = "xlnx,zynqmp-r5f"; + power-domains = <&zynqmp_firmware PD_RPU_0>; + memory-region = <&rproc_0_fw_image>; + }; + + r5f-1 { + compatible = "xlnx,zynqmp-r5f"; + power-domains = <&zynqmp_firmware PD_RPU_1>; + memory-region = <&rproc_1_fw_image>; + }; + }; + amba: axi { compatible = "simple-bus"; #address-cells = <2>; -- cgit v1.2.3