From db9c4a1e6581e45976526eb45c032a73f944dd8a Mon Sep 17 00:00:00 2001 From: John Crispin Date: Mon, 23 Jan 2017 13:48:26 +0100 Subject: clk: mediatek: add mt2701 ethernet reset The ethernet clock core has a reset register that is currently not exposed to the user. Fix this by adding the missing registration code. Signed-off-by: John Crispin Signed-off-by: Stephen Boyd --- drivers/clk/mediatek/clk-mt2701-eth.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/clk/mediatek') diff --git a/drivers/clk/mediatek/clk-mt2701-eth.c b/drivers/clk/mediatek/clk-mt2701-eth.c index 877be8715afa..9251a6551522 100644 --- a/drivers/clk/mediatek/clk-mt2701-eth.c +++ b/drivers/clk/mediatek/clk-mt2701-eth.c @@ -66,6 +66,8 @@ static int clk_mt2701_eth_probe(struct platform_device *pdev) "could not register clock provider: %s: %d\n", pdev->name, r); + mtk_register_reset_controller(node, 1, 0x34); + return r; } -- cgit v1.2.3