From 6334ac93a1e1ff8b99dac98bb7ef790b5786ea3c Mon Sep 17 00:00:00 2001 From: Dmytro Laktyushkin Date: Fri, 27 Oct 2017 17:55:03 -0400 Subject: drm/amd/display: cache pwl params and scl_data to avoid extra programming This saves us about 5000 reg writes per full update. This translates to about 40000 writes over the course of single eDP bootup. Signed-off-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Harry Wentland Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h') diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h index 6eca95931ee1..71078d184289 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h @@ -92,11 +92,9 @@ struct dpp_funcs { const struct pwl_params *params); void (*opp_program_regamma_pwl)( - struct dpp *dpp, const struct pwl_params *params); - - void (*opp_set_regamma_mode)( - struct dpp *dpp_base, - enum opp_regamma mode); + struct dpp *dpp, + const struct pwl_params *params, + enum opp_regamma mode); void (*ipp_program_bias_and_scale)( struct dpp *dpp, -- cgit v1.2.3