From c2fbe663ec4f991832d67f936d3941f781884156 Mon Sep 17 00:00:00 2001 From: Felipe Clark Date: Sun, 7 Mar 2021 13:27:30 -0500 Subject: drm/amd/display: Firmware assisted MCLK switch and FS [WHY] Memory clock switching has great potential for power savings. [HOW] The driver code was modified to notify the DMCUB firmware that it should stretch the vertical blank of frames when a memory clock switch is about to start so that no blackouts happen on the screen due to unavailability of the frame buffer. The driver logic to determine when such firmware assisted strategy can be initiated is also implemented and consists on checking prerequisites of the feature. Acked-by: Alan Liu Signed-off-by: Felipe Clark Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/modules/freesync/freesync.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers/gpu/drm/amd/display/modules/freesync') diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c index 03fa63d56fa6..aa121d45d9b8 100644 --- a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c +++ b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c @@ -1374,6 +1374,11 @@ unsigned long long mod_freesync_calc_field_rate_from_timing( return field_rate_in_uhz; } +bool mod_freesync_get_freesync_enabled(struct mod_vrr_params *pVrr, struct dc_stream_state *const pStream) +{ + return (pVrr->state != VRR_STATE_UNSUPPORTED) && (pVrr->state != VRR_STATE_DISABLED); +} + bool mod_freesync_is_valid_range(uint32_t min_refresh_cap_in_uhz, uint32_t max_refresh_cap_in_uhz, uint32_t nominal_field_rate_in_uhz) -- cgit v1.2.3 From ebfb15262af3bec6c3cc263ce04164e44eea4b30 Mon Sep 17 00:00:00 2001 From: Harry VanZyllDeJong Date: Mon, 10 May 2021 19:30:24 -0400 Subject: drm/amd/display: Add vrr_active_variable to dc_stream_update [WHY] The display driver on some OSes need to track it in order to perform memory clock switching decisions. [HOW] Propagate the vrr active state to dirty bit so that on mode set it disables dynamic memory clock switching. Acked-by: Alan Liu Signed-off-by: Harry VanZyllDeJong Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/core/dc.c | 3 +++ drivers/gpu/drm/amd/display/dc/dc_stream.h | 1 + drivers/gpu/drm/amd/display/modules/freesync/freesync.c | 2 +- drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h | 3 +-- 4 files changed, 6 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/drm/amd/display/modules/freesync') diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 7c2b65226131..49339c5c7230 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -2652,6 +2652,9 @@ static void copy_stream_update_to_stream(struct dc *dc, if (update->allow_freesync) stream->allow_freesync = *update->allow_freesync; + if (update->vrr_active_variable) + stream->vrr_active_variable = *update->vrr_active_variable; + if (update->crtc_timing_adjust) stream->adjust = *update->crtc_timing_adjust; diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h index ae9382ce82d3..5a894c19b0ea 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_stream.h +++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h @@ -304,6 +304,7 @@ struct dc_stream_update { bool *dpms_off; bool integer_scaling_update; bool *allow_freesync; + bool *vrr_active_variable; struct colorspace_transform *gamut_remap; enum dc_color_space *output_color_space; diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c index aa121d45d9b8..0686223034de 100644 --- a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c +++ b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c @@ -1374,7 +1374,7 @@ unsigned long long mod_freesync_calc_field_rate_from_timing( return field_rate_in_uhz; } -bool mod_freesync_get_freesync_enabled(struct mod_vrr_params *pVrr, struct dc_stream_state *const pStream) +bool mod_freesync_get_freesync_enabled(struct mod_vrr_params *pVrr) { return (pVrr->state != VRR_STATE_UNSUPPORTED) && (pVrr->state != VRR_STATE_DISABLED); } diff --git a/drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h b/drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h index 62e326dd29a8..afe1f6cce528 100644 --- a/drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h +++ b/drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h @@ -195,7 +195,6 @@ unsigned int mod_freesync_calc_v_total_from_refresh( unsigned int refresh_in_uhz); // Returns true when FreeSync is supported and enabled (even if it is inactive) -bool mod_freesync_get_freesync_enabled(struct mod_vrr_params *pVrr, - struct dc_stream_state *const pStream); +bool mod_freesync_get_freesync_enabled(struct mod_vrr_params *pVrr); #endif -- cgit v1.2.3