From e3f8bc8c6ecd0bcb7b4d413332b068ebbbcc31ee Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Tue, 16 Sep 2014 09:07:11 -0300 Subject: [media] smiapp-pll: Unify OP and VT PLL structs Uniform representation for VT and OP clocks. This is preparation for calculating the VT clocks using the OP clock code. Signed-off-by: Sakari Ailus Acked-by: Laurent Pinchart Signed-off-by: Mauro Carvalho Chehab --- drivers/media/i2c/smiapp-pll.h | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'drivers/media/i2c/smiapp-pll.h') diff --git a/drivers/media/i2c/smiapp-pll.h b/drivers/media/i2c/smiapp-pll.h index 2885cd76ff8c..b7c0e6609ad4 100644 --- a/drivers/media/i2c/smiapp-pll.h +++ b/drivers/media/i2c/smiapp-pll.h @@ -35,6 +35,13 @@ #define SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE (1 << 0) #define SMIAPP_PLL_FLAG_NO_OP_CLOCKS (1 << 1) +struct smiapp_pll_branch { + uint16_t sys_clk_div; + uint16_t pix_clk_div; + uint32_t sys_clk_freq_hz; + uint32_t pix_clk_freq_hz; +}; + struct smiapp_pll { /* input values */ uint8_t bus_type; @@ -58,17 +65,10 @@ struct smiapp_pll { /* output values */ uint16_t pre_pll_clk_div; uint16_t pll_multiplier; - uint16_t op_sys_clk_div; - uint16_t op_pix_clk_div; - uint16_t vt_sys_clk_div; - uint16_t vt_pix_clk_div; - uint32_t pll_ip_clk_freq_hz; uint32_t pll_op_clk_freq_hz; - uint32_t op_sys_clk_freq_hz; - uint32_t op_pix_clk_freq_hz; - uint32_t vt_sys_clk_freq_hz; - uint32_t vt_pix_clk_freq_hz; + struct smiapp_pll_branch vt; + struct smiapp_pll_branch op; uint32_t pixel_rate_csi; }; -- cgit v1.2.3