From cb6fc18e9ca615f03d18e60c49855b434ca2e51e Mon Sep 17 00:00:00 2001 From: Helge Deller Date: Tue, 17 Jan 2006 12:40:40 -0700 Subject: [PARISC] Use kzalloc and other janitor-style cleanups Helge, o Convert a bunch of kmalloc/memset uses to kzalloc. o pci.c: Add some __read_mostly annotations. o pci.c: Move constant pci_post_reset_delay to asm/pci.h o grfioctl.h: Add A4450A to comment of CRT_ID_VISUALIZE_EG. o Add some consts to perf.c/perf_images.h Matthew, o sticore.c: Add some consts to suppress compile warnings. Signed-off-by: Helge Deller Signed-off-by: Matthew Wilcox Signed-off-by: Kyle McMartin --- include/asm-parisc/grfioctl.h | 2 +- include/asm-parisc/pci.h | 15 +++++++++++++-- 2 files changed, 14 insertions(+), 3 deletions(-) (limited to 'include/asm-parisc') diff --git a/include/asm-parisc/grfioctl.h b/include/asm-parisc/grfioctl.h index 6a910311b56b..671e06042b40 100644 --- a/include/asm-parisc/grfioctl.h +++ b/include/asm-parisc/grfioctl.h @@ -58,7 +58,7 @@ #define CRT_ID_ELK_1024DB 0x27849CA5 /* Elk 1024x768 double buffer */ #define CRT_ID_ELK_GS S9000_ID_A1924A /* Elk 1280x1024 GreyScale */ #define CRT_ID_CRX24 S9000_ID_A1439A /* Piranha */ -#define CRT_ID_VISUALIZE_EG 0x2D08C0A7 /* Graffiti (built-in B132+/B160L) */ +#define CRT_ID_VISUALIZE_EG 0x2D08C0A7 /* Graffiti, A4450A (built-in B132+/B160L) */ #define CRT_ID_THUNDER 0x2F23E5FC /* Thunder 1 VISUALIZE 48*/ #define CRT_ID_THUNDER2 0x2F8D570E /* Thunder 2 VISUALIZE 48 XP*/ #define CRT_ID_HCRX S9000_ID_HCRX /* Hyperdrive HCRX */ diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h index f277254159b7..4c5e15ea3a02 100644 --- a/include/asm-parisc/pci.h +++ b/include/asm-parisc/pci.h @@ -18,6 +18,18 @@ */ #define PCI_MAX_BUSSES 256 + +/* To be used as: mdelay(pci_post_reset_delay); + * + * post_reset is the time the kernel should stall to prevent anyone from + * accessing the PCI bus once #RESET is de-asserted. + * PCI spec somewhere says 1 second but with multi-PCI bus systems, + * this makes the boot time much longer than necessary. + * 20ms seems to work for all the HP PCI implementations to date. + */ +#define pci_post_reset_delay 50 + + /* ** pci_hba_data (aka H2P_OBJECT in HP/UX) ** @@ -83,7 +95,7 @@ static __inline__ int pci_is_lmmio(struct pci_hba_data *hba, unsigned long a) /* ** Convert between PCI (IO_VIEW) addresses and processor (PA_VIEW) addresses. -** See pcibios.c for more conversions used by Generic PCI code. +** See pci.c for more conversions used by Generic PCI code. ** ** Platform characteristics/firmware guarantee that ** (1) PA_VIEW - IO_VIEW = lmmio_offset for both LMMIO and ELMMIO @@ -191,7 +203,6 @@ struct pci_bios_ops { */ extern struct pci_port_ops *pci_port; extern struct pci_bios_ops *pci_bios; -extern int pci_post_reset_delay; /* delay after de-asserting #RESET */ extern int pci_hba_count; extern struct pci_hba_data *parisc_pci_hba[]; -- cgit v1.2.3