From 260dab4478f60d02a77692c803ea1ff33261843e Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 16 Mar 2020 16:32:33 +0800 Subject: clk: imx7ulp: make it easy to change ARM core clk ARM clk could only source from divcore or hsrun_divcore. Follow what we already used on i.MX7D and i.MX8M SoCs, use imx_clk_hw_cpu API. When ARM core is running normaly, whether divcore or hwrun_divcore will finally source from SPLL_PFD0. However SPLL_PFD0 is marked with CLK_SET_GATE, so we need to disable SPLL_PFD0, when configure the rate. So add CORE and HSRUN_CORE virtual clk to make it easy to configure the clk using imx_clk_hw_cpu API. Since CORE and HSRUN_CORE already marked with CLK_IS_CRITICAL, no need to set ARM as CLK_IS_CRITICAL. And when set the rate of ARM clk, prograting it the parent with CLK_SET_RATE_PARENT will finally set the SPLL_PFD0 clk. Signed-off-by: Peng Fan Reviewed-by: Abel Vesa Signed-off-by: Shawn Guo --- include/dt-bindings/clock/imx7ulp-clock.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'include/dt-bindings/clock/imx7ulp-clock.h') diff --git a/include/dt-bindings/clock/imx7ulp-clock.h b/include/dt-bindings/clock/imx7ulp-clock.h index 38145bdcd975..b58370d146e2 100644 --- a/include/dt-bindings/clock/imx7ulp-clock.h +++ b/include/dt-bindings/clock/imx7ulp-clock.h @@ -58,7 +58,10 @@ #define IMX7ULP_CLK_HSRUN_SYS_SEL 44 #define IMX7ULP_CLK_HSRUN_CORE_DIV 45 -#define IMX7ULP_CLK_SCG1_END 46 +#define IMX7ULP_CLK_CORE 46 +#define IMX7ULP_CLK_HSRUN_CORE 47 + +#define IMX7ULP_CLK_SCG1_END 48 /* PCC2 */ #define IMX7ULP_CLK_DMA1 0 -- cgit v1.2.3