summaryrefslogtreecommitdiff
path: root/arch/x86/include/asm/mach_traps.h
blob: 7775debde112cbacd566fbca9516e19342d44da2 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
/*
 *  Machine specific NMI handling for generic.
 *  Split out from traps.c by Osamu Tomita <tomita@cinet.co.jp>
 */
#ifndef _ASM_X86_MACH_DEFAULT_MACH_TRAPS_H
#define _ASM_X86_MACH_DEFAULT_MACH_TRAPS_H

#include <asm/mc146818rtc.h>

#define NMI_REASON_PORT		0x61
#define NMI_ENABLE_PORT		0x70 /* Real-Time Clock Address Register as well */

#define NMI_REASON_SERR		0x80
#define NMI_REASON_IOCHK	0x40
#define NMI_REASON_MASK		(NMI_REASON_SERR | NMI_REASON_IOCHK)

#define NMI_REASON_CLEAR_SERR	0x04
#define NMI_REASON_CLEAR_IOCHK	0x08
#define NMI_REASON_CLEAR_MASK	0x0f

static inline unsigned char get_nmi_reason(void)
{
	return inb(NMI_REASON_PORT);
}

static inline void reassert_nmi(void)
{
	int old_reg = -1;

	if (do_i_have_lock_cmos())
		old_reg = current_lock_cmos_reg();
	else
		lock_cmos(0); /* register doesn't matter here */

	/*
	 * This will cause the NMI output to transition low
	 * then high if there are any pending NMI sources. The
	 * CPU's NMI input logic will then register a new NMI.
	 */
	outb(0x8f, NMI_ENABLE_PORT);
	inb(0x71);	/* dummy */
	outb(0x0f, NMI_ENABLE_PORT);
	inb(0x71);	/* dummy */

	if (old_reg >= 0)
		outb(old_reg, NMI_ENABLE_PORT);
	else
		unlock_cmos();
}

#endif /* _ASM_X86_MACH_DEFAULT_MACH_TRAPS_H */