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path: root/drivers/gpu/drm/amd/amdgpu
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2016-05-04drm/amdgpu: enable sdma clockgating on CZAlex Deucher
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu/sdma: rename fiji cg functionsAlex Deucher
They care common for all sdma 3.0 parts Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: enable gmc clockgating for STAlex Deucher
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: enable gmc clockgating for CZAlex Deucher
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu/vi: rename fiji cg functionsAlex Deucher
They can be used for other VI parts. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: enable gfx clockgating for ST (v2)Alex Deucher
v2: just enable MGCG for now since CGCG causes hangs Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: enable gfx clockgating for CZAlex Deucher
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu/gfx: rework fiji cg functions so they can be sharedAlex Deucher
They can be shared with other asics with minor modifications. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: add a new set of rlc function pointersAlex Deucher
Different asics tend to have different ways to interact with the RLC. This just covers enter/exit of safe mode for updating CG and PG state, but could be extended to cover other RLC operations in the future if necessary. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu/gfx: adjust gfx_v8_0_send_serdes_cmd for STAlex Deucher
Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu/gfx8: rename send_serdes_cmdAlex Deucher
So it can be shared with CZ/ST. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu/gmc: add proper CG flags for fijiAlex Deucher
We were already enabling these CG features, this uses the standard interface for doing so. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu/common: add proper CG flags for fijiAlex Deucher
We were already enabling these CG features, this uses the standard interface for doing so. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu/sdma: add proper CG flags for fijiAlex Deucher
We were already enabling these CG features, this uses the standard interface for doing so. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu/gfx: add proper CG flags for fijiAlex Deucher
We were already enabling these CG features, this uses the standard interface for doing so. Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/ttm: implement LRU add callbacks v2Christian König
This allows fine grained control for the driver where to add a BO into the LRU. v2: fix typo in comment Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/ttm: remove use_ticket parameter from ttm_bo_reserveChristian König
Not used any more. Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: fix the coding style in amdgpu_ring.cChristian König
No functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: use the ring name for debugfs (v2)Christian König
Instead of hard coding just another name in the ring code. v2: squash in Tom's rebase fix Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: reduce the ring size for SDMAChristian König
Those are way too large. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: reduce the ring size for GFXChristian König
Those are way too large. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: use max_dw in ring_initChristian König
Instead of specifying the total ring size calculate that from the maximum number of dw a submission can have and the number of concurrent submissions. This fixes UVD with 8 concurrent submissions or more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd: make a type-safe cgs_device struct. (v2)Dave Airlie
This is just a type-safety things to avoid everyone taking void *, it doesn't change anything. v2: agd5f: split out the dal changes into a separate patch. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: handle more than 10 UVD sessions (v2)Arindam Nath
Change History -------------- v2: - Make firmware version check correctly. Firmware versions >= 1.80 should all support 40 UVD instances. - Replace AMDGPU_MAX_UVD_HANDLES with max_handles variable. v1: - The firmware can handle upto 40 UVD sessions. Signed-off-by: Arindam Nath <arindam.nath@amd.com> Signed-off-by: Ayyappa Chandolu <ayyappa.chandolu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd: make some function-local tables static constNils Wallménius
These tables were initialized on stack on each call, avoid that and save a little bit of text size. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: Mark all instances of struct drm_info_list as constNils Wallménius
All these are compile time constand and the drm_debugfs_create/remove_files functions take a const pointer argument. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd/scheduler: Mark amdgpu_sched_ops constNils Wallménius
This marks the struct amdgpu_sched_ops const and adjusts amd_sched_init to take a const pointer for the ops param. The ops member of struct amd_gpu_scheduler is also changed to const. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amd: Mark some tables as constNils Wallménius
This patch marks some compile-time constant tables 'const'. The tables marked in this patch are the low hanging fruit where little other changes were necesary to avoid casting away constness etc. Also mark some tables that are private to a file as static. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: reuse VMIDs already assigned to a processChristian König
If we don't need to flush we can easily use another VMID already assigned to the process. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: add a fence after the VM flushChristian König
This way we can track when the flush is done. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: use a sync object for VMID fences v2Christian König
v2: rebase & cleanup This way we can store more than one fence as user for each VMID. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> (v1) Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1) Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: merge VM manager and VM context ID structureChristian König
No need to have two of them any more. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: Set PFLIP_SUBMITTED for crtc after address updateAndrey Grodzovsky
Also add some pflip debug prints. This change allows us to wait on pflip status until the new surface address is actually submitted to the register. This reverts ed3020e923240829dcdfd3343f6e91dc02c63775 drm/amdgpu: Move MMIO flip out of spinlocked region The original change assumed DAL will aquire locks inside DAL implemetion of page_flip callback which eventaully didn't happen. This moves the flip before status update which makes sense for the non-DAL code pathes as well. Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: Use lockless gem BO free callbackDaniel Vetter
No dev->struct_mutex anywhere to be seen. Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1461691808-12414-11-git-send-email-daniel.vetter@ffwll.ch
2016-05-03drm/amdgpu: make sure vertical front porch is at least 1Alex Deucher
hw doesn't like a 0 value. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2016-05-03drm/amdgpu: set metadata pointer to NULL after freeing.Dave Airlie
Without this there was a double free of the metadata, which ended up freeing the fd table for me here, and taking out the machine more often than not. I reproduced with X.org + modesetting DDX + latest llvm/mesa, also required using dri3. Cc: stable@vger.kernel.org Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: optionally enable GART debugfs fileChristian König
Keeping the pages array around can use a lot of system memory when you want a large GART. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: remove GART page addr arrayChristian König
Not needed any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: use BO pages instead of GART arrayChristian König
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: change parameter passing in the VM codeChristian König
Make it more flexible by passing src and page addresses directly instead of the structures they contain. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: drop the GTT power of two limitChristian König
As far as I can see that isn't neccessary any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amd/amdgpu: Enable clockgating in UVD6 for StoneyTom St Denis
This patch enables clockgating for the UVD6 block in Stoney. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amd/amdgpu: Enable clockgating for UVD5 on TongaTom St Denis
This patch enables clock gating for the UVD5 block with Tonga. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amd/amdgpu: Add SW clock gating support to UVD 5 and 6Tom St Denis
This patch adds support for software clock gating to UVD 5 and UVD 6 blocks with a preliminary commented out hardware gating routine. Currently hardware gating does not work so it's not activated. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: refine code for code style.Rex Zhu
White space fix. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: No need to stop hw init although vce's state was not true.Rex Zhu
This is not a fatal error. v2: add comment why ignore the error here. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: fix issue that can't set vce clock gate.Rex Zhu
Need to soft reset VCE as part of the clockgating sequence. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: use ref to keep job aliveMonk Liu
this is to fix fatal page fault error that occured if: job is signaled/released after its timeout work is already put to the global queue (in this case the cancel_delayed_work will return false), which will lead to NX-protection error page fault during job_timeout_func. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: rework TDR in scheduler (v2)Monk Liu
Add two callbacks to scheduler to maintain jobs, and invoked for job timeout calculations. Now TDR measures time gap from job is processed by hw. v2: fix typo Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-02drm/amdgpu: delay job free to when it's finished (v2)Monk Liu
for those jobs submitted through scheduler, do not free it immediately after scheduled, instead free it in global workqueue by its sched fence signaling callback function. v2: call uf's bo_undef after job_run() call job's sync free after job_run() no static inline __amdgpu_job_free() anymore, just use kfree(job) to replace it. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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