From 33c4655c00e6af3ec4023f2cafd63dd4a42de49b Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Wed, 27 Aug 2008 02:56:39 -0700 Subject: sparc: Kill SBUS layer IRQ hooks. IRQs are obtained by drivers from the of_device struct. Signed-off-by: David S. Miller --- arch/sparc/kernel/sun4m_irq.c | 13 ------------- 1 file changed, 13 deletions(-) (limited to 'arch/sparc/kernel/sun4m_irq.c') diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c index 94e02de960ea..d66334b853ef 100644 --- a/arch/sparc/kernel/sun4m_irq.c +++ b/arch/sparc/kernel/sun4m_irq.c @@ -152,18 +152,6 @@ static unsigned long irq_mask[] = { SUN4M_INT_SBUS(6) /* 14 irq 13 */ }; -static int sun4m_pil_map[] = { 0, 2, 3, 5, 7, 9, 11, 13 }; - -static unsigned int sun4m_sbint_to_irq(struct sbus_dev *sdev, - unsigned int sbint) -{ - if (sbint >= sizeof(sun4m_pil_map)) { - printk(KERN_ERR "%s: bogus SBINT %d\n", sdev->prom_name, sbint); - BUG(); - } - return sun4m_pil_map[sbint] | 0x30; -} - static unsigned long sun4m_get_irqmask(unsigned int irq) { unsigned long mask; @@ -447,7 +435,6 @@ void __init sun4m_init_IRQ(void) &sun4m_interrupts->undirected_target; sun4m_interrupts->undirected_target = 0; } - BTFIXUPSET_CALL(sbint_to_irq, sun4m_sbint_to_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(enable_irq, sun4m_enable_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(disable_irq, sun4m_disable_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(enable_pil_irq, sun4m_enable_pil_irq, BTFIXUPCALL_NORM); -- cgit v1.2.3 From 454eeb2dd7bd0418451ea33a606d0fa50aa36718 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Wed, 27 Aug 2008 04:05:35 -0700 Subject: sparc: Convert remaining sbus_ioremap() and sbus_iounmap() users. Use of_ioremap() and of_iounmap() instead. Signed-off-by: David S. Miller --- arch/sparc/include/asm/floppy_32.h | 5 ++++- arch/sparc/kernel/auxio.c | 6 ++++-- arch/sparc/kernel/sun4c_irq.c | 5 +++-- arch/sparc/kernel/sun4d_irq.c | 5 +++-- arch/sparc/kernel/sun4m_irq.c | 11 ++++++----- arch/sparc/kernel/time.c | 5 +++-- 6 files changed, 23 insertions(+), 14 deletions(-) (limited to 'arch/sparc/kernel/sun4m_irq.c') diff --git a/arch/sparc/include/asm/floppy_32.h b/arch/sparc/include/asm/floppy_32.h index ff2b91c6eeff..c792830636de 100644 --- a/arch/sparc/include/asm/floppy_32.h +++ b/arch/sparc/include/asm/floppy_32.h @@ -6,6 +6,9 @@ #ifndef __ASM_SPARC_FLOPPY_H #define __ASM_SPARC_FLOPPY_H +#include +#include + #include #include #include @@ -343,7 +346,7 @@ static int sun_floppy_init(void) r.flags = fd_regs[0].which_io; r.start = fd_regs[0].phys_addr; sun_fdc = (struct sun_flpy_controller *) - sbus_ioremap(&r, 0, fd_regs[0].reg_size, "floppy"); + of_ioremap(&r, 0, fd_regs[0].reg_size, "floppy"); /* Last minute sanity check... */ if(sun_fdc->status_82072 == 0xff) { diff --git a/arch/sparc/kernel/auxio.c b/arch/sparc/kernel/auxio.c index baf4ed3fb0f3..09c857215a52 100644 --- a/arch/sparc/kernel/auxio.c +++ b/arch/sparc/kernel/auxio.c @@ -6,6 +6,8 @@ #include #include #include +#include +#include #include #include #include @@ -59,7 +61,7 @@ void __init auxio_probe(void) r.flags = auxregs[0].which_io & 0xF; r.start = auxregs[0].phys_addr; r.end = auxregs[0].phys_addr + auxregs[0].reg_size - 1; - auxio_register = sbus_ioremap(&r, 0, auxregs[0].reg_size, "auxio"); + auxio_register = of_ioremap(&r, 0, auxregs[0].reg_size, "auxio"); /* Fix the address on sun4m and sun4c. */ if((((unsigned long) auxregs[0].phys_addr) & 3) == 3 || sparc_cpu_model == sun4c) @@ -128,7 +130,7 @@ void __init auxio_power_probe(void) r.flags = regs.which_io & 0xF; r.start = regs.phys_addr; r.end = regs.phys_addr + regs.reg_size - 1; - auxio_power_register = (unsigned char *) sbus_ioremap(&r, 0, + auxio_power_register = (unsigned char *) of_ioremap(&r, 0, regs.reg_size, "auxpower"); /* Display a quick message on the console. */ diff --git a/arch/sparc/kernel/sun4c_irq.c b/arch/sparc/kernel/sun4c_irq.c index a5a32a0b10d1..a74582455cce 100644 --- a/arch/sparc/kernel/sun4c_irq.c +++ b/arch/sparc/kernel/sun4c_irq.c @@ -18,6 +18,8 @@ #include #include #include +#include +#include #include "irq.h" #include @@ -34,7 +36,6 @@ #include #include #include -#include #if 0 static struct resource sun4c_timer_eb = { "sun4c_timer" }; @@ -224,7 +225,7 @@ void __init sun4c_init_IRQ(void) memset(&phyres, 0, sizeof(struct resource)); phyres.flags = int_regs[0].which_io; phyres.start = int_regs[0].phys_addr; - interrupt_enable = (char *) sbus_ioremap(&phyres, 0, + interrupt_enable = (char *) of_ioremap(&phyres, 0, int_regs[0].reg_size, "sun4c_intr"); } } diff --git a/arch/sparc/kernel/sun4d_irq.c b/arch/sparc/kernel/sun4d_irq.c index acfb447c00d0..c4a2bfb750a4 100644 --- a/arch/sparc/kernel/sun4d_irq.c +++ b/arch/sparc/kernel/sun4d_irq.c @@ -19,6 +19,8 @@ #include #include #include +#include +#include #include #include @@ -34,7 +36,6 @@ #include #include #include -#include #include #include #include @@ -475,7 +476,7 @@ static void __init sun4d_init_timers(irq_handler_t counter_fn) r.start = CSR_BASE(0)+BW_TIMER_LIMIT; #endif r.flags = 0xf; - sun4d_timers = (struct sun4d_timer_regs *) sbus_ioremap(&r, 0, + sun4d_timers = (struct sun4d_timer_regs *) of_ioremap(&r, 0, PAGE_SIZE, "user timer"); sun4d_timers->l10_timer_limit = (((1000000/HZ) + 1) << 10); diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c index d66334b853ef..3481feca3354 100644 --- a/arch/sparc/kernel/sun4m_irq.c +++ b/arch/sparc/kernel/sun4m_irq.c @@ -20,6 +20,8 @@ #include #include #include +#include +#include #include #include @@ -35,7 +37,6 @@ #include #include #include -#include #include #include "irq.h" @@ -327,13 +328,13 @@ static void __init sun4m_init_timers(irq_handler_t counter_fn) /* Map the per-cpu Counter registers. */ r.flags = cnt_regs[0].which_io; r.start = cnt_regs[0].phys_addr; - sun4m_timers = (struct sun4m_timer_regs *) sbus_ioremap(&r, 0, + sun4m_timers = (struct sun4m_timer_regs *) of_ioremap(&r, 0, PAGE_SIZE*SUN4M_NCPUS, "sun4m_cpu_cnt"); /* Map the system Counter register. */ /* XXX Here we expect consequent calls to yeld adjusent maps. */ r.flags = cnt_regs[4].which_io; r.start = cnt_regs[4].phys_addr; - sbus_ioremap(&r, 0, cnt_regs[4].reg_size, "sun4m_sys_cnt"); + of_ioremap(&r, 0, cnt_regs[4].reg_size, "sun4m_sys_cnt"); sun4m_timers->l10_timer_limit = (((1000000/HZ) + 1) << 10); master_l10_counter = &sun4m_timers->l10_cur_count; @@ -411,13 +412,13 @@ void __init sun4m_init_IRQ(void) /* Map the interrupt registers for all possible cpus. */ r.flags = int_regs[0].which_io; r.start = int_regs[0].phys_addr; - sun4m_interrupts = (struct sun4m_intregs *) sbus_ioremap(&r, 0, + sun4m_interrupts = (struct sun4m_intregs *) of_ioremap(&r, 0, PAGE_SIZE*SUN4M_NCPUS, "interrupts_percpu"); /* Map the system interrupt control registers. */ r.flags = int_regs[4].which_io; r.start = int_regs[4].phys_addr; - sbus_ioremap(&r, 0, int_regs[4].reg_size, "interrupts_system"); + of_ioremap(&r, 0, int_regs[4].reg_size, "interrupts_system"); sun4m_interrupts->set = ~SUN4M_INT_MASKALL; for (i = 0; !cpu_find_by_instance(i, NULL, &mid); i++) diff --git a/arch/sparc/kernel/time.c b/arch/sparc/kernel/time.c index 0762f5db1924..a713bb43db84 100644 --- a/arch/sparc/kernel/time.c +++ b/arch/sparc/kernel/time.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include @@ -260,7 +261,7 @@ static inline void sun4_clock_probe(void) if( idprom->id_machtype == (SM_SUN4 | SM_4_330) ) { sp_clock_typ = MSTK48T02; r.start = sun4_clock_physaddr; - mstk48t02_regs = sbus_ioremap(&r, 0, + mstk48t02_regs = of_ioremap(&r, 0, sizeof(struct mostek48t02), NULL); mstk48t08_regs = NULL; /* To catch weirdness */ intersil_clock = NULL; /* just in case */ @@ -274,7 +275,7 @@ static inline void sun4_clock_probe(void) sp_clock_typ = INTERSIL; r.start = sun4_clock_physaddr; intersil_clock = (struct intersil *) - sbus_ioremap(&r, 0, sizeof(*intersil_clock), "intersil"); + of_ioremap(&r, 0, sizeof(*intersil_clock), "intersil"); mstk48t02_regs = 0; /* just be sure */ mstk48t08_regs = NULL; /* ditto */ /* initialise the clock */ -- cgit v1.2.3 From 9b2e43ae4e9609f80034dfe8de895045cac52d77 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Thu, 11 Sep 2008 23:08:30 -0700 Subject: sparc32: Use PROM device probing for sun4m timer registers. Signed-off-by: David S. Miller --- arch/sparc/include/asm/timer_32.h | 43 -------------- arch/sparc/kernel/sun4m_irq.c | 121 ++++++++++++++++++-------------------- 2 files changed, 57 insertions(+), 107 deletions(-) (limited to 'arch/sparc/kernel/sun4m_irq.c') diff --git a/arch/sparc/include/asm/timer_32.h b/arch/sparc/include/asm/timer_32.h index adab3def007c..8906e987ef82 100644 --- a/arch/sparc/include/asm/timer_32.h +++ b/arch/sparc/include/asm/timer_32.h @@ -35,49 +35,6 @@ struct sun4c_timer_info { #define SUN_TIMER_PHYSADDR 0xf3000000 -/* A sun4m has two blocks of registers which are probably of the same - * structure. LSI Logic's L64851 is told to _decrement_ from the limit - * value. Aurora behaves similarly but its limit value is compacted in - * other fashion (it's wider). Documented fields are defined here. - */ - -/* As with the interrupt register, we have two classes of timer registers - * which are per-cpu and master. Per-cpu timers only hit that cpu and are - * only level 14 ticks, master timer hits all cpus and is level 10. - */ - -#define SUN4M_PRM_CNT_L 0x80000000 -#define SUN4M_PRM_CNT_LVALUE 0x7FFFFC00 - -struct sun4m_timer_percpu_info { - __volatile__ unsigned int l14_timer_limit; /* Initial value is 0x009c4000 */ - __volatile__ unsigned int l14_cur_count; - - /* This register appears to be write only and/or inaccessible - * on Uni-Processor sun4m machines. - */ - __volatile__ unsigned int l14_limit_noclear; /* Data access error is here */ - - __volatile__ unsigned int cntrl; /* =1 after POST on Aurora */ - __volatile__ unsigned char space[PAGE_SIZE - 16]; -}; - -struct sun4m_timer_regs { - struct sun4m_timer_percpu_info cpu_timers[SUN4M_NCPUS]; - volatile unsigned int l10_timer_limit; - volatile unsigned int l10_cur_count; - - /* Again, this appears to be write only and/or inaccessible - * on uni-processor sun4m machines. - */ - volatile unsigned int l10_limit_noclear; - - /* This register too, it must be magic. */ - volatile unsigned int foobar; - - volatile unsigned int cfg; /* equals zero at boot time... */ -}; - #define SUN4D_PRM_CNT_L 0x80000000 #define SUN4D_PRM_CNT_LVALUE 0x7FFFFC00 diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c index 3481feca3354..5b17146f0c1f 100644 --- a/arch/sparc/kernel/sun4m_irq.c +++ b/arch/sparc/kernel/sun4m_irq.c @@ -267,95 +267,88 @@ static void sun4m_set_udt(int cpu) } #endif +struct sun4m_timer_percpu { + u32 l14_limit; + u32 l14_count; + u32 l14_limit_noclear; + u32 user_timer_start_stop; +}; + +static struct sun4m_timer_percpu __iomem *timers_percpu[SUN4M_NCPUS]; + +struct sun4m_timer_global { + u32 l10_limit; + u32 l10_count; + u32 l10_limit_noclear; + u32 reserved; + u32 timer_config; +}; + +static struct sun4m_timer_global __iomem *timers_global; + #define OBIO_INTR 0x20 #define TIMER_IRQ (OBIO_INTR | 10) -#define PROFILE_IRQ (OBIO_INTR | 14) -static struct sun4m_timer_regs *sun4m_timers; unsigned int lvl14_resolution = (((1000000/HZ) + 1) << 10); static void sun4m_clear_clock_irq(void) { - volatile unsigned int clear_intr; - clear_intr = sun4m_timers->l10_timer_limit; + sbus_readl(&timers_global->l10_limit); } static void sun4m_clear_profile_irq(int cpu) { - volatile unsigned int clear; - - clear = sun4m_timers->cpu_timers[cpu].l14_timer_limit; + sbus_readl(&timers_percpu[cpu]->l14_limit); } static void sun4m_load_profile_irq(int cpu, unsigned int limit) { - sun4m_timers->cpu_timers[cpu].l14_timer_limit = limit; + sbus_writel(limit, &timers_percpu[cpu]->l14_limit); } static void __init sun4m_init_timers(irq_handler_t counter_fn) { - int reg_count, irq, cpu; - struct linux_prom_registers cnt_regs[PROMREG_MAX]; - int obio_node, cnt_node; - struct resource r; + struct device_node *dp = of_find_node_by_name(NULL, "counter"); + int i, err, len, num_cpu_timers; + const u32 *addr; - cnt_node = 0; - if((obio_node = - prom_searchsiblings (prom_getchild(prom_root_node), "obio")) == 0 || - (obio_node = prom_getchild (obio_node)) == 0 || - (cnt_node = prom_searchsiblings (obio_node, "counter")) == 0) { - prom_printf("Cannot find /obio/counter node\n"); - prom_halt(); + if (!dp) { + printk(KERN_ERR "sun4m_init_timers: No 'counter' node.\n"); + return; } - reg_count = prom_getproperty(cnt_node, "reg", - (void *) cnt_regs, sizeof(cnt_regs)); - reg_count = (reg_count/sizeof(struct linux_prom_registers)); - - /* Apply the obio ranges to the timer registers. */ - prom_apply_obio_ranges(cnt_regs, reg_count); - - cnt_regs[4].phys_addr = cnt_regs[reg_count-1].phys_addr; - cnt_regs[4].reg_size = cnt_regs[reg_count-1].reg_size; - cnt_regs[4].which_io = cnt_regs[reg_count-1].which_io; - for(obio_node = 1; obio_node < 4; obio_node++) { - cnt_regs[obio_node].phys_addr = - cnt_regs[obio_node-1].phys_addr + PAGE_SIZE; - cnt_regs[obio_node].reg_size = cnt_regs[obio_node-1].reg_size; - cnt_regs[obio_node].which_io = cnt_regs[obio_node-1].which_io; + + addr = of_get_property(dp, "address", &len); + if (!addr) { + printk(KERN_ERR "sun4m_init_timers: No 'address' prop.\n"); + return; } - memset((char*)&r, 0, sizeof(struct resource)); - /* Map the per-cpu Counter registers. */ - r.flags = cnt_regs[0].which_io; - r.start = cnt_regs[0].phys_addr; - sun4m_timers = (struct sun4m_timer_regs *) of_ioremap(&r, 0, - PAGE_SIZE*SUN4M_NCPUS, "sun4m_cpu_cnt"); - /* Map the system Counter register. */ - /* XXX Here we expect consequent calls to yeld adjusent maps. */ - r.flags = cnt_regs[4].which_io; - r.start = cnt_regs[4].phys_addr; - of_ioremap(&r, 0, cnt_regs[4].reg_size, "sun4m_sys_cnt"); - - sun4m_timers->l10_timer_limit = (((1000000/HZ) + 1) << 10); - master_l10_counter = &sun4m_timers->l10_cur_count; - master_l10_limit = &sun4m_timers->l10_timer_limit; - - irq = request_irq(TIMER_IRQ, - counter_fn, - (IRQF_DISABLED | SA_STATIC_ALLOC), - "timer", NULL); - if (irq) { - prom_printf("time_init: unable to attach IRQ%d\n",TIMER_IRQ); - prom_halt(); + num_cpu_timers = (len / sizeof(u32)) - 1; + for (i = 0; i < num_cpu_timers; i++) { + timers_percpu[i] = (void __iomem *) + (unsigned long) addr[i]; } - - if (!cpu_find_by_instance(1, NULL, NULL)) { - for(cpu = 0; cpu < 4; cpu++) - sun4m_timers->cpu_timers[cpu].l14_timer_limit = 0; - sun4m_interrupts->set = SUN4M_INT_E14; - } else { - sun4m_timers->cpu_timers[0].l14_timer_limit = 0; + timers_global = (void __iomem *) + (unsigned long) addr[num_cpu_timers]; + + sbus_writel((((1000000/HZ) + 1) << 10), &timers_global->l10_limit); + + master_l10_counter = &timers_global->l10_count; + master_l10_limit = &timers_global->l10_limit; + + err = request_irq(TIMER_IRQ, counter_fn, + (IRQF_DISABLED | SA_STATIC_ALLOC), "timer", NULL); + if (err) { + printk(KERN_ERR "sun4m_init_timers: Register IRQ error %d.\n", + err); + return; } + + for (i = 0; i < num_cpu_timers; i++) + sbus_writel(0, &timers_percpu[i]->l14_limit); + if (num_cpu_timers == 4) + sbus_writel(SUN4M_INT_E14, &sun4m_interrupts->set); + #ifdef CONFIG_SMP { unsigned long flags; -- cgit v1.2.3 From 69c010b24560be5ca7667e94a352183e60ed205e Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Fri, 19 Sep 2008 21:17:43 -0700 Subject: sparc32: Use PROM device probing for sun4m irq registers. Signed-off-by: David S. Miller --- arch/sparc/kernel/entry.S | 40 +++++------ arch/sparc/kernel/sun4m_irq.c | 163 ++++++++++++++---------------------------- 2 files changed, 74 insertions(+), 129 deletions(-) (limited to 'arch/sparc/kernel/sun4m_irq.c') diff --git a/arch/sparc/kernel/entry.S b/arch/sparc/kernel/entry.S index 68689facaaae..faf9ccd9ef5d 100644 --- a/arch/sparc/kernel/entry.S +++ b/arch/sparc/kernel/entry.S @@ -272,17 +272,18 @@ smp4m_ticker: */ maybe_smp4m_msg: GET_PROCESSOR4M_ID(o3) - set sun4m_interrupts, %l5 - ld [%l5], %o5 + sethi %hi(sun4m_irq_percpu), %l5 + sll %o3, 2, %o3 + or %l5, %lo(sun4m_irq_percpu), %o5 sethi %hi(0x40000000), %o2 - sll %o3, 12, %o3 ld [%o5 + %o3], %o1 - andcc %o1, %o2, %g0 + ld [%o1 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending + andcc %o3, %o2, %g0 be,a smp4m_ticker cmp %l7, 14 - st %o2, [%o5 + 0x4] + st %o2, [%o1 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x40000000 WRITE_PAUSE - ld [%o5], %g0 + ld [%o1 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending WRITE_PAUSE or %l0, PSR_PIL, %l4 wr %l4, 0x0, %psr @@ -300,16 +301,16 @@ linux_trap_ipi15_sun4m: SAVE_ALL sethi %hi(0x80000000), %o2 GET_PROCESSOR4M_ID(o0) - set sun4m_interrupts, %l5 - ld [%l5], %o5 - sll %o0, 12, %o0 - add %o5, %o0, %o5 - ld [%o5], %o3 + sethi %hi(sun4m_irq_percpu), %l5 + or %l5, %lo(sun4m_irq_percpu), %o5 + sll %o0, 2, %o0 + ld [%o5 + %o0], %o5 + ld [%o5 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending andcc %o3, %o2, %g0 be 1f ! Must be an NMI async memory error - st %o2, [%o5 + 4] + st %o2, [%o5 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x80000000 WRITE_PAUSE - ld [%o5], %g0 + ld [%o5 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending WRITE_PAUSE or %l0, PSR_PIL, %l4 wr %l4, 0x0, %psr @@ -323,12 +324,11 @@ linux_trap_ipi15_sun4m: 1: /* NMI async memory error handling. */ sethi %hi(0x80000000), %l4 - sethi %hi(0x4000), %o3 - sub %o5, %o0, %o5 - add %o5, %o3, %l5 - st %l4, [%l5 + 0xc] + sethi %hi(sun4m_irq_global), %o5 + ld [%o5 + %lo(sun4m_irq_global)], %l5 + st %l4, [%l5 + 0x0c] ! sun4m_irq_global->mask_set=0x80000000 WRITE_PAUSE - ld [%l5], %g0 + ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending WRITE_PAUSE or %l0, PSR_PIL, %l4 wr %l4, 0x0, %psr @@ -337,9 +337,9 @@ linux_trap_ipi15_sun4m: WRITE_PAUSE call sun4m_nmi nop - st %l4, [%l5 + 0x8] + st %l4, [%l5 + 0x08] ! sun4m_irq_global->mask_clear=0x80000000 WRITE_PAUSE - ld [%l5], %g0 + ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending WRITE_PAUSE RESTORE_ALL diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c index 5b17146f0c1f..39d40e96d396 100644 --- a/arch/sparc/kernel/sun4m_irq.c +++ b/arch/sparc/kernel/sun4m_irq.c @@ -41,53 +41,25 @@ #include "irq.h" -/* On the sun4m, just like the timers, we have both per-cpu and master - * interrupt registers. - */ - -/* These registers are used for sending/receiving irqs from/to - * different cpu's. - */ -struct sun4m_intreg_percpu { - unsigned int tbt; /* Interrupts still pending for this cpu. */ - - /* These next two registers are WRITE-ONLY and are only - * "on bit" sensitive, "off bits" written have NO affect. - */ - unsigned int clear; /* Clear this cpus irqs here. */ - unsigned int set; /* Set this cpus irqs here. */ - unsigned char space[PAGE_SIZE - 12]; +struct sun4m_irq_percpu { + u32 pending; + u32 clear; + u32 set; }; -/* - * djhr - * Actually the clear and set fields in this struct are misleading.. - * according to the SLAVIO manual (and the same applies for the SEC) - * the clear field clears bits in the mask which will ENABLE that IRQ - * the set field sets bits in the mask to DISABLE the IRQ. - * - * Also the undirected_xx address in the SLAVIO is defined as - * RESERVED and write only.. - * - * DAVEM_NOTE: The SLAVIO only specifies behavior on uniprocessor - * sun4m machines, for MP the layout makes more sense. - */ -struct sun4m_intregs { - struct sun4m_intreg_percpu cpu_intregs[SUN4M_NCPUS]; - unsigned int tbt; /* IRQ's that are still pending. */ - unsigned int irqs; /* Master IRQ bits. */ - - /* Again, like the above, two these registers are WRITE-ONLY. */ - unsigned int clear; /* Clear master IRQ's by setting bits here. */ - unsigned int set; /* Set master IRQ's by setting bits here. */ - - /* This register is both READ and WRITE. */ - unsigned int undirected_target; /* Which cpu gets undirected irqs. */ +struct sun4m_irq_global { + u32 pending; + u32 mask; + u32 mask_clear; + u32 mask_set; + u32 interrupt_target; }; -static unsigned long dummy; +/* Code in entry.S needs to get at these register mappings. */ +struct sun4m_irq_percpu __iomem *sun4m_irq_percpu[SUN4M_NCPUS]; +struct sun4m_irq_global __iomem *sun4m_irq_global; -struct sun4m_intregs *sun4m_interrupts; +static unsigned long dummy; unsigned long *irq_rcvreg = &dummy; /* Dave Redman (djhr@tadpole.co.uk) @@ -182,9 +154,9 @@ static void sun4m_disable_irq(unsigned int irq_nr) mask = sun4m_get_irqmask(irq_nr); local_irq_save(flags); if (irq_nr > 15) - sun4m_interrupts->set = mask; + sbus_writel(mask, &sun4m_irq_global->mask_set); else - sun4m_interrupts->cpu_intregs[cpu].set = mask; + sbus_writel(mask, &sun4m_irq_percpu[cpu]->set); local_irq_restore(flags); } @@ -201,13 +173,13 @@ static void sun4m_enable_irq(unsigned int irq_nr) mask = sun4m_get_irqmask(irq_nr); local_irq_save(flags); if (irq_nr > 15) - sun4m_interrupts->clear = mask; + sbus_writel(mask, &sun4m_irq_global->mask_clear); else - sun4m_interrupts->cpu_intregs[cpu].clear = mask; + sbus_writel(mask, &sun4m_irq_percpu[cpu]->clear); local_irq_restore(flags); } else { local_irq_save(flags); - sun4m_interrupts->clear = SUN4M_INT_FLOPPY; + sbus_writel(SUN4M_INT_FLOPPY, &sun4m_irq_global->mask_clear); local_irq_restore(flags); } } @@ -236,34 +208,30 @@ static unsigned long cpu_pil_to_imask[16] = { */ static void sun4m_disable_pil_irq(unsigned int pil) { - sun4m_interrupts->set = cpu_pil_to_imask[pil]; + sbus_writel(cpu_pil_to_imask[pil], &sun4m_irq_global->mask_set); } static void sun4m_enable_pil_irq(unsigned int pil) { - sun4m_interrupts->clear = cpu_pil_to_imask[pil]; + sbus_writel(cpu_pil_to_imask[pil], &sun4m_irq_global->mask_clear); } #ifdef CONFIG_SMP static void sun4m_send_ipi(int cpu, int level) { - unsigned long mask; - - mask = sun4m_get_irqmask(level); - sun4m_interrupts->cpu_intregs[cpu].set = mask; + unsigned long mask = sun4m_get_irqmask(level); + sbus_writel(mask, &sun4m_irq_percpu[cpu]->set); } static void sun4m_clear_ipi(int cpu, int level) { - unsigned long mask; - - mask = sun4m_get_irqmask(level); - sun4m_interrupts->cpu_intregs[cpu].clear = mask; + unsigned long mask = sun4m_get_irqmask(level); + sbus_writel(mask, &sun4m_irq_percpu[cpu]->clear); } static void sun4m_set_udt(int cpu) { - sun4m_interrupts->undirected_target = cpu; + sbus_writel(cpu, &sun4m_irq_global->interrupt_target); } #endif @@ -347,7 +315,7 @@ static void __init sun4m_init_timers(irq_handler_t counter_fn) for (i = 0; i < num_cpu_timers; i++) sbus_writel(0, &timers_percpu[i]->l14_limit); if (num_cpu_timers == 4) - sbus_writel(SUN4M_INT_E14, &sun4m_interrupts->set); + sbus_writel(SUN4M_INT_E14, &sun4m_irq_global->mask_set); #ifdef CONFIG_SMP { @@ -372,62 +340,38 @@ static void __init sun4m_init_timers(irq_handler_t counter_fn) void __init sun4m_init_IRQ(void) { - int ie_node,i; - struct linux_prom_registers int_regs[PROMREG_MAX]; - int num_regs; - struct resource r; - int mid; - - local_irq_disable(); - if((ie_node = prom_searchsiblings(prom_getchild(prom_root_node), "obio")) == 0 || - (ie_node = prom_getchild (ie_node)) == 0 || - (ie_node = prom_searchsiblings (ie_node, "interrupt")) == 0) { - prom_printf("Cannot find /obio/interrupt node\n"); - prom_halt(); + struct device_node *dp = of_find_node_by_name(NULL, "interrupt"); + int len, i, mid, num_cpu_iregs; + const u32 *addr; + + if (!dp) { + printk(KERN_ERR "sun4m_init_IRQ: No 'interrupt' node.\n"); + return; } - num_regs = prom_getproperty(ie_node, "reg", (char *) int_regs, - sizeof(int_regs)); - num_regs = (num_regs/sizeof(struct linux_prom_registers)); - - /* Apply the obio ranges to these registers. */ - prom_apply_obio_ranges(int_regs, num_regs); - - int_regs[4].phys_addr = int_regs[num_regs-1].phys_addr; - int_regs[4].reg_size = int_regs[num_regs-1].reg_size; - int_regs[4].which_io = int_regs[num_regs-1].which_io; - for(ie_node = 1; ie_node < 4; ie_node++) { - int_regs[ie_node].phys_addr = int_regs[ie_node-1].phys_addr + PAGE_SIZE; - int_regs[ie_node].reg_size = int_regs[ie_node-1].reg_size; - int_regs[ie_node].which_io = int_regs[ie_node-1].which_io; + + addr = of_get_property(dp, "address", &len); + if (!addr) { + printk(KERN_ERR "sun4m_init_IRQ: No 'address' prop.\n"); + return; } - memset((char *)&r, 0, sizeof(struct resource)); - /* Map the interrupt registers for all possible cpus. */ - r.flags = int_regs[0].which_io; - r.start = int_regs[0].phys_addr; - sun4m_interrupts = (struct sun4m_intregs *) of_ioremap(&r, 0, - PAGE_SIZE*SUN4M_NCPUS, "interrupts_percpu"); + num_cpu_iregs = (len / sizeof(u32)) - 1; + for (i = 0; i < num_cpu_iregs; i++) { + sun4m_irq_percpu[i] = (void __iomem *) + (unsigned long) addr[i]; + } + sun4m_irq_global = (void __iomem *) + (unsigned long) addr[num_cpu_iregs]; - /* Map the system interrupt control registers. */ - r.flags = int_regs[4].which_io; - r.start = int_regs[4].phys_addr; - of_ioremap(&r, 0, int_regs[4].reg_size, "interrupts_system"); + local_irq_disable(); - sun4m_interrupts->set = ~SUN4M_INT_MASKALL; + sbus_writel(~SUN4M_INT_MASKALL, &sun4m_irq_global->mask_set); for (i = 0; !cpu_find_by_instance(i, NULL, &mid); i++) - sun4m_interrupts->cpu_intregs[mid].clear = ~0x17fff; - - if (!cpu_find_by_instance(1, NULL, NULL)) { - /* system wide interrupts go to cpu 0, this should always - * be safe because it is guaranteed to be fitted or OBP doesn't - * come up - * - * Not sure, but writing here on SLAVIO systems may puke - * so I don't do it unless there is more than 1 cpu. - */ - irq_rcvreg = (unsigned long *) - &sun4m_interrupts->undirected_target; - sun4m_interrupts->undirected_target = 0; + sbus_writel(~0x17fff, &sun4m_irq_percpu[mid]->clear); + + if (num_cpu_iregs == 4) { + irq_rcvreg = (unsigned long *) &sun4m_irq_global->interrupt_target; + sbus_writel(0, &sun4m_irq_global->interrupt_target); } BTFIXUPSET_CALL(enable_irq, sun4m_enable_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(disable_irq, sun4m_disable_irq, BTFIXUPCALL_NORM); @@ -442,5 +386,6 @@ void __init sun4m_init_IRQ(void) BTFIXUPSET_CALL(clear_cpu_int, sun4m_clear_ipi, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(set_irq_udt, sun4m_set_udt, BTFIXUPCALL_NORM); #endif + /* Cannot enable interrupts until OBP ticker is disabled. */ } -- cgit v1.2.3 From 1de937a536ea1a132d22dc198a9e07d208d40a29 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Sat, 13 Sep 2008 22:07:56 -0700 Subject: sparc32: Call sun4m_clear_profile_irq() directly from sun4m_smp.c This is the only use of the clear_profile_irq() btfixup entry, which just eats up lots of dead space on other platform types. A subsequent commit will delete the other implementations and the btfixup entry as well. Signed-off-by: David S. Miller --- arch/sparc/kernel/sun4m_irq.c | 3 ++- arch/sparc/kernel/sun4m_smp.c | 4 +++- 2 files changed, 5 insertions(+), 2 deletions(-) (limited to 'arch/sparc/kernel/sun4m_irq.c') diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c index 39d40e96d396..8e1ecc6def26 100644 --- a/arch/sparc/kernel/sun4m_irq.c +++ b/arch/sparc/kernel/sun4m_irq.c @@ -264,7 +264,8 @@ static void sun4m_clear_clock_irq(void) sbus_readl(&timers_global->l10_limit); } -static void sun4m_clear_profile_irq(int cpu) +/* Exported for sun4m_smp.c */ +void sun4m_clear_profile_irq(int cpu) { sbus_readl(&timers_percpu[cpu]->l14_limit); } diff --git a/arch/sparc/kernel/sun4m_smp.c b/arch/sparc/kernel/sun4m_smp.c index a14a76ac7f36..e3c0be17729f 100644 --- a/arch/sparc/kernel/sun4m_smp.c +++ b/arch/sparc/kernel/sun4m_smp.c @@ -313,6 +313,8 @@ void smp4m_cross_call_irq(void) ccall_info.processors_out[i] = 1; } +extern void sun4m_clear_profile_irq(int cpu); + void smp4m_percpu_timer_interrupt(struct pt_regs *regs) { struct pt_regs *old_regs; @@ -320,7 +322,7 @@ void smp4m_percpu_timer_interrupt(struct pt_regs *regs) old_regs = set_irq_regs(regs); - clear_profile_irq(cpu); + sun4m_clear_profile_irq(cpu); profile_tick(CPU_PROFILING); -- cgit v1.2.3 From 76954261ba907950cb5216e5c3075b5ba03c1a6b Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Sat, 13 Sep 2008 22:07:06 -0700 Subject: sparc32: Kill clear_profile_irq btfixup entry. Unused. Signed-off-by: David S. Miller --- arch/sparc/kernel/irq.h | 6 ------ arch/sparc/kernel/pcic.c | 6 ------ arch/sparc/kernel/sun4c_irq.c | 6 ------ arch/sparc/kernel/sun4d_irq.c | 6 ------ arch/sparc/kernel/sun4m_irq.c | 1 - 5 files changed, 25 deletions(-) (limited to 'arch/sparc/kernel/sun4m_irq.c') diff --git a/arch/sparc/kernel/irq.h b/arch/sparc/kernel/irq.h index 32ef3ebd0a88..db7513881530 100644 --- a/arch/sparc/kernel/irq.h +++ b/arch/sparc/kernel/irq.h @@ -13,7 +13,6 @@ BTFIXUPDEF_CALL(void, enable_irq, unsigned int) BTFIXUPDEF_CALL(void, disable_pil_irq, unsigned int) BTFIXUPDEF_CALL(void, enable_pil_irq, unsigned int) BTFIXUPDEF_CALL(void, clear_clock_irq, void) -BTFIXUPDEF_CALL(void, clear_profile_irq, int) BTFIXUPDEF_CALL(void, load_profile_irq, int, unsigned int) static inline void __disable_irq(unsigned int irq) @@ -41,11 +40,6 @@ static inline void clear_clock_irq(void) BTFIXUP_CALL(clear_clock_irq)(); } -static inline void clear_profile_irq(int irq) -{ - BTFIXUP_CALL(clear_profile_irq)(irq); -} - static inline void load_profile_irq(int cpu, int limit) { BTFIXUP_CALL(load_profile_irq)(cpu, limit); diff --git a/arch/sparc/kernel/pcic.c b/arch/sparc/kernel/pcic.c index e5950b03df13..462584e55fba 100644 --- a/arch/sparc/kernel/pcic.c +++ b/arch/sparc/kernel/pcic.c @@ -897,11 +897,6 @@ static void pcic_enable_irq(unsigned int irq_nr) local_irq_restore(flags); } -static void pcic_clear_profile_irq(int cpu) -{ - printk("PCIC: unimplemented code: FILE=%s LINE=%d", __FILE__, __LINE__); -} - static void pcic_load_profile_irq(int cpu, unsigned int limit) { printk("PCIC: unimplemented code: FILE=%s LINE=%d", __FILE__, __LINE__); @@ -927,7 +922,6 @@ void __init sun4m_pci_init_IRQ(void) BTFIXUPSET_CALL(enable_pil_irq, pcic_enable_pil_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(disable_pil_irq, pcic_disable_pil_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(clear_clock_irq, pcic_clear_clock_irq, BTFIXUPCALL_NORM); - BTFIXUPSET_CALL(clear_profile_irq, pcic_clear_profile_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(load_profile_irq, pcic_load_profile_irq, BTFIXUPCALL_NORM); } diff --git a/arch/sparc/kernel/sun4c_irq.c b/arch/sparc/kernel/sun4c_irq.c index 5602972f3570..6f28a13829ca 100644 --- a/arch/sparc/kernel/sun4c_irq.c +++ b/arch/sparc/kernel/sun4c_irq.c @@ -131,11 +131,6 @@ static void sun4c_clear_clock_irq(void) clear_intr = sun4c_timers->timer_limit10; } -static void sun4c_clear_profile_irq(int cpu) -{ - /* Errm.. not sure how to do this.. */ -} - static void sun4c_load_profile_irq(int cpu, unsigned int limit) { /* Errm.. not sure how to do this.. */ @@ -204,7 +199,6 @@ void __init sun4c_init_IRQ(void) BTFIXUPSET_CALL(enable_pil_irq, sun4c_enable_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(disable_pil_irq, sun4c_disable_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(clear_clock_irq, sun4c_clear_clock_irq, BTFIXUPCALL_NORM); - BTFIXUPSET_CALL(clear_profile_irq, sun4c_clear_profile_irq, BTFIXUPCALL_NOP); BTFIXUPSET_CALL(load_profile_irq, sun4c_load_profile_irq, BTFIXUPCALL_NOP); sparc_init_timers = sun4c_init_timers; #ifdef CONFIG_SMP diff --git a/arch/sparc/kernel/sun4d_irq.c b/arch/sparc/kernel/sun4d_irq.c index 6e3bf6eee543..d376d380ac0a 100644 --- a/arch/sparc/kernel/sun4d_irq.c +++ b/arch/sparc/kernel/sun4d_irq.c @@ -448,11 +448,6 @@ static void sun4d_clear_clock_irq(void) sbus_readl(&sun4d_timers->l10_timer_limit); } -static void sun4d_clear_profile_irq(int cpu) -{ - bw_get_prof_limit(cpu); -} - static void sun4d_load_profile_irq(int cpu, unsigned int limit) { bw_set_prof_limit(cpu, limit); @@ -585,7 +580,6 @@ void __init sun4d_init_IRQ(void) BTFIXUPSET_CALL(enable_irq, sun4d_enable_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(disable_irq, sun4d_disable_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(clear_clock_irq, sun4d_clear_clock_irq, BTFIXUPCALL_NORM); - BTFIXUPSET_CALL(clear_profile_irq, sun4d_clear_profile_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(load_profile_irq, sun4d_load_profile_irq, BTFIXUPCALL_NORM); sparc_init_timers = sun4d_init_timers; #ifdef CONFIG_SMP diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c index 8e1ecc6def26..ab309eca09c3 100644 --- a/arch/sparc/kernel/sun4m_irq.c +++ b/arch/sparc/kernel/sun4m_irq.c @@ -379,7 +379,6 @@ void __init sun4m_init_IRQ(void) BTFIXUPSET_CALL(enable_pil_irq, sun4m_enable_pil_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(disable_pil_irq, sun4m_disable_pil_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(clear_clock_irq, sun4m_clear_clock_irq, BTFIXUPCALL_NORM); - BTFIXUPSET_CALL(clear_profile_irq, sun4m_clear_profile_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(load_profile_irq, sun4m_load_profile_irq, BTFIXUPCALL_NORM); sparc_init_timers = sun4m_init_timers; #ifdef CONFIG_SMP -- cgit v1.2.3 From c7e606a8f863b2119176674610618dad3d80a16d Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Sat, 13 Sep 2008 22:48:04 -0700 Subject: sparc32: Delete master_l10_limit. It is only set, never used. Signed-off-by: David S. Miller --- arch/sparc/include/asm/timer_32.h | 1 - arch/sparc/kernel/sun4c_irq.c | 1 - arch/sparc/kernel/sun4d_irq.c | 1 - arch/sparc/kernel/sun4m_irq.c | 1 - arch/sparc/kernel/time.c | 1 - 5 files changed, 5 deletions(-) (limited to 'arch/sparc/kernel/sun4m_irq.c') diff --git a/arch/sparc/include/asm/timer_32.h b/arch/sparc/include/asm/timer_32.h index 351f257eec01..2ec030ef3810 100644 --- a/arch/sparc/include/asm/timer_32.h +++ b/arch/sparc/include/asm/timer_32.h @@ -12,7 +12,6 @@ #include extern __volatile__ unsigned int *master_l10_counter; -extern __volatile__ unsigned int *master_l10_limit; /* FIXME: Make do_[gs]ettimeofday btfixup calls */ BTFIXUPDEF_CALL(int, bus_do_settimeofday, struct timespec *tv) diff --git a/arch/sparc/kernel/sun4c_irq.c b/arch/sparc/kernel/sun4c_irq.c index 92096ba31d58..5dc8a5769489 100644 --- a/arch/sparc/kernel/sun4c_irq.c +++ b/arch/sparc/kernel/sun4c_irq.c @@ -172,7 +172,6 @@ static void __init sun4c_init_timers(irq_handler_t counter_fn) sbus_writel((((1000000/HZ) + 1) << 10), &sun4c_timers->l10_limit); master_l10_counter = &sun4c_timers->l10_count; - master_l10_limit = &sun4c_timers->l10_limit; err = request_irq(irq[0].pri, counter_fn, (IRQF_DISABLED | SA_STATIC_ALLOC), diff --git a/arch/sparc/kernel/sun4d_irq.c b/arch/sparc/kernel/sun4d_irq.c index d376d380ac0a..d3cb76ce418b 100644 --- a/arch/sparc/kernel/sun4d_irq.c +++ b/arch/sparc/kernel/sun4d_irq.c @@ -526,7 +526,6 @@ static void __init sun4d_init_timers(irq_handler_t counter_fn) sbus_writel((((1000000/HZ) + 1) << 10), &sun4d_timers->l10_timer_limit); master_l10_counter = &sun4d_timers->l10_cur_count; - master_l10_limit = &sun4d_timers->l10_timer_limit; err = request_irq(TIMER_IRQ, counter_fn, (IRQF_DISABLED | SA_STATIC_ALLOC), diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c index ab309eca09c3..c09ec39d68ae 100644 --- a/arch/sparc/kernel/sun4m_irq.c +++ b/arch/sparc/kernel/sun4m_irq.c @@ -303,7 +303,6 @@ static void __init sun4m_init_timers(irq_handler_t counter_fn) sbus_writel((((1000000/HZ) + 1) << 10), &timers_global->l10_limit); master_l10_counter = &timers_global->l10_count; - master_l10_limit = &timers_global->l10_limit; err = request_irq(TIMER_IRQ, counter_fn, (IRQF_DISABLED | SA_STATIC_ALLOC), "timer", NULL); diff --git a/arch/sparc/kernel/time.c b/arch/sparc/kernel/time.c index fa54d585f558..62c1d94cb434 100644 --- a/arch/sparc/kernel/time.c +++ b/arch/sparc/kernel/time.c @@ -73,7 +73,6 @@ unsigned long profile_pc(struct pt_regs *regs) EXPORT_SYMBOL(profile_pc); __volatile__ unsigned int *master_l10_counter; -__volatile__ unsigned int *master_l10_limit; /* * timer_interrupt() needs to keep up the real-time clock, -- cgit v1.2.3 From e7913de9285a4e40733cdabbe62b6f1fa3bbdf01 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Sat, 13 Sep 2008 22:48:41 -0700 Subject: sparc32: Kill irq_rcvreg from sun4m_irq.c Unused. Signed-off-by: David S. Miller --- arch/sparc/kernel/sun4m_irq.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'arch/sparc/kernel/sun4m_irq.c') diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c index c09ec39d68ae..c6096fc70c61 100644 --- a/arch/sparc/kernel/sun4m_irq.c +++ b/arch/sparc/kernel/sun4m_irq.c @@ -59,9 +59,6 @@ struct sun4m_irq_global { struct sun4m_irq_percpu __iomem *sun4m_irq_percpu[SUN4M_NCPUS]; struct sun4m_irq_global __iomem *sun4m_irq_global; -static unsigned long dummy; -unsigned long *irq_rcvreg = &dummy; - /* Dave Redman (djhr@tadpole.co.uk) * The sun4m interrupt registers. */ @@ -369,10 +366,9 @@ void __init sun4m_init_IRQ(void) for (i = 0; !cpu_find_by_instance(i, NULL, &mid); i++) sbus_writel(~0x17fff, &sun4m_irq_percpu[mid]->clear); - if (num_cpu_iregs == 4) { - irq_rcvreg = (unsigned long *) &sun4m_irq_global->interrupt_target; + if (num_cpu_iregs == 4) sbus_writel(0, &sun4m_irq_global->interrupt_target); - } + BTFIXUPSET_CALL(enable_irq, sun4m_enable_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(disable_irq, sun4m_disable_irq, BTFIXUPCALL_NORM); BTFIXUPSET_CALL(enable_pil_irq, sun4m_enable_pil_irq, BTFIXUPCALL_NORM); -- cgit v1.2.3 From 778b1c65bfa2bfe4018394480f97d387e8f00a91 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Fri, 19 Sep 2008 15:33:21 -0700 Subject: sparc32: Add more extensive documentation of sun4m interrupts. Signed-off-by: David S. Miller --- arch/sparc/kernel/sun4m_irq.c | 53 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) (limited to 'arch/sparc/kernel/sun4m_irq.c') diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c index c6096fc70c61..ec66d4aab098 100644 --- a/arch/sparc/kernel/sun4m_irq.c +++ b/arch/sparc/kernel/sun4m_irq.c @@ -87,6 +87,59 @@ struct sun4m_irq_global __iomem *sun4m_irq_global; #define SUN4M_INT_SBUS(x) (1 << (x+7)) #define SUN4M_INT_VME(x) (1 << (x)) +/* Interrupt level assignment on sun4m: + * + * level source + * ------------------------------------------------------------ + * 1 softint-1 + * 2 softint-2, VME/SBUS level 1 + * 3 softint-3, VME/SBUS level 2 + * 4 softint-4, onboard SCSI + * 5 softint-5, VME/SBUS level 3 + * 6 softint-6, onboard ETHERNET + * 7 softint-7, VME/SBUS level 4 + * 8 softint-8, onboard VIDEO + * 9 softint-9, VME/SBUS level 5, Module Interrupt + * 10 softint-10, system counter/timer + * 11 softint-11, VME/SBUS level 6, Floppy + * 12 softint-12, Keyboard/Mouse, Serial + * 13 softint-13, VME/SBUS level 7, ISDN Audio + * 14 softint-14, per-processor counter/timer + * 15 softint-15, Asynchronous Errors (broadcast) + * + * Each interrupt source is masked distinctly in the sun4m interrupt + * registers. The PIL level alone is therefore ambiguous, since multiple + * interrupt sources map to a single PIL. + * + * This ambiguity is resolved in the 'intr' property for device nodes + * in the OF device tree. Each 'intr' property entry is composed of + * two 32-bit words. The first word is the IRQ priority value, which + * is what we're intersted in. The second word is the IRQ vector, which + * is unused. + * + * The low 4 bits of the IRQ priority indicate the PIL, and the upper + * 4 bits indicate onboard vs. SBUS leveled vs. VME leveled. 0x20 + * means onboard, 0x30 means SBUS leveled, and 0x40 means VME leveled. + * + * For example, an 'intr' IRQ priority value of 0x24 is onboard SCSI + * whereas a value of 0x33 is SBUS level 2. Here are some sample + * 'intr' property IRQ priority values from ss4, ss5, ss10, ss20, and + * Tadpole S3 GX systems. + * + * esp: 0x24 onboard ESP SCSI + * le: 0x26 onboard Lance ETHERNET + * p9100: 0x32 SBUS level 1 P9100 video + * bpp: 0x33 SBUS level 2 BPP parallel port device + * DBRI: 0x39 SBUS level 5 DBRI ISDN audio + * SUNW,leo: 0x39 SBUS level 5 LEO video + * pcmcia: 0x3b SBUS level 6 PCMCIA controller + * uctrl: 0x3b SBUS level 6 UCTRL device + * modem: 0x3d SBUS level 7 MODEM + * zs: 0x2c onboard keyboard/mouse/serial + * floppy: 0x2b onboard Floppy + * power: 0x22 onboard power device (XXX unknown mask bit XXX) + */ + /* These tables only apply for interrupts greater than 15.. * * any intr value below 0x10 is considered to be a soft-int -- cgit v1.2.3 From 6cf4a9243a7fea75e7fd6f2e1ba6fb01c805e056 Mon Sep 17 00:00:00 2001 From: Robert Reif Date: Tue, 7 Oct 2008 15:24:02 -0700 Subject: sparc32: sun4m interrupt mask cleanup Here is an updated version of a patch I wrote 6 years ago http://marc.info/?l=linux-sparc&m=103939103607617&w=2 that simplifies interrupt mask lookup. It's main purpose is to add VME bus support but it's really a cleanup of the mask code. Signed-off-by: Robert Reif Signed-off-by: David S. Miller --- arch/sparc/kernel/sun4m_irq.c | 145 ++++++++++++++++++++++++++---------------- arch/sparc/kernel/traps.c | 17 ----- 2 files changed, 91 insertions(+), 71 deletions(-) (limited to 'arch/sparc/kernel/sun4m_irq.c') diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c index ec66d4aab098..f10317179ee6 100644 --- a/arch/sparc/kernel/sun4m_irq.c +++ b/arch/sparc/kernel/sun4m_irq.c @@ -71,8 +71,9 @@ struct sun4m_irq_global __iomem *sun4m_irq_global; #define SUN4M_INT_MASKALL 0x80000000 /* mask all interrupts */ #define SUN4M_INT_MODULE_ERR 0x40000000 /* module error */ -#define SUN4M_INT_M2S_WRITE 0x20000000 /* write buffer error */ -#define SUN4M_INT_ECC 0x10000000 /* ecc memory error */ +#define SUN4M_INT_M2S_WRITE_ERR 0x20000000 /* write buffer error */ +#define SUN4M_INT_ECC_ERR 0x10000000 /* ecc memory error */ +#define SUN4M_INT_VME_ERR 0x08000000 /* vme async error */ #define SUN4M_INT_FLOPPY 0x00400000 /* floppy disk */ #define SUN4M_INT_MODULE 0x00200000 /* module interrupt */ #define SUN4M_INT_VIDEO 0x00100000 /* onboard video */ @@ -83,10 +84,22 @@ struct sun4m_irq_global __iomem *sun4m_irq_global; #define SUN4M_INT_SERIAL 0x00008000 /* serial ports */ #define SUN4M_INT_KBDMS 0x00004000 /* keyboard/mouse */ #define SUN4M_INT_SBUSBITS 0x00003F80 /* sbus int bits */ +#define SUN4M_INT_VMEBITS 0x0000007F /* vme int bits */ + +#define SUN4M_INT_ERROR (SUN4M_INT_MODULE_ERR | \ + SUN4M_INT_M2S_WRITE_ERR | \ + SUN4M_INT_ECC_ERR | \ + SUN4M_INT_VME_ERR) #define SUN4M_INT_SBUS(x) (1 << (x+7)) #define SUN4M_INT_VME(x) (1 << (x)) +/* Interrupt levels used by OBP */ +#define OBP_INT_LEVEL_SOFT 0x10 +#define OBP_INT_LEVEL_ONBOARD 0x20 +#define OBP_INT_LEVEL_SBUS 0x30 +#define OBP_INT_LEVEL_VME 0x40 + /* Interrupt level assignment on sun4m: * * level source @@ -140,59 +153,57 @@ struct sun4m_irq_global __iomem *sun4m_irq_global; * power: 0x22 onboard power device (XXX unknown mask bit XXX) */ -/* These tables only apply for interrupts greater than 15.. - * - * any intr value below 0x10 is considered to be a soft-int - * this may be useful or it may not.. but that's how I've done it. - * and it won't clash with what OBP is telling us about devices. - * - * take an encoded intr value and lookup if it's valid - * then get the mask bits that match from irq_mask - * - * P3: Translation from irq 0x0d to mask 0x2000 is for MrCoffee. - */ -static unsigned char irq_xlate[32] = { - /* 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, a, b, c, d, e, f */ - 0, 0, 0, 0, 1, 0, 2, 0, 3, 0, 4, 5, 6, 14, 0, 7, - 0, 0, 8, 9, 0, 10, 0, 11, 0, 12, 0, 13, 0, 14, 0, 0 -}; - -static unsigned long irq_mask[] = { - 0, /* illegal index */ - SUN4M_INT_SCSI, /* 1 irq 4 */ - SUN4M_INT_ETHERNET, /* 2 irq 6 */ - SUN4M_INT_VIDEO, /* 3 irq 8 */ - SUN4M_INT_REALTIME, /* 4 irq 10 */ - SUN4M_INT_FLOPPY, /* 5 irq 11 */ - (SUN4M_INT_SERIAL | SUN4M_INT_KBDMS), /* 6 irq 12 */ - SUN4M_INT_MODULE_ERR, /* 7 irq 15 */ - SUN4M_INT_SBUS(0), /* 8 irq 2 */ - SUN4M_INT_SBUS(1), /* 9 irq 3 */ - SUN4M_INT_SBUS(2), /* 10 irq 5 */ - SUN4M_INT_SBUS(3), /* 11 irq 7 */ - SUN4M_INT_SBUS(4), /* 12 irq 9 */ - SUN4M_INT_SBUS(5), /* 13 irq 11 */ - SUN4M_INT_SBUS(6) /* 14 irq 13 */ +static unsigned long irq_mask[0x50] = { + /* SMP */ + 0, SUN4M_SOFT_INT(1), + SUN4M_SOFT_INT(2), SUN4M_SOFT_INT(3), + SUN4M_SOFT_INT(4), SUN4M_SOFT_INT(5), + SUN4M_SOFT_INT(6), SUN4M_SOFT_INT(7), + SUN4M_SOFT_INT(8), SUN4M_SOFT_INT(9), + SUN4M_SOFT_INT(10), SUN4M_SOFT_INT(11), + SUN4M_SOFT_INT(12), SUN4M_SOFT_INT(13), + SUN4M_SOFT_INT(14), SUN4M_SOFT_INT(15), + /* soft */ + 0, SUN4M_SOFT_INT(1), + SUN4M_SOFT_INT(2), SUN4M_SOFT_INT(3), + SUN4M_SOFT_INT(4), SUN4M_SOFT_INT(5), + SUN4M_SOFT_INT(6), SUN4M_SOFT_INT(7), + SUN4M_SOFT_INT(8), SUN4M_SOFT_INT(9), + SUN4M_SOFT_INT(10), SUN4M_SOFT_INT(11), + SUN4M_SOFT_INT(12), SUN4M_SOFT_INT(13), + SUN4M_SOFT_INT(14), SUN4M_SOFT_INT(15), + /* onboard */ + 0, 0, 0, 0, + SUN4M_INT_SCSI, 0, SUN4M_INT_ETHERNET, 0, + SUN4M_INT_VIDEO, SUN4M_INT_MODULE, + SUN4M_INT_REALTIME, SUN4M_INT_FLOPPY, + (SUN4M_INT_SERIAL | SUN4M_INT_KBDMS), + SUN4M_INT_AUDIO, 0, SUN4M_INT_MODULE_ERR, + /* sbus */ + 0, 0, SUN4M_INT_SBUS(0), SUN4M_INT_SBUS(1), + 0, SUN4M_INT_SBUS(2), 0, SUN4M_INT_SBUS(3), + 0, SUN4M_INT_SBUS(4), 0, SUN4M_INT_SBUS(5), + 0, SUN4M_INT_SBUS(6), 0, 0, + /* vme */ + 0, 0, SUN4M_INT_VME(0), SUN4M_INT_VME(1), + 0, SUN4M_INT_VME(2), 0, SUN4M_INT_VME(3), + 0, SUN4M_INT_VME(4), 0, SUN4M_INT_VME(5), + 0, SUN4M_INT_VME(6), 0, 0 }; static unsigned long sun4m_get_irqmask(unsigned int irq) { unsigned long mask; - if (irq > 0x20) { - /* OBIO/SBUS interrupts */ - irq &= 0x1f; - mask = irq_mask[irq_xlate[irq]]; - if (!mask) - printk("sun4m_get_irqmask: IRQ%d has no valid mask!\n",irq); - } else { - /* Soft Interrupts will come here. - * Currently there is no way to trigger them but I'm sure - * something could be cooked up. - */ - irq &= 0xf; - mask = SUN4M_SOFT_INT(irq); - } + if (irq < 0x50) + mask = irq_mask[irq]; + else + mask = 0; + + if (!mask) + printk(KERN_ERR "sun4m_get_irqmask: IRQ%d has no valid mask!\n", + irq); + return mask; } @@ -247,10 +258,10 @@ static unsigned long cpu_pil_to_imask[16] = { /*9*/ SUN4M_INT_SBUS(4) | SUN4M_INT_VME(4) | SUN4M_INT_MODULE_ERR, /*10*/ SUN4M_INT_REALTIME, /*11*/ SUN4M_INT_SBUS(5) | SUN4M_INT_VME(5) | SUN4M_INT_FLOPPY, -/*12*/ SUN4M_INT_SERIAL | SUN4M_INT_KBDMS, -/*13*/ SUN4M_INT_AUDIO, +/*12*/ SUN4M_INT_SERIAL | SUN4M_INT_KBDMS, +/*13*/ SUN4M_INT_SBUS(6) | SUN4M_INT_VME(6) | SUN4M_INT_AUDIO, /*14*/ SUN4M_INT_E14, -/*15*/ 0x00000000 +/*15*/ SUN4M_INT_ERROR }; /* We assume the caller has disabled local interrupts when these are called, @@ -304,8 +315,7 @@ struct sun4m_timer_global { static struct sun4m_timer_global __iomem *timers_global; -#define OBIO_INTR 0x20 -#define TIMER_IRQ (OBIO_INTR | 10) +#define TIMER_IRQ (OBP_INT_LEVEL_ONBOARD | 10) unsigned int lvl14_resolution = (((1000000/HZ) + 1) << 10); @@ -314,6 +324,33 @@ static void sun4m_clear_clock_irq(void) sbus_readl(&timers_global->l10_limit); } +void sun4m_nmi(struct pt_regs *regs) +{ + unsigned long afsr, afar, si; + + printk(KERN_ERR "Aieee: sun4m NMI received!\n"); + /* XXX HyperSparc hack XXX */ + __asm__ __volatile__("mov 0x500, %%g1\n\t" + "lda [%%g1] 0x4, %0\n\t" + "mov 0x600, %%g1\n\t" + "lda [%%g1] 0x4, %1\n\t" : + "=r" (afsr), "=r" (afar)); + printk(KERN_ERR "afsr=%08lx afar=%08lx\n", afsr, afar); + si = sbus_readl(&sun4m_irq_global->pending); + printk(KERN_ERR "si=%08lx\n", si); + if (si & SUN4M_INT_MODULE_ERR) + printk(KERN_ERR "Module async error\n"); + if (si & SUN4M_INT_M2S_WRITE_ERR) + printk(KERN_ERR "MBus/SBus async error\n"); + if (si & SUN4M_INT_ECC_ERR) + printk(KERN_ERR "ECC memory error\n"); + if (si & SUN4M_INT_VME_ERR) + printk(KERN_ERR "VME async error\n"); + printk(KERN_ERR "you lose buddy boy...\n"); + show_regs(regs); + prom_halt(); +} + /* Exported for sun4m_smp.c */ void sun4m_clear_profile_irq(int cpu) { diff --git a/arch/sparc/kernel/traps.c b/arch/sparc/kernel/traps.c index 5d45d5fd8c99..2b7d50659036 100644 --- a/arch/sparc/kernel/traps.c +++ b/arch/sparc/kernel/traps.c @@ -43,23 +43,6 @@ void syscall_trace_exit(struct pt_regs *regs) { } -void sun4m_nmi(struct pt_regs *regs) -{ - unsigned long afsr, afar; - - printk("Aieee: sun4m NMI received!\n"); - /* XXX HyperSparc hack XXX */ - __asm__ __volatile__("mov 0x500, %%g1\n\t" - "lda [%%g1] 0x4, %0\n\t" - "mov 0x600, %%g1\n\t" - "lda [%%g1] 0x4, %1\n\t" : - "=r" (afsr), "=r" (afar)); - printk("afsr=%08lx afar=%08lx\n", afsr, afar); - printk("you lose buddy boy...\n"); - show_regs(regs); - prom_halt(); -} - void sun4d_nmi(struct pt_regs *regs) { printk("Aieee: sun4d NMI received!\n"); -- cgit v1.2.3