From 1eb83451ba55d7a8c82b76b1591894ff2d4a95f2 Mon Sep 17 00:00:00 2001 From: Ville Syrjälä Date: Wed, 11 Nov 2015 19:11:29 +0200 Subject: drm: Pass the user drm_mode_fb_cmd2 as const to .fb_create() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Drivers shouldn't clobber the passed in addfb ioctl parameters. i915 was doing just that. To prevent it from happening again, pass the struct around as const, starting all the way from internal_framebuffer_create(). Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter --- drivers/gpu/drm/rockchip/rockchip_drm_fb.c | 6 +++--- drivers/gpu/drm/rockchip/rockchip_drm_fb.h | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c index 002645bb5bbf..b8ac5911c102 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c @@ -72,7 +72,7 @@ static struct drm_framebuffer_funcs rockchip_drm_fb_funcs = { }; static struct rockchip_drm_fb * -rockchip_fb_alloc(struct drm_device *dev, struct drm_mode_fb_cmd2 *mode_cmd, +rockchip_fb_alloc(struct drm_device *dev, const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object **obj, unsigned int num_planes) { struct rockchip_drm_fb *rockchip_fb; @@ -102,7 +102,7 @@ rockchip_fb_alloc(struct drm_device *dev, struct drm_mode_fb_cmd2 *mode_cmd, static struct drm_framebuffer * rockchip_user_fb_create(struct drm_device *dev, struct drm_file *file_priv, - struct drm_mode_fb_cmd2 *mode_cmd) + const struct drm_mode_fb_cmd2 *mode_cmd) { struct rockchip_drm_fb *rockchip_fb; struct drm_gem_object *objs[ROCKCHIP_MAX_FB_BUFFER]; @@ -173,7 +173,7 @@ static const struct drm_mode_config_funcs rockchip_drm_mode_config_funcs = { struct drm_framebuffer * rockchip_drm_framebuffer_init(struct drm_device *dev, - struct drm_mode_fb_cmd2 *mode_cmd, + const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object *obj) { struct rockchip_drm_fb *rockchip_fb; diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fb.h b/drivers/gpu/drm/rockchip/rockchip_drm_fb.h index 09574d48226f..2fe47f1ee98f 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.h @@ -17,7 +17,7 @@ struct drm_framebuffer * rockchip_drm_framebuffer_init(struct drm_device *dev, - struct drm_mode_fb_cmd2 *mode_cmd, + const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object *obj); void rockchip_drm_framebuffer_fini(struct drm_framebuffer *fb); -- cgit v1.2.3 From f98828769c8838f526703ef180b3088a714af2f9 Mon Sep 17 00:00:00 2001 From: Ville Syrjälä Date: Wed, 9 Dec 2015 16:19:31 +0200 Subject: drm: Pass 'name' to drm_crtc_init_with_planes() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Done with coccinelle for the most part. However, it thinks '...' is part of the semantic patch, so I put an 'int DOTDOTDOT' placeholder in its place and got rid of it with sed afterwards. I didn't convert drm_crtc_init() since passing the varargs through would mean either cpp macros or va_list, and I figured we don't care about these legacy functions enough to warrant the extra pain. @@ identifier dev, crtc, primary, cursor, funcs; @@ int drm_crtc_init_with_planes(struct drm_device *dev, struct drm_crtc *crtc, struct drm_plane *primary, struct drm_plane *cursor, const struct drm_crtc_funcs *funcs + ,const char *name, int DOTDOTDOT ) { ... } @@ identifier dev, crtc, primary, cursor, funcs; @@ int drm_crtc_init_with_planes(struct drm_device *dev, struct drm_crtc *crtc, struct drm_plane *primary, struct drm_plane *cursor, const struct drm_crtc_funcs *funcs + ,const char *name, int DOTDOTDOT ); @@ expression E1, E2, E3, E4, E5; @@ drm_crtc_init_with_planes(E1, E2, E3, E4, E5 + ,NULL ) v2: Split crtc and plane changes apart Pass NULL for no-name instead of "" Leave drm_crtc_init() alone v3: Add ', or NULL...' to @name kernel doc (Jani) Annotate the function with __printf() attribute (Jani) Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter Link: http://patchwork.freedesktop.org/patch/msgid/1449670771-2751-1-git-send-email-ville.syrjala@linux.intel.com --- drivers/gpu/drm/armada/armada_crtc.c | 2 +- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 2 +- drivers/gpu/drm/drm_crtc.c | 4 +++- drivers/gpu/drm/drm_plane_helper.c | 3 ++- drivers/gpu/drm/exynos/exynos_drm_crtc.c | 2 +- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 2 +- drivers/gpu/drm/imx/imx-drm-core.c | 2 +- drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c | 3 ++- drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c | 3 ++- drivers/gpu/drm/omapdrm/omap_crtc.c | 2 +- drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 2 +- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 2 +- drivers/gpu/drm/sti/sti_crtc.c | 2 +- drivers/gpu/drm/tegra/dc.c | 2 +- drivers/gpu/drm/vc4/vc4_crtc.c | 2 +- drivers/gpu/drm/virtio/virtgpu_display.c | 2 +- include/drm/drm_crtc.h | 12 +++++++----- 18 files changed, 29 insertions(+), 22 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/armada/armada_crtc.c b/drivers/gpu/drm/armada/armada_crtc.c index cebcab560626..c3f3a7031bb1 100644 --- a/drivers/gpu/drm/armada/armada_crtc.c +++ b/drivers/gpu/drm/armada/armada_crtc.c @@ -1223,7 +1223,7 @@ static int armada_drm_crtc_create(struct drm_device *drm, struct device *dev, } ret = drm_crtc_init_with_planes(drm, &dcrtc->crtc, &primary->base, NULL, - &armada_crtc_funcs); + &armada_crtc_funcs, NULL); if (ret) goto err_crtc_init; diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c index 9f6e234e7029..468a14f266a7 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c @@ -344,7 +344,7 @@ int atmel_hlcdc_crtc_create(struct drm_device *dev) ret = drm_crtc_init_with_planes(dev, &crtc->base, &planes->primary->base, planes->cursor ? &planes->cursor->base : NULL, - &atmel_hlcdc_crtc_funcs); + &atmel_hlcdc_crtc_funcs, NULL); if (ret < 0) goto fail; diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c index 99e7efebedda..27922bbcde35 100644 --- a/drivers/gpu/drm/drm_crtc.c +++ b/drivers/gpu/drm/drm_crtc.c @@ -657,6 +657,7 @@ DEFINE_WW_CLASS(crtc_ww_class); * @primary: Primary plane for CRTC * @cursor: Cursor plane for CRTC * @funcs: callbacks for the new CRTC + * @name: printf style format string for the CRTC name, or NULL for default name * * Inits a new object created as base part of a driver crtc object. * @@ -666,7 +667,8 @@ DEFINE_WW_CLASS(crtc_ww_class); int drm_crtc_init_with_planes(struct drm_device *dev, struct drm_crtc *crtc, struct drm_plane *primary, struct drm_plane *cursor, - const struct drm_crtc_funcs *funcs) + const struct drm_crtc_funcs *funcs, + const char *name, ...) { struct drm_mode_config *config = &dev->mode_config; int ret; diff --git a/drivers/gpu/drm/drm_plane_helper.c b/drivers/gpu/drm/drm_plane_helper.c index 8455e996dd9c..f5a4273e71b5 100644 --- a/drivers/gpu/drm/drm_plane_helper.c +++ b/drivers/gpu/drm/drm_plane_helper.c @@ -402,7 +402,8 @@ int drm_crtc_init(struct drm_device *dev, struct drm_crtc *crtc, struct drm_plane *primary; primary = create_primary_plane(dev); - return drm_crtc_init_with_planes(dev, crtc, primary, NULL, funcs); + return drm_crtc_init_with_planes(dev, crtc, primary, NULL, funcs, + NULL); } EXPORT_SYMBOL(drm_crtc_init); diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c index b3ba27fd9a6b..9d30a0fa3248 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c @@ -150,7 +150,7 @@ struct exynos_drm_crtc *exynos_drm_crtc_create(struct drm_device *drm_dev, private->crtc[pipe] = crtc; ret = drm_crtc_init_with_planes(drm_dev, crtc, plane, NULL, - &exynos_crtc_funcs); + &exynos_crtc_funcs, NULL); if (ret < 0) goto err_crtc; diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c index 82a3d311e164..d8ab8f0af10c 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c @@ -175,7 +175,7 @@ int fsl_dcu_drm_crtc_create(struct fsl_dcu_drm_device *fsl_dev) primary = fsl_dcu_drm_primary_create_plane(fsl_dev->drm); ret = drm_crtc_init_with_planes(fsl_dev->drm, crtc, primary, NULL, - &fsl_dcu_drm_crtc_funcs); + &fsl_dcu_drm_crtc_funcs, NULL); if (ret < 0) return ret; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 696f7543d264..5a3370798ba3 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -14120,7 +14120,7 @@ static void intel_crtc_init(struct drm_device *dev, int pipe) goto fail; ret = drm_crtc_init_with_planes(dev, &intel_crtc->base, primary, - cursor, &intel_crtc_funcs); + cursor, &intel_crtc_funcs, NULL); if (ret) goto fail; diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c index 882cf3d4b7a8..09e20ea69419 100644 --- a/drivers/gpu/drm/imx/imx-drm-core.c +++ b/drivers/gpu/drm/imx/imx-drm-core.c @@ -373,7 +373,7 @@ int imx_drm_add_crtc(struct drm_device *drm, struct drm_crtc *crtc, imx_drm_crtc->imx_drm_helper_funcs.crtc_helper_funcs); drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL, - imx_drm_crtc->imx_drm_helper_funcs.crtc_funcs); + imx_drm_crtc->imx_drm_helper_funcs.crtc_funcs, NULL); return 0; diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c index 6ac9aa165768..28df397c3b04 100644 --- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c +++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c @@ -678,7 +678,8 @@ struct drm_crtc *mdp4_crtc_init(struct drm_device *dev, drm_flip_work_init(&mdp4_crtc->unref_cursor_work, "unref cursor", unref_cursor_worker); - drm_crtc_init_with_planes(dev, crtc, plane, NULL, &mdp4_crtc_funcs); + drm_crtc_init_with_planes(dev, crtc, plane, NULL, &mdp4_crtc_funcs, + NULL); drm_crtc_helper_add(crtc, &mdp4_crtc_helper_funcs); plane->crtc = crtc; diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c index 7f9f4ac88029..20cee5ce4071 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c @@ -797,7 +797,8 @@ struct drm_crtc *mdp5_crtc_init(struct drm_device *dev, snprintf(mdp5_crtc->name, sizeof(mdp5_crtc->name), "%s:%d", pipe2name(mdp5_plane_pipe(plane)), id); - drm_crtc_init_with_planes(dev, crtc, plane, NULL, &mdp5_crtc_funcs); + drm_crtc_init_with_planes(dev, crtc, plane, NULL, &mdp5_crtc_funcs, + NULL); drm_flip_work_init(&mdp5_crtc->unref_cursor_work, "unref cursor", unref_cursor_worker); diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c index ad09590e8a46..2ed0754ed19e 100644 --- a/drivers/gpu/drm/omapdrm/omap_crtc.c +++ b/drivers/gpu/drm/omapdrm/omap_crtc.c @@ -524,7 +524,7 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev, omap_crtc->mgr = omap_dss_get_overlay_manager(channel); ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL, - &omap_crtc_funcs); + &omap_crtc_funcs, NULL); if (ret < 0) { kfree(omap_crtc); return NULL; diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c index 48cb19949ca3..88a4b706be16 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c @@ -613,7 +613,7 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index) ret = drm_crtc_init_with_planes(rcdu->ddev, crtc, &rgrp->planes[index % 2].plane, - NULL, &crtc_funcs); + NULL, &crtc_funcs, NULL); if (ret < 0) return ret; diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 03c47eeadc81..8e89e80ec906 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -1492,7 +1492,7 @@ static int vop_create_crtc(struct vop *vop) } ret = drm_crtc_init_with_planes(drm_dev, crtc, primary, cursor, - &vop_crtc_funcs); + &vop_crtc_funcs, NULL); if (ret) return ret; diff --git a/drivers/gpu/drm/sti/sti_crtc.c b/drivers/gpu/drm/sti/sti_crtc.c index 3ae09dcd4fd8..de11c7cfb02f 100644 --- a/drivers/gpu/drm/sti/sti_crtc.c +++ b/drivers/gpu/drm/sti/sti_crtc.c @@ -367,7 +367,7 @@ int sti_crtc_init(struct drm_device *drm_dev, struct sti_mixer *mixer, int res; res = drm_crtc_init_with_planes(drm_dev, crtc, primary, cursor, - &sti_crtc_funcs); + &sti_crtc_funcs, NULL); if (res) { DRM_ERROR("Can't initialze CRTC\n"); return -EINVAL; diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index e9f24a85a103..be894103fa49 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -1732,7 +1732,7 @@ static int tegra_dc_init(struct host1x_client *client) } err = drm_crtc_init_with_planes(drm, &dc->base, primary, cursor, - &tegra_crtc_funcs); + &tegra_crtc_funcs, NULL); if (err < 0) goto cleanup; diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c index 265064c62d49..2168a99d59aa 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c @@ -606,7 +606,7 @@ static int vc4_crtc_bind(struct device *dev, struct device *master, void *data) } drm_crtc_init_with_planes(drm, crtc, primary_plane, cursor_plane, - &vc4_crtc_funcs); + &vc4_crtc_funcs, NULL); drm_crtc_helper_add(crtc, &vc4_crtc_helper_funcs); primary_plane->crtc = crtc; cursor_plane->crtc = crtc; diff --git a/drivers/gpu/drm/virtio/virtgpu_display.c b/drivers/gpu/drm/virtio/virtgpu_display.c index 623c98cf024d..ef4cef0c8ece 100644 --- a/drivers/gpu/drm/virtio/virtgpu_display.c +++ b/drivers/gpu/drm/virtio/virtgpu_display.c @@ -431,7 +431,7 @@ static int vgdev_output_init(struct virtio_gpu_device *vgdev, int index) if (IS_ERR(plane)) return PTR_ERR(plane); drm_crtc_init_with_planes(dev, crtc, plane, NULL, - &virtio_gpu_crtc_funcs); + &virtio_gpu_crtc_funcs, NULL); drm_mode_crtc_set_gamma_size(crtc, 256); drm_crtc_helper_add(crtc, &virtio_gpu_crtc_helper_funcs); plane->crtc = crtc; diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index 4f587a5bc88f..f0127e7b0ee2 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -2144,11 +2144,13 @@ struct drm_prop_enum_list { char *name; }; -extern int drm_crtc_init_with_planes(struct drm_device *dev, - struct drm_crtc *crtc, - struct drm_plane *primary, - struct drm_plane *cursor, - const struct drm_crtc_funcs *funcs); +extern __printf(6, 7) +int drm_crtc_init_with_planes(struct drm_device *dev, + struct drm_crtc *crtc, + struct drm_plane *primary, + struct drm_plane *cursor, + const struct drm_crtc_funcs *funcs, + const char *name, ...); extern void drm_crtc_cleanup(struct drm_crtc *crtc); extern unsigned int drm_crtc_index(struct drm_crtc *crtc); -- cgit v1.2.3 From b0b3b7951114315d65398c27648705ca1c322faa Mon Sep 17 00:00:00 2001 From: Ville Syrjälä Date: Wed, 9 Dec 2015 16:19:55 +0200 Subject: drm: Pass 'name' to drm_universal_plane_init() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Done with coccinelle for the most part. It choked on msm/mdp/mdp5/mdp5_plane.c like so: "BAD:!!!!! enum drm_plane_type type;" No idea how to deal with that, so I just fixed that up by hand. Also it thinks '...' is part of the semantic patch, so I put an 'int DOTDOTDOT' placeholder in its place and got rid of it with sed afterwards. I didn't convert drm_plane_init() since passing the varargs through would mean either cpp macros or va_list, and I figured we don't care about these legacy functions enough to warrant the extra pain. @@ typedef uint32_t; identifier dev, plane, possible_crtcs, funcs, formats, format_count, type; @@ int drm_universal_plane_init(struct drm_device *dev, struct drm_plane *plane, unsigned long possible_crtcs, const struct drm_plane_funcs *funcs, const uint32_t *formats, unsigned int format_count, enum drm_plane_type type + ,const char *name, int DOTDOTDOT ) { ... } @@ identifier dev, plane, possible_crtcs, funcs, formats, format_count, type; @@ int drm_universal_plane_init(struct drm_device *dev, struct drm_plane *plane, unsigned long possible_crtcs, const struct drm_plane_funcs *funcs, const uint32_t *formats, unsigned int format_count, enum drm_plane_type type + ,const char *name, int DOTDOTDOT ); @@ expression E1, E2, E3, E4, E5, E6, E7; @@ drm_universal_plane_init(E1, E2, E3, E4, E5, E6, E7 + ,NULL ) v2: Split crtc and plane changes apart Pass NUL for no-name instead of "" Leave drm_plane_init() alone v3: Add ', or NULL...' to @name kernel doc (Jani) Annotate the function with __printf() attribute (Jani) Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter Link: http://patchwork.freedesktop.org/patch/msgid/1449670795-2853-1-git-send-email-ville.syrjala@linux.intel.com --- drivers/gpu/drm/armada/armada_crtc.c | 2 +- drivers/gpu/drm/armada/armada_overlay.c | 2 +- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 2 +- drivers/gpu/drm/drm_crtc.c | 6 ++++-- drivers/gpu/drm/drm_plane_helper.c | 2 +- drivers/gpu/drm/exynos/exynos_drm_plane.c | 2 +- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 4 ++-- drivers/gpu/drm/i915/intel_sprite.c | 2 +- drivers/gpu/drm/imx/ipuv3-plane.c | 3 ++- drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c | 3 ++- drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 2 +- drivers/gpu/drm/omapdrm/omap_plane.c | 2 +- drivers/gpu/drm/rcar-du/rcar_du_plane.c | 3 ++- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 4 ++-- drivers/gpu/drm/sti/sti_cursor.c | 2 +- drivers/gpu/drm/sti/sti_gdp.c | 2 +- drivers/gpu/drm/sti/sti_hqvdp.c | 2 +- drivers/gpu/drm/tegra/dc.c | 9 ++++++--- drivers/gpu/drm/vc4/vc4_plane.c | 2 +- drivers/gpu/drm/virtio/virtgpu_plane.c | 2 +- include/drm/drm_crtc.h | 16 +++++++++------- 22 files changed, 43 insertions(+), 33 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/armada/armada_crtc.c b/drivers/gpu/drm/armada/armada_crtc.c index c3f3a7031bb1..9bdc28cf927e 100644 --- a/drivers/gpu/drm/armada/armada_crtc.c +++ b/drivers/gpu/drm/armada/armada_crtc.c @@ -1216,7 +1216,7 @@ static int armada_drm_crtc_create(struct drm_device *drm, struct device *dev, &armada_primary_plane_funcs, armada_primary_formats, ARRAY_SIZE(armada_primary_formats), - DRM_PLANE_TYPE_PRIMARY); + DRM_PLANE_TYPE_PRIMARY, NULL); if (ret) { kfree(primary); return ret; diff --git a/drivers/gpu/drm/armada/armada_overlay.c b/drivers/gpu/drm/armada/armada_overlay.c index 5c22b380f8f3..148e8a42b2c6 100644 --- a/drivers/gpu/drm/armada/armada_overlay.c +++ b/drivers/gpu/drm/armada/armada_overlay.c @@ -460,7 +460,7 @@ int armada_overlay_plane_create(struct drm_device *dev, unsigned long crtcs) &armada_ovl_plane_funcs, armada_ovl_formats, ARRAY_SIZE(armada_ovl_formats), - DRM_PLANE_TYPE_OVERLAY); + DRM_PLANE_TYPE_OVERLAY, NULL); if (ret) { kfree(dplane); return ret; diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c index d0299aed517e..1ffe9c329c46 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c @@ -941,7 +941,7 @@ atmel_hlcdc_plane_create(struct drm_device *dev, ret = drm_universal_plane_init(dev, &plane->base, 0, &layer_plane_funcs, desc->formats->formats, - desc->formats->nformats, type); + desc->formats->nformats, type, NULL); if (ret) return ERR_PTR(ret); diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c index 27922bbcde35..20d67a06efce 100644 --- a/drivers/gpu/drm/drm_crtc.c +++ b/drivers/gpu/drm/drm_crtc.c @@ -1152,6 +1152,7 @@ EXPORT_SYMBOL(drm_encoder_cleanup); * @formats: array of supported formats (%DRM_FORMAT_*) * @format_count: number of elements in @formats * @type: type of plane (overlay, primary, cursor) + * @name: printf style format string for the plane name, or NULL for default name * * Initializes a plane object of type @type. * @@ -1162,7 +1163,8 @@ int drm_universal_plane_init(struct drm_device *dev, struct drm_plane *plane, unsigned long possible_crtcs, const struct drm_plane_funcs *funcs, const uint32_t *formats, unsigned int format_count, - enum drm_plane_type type) + enum drm_plane_type type, + const char *name, ...) { struct drm_mode_config *config = &dev->mode_config; int ret; @@ -1242,7 +1244,7 @@ int drm_plane_init(struct drm_device *dev, struct drm_plane *plane, type = is_primary ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY; return drm_universal_plane_init(dev, plane, possible_crtcs, funcs, - formats, format_count, type); + formats, format_count, type, NULL); } EXPORT_SYMBOL(drm_plane_init); diff --git a/drivers/gpu/drm/drm_plane_helper.c b/drivers/gpu/drm/drm_plane_helper.c index f5a4273e71b5..369d2898ff9e 100644 --- a/drivers/gpu/drm/drm_plane_helper.c +++ b/drivers/gpu/drm/drm_plane_helper.c @@ -375,7 +375,7 @@ static struct drm_plane *create_primary_plane(struct drm_device *dev) &drm_primary_helper_funcs, safe_modeset_formats, ARRAY_SIZE(safe_modeset_formats), - DRM_PLANE_TYPE_PRIMARY); + DRM_PLANE_TYPE_PRIMARY, NULL); if (ret) { kfree(primary); primary = NULL; diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c index 179311760bb7..383ee1edb965 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_plane.c +++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c @@ -228,7 +228,7 @@ int exynos_plane_init(struct drm_device *dev, err = drm_universal_plane_init(dev, &exynos_plane->base, possible_crtcs, &exynos_plane_funcs, formats, fcount, - type); + type, NULL); if (err) { DRM_ERROR("failed to initialize plane\n"); return err; diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c index 51daaea40b4d..4b13cf919575 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c @@ -249,7 +249,7 @@ struct drm_plane *fsl_dcu_drm_primary_create_plane(struct drm_device *dev) &fsl_dcu_drm_plane_funcs, fsl_dcu_drm_plane_formats, ARRAY_SIZE(fsl_dcu_drm_plane_formats), - DRM_PLANE_TYPE_PRIMARY); + DRM_PLANE_TYPE_PRIMARY, NULL); if (ret) { kfree(primary); primary = NULL; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 5a3370798ba3..fc0d53a4eab3 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -13904,7 +13904,7 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev, drm_universal_plane_init(dev, &primary->base, 0, &intel_plane_funcs, intel_primary_formats, num_formats, - DRM_PLANE_TYPE_PRIMARY); + DRM_PLANE_TYPE_PRIMARY, NULL); if (INTEL_INFO(dev)->gen >= 4) intel_create_rotation_property(dev, primary); @@ -14043,7 +14043,7 @@ static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev, &intel_plane_funcs, intel_cursor_formats, ARRAY_SIZE(intel_cursor_formats), - DRM_PLANE_TYPE_CURSOR); + DRM_PLANE_TYPE_CURSOR, NULL); if (INTEL_INFO(dev)->gen >= 4) { if (!dev->mode_config.rotation_property) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 2b96f336589e..dbf421351b5c 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -1123,7 +1123,7 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane) ret = drm_universal_plane_init(dev, &intel_plane->base, possible_crtcs, &intel_plane_funcs, plane_formats, num_plane_formats, - DRM_PLANE_TYPE_OVERLAY); + DRM_PLANE_TYPE_OVERLAY, NULL); if (ret) { kfree(intel_plane); goto out; diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c index e2ff410bab74..591ba2f1ae03 100644 --- a/drivers/gpu/drm/imx/ipuv3-plane.c +++ b/drivers/gpu/drm/imx/ipuv3-plane.c @@ -401,7 +401,8 @@ struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu, ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs, &ipu_plane_funcs, ipu_plane_formats, - ARRAY_SIZE(ipu_plane_formats), type); + ARRAY_SIZE(ipu_plane_formats), type, + NULL); if (ret) { DRM_ERROR("failed to initialize plane\n"); kfree(ipu_plane); diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c index 30d57e74c42f..9f96dfe67769 100644 --- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c +++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c @@ -397,7 +397,8 @@ struct drm_plane *mdp4_plane_init(struct drm_device *dev, type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY; ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs, - mdp4_plane->formats, mdp4_plane->nformats, type); + mdp4_plane->formats, mdp4_plane->nformats, + type, NULL); if (ret) goto fail; diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c index 81cd49045ffc..432c09836b0e 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c @@ -904,7 +904,7 @@ struct drm_plane *mdp5_plane_init(struct drm_device *dev, type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY; ret = drm_universal_plane_init(dev, plane, 0xff, &mdp5_plane_funcs, mdp5_plane->formats, mdp5_plane->nformats, - type); + type, NULL); if (ret) goto fail; diff --git a/drivers/gpu/drm/omapdrm/omap_plane.c b/drivers/gpu/drm/omapdrm/omap_plane.c index 3054bda72688..d5ecabd6c14c 100644 --- a/drivers/gpu/drm/omapdrm/omap_plane.c +++ b/drivers/gpu/drm/omapdrm/omap_plane.c @@ -366,7 +366,7 @@ struct drm_plane *omap_plane_init(struct drm_device *dev, ret = drm_universal_plane_init(dev, plane, (1 << priv->num_crtcs) - 1, &omap_plane_funcs, omap_plane->formats, - omap_plane->nformats, type); + omap_plane->nformats, type, NULL); if (ret < 0) goto error; diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c index ffa583712cd9..c3ed9522c0e1 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c @@ -410,7 +410,8 @@ int rcar_du_planes_init(struct rcar_du_group *rgrp) ret = drm_universal_plane_init(rcdu->ddev, &plane->plane, crtcs, &rcar_du_plane_funcs, formats, - ARRAY_SIZE(formats), type); + ARRAY_SIZE(formats), type, + NULL); if (ret < 0) return ret; diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 8e89e80ec906..dd8e0860ad4e 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -1478,7 +1478,7 @@ static int vop_create_crtc(struct vop *vop) 0, &vop_plane_funcs, win_data->phy->data_formats, win_data->phy->nformats, - win_data->type); + win_data->type, NULL); if (ret) { DRM_ERROR("failed to initialize plane\n"); goto err_cleanup_planes; @@ -1515,7 +1515,7 @@ static int vop_create_crtc(struct vop *vop) &vop_plane_funcs, win_data->phy->data_formats, win_data->phy->nformats, - win_data->type); + win_data->type, NULL); if (ret) { DRM_ERROR("failed to initialize overlay plane\n"); goto err_cleanup_crtc; diff --git a/drivers/gpu/drm/sti/sti_cursor.c b/drivers/gpu/drm/sti/sti_cursor.c index dd1032195051..807863106b8d 100644 --- a/drivers/gpu/drm/sti/sti_cursor.c +++ b/drivers/gpu/drm/sti/sti_cursor.c @@ -272,7 +272,7 @@ struct drm_plane *sti_cursor_create(struct drm_device *drm_dev, &sti_plane_helpers_funcs, cursor_supported_formats, ARRAY_SIZE(cursor_supported_formats), - DRM_PLANE_TYPE_CURSOR); + DRM_PLANE_TYPE_CURSOR, NULL); if (res) { DRM_ERROR("Failed to initialize universal plane\n"); goto err_plane; diff --git a/drivers/gpu/drm/sti/sti_gdp.c b/drivers/gpu/drm/sti/sti_gdp.c index c85dc7d6b005..f9a1d92c9d95 100644 --- a/drivers/gpu/drm/sti/sti_gdp.c +++ b/drivers/gpu/drm/sti/sti_gdp.c @@ -630,7 +630,7 @@ struct drm_plane *sti_gdp_create(struct drm_device *drm_dev, &sti_plane_helpers_funcs, gdp_supported_formats, ARRAY_SIZE(gdp_supported_formats), - type); + type, NULL); if (res) { DRM_ERROR("Failed to initialize universal plane\n"); goto err; diff --git a/drivers/gpu/drm/sti/sti_hqvdp.c b/drivers/gpu/drm/sti/sti_hqvdp.c index ea0690bc77d5..43861b52261d 100644 --- a/drivers/gpu/drm/sti/sti_hqvdp.c +++ b/drivers/gpu/drm/sti/sti_hqvdp.c @@ -973,7 +973,7 @@ static struct drm_plane *sti_hqvdp_create(struct drm_device *drm_dev, &sti_plane_helpers_funcs, hqvdp_supported_formats, ARRAY_SIZE(hqvdp_supported_formats), - DRM_PLANE_TYPE_OVERLAY); + DRM_PLANE_TYPE_OVERLAY, NULL); if (res) { DRM_ERROR("Failed to initialize universal plane\n"); return NULL; diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index be894103fa49..1f5cb68357c7 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -660,7 +660,8 @@ static struct drm_plane *tegra_dc_primary_plane_create(struct drm_device *drm, err = drm_universal_plane_init(drm, &plane->base, possible_crtcs, &tegra_primary_plane_funcs, formats, - num_formats, DRM_PLANE_TYPE_PRIMARY); + num_formats, DRM_PLANE_TYPE_PRIMARY, + NULL); if (err < 0) { kfree(plane); return ERR_PTR(err); @@ -827,7 +828,8 @@ static struct drm_plane *tegra_dc_cursor_plane_create(struct drm_device *drm, err = drm_universal_plane_init(drm, &plane->base, 1 << dc->pipe, &tegra_cursor_plane_funcs, formats, - num_formats, DRM_PLANE_TYPE_CURSOR); + num_formats, DRM_PLANE_TYPE_CURSOR, + NULL); if (err < 0) { kfree(plane); return ERR_PTR(err); @@ -890,7 +892,8 @@ static struct drm_plane *tegra_dc_overlay_plane_create(struct drm_device *drm, err = drm_universal_plane_init(drm, &plane->base, 1 << dc->pipe, &tegra_overlay_plane_funcs, formats, - num_formats, DRM_PLANE_TYPE_OVERLAY); + num_formats, DRM_PLANE_TYPE_OVERLAY, + NULL); if (err < 0) { kfree(plane); return ERR_PTR(err); diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c index 887f3caad0be..f34c422733dc 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c @@ -317,7 +317,7 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev, ret = drm_universal_plane_init(dev, plane, 0xff, &vc4_plane_funcs, formats, ARRAY_SIZE(formats), - type); + type, NULL); drm_plane_helper_add(plane, &vc4_plane_helper_funcs); diff --git a/drivers/gpu/drm/virtio/virtgpu_plane.c b/drivers/gpu/drm/virtio/virtgpu_plane.c index 4a74129c5708..572fb351feab 100644 --- a/drivers/gpu/drm/virtio/virtgpu_plane.c +++ b/drivers/gpu/drm/virtio/virtgpu_plane.c @@ -107,7 +107,7 @@ struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev, &virtio_gpu_plane_funcs, virtio_gpu_formats, ARRAY_SIZE(virtio_gpu_formats), - DRM_PLANE_TYPE_PRIMARY); + DRM_PLANE_TYPE_PRIMARY, NULL); if (ret) goto err_plane_init; diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index f0127e7b0ee2..a6f0e25cbd51 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -2214,13 +2214,15 @@ static inline bool drm_encoder_crtc_ok(struct drm_encoder *encoder, return !!(encoder->possible_crtcs & drm_crtc_mask(crtc)); } -extern int drm_universal_plane_init(struct drm_device *dev, - struct drm_plane *plane, - unsigned long possible_crtcs, - const struct drm_plane_funcs *funcs, - const uint32_t *formats, - unsigned int format_count, - enum drm_plane_type type); +extern __printf(8, 9) +int drm_universal_plane_init(struct drm_device *dev, + struct drm_plane *plane, + unsigned long possible_crtcs, + const struct drm_plane_funcs *funcs, + const uint32_t *formats, + unsigned int format_count, + enum drm_plane_type type, + const char *name, ...); extern int drm_plane_init(struct drm_device *dev, struct drm_plane *plane, unsigned long possible_crtcs, -- cgit v1.2.3 From 13a3d91f17a5f7ed2acd275d18b6acfdb131fb15 Mon Sep 17 00:00:00 2001 From: Ville Syrjälä Date: Wed, 9 Dec 2015 16:20:18 +0200 Subject: drm: Pass 'name' to drm_encoder_init() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Done with coccinelle for the most part. However, it thinks '...' is part of the semantic patch, so I put an 'int DOTDOTDOT' placeholder in its place and got rid of it with sed afterwards. @@ identifier dev, encoder, funcs; @@ int drm_encoder_init(struct drm_device *dev, struct drm_encoder *encoder, const struct drm_encoder_funcs *funcs, int encoder_type + ,const char *name, int DOTDOTDOT ) { ... } @@ identifier dev, encoder, funcs; @@ int drm_encoder_init(struct drm_device *dev, struct drm_encoder *encoder, const struct drm_encoder_funcs *funcs, int encoder_type + ,const char *name, int DOTDOTDOT ); @@ expression E1, E2, E3, E4; @@ drm_encoder_init(E1, E2, E3, E4 + ,NULL ) v2: Add ', or NULL...' to @name kernel doc (Jani) Annotate the function with __printf() attribute (Jani) Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter Link: http://patchwork.freedesktop.org/patch/msgid/1449670818-2966-1-git-send-email-ville.syrjala@linux.intel.com --- drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 14 +++++------ drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 14 +++++------ drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 14 +++++------ drivers/gpu/drm/ast/ast_mode.c | 2 +- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c | 2 +- drivers/gpu/drm/bochs/bochs_kms.c | 2 +- drivers/gpu/drm/cirrus/cirrus_mode.c | 2 +- drivers/gpu/drm/drm_crtc.c | 3 ++- drivers/gpu/drm/exynos/exynos_dp_core.c | 2 +- drivers/gpu/drm/exynos/exynos_drm_dpi.c | 2 +- drivers/gpu/drm/exynos/exynos_drm_dsi.c | 2 +- drivers/gpu/drm/exynos/exynos_drm_vidi.c | 2 +- drivers/gpu/drm/exynos/exynos_hdmi.c | 2 +- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c | 2 +- drivers/gpu/drm/gma500/cdv_intel_crt.c | 2 +- drivers/gpu/drm/gma500/cdv_intel_dp.c | 3 ++- drivers/gpu/drm/gma500/cdv_intel_hdmi.c | 2 +- drivers/gpu/drm/gma500/cdv_intel_lvds.c | 2 +- drivers/gpu/drm/gma500/mdfld_dsi_dpi.c | 2 +- drivers/gpu/drm/gma500/oaktrail_hdmi.c | 2 +- drivers/gpu/drm/gma500/oaktrail_lvds.c | 2 +- drivers/gpu/drm/gma500/psb_intel_lvds.c | 2 +- drivers/gpu/drm/gma500/psb_intel_sdvo.c | 3 ++- drivers/gpu/drm/i2c/tda998x_drv.c | 2 +- drivers/gpu/drm/i915/intel_crt.c | 2 +- drivers/gpu/drm/i915/intel_ddi.c | 2 +- drivers/gpu/drm/i915/intel_dp.c | 2 +- drivers/gpu/drm/i915/intel_dp_mst.c | 2 +- drivers/gpu/drm/i915/intel_dsi.c | 3 ++- drivers/gpu/drm/i915/intel_dvo.c | 2 +- drivers/gpu/drm/i915/intel_hdmi.c | 2 +- drivers/gpu/drm/i915/intel_lvds.c | 2 +- drivers/gpu/drm/i915/intel_sdvo.c | 3 ++- drivers/gpu/drm/i915/intel_tv.c | 2 +- drivers/gpu/drm/imx/dw_hdmi-imx.c | 2 +- drivers/gpu/drm/imx/imx-ldb.c | 2 +- drivers/gpu/drm/imx/imx-tve.c | 2 +- drivers/gpu/drm/imx/parallel-display.c | 2 +- drivers/gpu/drm/mgag200/mgag200_mode.c | 2 +- drivers/gpu/drm/msm/mdp/mdp4/mdp4_dtv_encoder.c | 2 +- drivers/gpu/drm/msm/mdp/mdp4/mdp4_lcdc_encoder.c | 2 +- drivers/gpu/drm/msm/mdp/mdp5/mdp5_cmd_encoder.c | 2 +- drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c | 2 +- drivers/gpu/drm/nouveau/dispnv04/dac.c | 3 ++- drivers/gpu/drm/nouveau/dispnv04/dfp.c | 2 +- drivers/gpu/drm/nouveau/dispnv04/tvnv04.c | 3 ++- drivers/gpu/drm/nouveau/dispnv04/tvnv17.c | 3 ++- drivers/gpu/drm/nouveau/nv50_display.c | 6 ++--- drivers/gpu/drm/omapdrm/omap_encoder.c | 2 +- drivers/gpu/drm/qxl/qxl_display.c | 2 +- drivers/gpu/drm/radeon/atombios_encoders.c | 30 ++++++++++++++++-------- drivers/gpu/drm/radeon/radeon_dp_mst.c | 2 +- drivers/gpu/drm/radeon/radeon_legacy_encoders.c | 15 ++++++++---- drivers/gpu/drm/rcar-du/rcar_du_encoder.c | 2 +- drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c | 2 +- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 2 +- drivers/gpu/drm/shmobile/shmob_drm_crtc.c | 2 +- drivers/gpu/drm/sti/sti_tvout.c | 7 +++--- drivers/gpu/drm/tegra/dsi.c | 2 +- drivers/gpu/drm/tegra/hdmi.c | 2 +- drivers/gpu/drm/tegra/rgb.c | 2 +- drivers/gpu/drm/tegra/sor.c | 2 +- drivers/gpu/drm/tilcdc/tilcdc_panel.c | 2 +- drivers/gpu/drm/tilcdc/tilcdc_tfp410.c | 2 +- drivers/gpu/drm/udl/udl_encoder.c | 3 ++- drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +- drivers/gpu/drm/virtio/virtgpu_display.c | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 2 +- drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | 2 +- include/drm/drm_crtc.h | 9 +++---- 71 files changed, 135 insertions(+), 109 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c index 4dcc8fba5792..093599aba64b 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c @@ -3729,7 +3729,7 @@ static void dce_v10_0_encoder_add(struct amdgpu_device *adev, case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: drm_encoder_init(dev, encoder, &dce_v10_0_encoder_funcs, - DRM_MODE_ENCODER_DAC); + DRM_MODE_ENCODER_DAC, NULL); drm_encoder_helper_add(encoder, &dce_v10_0_dac_helper_funcs); break; case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: @@ -3740,15 +3740,15 @@ static void dce_v10_0_encoder_add(struct amdgpu_device *adev, if (amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { amdgpu_encoder->rmx_type = RMX_FULL; drm_encoder_init(dev, encoder, &dce_v10_0_encoder_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); amdgpu_encoder->enc_priv = amdgpu_atombios_encoder_get_lcd_info(amdgpu_encoder); } else if (amdgpu_encoder->devices & (ATOM_DEVICE_CRT_SUPPORT)) { drm_encoder_init(dev, encoder, &dce_v10_0_encoder_funcs, - DRM_MODE_ENCODER_DAC); + DRM_MODE_ENCODER_DAC, NULL); amdgpu_encoder->enc_priv = amdgpu_atombios_encoder_get_dig_info(amdgpu_encoder); } else { drm_encoder_init(dev, encoder, &dce_v10_0_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); amdgpu_encoder->enc_priv = amdgpu_atombios_encoder_get_dig_info(amdgpu_encoder); } drm_encoder_helper_add(encoder, &dce_v10_0_dig_helper_funcs); @@ -3766,13 +3766,13 @@ static void dce_v10_0_encoder_add(struct amdgpu_device *adev, amdgpu_encoder->is_ext_encoder = true; if (amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) drm_encoder_init(dev, encoder, &dce_v10_0_encoder_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); else if (amdgpu_encoder->devices & (ATOM_DEVICE_CRT_SUPPORT)) drm_encoder_init(dev, encoder, &dce_v10_0_encoder_funcs, - DRM_MODE_ENCODER_DAC); + DRM_MODE_ENCODER_DAC, NULL); else drm_encoder_init(dev, encoder, &dce_v10_0_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); drm_encoder_helper_add(encoder, &dce_v10_0_ext_helper_funcs); break; } diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c index 8f1e51128b33..8701661a8868 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c @@ -3722,7 +3722,7 @@ static void dce_v11_0_encoder_add(struct amdgpu_device *adev, case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: drm_encoder_init(dev, encoder, &dce_v11_0_encoder_funcs, - DRM_MODE_ENCODER_DAC); + DRM_MODE_ENCODER_DAC, NULL); drm_encoder_helper_add(encoder, &dce_v11_0_dac_helper_funcs); break; case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: @@ -3733,15 +3733,15 @@ static void dce_v11_0_encoder_add(struct amdgpu_device *adev, if (amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { amdgpu_encoder->rmx_type = RMX_FULL; drm_encoder_init(dev, encoder, &dce_v11_0_encoder_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); amdgpu_encoder->enc_priv = amdgpu_atombios_encoder_get_lcd_info(amdgpu_encoder); } else if (amdgpu_encoder->devices & (ATOM_DEVICE_CRT_SUPPORT)) { drm_encoder_init(dev, encoder, &dce_v11_0_encoder_funcs, - DRM_MODE_ENCODER_DAC); + DRM_MODE_ENCODER_DAC, NULL); amdgpu_encoder->enc_priv = amdgpu_atombios_encoder_get_dig_info(amdgpu_encoder); } else { drm_encoder_init(dev, encoder, &dce_v11_0_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); amdgpu_encoder->enc_priv = amdgpu_atombios_encoder_get_dig_info(amdgpu_encoder); } drm_encoder_helper_add(encoder, &dce_v11_0_dig_helper_funcs); @@ -3759,13 +3759,13 @@ static void dce_v11_0_encoder_add(struct amdgpu_device *adev, amdgpu_encoder->is_ext_encoder = true; if (amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) drm_encoder_init(dev, encoder, &dce_v11_0_encoder_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); else if (amdgpu_encoder->devices & (ATOM_DEVICE_CRT_SUPPORT)) drm_encoder_init(dev, encoder, &dce_v11_0_encoder_funcs, - DRM_MODE_ENCODER_DAC); + DRM_MODE_ENCODER_DAC, NULL); else drm_encoder_init(dev, encoder, &dce_v11_0_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); drm_encoder_helper_add(encoder, &dce_v11_0_ext_helper_funcs); break; } diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c index 42d954dc436d..d0e128c24813 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c @@ -3659,7 +3659,7 @@ static void dce_v8_0_encoder_add(struct amdgpu_device *adev, case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: drm_encoder_init(dev, encoder, &dce_v8_0_encoder_funcs, - DRM_MODE_ENCODER_DAC); + DRM_MODE_ENCODER_DAC, NULL); drm_encoder_helper_add(encoder, &dce_v8_0_dac_helper_funcs); break; case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: @@ -3670,15 +3670,15 @@ static void dce_v8_0_encoder_add(struct amdgpu_device *adev, if (amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { amdgpu_encoder->rmx_type = RMX_FULL; drm_encoder_init(dev, encoder, &dce_v8_0_encoder_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); amdgpu_encoder->enc_priv = amdgpu_atombios_encoder_get_lcd_info(amdgpu_encoder); } else if (amdgpu_encoder->devices & (ATOM_DEVICE_CRT_SUPPORT)) { drm_encoder_init(dev, encoder, &dce_v8_0_encoder_funcs, - DRM_MODE_ENCODER_DAC); + DRM_MODE_ENCODER_DAC, NULL); amdgpu_encoder->enc_priv = amdgpu_atombios_encoder_get_dig_info(amdgpu_encoder); } else { drm_encoder_init(dev, encoder, &dce_v8_0_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); amdgpu_encoder->enc_priv = amdgpu_atombios_encoder_get_dig_info(amdgpu_encoder); } drm_encoder_helper_add(encoder, &dce_v8_0_dig_helper_funcs); @@ -3696,13 +3696,13 @@ static void dce_v8_0_encoder_add(struct amdgpu_device *adev, amdgpu_encoder->is_ext_encoder = true; if (amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) drm_encoder_init(dev, encoder, &dce_v8_0_encoder_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); else if (amdgpu_encoder->devices & (ATOM_DEVICE_CRT_SUPPORT)) drm_encoder_init(dev, encoder, &dce_v8_0_encoder_funcs, - DRM_MODE_ENCODER_DAC); + DRM_MODE_ENCODER_DAC, NULL); else drm_encoder_init(dev, encoder, &dce_v8_0_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); drm_encoder_helper_add(encoder, &dce_v8_0_ext_helper_funcs); break; } diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c index 69d19f3304a5..0123458cbd83 100644 --- a/drivers/gpu/drm/ast/ast_mode.c +++ b/drivers/gpu/drm/ast/ast_mode.c @@ -751,7 +751,7 @@ static int ast_encoder_init(struct drm_device *dev) return -ENOMEM; drm_encoder_init(dev, &ast_encoder->base, &ast_enc_funcs, - DRM_MODE_ENCODER_DAC); + DRM_MODE_ENCODER_DAC, NULL); drm_encoder_helper_add(&ast_encoder->base, &ast_enc_helper_funcs); ast_encoder->base.possible_crtcs = 1; diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c index 067e4c144bd6..d1129000c5cf 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.c @@ -256,7 +256,7 @@ static int atmel_hlcdc_create_panel_output(struct drm_device *dev, &atmel_hlcdc_panel_encoder_helper_funcs); ret = drm_encoder_init(dev, &panel->base.encoder, &atmel_hlcdc_panel_encoder_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); if (ret) return ret; diff --git a/drivers/gpu/drm/bochs/bochs_kms.c b/drivers/gpu/drm/bochs/bochs_kms.c index 26bcd03a8cb6..a88be6dd34a4 100644 --- a/drivers/gpu/drm/bochs/bochs_kms.c +++ b/drivers/gpu/drm/bochs/bochs_kms.c @@ -196,7 +196,7 @@ static void bochs_encoder_init(struct drm_device *dev) encoder->possible_crtcs = 0x1; drm_encoder_init(dev, encoder, &bochs_encoder_encoder_funcs, - DRM_MODE_ENCODER_DAC); + DRM_MODE_ENCODER_DAC, NULL); drm_encoder_helper_add(encoder, &bochs_encoder_helper_funcs); } diff --git a/drivers/gpu/drm/cirrus/cirrus_mode.c b/drivers/gpu/drm/cirrus/cirrus_mode.c index 61385f2298bf..276719e52153 100644 --- a/drivers/gpu/drm/cirrus/cirrus_mode.c +++ b/drivers/gpu/drm/cirrus/cirrus_mode.c @@ -489,7 +489,7 @@ static struct drm_encoder *cirrus_encoder_init(struct drm_device *dev) encoder->possible_crtcs = 0x1; drm_encoder_init(dev, encoder, &cirrus_encoder_encoder_funcs, - DRM_MODE_ENCODER_DAC); + DRM_MODE_ENCODER_DAC, NULL); drm_encoder_helper_add(encoder, &cirrus_encoder_helper_funcs); return encoder; diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c index 20d67a06efce..b1111ea2b29d 100644 --- a/drivers/gpu/drm/drm_crtc.c +++ b/drivers/gpu/drm/drm_crtc.c @@ -1077,6 +1077,7 @@ EXPORT_SYMBOL(drm_connector_unplug_all); * @encoder: the encoder to init * @funcs: callbacks for this encoder * @encoder_type: user visible type of the encoder + * @name: printf style format string for the encoder name, or NULL for default name * * Initialises a preallocated encoder. Encoder should be * subclassed as part of driver encoder objects. @@ -1087,7 +1088,7 @@ EXPORT_SYMBOL(drm_connector_unplug_all); int drm_encoder_init(struct drm_device *dev, struct drm_encoder *encoder, const struct drm_encoder_funcs *funcs, - int encoder_type) + int encoder_type, const char *name, ...) { int ret; diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c b/drivers/gpu/drm/exynos/exynos_dp_core.c index 124fb9a56f02..cf17713907bd 100644 --- a/drivers/gpu/drm/exynos/exynos_dp_core.c +++ b/drivers/gpu/drm/exynos/exynos_dp_core.c @@ -1313,7 +1313,7 @@ static int exynos_dp_bind(struct device *dev, struct device *master, void *data) DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs); drm_encoder_init(drm_dev, encoder, &exynos_dp_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); drm_encoder_helper_add(encoder, &exynos_dp_encoder_helper_funcs); diff --git a/drivers/gpu/drm/exynos/exynos_drm_dpi.c b/drivers/gpu/drm/exynos/exynos_drm_dpi.c index c748b8790de3..1dbf8dca2d6b 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dpi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dpi.c @@ -309,7 +309,7 @@ int exynos_dpi_bind(struct drm_device *dev, struct drm_encoder *encoder) DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs); drm_encoder_init(dev, encoder, &exynos_dpi_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); drm_encoder_helper_add(encoder, &exynos_dpi_encoder_helper_funcs); diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 12b03b364703..0a99160afaaa 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1831,7 +1831,7 @@ static int exynos_dsi_bind(struct device *dev, struct device *master, DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs); drm_encoder_init(drm_dev, encoder, &exynos_dsi_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); drm_encoder_helper_add(encoder, &exynos_dsi_encoder_helper_funcs); diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c b/drivers/gpu/drm/exynos/exynos_drm_vidi.c index 669362c53f49..c34d49a8fd84 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c @@ -473,7 +473,7 @@ static int vidi_bind(struct device *dev, struct device *master, void *data) DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs); drm_encoder_init(drm_dev, encoder, &exynos_vidi_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); drm_encoder_helper_add(encoder, &exynos_vidi_encoder_helper_funcs); diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 57b675563e94..ba3543e1af6e 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -1793,7 +1793,7 @@ static int hdmi_bind(struct device *dev, struct device *master, void *data) DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs); drm_encoder_init(drm_dev, encoder, &exynos_hdmi_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); drm_encoder_helper_add(encoder, &exynos_hdmi_encoder_helper_funcs); diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c index fe8ab5da04fb..8780deba5e8a 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c @@ -57,7 +57,7 @@ int fsl_dcu_drm_encoder_create(struct fsl_dcu_drm_device *fsl_dev, encoder->possible_crtcs = 1; ret = drm_encoder_init(fsl_dev->drm, encoder, &encoder_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); if (ret < 0) return ret; diff --git a/drivers/gpu/drm/gma500/cdv_intel_crt.c b/drivers/gpu/drm/gma500/cdv_intel_crt.c index 248c33a35ebf..d0717a85c7ec 100644 --- a/drivers/gpu/drm/gma500/cdv_intel_crt.c +++ b/drivers/gpu/drm/gma500/cdv_intel_crt.c @@ -273,7 +273,7 @@ void cdv_intel_crt_init(struct drm_device *dev, encoder = &gma_encoder->base; drm_encoder_init(dev, encoder, - &cdv_intel_crt_enc_funcs, DRM_MODE_ENCODER_DAC); + &cdv_intel_crt_enc_funcs, DRM_MODE_ENCODER_DAC, NULL); gma_connector_attach_encoder(gma_connector, gma_encoder); diff --git a/drivers/gpu/drm/gma500/cdv_intel_dp.c b/drivers/gpu/drm/gma500/cdv_intel_dp.c index 17cea400ae32..7bb1f1aff932 100644 --- a/drivers/gpu/drm/gma500/cdv_intel_dp.c +++ b/drivers/gpu/drm/gma500/cdv_intel_dp.c @@ -2020,7 +2020,8 @@ cdv_intel_dp_init(struct drm_device *dev, struct psb_intel_mode_device *mode_dev encoder = &gma_encoder->base; drm_connector_init(dev, connector, &cdv_intel_dp_connector_funcs, type); - drm_encoder_init(dev, encoder, &cdv_intel_dp_enc_funcs, DRM_MODE_ENCODER_TMDS); + drm_encoder_init(dev, encoder, &cdv_intel_dp_enc_funcs, + DRM_MODE_ENCODER_TMDS, NULL); gma_connector_attach_encoder(gma_connector, gma_encoder); diff --git a/drivers/gpu/drm/gma500/cdv_intel_hdmi.c b/drivers/gpu/drm/gma500/cdv_intel_hdmi.c index e7b1e99fe2cc..ddf2d7700759 100644 --- a/drivers/gpu/drm/gma500/cdv_intel_hdmi.c +++ b/drivers/gpu/drm/gma500/cdv_intel_hdmi.c @@ -313,7 +313,7 @@ void cdv_hdmi_init(struct drm_device *dev, DRM_MODE_CONNECTOR_DVID); drm_encoder_init(dev, encoder, &psb_intel_lvds_enc_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); gma_connector_attach_encoder(gma_connector, gma_encoder); gma_encoder->type = INTEL_OUTPUT_HDMI; diff --git a/drivers/gpu/drm/gma500/cdv_intel_lvds.c b/drivers/gpu/drm/gma500/cdv_intel_lvds.c index 9e648bcb81a7..813ef23a8054 100644 --- a/drivers/gpu/drm/gma500/cdv_intel_lvds.c +++ b/drivers/gpu/drm/gma500/cdv_intel_lvds.c @@ -652,7 +652,7 @@ void cdv_intel_lvds_init(struct drm_device *dev, drm_encoder_init(dev, encoder, &cdv_intel_lvds_enc_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); gma_connector_attach_encoder(gma_connector, gma_encoder); diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c b/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c index d4813e03f5ee..1a1acd3cb049 100644 --- a/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c +++ b/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c @@ -994,7 +994,7 @@ struct mdfld_dsi_encoder *mdfld_dsi_dpi_init(struct drm_device *dev, drm_encoder_init(dev, encoder, p_funcs->encoder_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); drm_encoder_helper_add(encoder, p_funcs->encoder_helper_funcs); diff --git a/drivers/gpu/drm/gma500/oaktrail_hdmi.c b/drivers/gpu/drm/gma500/oaktrail_hdmi.c index 2310d879cdc2..2d18499d6060 100644 --- a/drivers/gpu/drm/gma500/oaktrail_hdmi.c +++ b/drivers/gpu/drm/gma500/oaktrail_hdmi.c @@ -654,7 +654,7 @@ void oaktrail_hdmi_init(struct drm_device *dev, drm_encoder_init(dev, encoder, &oaktrail_hdmi_enc_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); gma_connector_attach_encoder(gma_connector, gma_encoder); diff --git a/drivers/gpu/drm/gma500/oaktrail_lvds.c b/drivers/gpu/drm/gma500/oaktrail_lvds.c index 83bbc271bcfb..f7038f12ac76 100644 --- a/drivers/gpu/drm/gma500/oaktrail_lvds.c +++ b/drivers/gpu/drm/gma500/oaktrail_lvds.c @@ -323,7 +323,7 @@ void oaktrail_lvds_init(struct drm_device *dev, DRM_MODE_CONNECTOR_LVDS); drm_encoder_init(dev, encoder, &psb_intel_lvds_enc_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); gma_connector_attach_encoder(gma_connector, gma_encoder); gma_encoder->type = INTEL_OUTPUT_LVDS; diff --git a/drivers/gpu/drm/gma500/psb_intel_lvds.c b/drivers/gpu/drm/gma500/psb_intel_lvds.c index 0d6143702b86..b1b93317d054 100644 --- a/drivers/gpu/drm/gma500/psb_intel_lvds.c +++ b/drivers/gpu/drm/gma500/psb_intel_lvds.c @@ -723,7 +723,7 @@ void psb_intel_lvds_init(struct drm_device *dev, drm_encoder_init(dev, encoder, &psb_intel_lvds_enc_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); gma_connector_attach_encoder(gma_connector, gma_encoder); gma_encoder->type = INTEL_OUTPUT_LVDS; diff --git a/drivers/gpu/drm/gma500/psb_intel_sdvo.c b/drivers/gpu/drm/gma500/psb_intel_sdvo.c index 86f28ac1e673..e787d376ba67 100644 --- a/drivers/gpu/drm/gma500/psb_intel_sdvo.c +++ b/drivers/gpu/drm/gma500/psb_intel_sdvo.c @@ -2526,7 +2526,8 @@ bool psb_intel_sdvo_init(struct drm_device *dev, int sdvo_reg) /* encoder type will be decided later */ gma_encoder = &psb_intel_sdvo->base; gma_encoder->type = INTEL_OUTPUT_SDVO; - drm_encoder_init(dev, &gma_encoder->base, &psb_intel_sdvo_enc_funcs, 0); + drm_encoder_init(dev, &gma_encoder->base, &psb_intel_sdvo_enc_funcs, + 0, NULL); /* Read the regs to test if we can talk to the device */ for (i = 0; i < 0x40; i++) { diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index 79cb9208530e..a46248f0c9c3 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -1423,7 +1423,7 @@ static int tda998x_bind(struct device *dev, struct device *master, void *data) drm_encoder_helper_add(&priv->encoder, &tda998x_encoder_helper_funcs); ret = drm_encoder_init(drm, &priv->encoder, &tda998x_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); if (ret) goto err_encoder; diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index 27b3e610e8f0..912c0ac95f2a 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c @@ -798,7 +798,7 @@ void intel_crt_init(struct drm_device *dev) &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs, - DRM_MODE_ENCODER_DAC); + DRM_MODE_ENCODER_DAC, NULL); intel_connector_attach_encoder(intel_connector, &crt->base); diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 76ce7c2960b6..37efcd16ec81 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -3284,7 +3284,7 @@ void intel_ddi_init(struct drm_device *dev, enum port port) encoder = &intel_encoder->base; drm_encoder_init(dev, encoder, &intel_ddi_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); intel_encoder->compute_config = intel_ddi_compute_config; intel_encoder->enable = intel_enable_ddi; diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index e1ceff7ab265..9b10526cc6dd 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -5977,7 +5977,7 @@ intel_dp_init(struct drm_device *dev, encoder = &intel_encoder->base; drm_encoder_init(dev, &intel_encoder->base, &intel_dp_enc_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); intel_encoder->compute_config = intel_dp_compute_config; intel_encoder->disable = intel_disable_dp; diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c index 8c4e7dfe304c..e8d369d0a713 100644 --- a/drivers/gpu/drm/i915/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/intel_dp_mst.c @@ -536,7 +536,7 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum intel_mst->primary = intel_dig_port; drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs, - DRM_MODE_ENCODER_DPMST); + DRM_MODE_ENCODER_DPMST, NULL); intel_encoder->type = INTEL_OUTPUT_DP_MST; intel_encoder->crtc_mask = 0x7; diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index efb5a27dd49c..add2cf541218 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c @@ -1152,7 +1152,8 @@ void intel_dsi_init(struct drm_device *dev) connector = &intel_connector->base; - drm_encoder_init(dev, encoder, &intel_dsi_funcs, DRM_MODE_ENCODER_DSI); + drm_encoder_init(dev, encoder, &intel_dsi_funcs, DRM_MODE_ENCODER_DSI, + NULL); /* XXX: very likely not all of these are needed */ intel_encoder->compute_config = intel_dsi_compute_config; diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c index 7161deb2aed8..286baec979c8 100644 --- a/drivers/gpu/drm/i915/intel_dvo.c +++ b/drivers/gpu/drm/i915/intel_dvo.c @@ -429,7 +429,7 @@ void intel_dvo_init(struct drm_device *dev) intel_encoder = &intel_dvo->base; drm_encoder_init(dev, &intel_encoder->base, - &intel_dvo_enc_funcs, encoder_type); + &intel_dvo_enc_funcs, encoder_type, NULL); intel_encoder->disable = intel_disable_dvo; intel_encoder->enable = intel_enable_dvo; diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index bdd462e7c690..6dd1e09a894b 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -2165,7 +2165,7 @@ void intel_hdmi_init(struct drm_device *dev, intel_encoder = &intel_dig_port->base; drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); intel_encoder->compute_config = intel_hdmi_compute_config; if (HAS_PCH_SPLIT(dev)) { diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 61f1145f6579..0da0240caf81 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c @@ -1025,7 +1025,7 @@ void intel_lvds_init(struct drm_device *dev) DRM_MODE_CONNECTOR_LVDS); drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); intel_encoder->enable = intel_enable_lvds; intel_encoder->pre_enable = intel_pre_enable_lvds; diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 06679f164b3e..2e1da060b0e1 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c @@ -2978,7 +2978,8 @@ bool intel_sdvo_init(struct drm_device *dev, /* encoder type will be decided later */ intel_encoder = &intel_sdvo->base; intel_encoder->type = INTEL_OUTPUT_SDVO; - drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0); + drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0, + NULL); /* Read the regs to test if we can talk to the device */ for (i = 0; i < 0x40; i++) { diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c index 6bea78944cd6..948cbff6c62e 100644 --- a/drivers/gpu/drm/i915/intel_tv.c +++ b/drivers/gpu/drm/i915/intel_tv.c @@ -1645,7 +1645,7 @@ intel_tv_init(struct drm_device *dev) DRM_MODE_CONNECTOR_SVIDEO); drm_encoder_init(dev, &intel_encoder->base, &intel_tv_enc_funcs, - DRM_MODE_ENCODER_TVDAC); + DRM_MODE_ENCODER_TVDAC, NULL); intel_encoder->compute_config = intel_tv_compute_config; intel_encoder->get_config = intel_tv_get_config; diff --git a/drivers/gpu/drm/imx/dw_hdmi-imx.c b/drivers/gpu/drm/imx/dw_hdmi-imx.c index 98605ea2ad9d..35fcf6b84537 100644 --- a/drivers/gpu/drm/imx/dw_hdmi-imx.c +++ b/drivers/gpu/drm/imx/dw_hdmi-imx.c @@ -251,7 +251,7 @@ static int dw_hdmi_imx_bind(struct device *dev, struct device *master, drm_encoder_helper_add(encoder, &dw_hdmi_imx_encoder_helper_funcs); drm_encoder_init(drm, encoder, &dw_hdmi_imx_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); return dw_hdmi_bind(dev, master, data, encoder, iores, irq, plat_data); } diff --git a/drivers/gpu/drm/imx/imx-ldb.c b/drivers/gpu/drm/imx/imx-ldb.c index abacc8f67469..c79a61b67ded 100644 --- a/drivers/gpu/drm/imx/imx-ldb.c +++ b/drivers/gpu/drm/imx/imx-ldb.c @@ -422,7 +422,7 @@ static int imx_ldb_register(struct drm_device *drm, drm_encoder_helper_add(&imx_ldb_ch->encoder, &imx_ldb_encoder_helper_funcs); drm_encoder_init(drm, &imx_ldb_ch->encoder, &imx_ldb_encoder_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); drm_connector_helper_add(&imx_ldb_ch->connector, &imx_ldb_connector_helper_funcs); diff --git a/drivers/gpu/drm/imx/imx-tve.c b/drivers/gpu/drm/imx/imx-tve.c index f9597146dc67..e61a8fca77cd 100644 --- a/drivers/gpu/drm/imx/imx-tve.c +++ b/drivers/gpu/drm/imx/imx-tve.c @@ -508,7 +508,7 @@ static int imx_tve_register(struct drm_device *drm, struct imx_tve *tve) drm_encoder_helper_add(&tve->encoder, &imx_tve_encoder_helper_funcs); drm_encoder_init(drm, &tve->encoder, &imx_tve_encoder_funcs, - encoder_type); + encoder_type, NULL); drm_connector_helper_add(&tve->connector, &imx_tve_connector_helper_funcs); diff --git a/drivers/gpu/drm/imx/parallel-display.c b/drivers/gpu/drm/imx/parallel-display.c index 2e9b9f1b5cd2..fcbe4d2eeabf 100644 --- a/drivers/gpu/drm/imx/parallel-display.c +++ b/drivers/gpu/drm/imx/parallel-display.c @@ -192,7 +192,7 @@ static int imx_pd_register(struct drm_device *drm, drm_encoder_helper_add(&imxpd->encoder, &imx_pd_encoder_helper_funcs); drm_encoder_init(drm, &imxpd->encoder, &imx_pd_encoder_funcs, - DRM_MODE_ENCODER_NONE); + DRM_MODE_ENCODER_NONE, NULL); drm_connector_helper_add(&imxpd->connector, &imx_pd_connector_helper_funcs); diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index c99d3fe12881..31802128dfbb 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -1538,7 +1538,7 @@ static struct drm_encoder *mga_encoder_init(struct drm_device *dev) encoder->possible_crtcs = 0x1; drm_encoder_init(dev, encoder, &mga_encoder_encoder_funcs, - DRM_MODE_ENCODER_DAC); + DRM_MODE_ENCODER_DAC, NULL); drm_encoder_helper_add(encoder, &mga_encoder_helper_funcs); return encoder; diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_dtv_encoder.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_dtv_encoder.c index 89614c6a6c1b..a21df54cb50f 100644 --- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_dtv_encoder.c +++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_dtv_encoder.c @@ -262,7 +262,7 @@ struct drm_encoder *mdp4_dtv_encoder_init(struct drm_device *dev) encoder = &mdp4_dtv_encoder->base; drm_encoder_init(dev, encoder, &mdp4_dtv_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); drm_encoder_helper_add(encoder, &mdp4_dtv_encoder_helper_funcs); mdp4_dtv_encoder->src_clk = devm_clk_get(dev->dev, "src_clk"); diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_lcdc_encoder.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_lcdc_encoder.c index 4cd6e721aa0a..f824c643a7d1 100644 --- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_lcdc_encoder.c +++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_lcdc_encoder.c @@ -460,7 +460,7 @@ struct drm_encoder *mdp4_lcdc_encoder_init(struct drm_device *dev, encoder = &mdp4_lcdc_encoder->base; drm_encoder_init(dev, encoder, &mdp4_lcdc_encoder_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); drm_encoder_helper_add(encoder, &mdp4_lcdc_encoder_helper_funcs); /* TODO: do we need different pll in other cases? */ diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cmd_encoder.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cmd_encoder.c index 8e6c9b598a57..1aa21dba663d 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cmd_encoder.c +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cmd_encoder.c @@ -326,7 +326,7 @@ struct drm_encoder *mdp5_cmd_encoder_init(struct drm_device *dev, mdp5_cmd_enc->ctl = ctl; drm_encoder_init(dev, encoder, &mdp5_cmd_encoder_funcs, - DRM_MODE_ENCODER_DSI); + DRM_MODE_ENCODER_DSI, NULL); drm_encoder_helper_add(encoder, &mdp5_cmd_encoder_helper_funcs); diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c index c9e32b08a7a0..278e307c36fd 100644 --- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c +++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c @@ -354,7 +354,7 @@ struct drm_encoder *mdp5_encoder_init(struct drm_device *dev, spin_lock_init(&mdp5_encoder->intf_lock); - drm_encoder_init(dev, encoder, &mdp5_encoder_funcs, enc_type); + drm_encoder_init(dev, encoder, &mdp5_encoder_funcs, enc_type, NULL); drm_encoder_helper_add(encoder, &mdp5_encoder_helper_funcs); diff --git a/drivers/gpu/drm/nouveau/dispnv04/dac.c b/drivers/gpu/drm/nouveau/dispnv04/dac.c index 6c442def403d..b48eec395f07 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/dac.c +++ b/drivers/gpu/drm/nouveau/dispnv04/dac.c @@ -549,7 +549,8 @@ nv04_dac_create(struct drm_connector *connector, struct dcb_output *entry) else helper = &nv04_dac_helper_funcs; - drm_encoder_init(dev, encoder, &nv04_dac_funcs, DRM_MODE_ENCODER_DAC); + drm_encoder_init(dev, encoder, &nv04_dac_funcs, DRM_MODE_ENCODER_DAC, + NULL); drm_encoder_helper_add(encoder, helper); encoder->possible_crtcs = entry->heads; diff --git a/drivers/gpu/drm/nouveau/dispnv04/dfp.c b/drivers/gpu/drm/nouveau/dispnv04/dfp.c index 4c5fb89d74db..05bfd151d1d8 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/dfp.c +++ b/drivers/gpu/drm/nouveau/dispnv04/dfp.c @@ -705,7 +705,7 @@ nv04_dfp_create(struct drm_connector *connector, struct dcb_output *entry) nv_encoder->dcb = entry; nv_encoder->or = ffs(entry->or) - 1; - drm_encoder_init(connector->dev, encoder, &nv04_dfp_funcs, type); + drm_encoder_init(connector->dev, encoder, &nv04_dfp_funcs, type, NULL); drm_encoder_helper_add(encoder, helper); encoder->possible_crtcs = entry->heads; diff --git a/drivers/gpu/drm/nouveau/dispnv04/tvnv04.c b/drivers/gpu/drm/nouveau/dispnv04/tvnv04.c index 91d689400d2e..54e9fb9eb5c0 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/tvnv04.c +++ b/drivers/gpu/drm/nouveau/dispnv04/tvnv04.c @@ -223,7 +223,8 @@ nv04_tv_create(struct drm_connector *connector, struct dcb_output *entry) /* Initialize the common members */ encoder = to_drm_encoder(nv_encoder); - drm_encoder_init(dev, encoder, &nv04_tv_funcs, DRM_MODE_ENCODER_TVDAC); + drm_encoder_init(dev, encoder, &nv04_tv_funcs, DRM_MODE_ENCODER_TVDAC, + NULL); drm_encoder_helper_add(encoder, &nv04_tv_helper_funcs); nv_encoder->enc_save = drm_i2c_encoder_save; diff --git a/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c b/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c index ff8c55866b18..d9644c0c5a83 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c +++ b/drivers/gpu/drm/nouveau/dispnv04/tvnv17.c @@ -814,7 +814,8 @@ nv17_tv_create(struct drm_connector *connector, struct dcb_output *entry) tv_enc->base.dcb = entry; tv_enc->base.or = ffs(entry->or) - 1; - drm_encoder_init(dev, encoder, &nv17_tv_funcs, DRM_MODE_ENCODER_TVDAC); + drm_encoder_init(dev, encoder, &nv17_tv_funcs, DRM_MODE_ENCODER_TVDAC, + NULL); drm_encoder_helper_add(encoder, &nv17_tv_helper_funcs); to_encoder_slave(encoder)->slave_funcs = &nv17_tv_slave_funcs; diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index a240939beca4..44e1952582aa 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c @@ -1718,7 +1718,7 @@ nv50_dac_create(struct drm_connector *connector, struct dcb_output *dcbe) encoder = to_drm_encoder(nv_encoder); encoder->possible_crtcs = dcbe->heads; encoder->possible_clones = 0; - drm_encoder_init(connector->dev, encoder, &nv50_dac_func, type); + drm_encoder_init(connector->dev, encoder, &nv50_dac_func, type, NULL); drm_encoder_helper_add(encoder, &nv50_dac_hfunc); drm_mode_connector_attach_encoder(connector, encoder); @@ -2126,7 +2126,7 @@ nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe) encoder = to_drm_encoder(nv_encoder); encoder->possible_crtcs = dcbe->heads; encoder->possible_clones = 0; - drm_encoder_init(connector->dev, encoder, &nv50_sor_func, type); + drm_encoder_init(connector->dev, encoder, &nv50_sor_func, type, NULL); drm_encoder_helper_add(encoder, &nv50_sor_hfunc); drm_mode_connector_attach_encoder(connector, encoder); @@ -2306,7 +2306,7 @@ nv50_pior_create(struct drm_connector *connector, struct dcb_output *dcbe) encoder = to_drm_encoder(nv_encoder); encoder->possible_crtcs = dcbe->heads; encoder->possible_clones = 0; - drm_encoder_init(connector->dev, encoder, &nv50_pior_func, type); + drm_encoder_init(connector->dev, encoder, &nv50_pior_func, type, NULL); drm_encoder_helper_add(encoder, &nv50_pior_hfunc); drm_mode_connector_attach_encoder(connector, encoder); diff --git a/drivers/gpu/drm/omapdrm/omap_encoder.c b/drivers/gpu/drm/omapdrm/omap_encoder.c index 7d9b32a0eb43..0c104ad7ef66 100644 --- a/drivers/gpu/drm/omapdrm/omap_encoder.c +++ b/drivers/gpu/drm/omapdrm/omap_encoder.c @@ -178,7 +178,7 @@ struct drm_encoder *omap_encoder_init(struct drm_device *dev, encoder = &omap_encoder->base; drm_encoder_init(dev, encoder, &omap_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); drm_encoder_helper_add(encoder, &omap_encoder_helper_funcs); return encoder; diff --git a/drivers/gpu/drm/qxl/qxl_display.c b/drivers/gpu/drm/qxl/qxl_display.c index ebf7f3946a65..9be1af41e8d7 100644 --- a/drivers/gpu/drm/qxl/qxl_display.c +++ b/drivers/gpu/drm/qxl/qxl_display.c @@ -968,7 +968,7 @@ static int qdev_output_init(struct drm_device *dev, int num_output) &qxl_connector_funcs, DRM_MODE_CONNECTOR_VIRTUAL); drm_encoder_init(dev, &qxl_output->enc, &qxl_enc_funcs, - DRM_MODE_ENCODER_VIRTUAL); + DRM_MODE_ENCODER_VIRTUAL, NULL); /* we get HPD via client monitors config */ connector->polled = DRM_CONNECTOR_POLL_HPD; diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c index bb292143997e..01b20e14a247 100644 --- a/drivers/gpu/drm/radeon/atombios_encoders.c +++ b/drivers/gpu/drm/radeon/atombios_encoders.c @@ -2767,23 +2767,27 @@ radeon_add_atom_encoder(struct drm_device *dev, case ENCODER_OBJECT_ID_INTERNAL_LVTM1: if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { radeon_encoder->rmx_type = RMX_FULL; - drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_LVDS); + drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, + DRM_MODE_ENCODER_LVDS, NULL); radeon_encoder->enc_priv = radeon_atombios_get_lvds_info(radeon_encoder); } else { - drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TMDS); + drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, + DRM_MODE_ENCODER_TMDS, NULL); radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder); } drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs); break; case ENCODER_OBJECT_ID_INTERNAL_DAC1: - drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_DAC); + drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, + DRM_MODE_ENCODER_DAC, NULL); radeon_encoder->enc_priv = radeon_atombios_set_dac_info(radeon_encoder); drm_encoder_helper_add(encoder, &radeon_atom_dac_helper_funcs); break; case ENCODER_OBJECT_ID_INTERNAL_DAC2: case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: - drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TVDAC); + drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, + DRM_MODE_ENCODER_TVDAC, NULL); radeon_encoder->enc_priv = radeon_atombios_set_dac_info(radeon_encoder); drm_encoder_helper_add(encoder, &radeon_atom_dac_helper_funcs); break; @@ -2797,13 +2801,16 @@ radeon_add_atom_encoder(struct drm_device *dev, case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3: if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { radeon_encoder->rmx_type = RMX_FULL; - drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_LVDS); + drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, + DRM_MODE_ENCODER_LVDS, NULL); radeon_encoder->enc_priv = radeon_atombios_get_lvds_info(radeon_encoder); } else if (radeon_encoder->devices & (ATOM_DEVICE_CRT_SUPPORT)) { - drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_DAC); + drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, + DRM_MODE_ENCODER_DAC, NULL); radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder); } else { - drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TMDS); + drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, + DRM_MODE_ENCODER_TMDS, NULL); radeon_encoder->enc_priv = radeon_atombios_set_dig_info(radeon_encoder); } drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs); @@ -2820,11 +2827,14 @@ radeon_add_atom_encoder(struct drm_device *dev, /* these are handled by the primary encoders */ radeon_encoder->is_ext_encoder = true; if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) - drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_LVDS); + drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, + DRM_MODE_ENCODER_LVDS, NULL); else if (radeon_encoder->devices & (ATOM_DEVICE_CRT_SUPPORT)) - drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_DAC); + drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, + DRM_MODE_ENCODER_DAC, NULL); else - drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_TMDS); + drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, + DRM_MODE_ENCODER_TMDS, NULL); drm_encoder_helper_add(encoder, &radeon_atom_ext_helper_funcs); break; } diff --git a/drivers/gpu/drm/radeon/radeon_dp_mst.c b/drivers/gpu/drm/radeon/radeon_dp_mst.c index 744f5c49c664..94323f51ffcf 100644 --- a/drivers/gpu/drm/radeon/radeon_dp_mst.c +++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c @@ -641,7 +641,7 @@ radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector) } drm_encoder_init(dev, &radeon_encoder->base, &radeon_dp_mst_enc_funcs, - DRM_MODE_ENCODER_DPMST); + DRM_MODE_ENCODER_DPMST, NULL); drm_encoder_helper_add(encoder, &radeon_mst_helper_funcs); mst_enc = radeon_encoder->enc_priv; diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c index 30de43366eae..88dc973fb209 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c @@ -1772,7 +1772,8 @@ radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, uint32_ switch (radeon_encoder->encoder_id) { case ENCODER_OBJECT_ID_INTERNAL_LVDS: encoder->possible_crtcs = 0x1; - drm_encoder_init(dev, encoder, &radeon_legacy_lvds_enc_funcs, DRM_MODE_ENCODER_LVDS); + drm_encoder_init(dev, encoder, &radeon_legacy_lvds_enc_funcs, + DRM_MODE_ENCODER_LVDS, NULL); drm_encoder_helper_add(encoder, &radeon_legacy_lvds_helper_funcs); if (rdev->is_atom_bios) radeon_encoder->enc_priv = radeon_atombios_get_lvds_info(radeon_encoder); @@ -1781,12 +1782,14 @@ radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, uint32_ radeon_encoder->rmx_type = RMX_FULL; break; case ENCODER_OBJECT_ID_INTERNAL_TMDS1: - drm_encoder_init(dev, encoder, &radeon_legacy_tmds_int_enc_funcs, DRM_MODE_ENCODER_TMDS); + drm_encoder_init(dev, encoder, &radeon_legacy_tmds_int_enc_funcs, + DRM_MODE_ENCODER_TMDS, NULL); drm_encoder_helper_add(encoder, &radeon_legacy_tmds_int_helper_funcs); radeon_encoder->enc_priv = radeon_legacy_get_tmds_info(radeon_encoder); break; case ENCODER_OBJECT_ID_INTERNAL_DAC1: - drm_encoder_init(dev, encoder, &radeon_legacy_primary_dac_enc_funcs, DRM_MODE_ENCODER_DAC); + drm_encoder_init(dev, encoder, &radeon_legacy_primary_dac_enc_funcs, + DRM_MODE_ENCODER_DAC, NULL); drm_encoder_helper_add(encoder, &radeon_legacy_primary_dac_helper_funcs); if (rdev->is_atom_bios) radeon_encoder->enc_priv = radeon_atombios_get_primary_dac_info(radeon_encoder); @@ -1794,7 +1797,8 @@ radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, uint32_ radeon_encoder->enc_priv = radeon_combios_get_primary_dac_info(radeon_encoder); break; case ENCODER_OBJECT_ID_INTERNAL_DAC2: - drm_encoder_init(dev, encoder, &radeon_legacy_tv_dac_enc_funcs, DRM_MODE_ENCODER_TVDAC); + drm_encoder_init(dev, encoder, &radeon_legacy_tv_dac_enc_funcs, + DRM_MODE_ENCODER_TVDAC, NULL); drm_encoder_helper_add(encoder, &radeon_legacy_tv_dac_helper_funcs); if (rdev->is_atom_bios) radeon_encoder->enc_priv = radeon_atombios_get_tv_dac_info(radeon_encoder); @@ -1802,7 +1806,8 @@ radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, uint32_ radeon_encoder->enc_priv = radeon_combios_get_tv_dac_info(radeon_encoder); break; case ENCODER_OBJECT_ID_INTERNAL_DVO1: - drm_encoder_init(dev, encoder, &radeon_legacy_tmds_ext_enc_funcs, DRM_MODE_ENCODER_TMDS); + drm_encoder_init(dev, encoder, &radeon_legacy_tmds_ext_enc_funcs, + DRM_MODE_ENCODER_TMDS, NULL); drm_encoder_helper_add(encoder, &radeon_legacy_tmds_ext_helper_funcs); if (!rdev->is_atom_bios) radeon_encoder->enc_priv = radeon_legacy_get_ext_tmds_info(radeon_encoder); diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c index d0ae1e8009c6..c08700757feb 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c @@ -173,7 +173,7 @@ int rcar_du_encoder_init(struct rcar_du_device *rcdu, goto done; } else { ret = drm_encoder_init(rcdu->ddev, encoder, &encoder_funcs, - encoder_type); + encoder_type, NULL); if (ret < 0) goto done; diff --git a/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c b/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c index 81da8419282b..11267de26a51 100644 --- a/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c +++ b/drivers/gpu/drm/rcar-du/rcar_du_hdmienc.c @@ -151,7 +151,7 @@ int rcar_du_hdmienc_init(struct rcar_du_device *rcdu, goto error; ret = drm_encoder_init(rcdu->ddev, encoder, &encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); if (ret < 0) goto error; diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index 80d6fc8a5cee..525b5a81e96e 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -295,7 +295,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, drm_encoder_helper_add(encoder, &dw_hdmi_rockchip_encoder_helper_funcs); drm_encoder_init(drm, encoder, &dw_hdmi_rockchip_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); return dw_hdmi_bind(dev, master, data, encoder, iores, irq, plat_data); } diff --git a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c index e9272b0a8592..b80802f55143 100644 --- a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c +++ b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c @@ -613,7 +613,7 @@ int shmob_drm_encoder_create(struct shmob_drm_device *sdev) encoder->possible_crtcs = 1; ret = drm_encoder_init(sdev->ddev, encoder, &encoder_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); if (ret < 0) return ret; diff --git a/drivers/gpu/drm/sti/sti_tvout.c b/drivers/gpu/drm/sti/sti_tvout.c index c8a4c5dae2b6..f2afcf5438b8 100644 --- a/drivers/gpu/drm/sti/sti_tvout.c +++ b/drivers/gpu/drm/sti/sti_tvout.c @@ -512,7 +512,8 @@ sti_tvout_create_dvo_encoder(struct drm_device *dev, drm_encoder->possible_clones = 1 << 0; drm_encoder_init(dev, drm_encoder, - &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_LVDS); + &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_LVDS, + NULL); drm_encoder_helper_add(drm_encoder, &sti_dvo_encoder_helper_funcs); @@ -564,7 +565,7 @@ static struct drm_encoder *sti_tvout_create_hda_encoder(struct drm_device *dev, drm_encoder->possible_clones = 1 << 0; drm_encoder_init(dev, drm_encoder, - &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_DAC); + &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_DAC, NULL); drm_encoder_helper_add(drm_encoder, &sti_hda_encoder_helper_funcs); @@ -613,7 +614,7 @@ static struct drm_encoder *sti_tvout_create_hdmi_encoder(struct drm_device *dev, drm_encoder->possible_clones = 1 << 1; drm_encoder_init(dev, drm_encoder, - &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_TMDS); + &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_TMDS, NULL); drm_encoder_helper_add(drm_encoder, &sti_hdmi_encoder_helper_funcs); diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c index f0a138ef68ce..50d46ae3786b 100644 --- a/drivers/gpu/drm/tegra/dsi.c +++ b/drivers/gpu/drm/tegra/dsi.c @@ -1023,7 +1023,7 @@ static int tegra_dsi_init(struct host1x_client *client) drm_encoder_init(drm, &dsi->output.encoder, &tegra_dsi_encoder_funcs, - DRM_MODE_ENCODER_DSI); + DRM_MODE_ENCODER_DSI, NULL); drm_encoder_helper_add(&dsi->output.encoder, &tegra_dsi_encoder_helper_funcs); diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c index 52b32cbd9de6..b7ef4929e347 100644 --- a/drivers/gpu/drm/tegra/hdmi.c +++ b/drivers/gpu/drm/tegra/hdmi.c @@ -1320,7 +1320,7 @@ static int tegra_hdmi_init(struct host1x_client *client) hdmi->output.connector.dpms = DRM_MODE_DPMS_OFF; drm_encoder_init(drm, &hdmi->output.encoder, &tegra_hdmi_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); drm_encoder_helper_add(&hdmi->output.encoder, &tegra_hdmi_encoder_helper_funcs); diff --git a/drivers/gpu/drm/tegra/rgb.c b/drivers/gpu/drm/tegra/rgb.c index bc9735b4ad60..e246334e0252 100644 --- a/drivers/gpu/drm/tegra/rgb.c +++ b/drivers/gpu/drm/tegra/rgb.c @@ -287,7 +287,7 @@ int tegra_dc_rgb_init(struct drm_device *drm, struct tegra_dc *dc) output->connector.dpms = DRM_MODE_DPMS_OFF; drm_encoder_init(drm, &output->encoder, &tegra_rgb_encoder_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); drm_encoder_helper_add(&output->encoder, &tegra_rgb_encoder_helper_funcs); diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c index 3eff7cf75d25..3e012ee25242 100644 --- a/drivers/gpu/drm/tegra/sor.c +++ b/drivers/gpu/drm/tegra/sor.c @@ -2178,7 +2178,7 @@ static int tegra_sor_init(struct host1x_client *client) sor->output.connector.dpms = DRM_MODE_DPMS_OFF; drm_encoder_init(drm, &sor->output.encoder, &tegra_sor_encoder_funcs, - encoder); + encoder, NULL); drm_encoder_helper_add(&sor->output.encoder, helpers); drm_mode_connector_attach_encoder(&sor->output.connector, diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel.c b/drivers/gpu/drm/tilcdc/tilcdc_panel.c index 0af8bed7ce1e..4dda6e2f464b 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_panel.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_panel.c @@ -128,7 +128,7 @@ static struct drm_encoder *panel_encoder_create(struct drm_device *dev, encoder->possible_crtcs = 1; ret = drm_encoder_init(dev, encoder, &panel_encoder_funcs, - DRM_MODE_ENCODER_LVDS); + DRM_MODE_ENCODER_LVDS, NULL); if (ret < 0) goto fail; diff --git a/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c b/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c index 354c47ca6374..5052a8af7ecb 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c @@ -138,7 +138,7 @@ static struct drm_encoder *tfp410_encoder_create(struct drm_device *dev, encoder->possible_crtcs = 1; ret = drm_encoder_init(dev, encoder, &tfp410_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); if (ret < 0) goto fail; diff --git a/drivers/gpu/drm/udl/udl_encoder.c b/drivers/gpu/drm/udl/udl_encoder.c index 4052c4656498..a181a647fcf9 100644 --- a/drivers/gpu/drm/udl/udl_encoder.c +++ b/drivers/gpu/drm/udl/udl_encoder.c @@ -73,7 +73,8 @@ struct drm_encoder *udl_encoder_init(struct drm_device *dev) if (!encoder) return NULL; - drm_encoder_init(dev, encoder, &udl_enc_funcs, DRM_MODE_ENCODER_TMDS); + drm_encoder_init(dev, encoder, &udl_enc_funcs, DRM_MODE_ENCODER_TMDS, + NULL); drm_encoder_helper_add(encoder, &udl_helper_funcs); encoder->possible_crtcs = 1; return encoder; diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index da9a36d6e1d1..c69c0460196b 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -519,7 +519,7 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) WARN_ON_ONCE((HD_READ(VC4_HD_M_CTL) & VC4_HD_M_ENABLE) == 0); drm_encoder_init(drm, hdmi->encoder, &vc4_hdmi_encoder_funcs, - DRM_MODE_ENCODER_TMDS); + DRM_MODE_ENCODER_TMDS, NULL); drm_encoder_helper_add(hdmi->encoder, &vc4_hdmi_encoder_helper_funcs); hdmi->connector = vc4_hdmi_connector_init(drm, hdmi->encoder); diff --git a/drivers/gpu/drm/virtio/virtgpu_display.c b/drivers/gpu/drm/virtio/virtgpu_display.c index ef4cef0c8ece..588a7aec60bf 100644 --- a/drivers/gpu/drm/virtio/virtgpu_display.c +++ b/drivers/gpu/drm/virtio/virtgpu_display.c @@ -441,7 +441,7 @@ static int vgdev_output_init(struct virtio_gpu_device *vgdev, int index) drm_connector_helper_add(connector, &virtio_gpu_conn_helper_funcs); drm_encoder_init(dev, encoder, &virtio_gpu_enc_funcs, - DRM_MODE_ENCODER_VIRTUAL); + DRM_MODE_ENCODER_VIRTUAL, NULL); drm_encoder_helper_add(encoder, &virtio_gpu_enc_helper_funcs); encoder->possible_crtcs = 1 << index; diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c index c1c09b338cc1..2aff5e51d926 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c @@ -363,7 +363,7 @@ static int vmw_ldu_init(struct vmw_private *dev_priv, unsigned unit) connector->status = vmw_du_connector_detect(connector, true); drm_encoder_init(dev, encoder, &vmw_legacy_encoder_funcs, - DRM_MODE_ENCODER_VIRTUAL); + DRM_MODE_ENCODER_VIRTUAL, NULL); drm_mode_connector_attach_encoder(connector, encoder); encoder->possible_crtcs = (1 << unit); encoder->possible_clones = 0; diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c index 5379dc4bbcac..6bb7af37934a 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c @@ -597,7 +597,7 @@ static int vmw_sou_init(struct vmw_private *dev_priv, unsigned unit) connector->status = vmw_du_connector_detect(connector, true); drm_encoder_init(dev, encoder, &vmw_screen_object_encoder_funcs, - DRM_MODE_ENCODER_VIRTUAL); + DRM_MODE_ENCODER_VIRTUAL, NULL); drm_mode_connector_attach_encoder(connector, encoder); encoder->possible_crtcs = (1 << unit); encoder->possible_clones = 0; diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c index 05375a8cc129..45e72c2f15cd 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c @@ -1145,7 +1145,7 @@ static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit) connector->status = vmw_du_connector_detect(connector, false); drm_encoder_init(dev, encoder, &vmw_stdu_encoder_funcs, - DRM_MODE_ENCODER_VIRTUAL); + DRM_MODE_ENCODER_VIRTUAL, NULL); drm_mode_connector_attach_encoder(connector, encoder); encoder->possible_crtcs = (1 << unit); encoder->possible_clones = 0; diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index a6f0e25cbd51..5b5e6b650c11 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -2196,10 +2196,11 @@ void drm_bridge_mode_set(struct drm_bridge *bridge, void drm_bridge_pre_enable(struct drm_bridge *bridge); void drm_bridge_enable(struct drm_bridge *bridge); -extern int drm_encoder_init(struct drm_device *dev, - struct drm_encoder *encoder, - const struct drm_encoder_funcs *funcs, - int encoder_type); +extern __printf(5, 6) +int drm_encoder_init(struct drm_device *dev, + struct drm_encoder *encoder, + const struct drm_encoder_funcs *funcs, + int encoder_type, const char *name, ...); /** * drm_encoder_crtc_ok - can a given crtc drive a given encoder? -- cgit v1.2.3 From 28c508ece6831e49d36cfa868f2a6c9d9f1c920e Mon Sep 17 00:00:00 2001 From: Ville Syrjälä Date: Tue, 15 Dec 2015 12:21:12 +0100 Subject: drm/rockchip: Constify function pointer structs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Moves a bunch of junk to .rodata from .data. drivers/gpu/drm/rockchip/dw_hdmi-rockchip.ko: -.rodata 772 +.rodata 828 -.data 148 +.data 92 drivers/gpu/drm/rockchip/rockchipdrm.ko: -.rodata 748 +.rodata 760 -.data 448 +.data 436 Signed-off-by: Ville Syrjälä Reviewed-by: Alex Deucher Signed-off-by: Thierry Reding Signed-off-by: Boris Brezillon Link: http://patchwork.freedesktop.org/patch/msgid/1450178476-26284-25-git-send-email-boris.brezillon@free-electrons.com Signed-off-by: Daniel Vetter --- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 4 ++-- drivers/gpu/drm/rockchip/rockchip_drm_fb.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index 525b5a81e96e..bddcabd7a370 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -173,7 +173,7 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector, return (valid) ? MODE_OK : MODE_BAD; } -static struct drm_encoder_funcs dw_hdmi_rockchip_encoder_funcs = { +static const struct drm_encoder_funcs dw_hdmi_rockchip_encoder_funcs = { .destroy = drm_encoder_cleanup, }; @@ -218,7 +218,7 @@ static void dw_hdmi_rockchip_encoder_prepare(struct drm_encoder *encoder) ROCKCHIP_OUT_MODE_AAAA); } -static struct drm_encoder_helper_funcs dw_hdmi_rockchip_encoder_helper_funcs = { +static const struct drm_encoder_helper_funcs dw_hdmi_rockchip_encoder_helper_funcs = { .mode_fixup = dw_hdmi_rockchip_encoder_mode_fixup, .mode_set = dw_hdmi_rockchip_encoder_mode_set, .prepare = dw_hdmi_rockchip_encoder_prepare, diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c index b8ac5911c102..621f25c463bd 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c @@ -66,7 +66,7 @@ static int rockchip_drm_fb_create_handle(struct drm_framebuffer *fb, rockchip_fb->obj[0], handle); } -static struct drm_framebuffer_funcs rockchip_drm_fb_funcs = { +static const struct drm_framebuffer_funcs rockchip_drm_fb_funcs = { .destroy = rockchip_drm_fb_destroy, .create_handle = rockchip_drm_fb_create_handle, }; -- cgit v1.2.3 From 399368aab39135cd9bc5e20b55b8b4d48658f904 Mon Sep 17 00:00:00 2001 From: Nicolas Iooss Date: Fri, 11 Dec 2015 11:20:27 +0100 Subject: drm: make drm_dev_set_unique() not use a format string drm_dev_set_unique() uses a format string to define the unique name of a device. This feature is not used as currently all the calls to this function either use "%s" as a format string or directly use dev_name(). Even though this second kind of call does not introduce security problems, because there cannot be "%" characters in dev_name() results, gcc issues a warning when building with -Wformat-security flag ("warning: format string is not a string literal (potentially insecure)"). This warning is useful to find real bugs like the one fixed by commit 3958b79266b1 ("configfs: fix kernel infoleak through user-controlled format string"). False positives which do not bring an extra value make the work of finding real bugs harder. Therefore remove the format-string feature from drm_dev_set_unique(). Signed-off-by: Nicolas Iooss Link: http://patchwork.freedesktop.org/patch/msgid/1449829228-4425-1-git-send-email-nicolas.iooss_linux@m4x.org Signed-off-by: Daniel Vetter --- drivers/gpu/drm/drm_drv.c | 17 ++++++----------- drivers/gpu/drm/nouveau/nouveau_drm.c | 2 +- drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 2 +- include/drm/drmP.h | 2 +- 4 files changed, 9 insertions(+), 14 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c index 7dd6728dd092..eaa4316f3c45 100644 --- a/drivers/gpu/drm/drm_drv.c +++ b/drivers/gpu/drm/drm_drv.c @@ -797,23 +797,18 @@ EXPORT_SYMBOL(drm_dev_unregister); /** * drm_dev_set_unique - Set the unique name of a DRM device * @dev: device of which to set the unique name - * @fmt: format string for unique name + * @name: unique name * - * Sets the unique name of a DRM device using the specified format string and - * a variable list of arguments. Drivers can use this at driver probe time if - * the unique name of the devices they drive is static. + * Sets the unique name of a DRM device using the specified string. Drivers + * can use this at driver probe time if the unique name of the devices they + * drive is static. * * Return: 0 on success or a negative error code on failure. */ -int drm_dev_set_unique(struct drm_device *dev, const char *fmt, ...) +int drm_dev_set_unique(struct drm_device *dev, const char *name) { - va_list ap; - kfree(dev->unique); - - va_start(ap, fmt); - dev->unique = kvasprintf(GFP_KERNEL, fmt, ap); - va_end(ap); + dev->unique = kstrdup(name, GFP_KERNEL); return dev->unique ? 0 : -ENOMEM; } diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c index 1d3ee5179ab8..2d23f95f17ce 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drm.c +++ b/drivers/gpu/drm/nouveau/nouveau_drm.c @@ -1046,7 +1046,7 @@ nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, goto err_free; } - err = drm_dev_set_unique(drm, "%s", dev_name(&pdev->dev)); + err = drm_dev_set_unique(drm, dev_name(&pdev->dev)); if (err < 0) goto err_free; diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c index f22e1e1ee64a..215d6c44af55 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c @@ -450,7 +450,7 @@ static int rockchip_drm_bind(struct device *dev) if (!drm) return -ENOMEM; - ret = drm_dev_set_unique(drm, "%s", dev_name(dev)); + ret = drm_dev_set_unique(drm, dev_name(dev)); if (ret) goto err_free; diff --git a/include/drm/drmP.h b/include/drm/drmP.h index 5531d7bbe851..04caa8f8a52f 100644 --- a/include/drm/drmP.h +++ b/include/drm/drmP.h @@ -1068,7 +1068,7 @@ void drm_dev_ref(struct drm_device *dev); void drm_dev_unref(struct drm_device *dev); int drm_dev_register(struct drm_device *dev, unsigned long flags); void drm_dev_unregister(struct drm_device *dev); -int drm_dev_set_unique(struct drm_device *dev, const char *fmt, ...); +int drm_dev_set_unique(struct drm_device *dev, const char *name); struct drm_minor *drm_minor_acquire(unsigned int minor_id); void drm_minor_release(struct drm_minor *minor); -- cgit v1.2.3 From e112e593b215c394c0303dbf0534db0928e87967 Mon Sep 17 00:00:00 2001 From: Nicolas Iooss Date: Fri, 11 Dec 2015 11:20:28 +0100 Subject: drm: use dev_name as default unique name in drm_dev_alloc() The following code pattern exists in some DRM drivers: ddev = drm_dev_alloc(&driver, parent_dev); drm_dev_set_unique(ddev, dev_name(parent_dev)); (Sometimes dev_name(ddev->dev) is used, which is the same.) As suggested in http://lists.freedesktop.org/archives/dri-devel/2015-December/096441.html, the unique name of a new DRM device can be set as dev_name(parent_dev) when parent_dev is not NULL (vgem is a special case). Signed-off-by: Nicolas Iooss Acked-by: Boris Brezillon Signed-off-by: Daniel Vetter --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 4 ---- drivers/gpu/drm/drm_drv.c | 9 +++++++++ drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 1 - drivers/gpu/drm/nouveau/nouveau_drm.c | 4 ---- drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 4 ---- drivers/gpu/drm/tegra/drm.c | 1 - drivers/gpu/drm/vc4/vc4_drv.c | 2 -- 7 files changed, 9 insertions(+), 16 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c index bf64380d8d56..a45b32ba029e 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c @@ -738,10 +738,6 @@ static int atmel_hlcdc_dc_drm_probe(struct platform_device *pdev) if (!ddev) return -ENOMEM; - ret = drm_dev_set_unique(ddev, dev_name(ddev->dev)); - if (ret) - goto err_unref; - ret = atmel_hlcdc_dc_load(ddev); if (ret) goto err_unref; diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c index eaa4316f3c45..bf934cdea21c 100644 --- a/drivers/gpu/drm/drm_drv.c +++ b/drivers/gpu/drm/drm_drv.c @@ -633,8 +633,17 @@ struct drm_device *drm_dev_alloc(struct drm_driver *driver, } } + if (parent) { + ret = drm_dev_set_unique(dev, dev_name(parent)); + if (ret) + goto err_setunique; + } + return dev; +err_setunique: + if (drm_core_check_feature(dev, DRIVER_GEM)) + drm_gem_destroy(dev); err_ctxbitmap: drm_legacy_ctxbitmap_cleanup(dev); drm_ht_remove(&dev->map_hash); diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c index 1930234ba5f1..fca97d3fc846 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c @@ -363,7 +363,6 @@ static int fsl_dcu_drm_probe(struct platform_device *pdev) fsl_dev->np = dev->of_node; drm->dev_private = fsl_dev; dev_set_drvdata(dev, fsl_dev); - drm_dev_set_unique(drm, dev_name(dev)); ret = drm_dev_register(drm, 0); if (ret < 0) diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c index 2d23f95f17ce..b3a563c44bcd 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drm.c +++ b/drivers/gpu/drm/nouveau/nouveau_drm.c @@ -1046,10 +1046,6 @@ nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, goto err_free; } - err = drm_dev_set_unique(drm, dev_name(&pdev->dev)); - if (err < 0) - goto err_free; - drm->platformdev = pdev; platform_set_drvdata(pdev, drm); diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c index 215d6c44af55..afbb7407c44f 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c @@ -450,10 +450,6 @@ static int rockchip_drm_bind(struct device *dev) if (!drm) return -ENOMEM; - ret = drm_dev_set_unique(drm, dev_name(dev)); - if (ret) - goto err_free; - ret = drm_dev_register(drm, 0); if (ret) goto err_free; diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c index e0f827790a5e..ff948d27d118 100644 --- a/drivers/gpu/drm/tegra/drm.c +++ b/drivers/gpu/drm/tegra/drm.c @@ -991,7 +991,6 @@ static int host1x_drm_probe(struct host1x_device *dev) if (!drm) return -ENOMEM; - drm_dev_set_unique(drm, dev_name(&dev->dev)); dev_set_drvdata(&dev->dev, drm); err = drm_dev_register(drm, 0); diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c index cbcbbb83500e..f1655fff8425 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.c +++ b/drivers/gpu/drm/vc4/vc4_drv.c @@ -184,8 +184,6 @@ static int vc4_drm_bind(struct device *dev) vc4->dev = drm; drm->dev_private = vc4; - drm_dev_set_unique(drm, dev_name(dev)); - vc4_bo_cache_init(drm); drm_mode_config_init(drm); -- cgit v1.2.3 From b5f7b75503efa5499080e51eb5c085fe1de1970d Mon Sep 17 00:00:00 2001 From: Mark Yao Date: Mon, 23 Nov 2015 15:21:08 +0800 Subject: drm/rockchip: Use new vblank api drm_crtc_vblank_* No functional update, drm_vblank_* is the legacy version of drm_crtc_vblank_*. and use new api make driver more clean. Signed-off-by: Mark Yao --- drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 13 +++++++------ drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 7 +++---- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 24 +++++++++++------------- 3 files changed, 21 insertions(+), 23 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c index afbb7407c44f..2cc15cf0adf8 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c @@ -64,11 +64,11 @@ void rockchip_drm_dma_detach_device(struct drm_device *drm_dev, } EXPORT_SYMBOL_GPL(rockchip_drm_dma_detach_device); -int rockchip_register_crtc_funcs(struct drm_device *dev, - const struct rockchip_crtc_funcs *crtc_funcs, - int pipe) +int rockchip_register_crtc_funcs(struct drm_crtc *crtc, + const struct rockchip_crtc_funcs *crtc_funcs) { - struct rockchip_drm_private *priv = dev->dev_private; + int pipe = drm_crtc_index(crtc); + struct rockchip_drm_private *priv = crtc->dev->dev_private; if (pipe > ROCKCHIP_MAX_CRTC) return -EINVAL; @@ -79,9 +79,10 @@ int rockchip_register_crtc_funcs(struct drm_device *dev, } EXPORT_SYMBOL_GPL(rockchip_register_crtc_funcs); -void rockchip_unregister_crtc_funcs(struct drm_device *dev, int pipe) +void rockchip_unregister_crtc_funcs(struct drm_crtc *crtc) { - struct rockchip_drm_private *priv = dev->dev_private; + int pipe = drm_crtc_index(crtc); + struct rockchip_drm_private *priv = crtc->dev->dev_private; if (pipe > ROCKCHIP_MAX_CRTC) return; diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h index dc4e5f03ac79..069d6d4cfec2 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h @@ -52,10 +52,9 @@ struct rockchip_drm_private { const struct rockchip_crtc_funcs *crtc_funcs[ROCKCHIP_MAX_CRTC]; }; -int rockchip_register_crtc_funcs(struct drm_device *dev, - const struct rockchip_crtc_funcs *crtc_funcs, - int pipe); -void rockchip_unregister_crtc_funcs(struct drm_device *dev, int pipe); +int rockchip_register_crtc_funcs(struct drm_crtc *crtc, + const struct rockchip_crtc_funcs *crtc_funcs); +void rockchip_unregister_crtc_funcs(struct drm_crtc *crtc); int rockchip_drm_encoder_get_mux_id(struct device_node *node, struct drm_encoder *encoder); int rockchip_drm_crtc_mode_config(struct drm_crtc *crtc, int connector_type, diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index dd8e0860ad4e..f82c7ba1703d 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -119,8 +119,6 @@ struct vop { /* vop dclk reset */ struct reset_control *dclk_rst; - int pipe; - struct vop_win win[]; }; @@ -692,7 +690,7 @@ static void vop_enable(struct drm_crtc *crtc) enable_irq(vop->irq); - drm_vblank_on(vop->drm_dev, vop->pipe); + drm_crtc_vblank_on(crtc); return; @@ -711,7 +709,7 @@ static void vop_disable(struct drm_crtc *crtc) if (!vop->is_enabled) return; - drm_vblank_off(crtc->dev, vop->pipe); + drm_crtc_vblank_off(crtc); /* * Vop standby will take effect at end of current frame, @@ -918,7 +916,7 @@ static int vop_update_plane_event(struct drm_plane *plane, */ mutex_lock(&vop->vsync_mutex); if (fb != vop_win_last_pending_fb(vop_win)) { - ret = drm_vblank_get(plane->dev, vop->pipe); + ret = drm_crtc_vblank_get(crtc); if (ret) { DRM_ERROR("failed to get vblank, %d\n", ret); mutex_unlock(&vop->vsync_mutex); @@ -929,7 +927,7 @@ static int vop_update_plane_event(struct drm_plane *plane, ret = vop_win_queue_fb(vop_win, fb, yrgb_mst, event); if (ret) { - drm_vblank_put(plane->dev, vop->pipe); + drm_crtc_vblank_put(crtc); mutex_unlock(&vop->vsync_mutex); return ret; } @@ -1023,7 +1021,7 @@ static int vop_disable_plane(struct drm_plane *plane) vop = to_vop(plane->crtc); - ret = drm_vblank_get(plane->dev, vop->pipe); + ret = drm_crtc_vblank_get(plane->crtc); if (ret) { DRM_ERROR("failed to get vblank, %d\n", ret); return ret; @@ -1033,7 +1031,7 @@ static int vop_disable_plane(struct drm_plane *plane) ret = vop_win_queue_fb(vop_win, NULL, 0, NULL); if (ret) { - drm_vblank_put(plane->dev, vop->pipe); + drm_crtc_vblank_put(plane->crtc); mutex_unlock(&vop->vsync_mutex); return ret; } @@ -1295,7 +1293,7 @@ static void vop_win_state_complete(struct vop_win *vop_win, } list_del(&state->head); - drm_vblank_put(crtc->dev, vop->pipe); + drm_crtc_vblank_put(crtc); } static void vop_crtc_destroy(struct drm_crtc *crtc) @@ -1410,6 +1408,7 @@ done: static irqreturn_t vop_isr(int irq, void *data) { struct vop *vop = data; + struct drm_crtc *crtc = &vop->crtc; uint32_t intr0_reg, active_irqs; unsigned long flags; int ret = IRQ_NONE; @@ -1438,7 +1437,7 @@ static irqreturn_t vop_isr(int irq, void *data) } if (active_irqs & FS_INTR) { - drm_handle_vblank(vop->drm_dev, vop->pipe); + drm_crtc_handle_vblank(crtc); active_irqs &= ~FS_INTR; ret = (vop->vsync_work_pending) ? IRQ_WAKE_THREAD : IRQ_HANDLED; } @@ -1531,8 +1530,7 @@ static int vop_create_crtc(struct vop *vop) init_completion(&vop->dsp_hold_completion); crtc->port = port; - vop->pipe = drm_crtc_index(crtc); - rockchip_register_crtc_funcs(drm_dev, &private_crtc_funcs, vop->pipe); + rockchip_register_crtc_funcs(crtc, &private_crtc_funcs); return 0; @@ -1548,7 +1546,7 @@ static void vop_destroy_crtc(struct vop *vop) { struct drm_crtc *crtc = &vop->crtc; - rockchip_unregister_crtc_funcs(vop->drm_dev, vop->pipe); + rockchip_unregister_crtc_funcs(crtc); of_node_put(crtc->port); drm_crtc_cleanup(crtc); } -- cgit v1.2.3 From 0ad3675d9c8f7c7306c954a9c50dc12385d8a508 Mon Sep 17 00:00:00 2001 From: Mark Yao Date: Mon, 9 Nov 2015 11:33:16 +0800 Subject: drm/rockchip: vop: replace dpms with enable/disable For vop, power by enable/disable is more suitable then legacy dpms function, and enable/disable more closely to the new atomic API. Signed-off-by: Mark Yao --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 37 ++++------------------------- 1 file changed, 4 insertions(+), 33 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index f82c7ba1703d..1e60ddd7c740 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -632,7 +632,7 @@ static void vop_dsp_hold_valid_irq_disable(struct vop *vop) spin_unlock_irqrestore(&vop->irq_lock, flags); } -static void vop_enable(struct drm_crtc *crtc) +static void vop_crtc_enable(struct drm_crtc *crtc) { struct vop *vop = to_vop(crtc); int ret; @@ -702,7 +702,7 @@ err_disable_hclk: clk_disable(vop->hclk); } -static void vop_disable(struct drm_crtc *crtc) +static void vop_crtc_disable(struct drm_crtc *crtc) { struct vop *vop = to_vop(crtc); @@ -1107,30 +1107,6 @@ static const struct rockchip_crtc_funcs private_crtc_funcs = { .disable_vblank = vop_crtc_disable_vblank, }; -static void vop_crtc_dpms(struct drm_crtc *crtc, int mode) -{ - DRM_DEBUG_KMS("crtc[%d] mode[%d]\n", crtc->base.id, mode); - - switch (mode) { - case DRM_MODE_DPMS_ON: - vop_enable(crtc); - break; - case DRM_MODE_DPMS_STANDBY: - case DRM_MODE_DPMS_SUSPEND: - case DRM_MODE_DPMS_OFF: - vop_disable(crtc); - break; - default: - DRM_DEBUG_KMS("unspecified mode %d\n", mode); - break; - } -} - -static void vop_crtc_prepare(struct drm_crtc *crtc) -{ - vop_crtc_dpms(crtc, DRM_MODE_DPMS_ON); -} - static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) @@ -1241,17 +1217,12 @@ out: return ret; } -static void vop_crtc_commit(struct drm_crtc *crtc) -{ -} - static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = { - .dpms = vop_crtc_dpms, - .prepare = vop_crtc_prepare, + .enable = vop_crtc_enable, + .disable = vop_crtc_disable, .mode_fixup = vop_crtc_mode_fixup, .mode_set = vop_crtc_mode_set, .mode_set_base = vop_crtc_mode_set_base, - .commit = vop_crtc_commit, }; static int vop_crtc_page_flip(struct drm_crtc *crtc, -- cgit v1.2.3 From 63ebb9fa7ff06d194362ed4a5d0a31ac7612a89c Mon Sep 17 00:00:00 2001 From: Mark Yao Date: Mon, 30 Nov 2015 18:22:42 +0800 Subject: drm/rockchip: Convert to support atomic API Rockchip vop not support hw vblank counter, needed check the committed register if it's really take effect. Signed-off-by: Mark Yao --- drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 5 +- drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 3 +- drivers/gpu/drm/rockchip/rockchip_drm_fb.c | 95 ++++ drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 657 +++++++++++----------------- 4 files changed, 363 insertions(+), 397 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c index 2cc15cf0adf8..929eb30e49e5 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c @@ -213,6 +213,8 @@ static int rockchip_drm_load(struct drm_device *drm_dev, unsigned long flags) */ drm_dev->vblank_disable_allowed = true; + drm_mode_config_reset(drm_dev); + ret = rockchip_drm_fbdev_init(drm_dev); if (ret) goto err_vblank_cleanup; @@ -276,7 +278,8 @@ const struct vm_operations_struct rockchip_drm_vm_ops = { }; static struct drm_driver rockchip_drm_driver = { - .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME, + .driver_features = DRIVER_MODESET | DRIVER_GEM | + DRIVER_PRIME | DRIVER_ATOMIC, .load = rockchip_drm_load, .unload = rockchip_drm_unload, .lastclose = rockchip_drm_lastclose, diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h index 069d6d4cfec2..4468f98ec437 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h @@ -18,6 +18,7 @@ #define _ROCKCHIP_DRM_DRV_H #include +#include #include #include @@ -38,6 +39,7 @@ struct drm_connector; struct rockchip_crtc_funcs { int (*enable_vblank)(struct drm_crtc *crtc); void (*disable_vblank)(struct drm_crtc *crtc); + void (*wait_for_update)(struct drm_crtc *crtc); }; /* @@ -63,5 +65,4 @@ int rockchip_drm_dma_attach_device(struct drm_device *drm_dev, struct device *dev); void rockchip_drm_dma_detach_device(struct drm_device *drm_dev, struct device *dev); - #endif /* _ROCKCHIP_DRM_DRV_H_ */ diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c index 621f25c463bd..df1b7b0e9926 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -166,9 +167,103 @@ static void rockchip_drm_output_poll_changed(struct drm_device *dev) drm_fb_helper_hotplug_event(fb_helper); } +static void rockchip_crtc_wait_for_update(struct drm_crtc *crtc) +{ + struct rockchip_drm_private *priv = crtc->dev->dev_private; + int pipe = drm_crtc_index(crtc); + const struct rockchip_crtc_funcs *crtc_funcs = priv->crtc_funcs[pipe]; + + if (crtc_funcs && crtc_funcs->wait_for_update) + crtc_funcs->wait_for_update(crtc); +} + +static void +rockchip_atomic_wait_for_complete(struct drm_atomic_state *old_state) +{ + struct drm_crtc_state *old_crtc_state; + struct drm_crtc *crtc; + int i, ret; + + for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) { + /* No one cares about the old state, so abuse it for tracking + * and store whether we hold a vblank reference (and should do a + * vblank wait) in the ->enable boolean. + */ + old_crtc_state->enable = false; + + if (!crtc->state->active) + continue; + + ret = drm_crtc_vblank_get(crtc); + if (ret != 0) + continue; + + old_crtc_state->enable = true; + } + + for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) { + if (!old_crtc_state->enable) + continue; + + rockchip_crtc_wait_for_update(crtc); + drm_crtc_vblank_put(crtc); + } +} + +int rockchip_drm_atomic_commit(struct drm_device *dev, + struct drm_atomic_state *state, + bool async) +{ + int ret; + + if (async) + return -EBUSY; + + ret = drm_atomic_helper_prepare_planes(dev, state); + if (ret) + return ret; + + drm_atomic_helper_swap_state(dev, state); + + /* + * TODO: do fence wait here. + */ + + /* + * Rockchip crtc support runtime PM, can't update display planes + * when crtc is disabled. + * + * drm_atomic_helper_commit comments detail that: + * For drivers supporting runtime PM the recommended sequence is + * + * drm_atomic_helper_commit_modeset_disables(dev, state); + * + * drm_atomic_helper_commit_modeset_enables(dev, state); + * + * drm_atomic_helper_commit_planes(dev, state, true); + * + * See the kerneldoc entries for these three functions for more details. + */ + drm_atomic_helper_commit_modeset_disables(dev, state); + + drm_atomic_helper_commit_modeset_enables(dev, state); + + drm_atomic_helper_commit_planes(dev, state, true); + + rockchip_atomic_wait_for_complete(state); + + drm_atomic_helper_cleanup_planes(dev, state); + + drm_atomic_state_free(state); + + return 0; +} + static const struct drm_mode_config_funcs rockchip_drm_mode_config_funcs = { .fb_create = rockchip_user_fb_create, .output_poll_changed = rockchip_drm_output_poll_changed, + .atomic_check = drm_atomic_helper_check, + .atomic_commit = rockchip_drm_atomic_commit, }; struct drm_framebuffer * diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 1e60ddd7c740..44f61540a0d1 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -14,6 +14,7 @@ #include #include +#include #include #include #include @@ -63,12 +64,15 @@ #define to_vop(x) container_of(x, struct vop, crtc) #define to_vop_win(x) container_of(x, struct vop_win, base) +#define to_vop_plane_state(x) container_of(x, struct vop_plane_state, base) -struct vop_win_state { - struct list_head head; - struct drm_framebuffer *fb; +struct vop_plane_state { + struct drm_plane_state base; + int format; + struct drm_rect src; + struct drm_rect dest; dma_addr_t yrgb_mst; - struct drm_pending_vblank_event *event; + bool enable; }; struct vop_win { @@ -76,8 +80,7 @@ struct vop_win { const struct vop_win_data *data; struct vop *vop; - struct list_head pending; - struct vop_win_state *active; + struct vop_plane_state state; }; struct vop { @@ -93,6 +96,8 @@ struct vop { struct mutex vsync_mutex; bool vsync_work_pending; struct completion dsp_hold_completion; + struct completion wait_update_complete; + struct drm_pending_vblank_event *event; const struct vop_data *data; @@ -632,7 +637,7 @@ static void vop_dsp_hold_valid_irq_disable(struct vop *vop) spin_unlock_irqrestore(&vop->irq_lock, flags); } -static void vop_crtc_enable(struct drm_crtc *crtc) +static void vop_enable(struct drm_crtc *crtc) { struct vop *vop = to_vop(crtc); int ret; @@ -746,224 +751,188 @@ static void vop_crtc_disable(struct drm_crtc *crtc) pm_runtime_put(vop->dev); } -/* - * Caller must hold vsync_mutex. - */ -static struct drm_framebuffer *vop_win_last_pending_fb(struct vop_win *vop_win) -{ - struct vop_win_state *last; - struct vop_win_state *active = vop_win->active; - - if (list_empty(&vop_win->pending)) - return active ? active->fb : NULL; - - last = list_last_entry(&vop_win->pending, struct vop_win_state, head); - return last ? last->fb : NULL; -} - -/* - * Caller must hold vsync_mutex. - */ -static int vop_win_queue_fb(struct vop_win *vop_win, - struct drm_framebuffer *fb, dma_addr_t yrgb_mst, - struct drm_pending_vblank_event *event) +static void vop_plane_destroy(struct drm_plane *plane) { - struct vop_win_state *state; - - state = kzalloc(sizeof(*state), GFP_KERNEL); - if (!state) - return -ENOMEM; - - state->fb = fb; - state->yrgb_mst = yrgb_mst; - state->event = event; - - list_add_tail(&state->head, &vop_win->pending); - - return 0; + drm_plane_cleanup(plane); } -static int vop_update_plane_event(struct drm_plane *plane, - struct drm_crtc *crtc, - struct drm_framebuffer *fb, int crtc_x, - int crtc_y, unsigned int crtc_w, - unsigned int crtc_h, uint32_t src_x, - uint32_t src_y, uint32_t src_w, - uint32_t src_h, - struct drm_pending_vblank_event *event) +static int vop_plane_atomic_check(struct drm_plane *plane, + struct drm_plane_state *state) { + struct drm_crtc *crtc = state->crtc; + struct drm_framebuffer *fb = state->fb; struct vop_win *vop_win = to_vop_win(plane); + struct vop_plane_state *vop_plane_state = to_vop_plane_state(state); const struct vop_win_data *win = vop_win->data; - struct vop *vop = to_vop(crtc); - struct drm_gem_object *obj; - struct rockchip_gem_object *rk_obj; - struct drm_gem_object *uv_obj; - struct rockchip_gem_object *rk_uv_obj; - unsigned long offset; - unsigned int actual_w; - unsigned int actual_h; - unsigned int dsp_stx; - unsigned int dsp_sty; - unsigned int y_vir_stride; - unsigned int uv_vir_stride = 0; - dma_addr_t yrgb_mst; - dma_addr_t uv_mst = 0; - enum vop_data_format format; - uint32_t val; - bool is_alpha; - bool rb_swap; - bool is_yuv; bool visible; int ret; - struct drm_rect dest = { - .x1 = crtc_x, - .y1 = crtc_y, - .x2 = crtc_x + crtc_w, - .y2 = crtc_y + crtc_h, - }; - struct drm_rect src = { - /* 16.16 fixed point */ - .x1 = src_x, - .y1 = src_y, - .x2 = src_x + src_w, - .y2 = src_y + src_h, - }; - const struct drm_rect clip = { - .x2 = crtc->mode.hdisplay, - .y2 = crtc->mode.vdisplay, - }; - bool can_position = plane->type != DRM_PLANE_TYPE_PRIMARY; + struct drm_rect *dest = &vop_plane_state->dest; + struct drm_rect *src = &vop_plane_state->src; + struct drm_rect clip; int min_scale = win->phy->scl ? FRAC_16_16(1, 8) : DRM_PLANE_HELPER_NO_SCALING; int max_scale = win->phy->scl ? FRAC_16_16(8, 1) : DRM_PLANE_HELPER_NO_SCALING; - ret = drm_plane_helper_check_update(plane, crtc, fb, - &src, &dest, &clip, + crtc = crtc ? crtc : plane->state->crtc; + /* + * Both crtc or plane->state->crtc can be null. + */ + if (!crtc || !fb) + goto out_disable; + src->x1 = state->src_x; + src->y1 = state->src_y; + src->x2 = state->src_x + state->src_w; + src->y2 = state->src_y + state->src_h; + dest->x1 = state->crtc_x; + dest->y1 = state->crtc_y; + dest->x2 = state->crtc_x + state->crtc_w; + dest->y2 = state->crtc_y + state->crtc_h; + + clip.x1 = 0; + clip.y1 = 0; + clip.x2 = crtc->mode.hdisplay; + clip.y2 = crtc->mode.vdisplay; + + ret = drm_plane_helper_check_update(plane, crtc, state->fb, + src, dest, &clip, min_scale, max_scale, - can_position, false, &visible); + true, true, &visible); if (ret) return ret; if (!visible) - return 0; + goto out_disable; - is_alpha = is_alpha_support(fb->pixel_format); - rb_swap = has_rb_swapped(fb->pixel_format); - is_yuv = is_yuv_support(fb->pixel_format); + vop_plane_state->format = vop_convert_format(fb->pixel_format); + if (vop_plane_state->format < 0) + return vop_plane_state->format; - format = vop_convert_format(fb->pixel_format); - if (format < 0) - return format; - - obj = rockchip_fb_get_gem_obj(fb, 0); - if (!obj) { - DRM_ERROR("fail to get rockchip gem object from framebuffer\n"); + /* + * Src.x1 can be odd when do clip, but yuv plane start point + * need align with 2 pixel. + */ + if (is_yuv_support(fb->pixel_format) && ((src->x1 >> 16) % 2)) return -EINVAL; - } - rk_obj = to_rockchip_obj(obj); + vop_plane_state->enable = true; - if (is_yuv) { - /* - * Src.x1 can be odd when do clip, but yuv plane start point - * need align with 2 pixel. - */ - val = (src.x1 >> 16) % 2; - src.x1 += val << 16; - src.x2 += val << 16; - } + return 0; - actual_w = (src.x2 - src.x1) >> 16; - actual_h = (src.y2 - src.y1) >> 16; +out_disable: + vop_plane_state->enable = false; + return 0; +} - dsp_stx = dest.x1 + crtc->mode.htotal - crtc->mode.hsync_start; - dsp_sty = dest.y1 + crtc->mode.vtotal - crtc->mode.vsync_start; +static void vop_plane_atomic_disable(struct drm_plane *plane, + struct drm_plane_state *old_state) +{ + struct vop_plane_state *vop_plane_state = to_vop_plane_state(old_state); + struct vop_win *vop_win = to_vop_win(plane); + const struct vop_win_data *win = vop_win->data; + struct vop *vop = to_vop(old_state->crtc); - offset = (src.x1 >> 16) * drm_format_plane_cpp(fb->pixel_format, 0); - offset += (src.y1 >> 16) * fb->pitches[0]; + if (!old_state->crtc) + return; - yrgb_mst = rk_obj->dma_addr + offset + fb->offsets[0]; - y_vir_stride = fb->pitches[0] >> 2; + spin_lock(&vop->reg_lock); - if (is_yuv) { - int hsub = drm_format_horz_chroma_subsampling(fb->pixel_format); - int vsub = drm_format_vert_chroma_subsampling(fb->pixel_format); - int bpp = drm_format_plane_cpp(fb->pixel_format, 1); + VOP_WIN_SET(vop, win, enable, 0); - uv_obj = rockchip_fb_get_gem_obj(fb, 1); - if (!uv_obj) { - DRM_ERROR("fail to get uv object from framebuffer\n"); - return -EINVAL; - } - rk_uv_obj = to_rockchip_obj(uv_obj); - uv_vir_stride = fb->pitches[1] >> 2; + spin_unlock(&vop->reg_lock); - offset = (src.x1 >> 16) * bpp / hsub; - offset += (src.y1 >> 16) * fb->pitches[1] / vsub; + vop_plane_state->enable = false; +} - uv_mst = rk_uv_obj->dma_addr + offset + fb->offsets[1]; - } +static void vop_plane_atomic_update(struct drm_plane *plane, + struct drm_plane_state *old_state) +{ + struct drm_plane_state *state = plane->state; + struct drm_crtc *crtc = state->crtc; + struct vop_win *vop_win = to_vop_win(plane); + struct vop_plane_state *vop_plane_state = to_vop_plane_state(state); + const struct vop_win_data *win = vop_win->data; + struct vop *vop = to_vop(state->crtc); + struct drm_framebuffer *fb = state->fb; + unsigned int actual_w, actual_h; + unsigned int dsp_stx, dsp_sty; + uint32_t act_info, dsp_info, dsp_st; + struct drm_rect *src = &vop_plane_state->src; + struct drm_rect *dest = &vop_plane_state->dest; + struct drm_gem_object *obj, *uv_obj; + struct rockchip_gem_object *rk_obj, *rk_uv_obj; + unsigned long offset; + dma_addr_t dma_addr; + uint32_t val; + bool rb_swap; /* - * If this plane update changes the plane's framebuffer, (or more - * precisely, if this update has a different framebuffer than the last - * update), enqueue it so we can track when it completes. - * - * Only when we discover that this update has completed, can we - * unreference any previous framebuffers. + * can't update plane when vop is disabled. */ - mutex_lock(&vop->vsync_mutex); - if (fb != vop_win_last_pending_fb(vop_win)) { - ret = drm_crtc_vblank_get(crtc); - if (ret) { - DRM_ERROR("failed to get vblank, %d\n", ret); - mutex_unlock(&vop->vsync_mutex); - return ret; - } - - drm_framebuffer_reference(fb); + if (!crtc) + return; - ret = vop_win_queue_fb(vop_win, fb, yrgb_mst, event); - if (ret) { - drm_crtc_vblank_put(crtc); - mutex_unlock(&vop->vsync_mutex); - return ret; - } + if (WARN_ON(!vop->is_enabled)) + return; - vop->vsync_work_pending = true; + if (!vop_plane_state->enable) { + vop_plane_atomic_disable(plane, old_state); + return; } - mutex_unlock(&vop->vsync_mutex); + + obj = rockchip_fb_get_gem_obj(fb, 0); + rk_obj = to_rockchip_obj(obj); + + actual_w = drm_rect_width(src) >> 16; + actual_h = drm_rect_height(src) >> 16; + act_info = (actual_h - 1) << 16 | ((actual_w - 1) & 0xffff); + + dsp_info = (drm_rect_height(dest) - 1) << 16; + dsp_info |= (drm_rect_width(dest) - 1) & 0xffff; + + dsp_stx = dest->x1 + crtc->mode.htotal - crtc->mode.hsync_start; + dsp_sty = dest->y1 + crtc->mode.vtotal - crtc->mode.vsync_start; + dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff); + + offset = (src->x1 >> 16) * drm_format_plane_cpp(fb->pixel_format, 0); + offset += (src->y1 >> 16) * fb->pitches[0]; + vop_plane_state->yrgb_mst = rk_obj->dma_addr + offset + fb->offsets[0]; spin_lock(&vop->reg_lock); - VOP_WIN_SET(vop, win, format, format); - VOP_WIN_SET(vop, win, yrgb_vir, y_vir_stride); - VOP_WIN_SET(vop, win, yrgb_mst, yrgb_mst); - if (is_yuv) { - VOP_WIN_SET(vop, win, uv_vir, uv_vir_stride); - VOP_WIN_SET(vop, win, uv_mst, uv_mst); + VOP_WIN_SET(vop, win, format, vop_plane_state->format); + VOP_WIN_SET(vop, win, yrgb_vir, fb->pitches[0] >> 2); + VOP_WIN_SET(vop, win, yrgb_mst, vop_plane_state->yrgb_mst); + if (is_yuv_support(fb->pixel_format)) { + int hsub = drm_format_horz_chroma_subsampling(fb->pixel_format); + int vsub = drm_format_vert_chroma_subsampling(fb->pixel_format); + int bpp = drm_format_plane_cpp(fb->pixel_format, 1); + + uv_obj = rockchip_fb_get_gem_obj(fb, 1); + rk_uv_obj = to_rockchip_obj(uv_obj); + + offset = (src->x1 >> 16) * bpp / hsub; + offset += (src->y1 >> 16) * fb->pitches[1] / vsub; + + dma_addr = rk_uv_obj->dma_addr + offset + fb->offsets[1]; + VOP_WIN_SET(vop, win, uv_vir, fb->pitches[1] >> 2); + VOP_WIN_SET(vop, win, uv_mst, dma_addr); } if (win->phy->scl) scl_vop_cal_scl_fac(vop, win, actual_w, actual_h, - dest.x2 - dest.x1, dest.y2 - dest.y1, + drm_rect_width(dest), drm_rect_height(dest), fb->pixel_format); - val = (actual_h - 1) << 16; - val |= (actual_w - 1) & 0xffff; - VOP_WIN_SET(vop, win, act_info, val); + VOP_WIN_SET(vop, win, act_info, act_info); + VOP_WIN_SET(vop, win, dsp_info, dsp_info); + VOP_WIN_SET(vop, win, dsp_st, dsp_st); - val = (dest.y2 - dest.y1 - 1) << 16; - val |= (dest.x2 - dest.x1 - 1) & 0xffff; - VOP_WIN_SET(vop, win, dsp_info, val); - val = dsp_sty << 16; - val |= dsp_stx & 0xffff; - VOP_WIN_SET(vop, win, dsp_st, val); + rb_swap = has_rb_swapped(fb->pixel_format); VOP_WIN_SET(vop, win, rb_swap, rb_swap); - if (is_alpha) { + if (is_alpha_support(fb->pixel_format)) { VOP_WIN_SET(vop, win, dst_alpha_ctl, DST_FACTOR_M0(ALPHA_SRC_INVERSE)); val = SRC_ALPHA_EN(1) | SRC_COLOR_M0(ALPHA_SRC_PRE_MUL) | @@ -977,86 +946,70 @@ static int vop_update_plane_event(struct drm_plane *plane, } VOP_WIN_SET(vop, win, enable, 1); - - vop_cfg_done(vop); spin_unlock(&vop->reg_lock); - - return 0; } -static int vop_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, - struct drm_framebuffer *fb, int crtc_x, int crtc_y, - unsigned int crtc_w, unsigned int crtc_h, - uint32_t src_x, uint32_t src_y, uint32_t src_w, - uint32_t src_h) -{ - return vop_update_plane_event(plane, crtc, fb, crtc_x, crtc_y, crtc_w, - crtc_h, src_x, src_y, src_w, src_h, - NULL); -} +static const struct drm_plane_helper_funcs plane_helper_funcs = { + .atomic_check = vop_plane_atomic_check, + .atomic_update = vop_plane_atomic_update, + .atomic_disable = vop_plane_atomic_disable, +}; -static int vop_update_primary_plane(struct drm_crtc *crtc, - struct drm_pending_vblank_event *event) +void vop_atomic_plane_reset(struct drm_plane *plane) { - unsigned int crtc_w, crtc_h; + struct vop_plane_state *vop_plane_state = + to_vop_plane_state(plane->state); - crtc_w = crtc->primary->fb->width - crtc->x; - crtc_h = crtc->primary->fb->height - crtc->y; + if (plane->state && plane->state->fb) + drm_framebuffer_unreference(plane->state->fb); + + kfree(vop_plane_state); + vop_plane_state = kzalloc(sizeof(*vop_plane_state), GFP_KERNEL); + if (!vop_plane_state) + return; - return vop_update_plane_event(crtc->primary, crtc, crtc->primary->fb, - 0, 0, crtc_w, crtc_h, crtc->x << 16, - crtc->y << 16, crtc_w << 16, - crtc_h << 16, event); + plane->state = &vop_plane_state->base; + plane->state->plane = plane; } -static int vop_disable_plane(struct drm_plane *plane) +struct drm_plane_state * +vop_atomic_plane_duplicate_state(struct drm_plane *plane) { - struct vop_win *vop_win = to_vop_win(plane); - const struct vop_win_data *win = vop_win->data; - struct vop *vop; - int ret; - - if (!plane->crtc) - return 0; + struct vop_plane_state *old_vop_plane_state; + struct vop_plane_state *vop_plane_state; - vop = to_vop(plane->crtc); + if (WARN_ON(!plane->state)) + return NULL; - ret = drm_crtc_vblank_get(plane->crtc); - if (ret) { - DRM_ERROR("failed to get vblank, %d\n", ret); - return ret; - } + old_vop_plane_state = to_vop_plane_state(plane->state); + vop_plane_state = kmemdup(old_vop_plane_state, + sizeof(*vop_plane_state), GFP_KERNEL); + if (!vop_plane_state) + return NULL; - mutex_lock(&vop->vsync_mutex); + __drm_atomic_helper_plane_duplicate_state(plane, + &vop_plane_state->base); - ret = vop_win_queue_fb(vop_win, NULL, 0, NULL); - if (ret) { - drm_crtc_vblank_put(plane->crtc); - mutex_unlock(&vop->vsync_mutex); - return ret; - } - - vop->vsync_work_pending = true; - mutex_unlock(&vop->vsync_mutex); - - spin_lock(&vop->reg_lock); - VOP_WIN_SET(vop, win, enable, 0); - vop_cfg_done(vop); - spin_unlock(&vop->reg_lock); - - return 0; + return &vop_plane_state->base; } -static void vop_plane_destroy(struct drm_plane *plane) +static void vop_atomic_plane_destroy_state(struct drm_plane *plane, + struct drm_plane_state *state) { - vop_disable_plane(plane); - drm_plane_cleanup(plane); + struct vop_plane_state *vop_state = to_vop_plane_state(state); + + __drm_atomic_helper_plane_destroy_state(plane, state); + + kfree(vop_state); } static const struct drm_plane_funcs vop_plane_funcs = { - .update_plane = vop_update_plane, - .disable_plane = vop_disable_plane, + .update_plane = drm_atomic_helper_update_plane, + .disable_plane = drm_atomic_helper_disable_plane, .destroy = vop_plane_destroy, + .reset = vop_atomic_plane_reset, + .atomic_duplicate_state = vop_atomic_plane_duplicate_state, + .atomic_destroy_state = vop_atomic_plane_destroy_state, }; int rockchip_drm_crtc_mode_config(struct drm_crtc *crtc, @@ -1077,7 +1030,7 @@ static int vop_crtc_enable_vblank(struct drm_crtc *crtc) struct vop *vop = to_vop(crtc); unsigned long flags; - if (!vop->is_enabled) + if (WARN_ON(!vop->is_enabled)) return -EPERM; spin_lock_irqsave(&vop->irq_lock, flags); @@ -1094,7 +1047,7 @@ static void vop_crtc_disable_vblank(struct drm_crtc *crtc) struct vop *vop = to_vop(crtc); unsigned long flags; - if (!vop->is_enabled) + if (WARN_ON(!vop->is_enabled)) return; spin_lock_irqsave(&vop->irq_lock, flags); @@ -1102,9 +1055,18 @@ static void vop_crtc_disable_vblank(struct drm_crtc *crtc) spin_unlock_irqrestore(&vop->irq_lock, flags); } +static void vop_crtc_wait_for_update(struct drm_crtc *crtc) +{ + struct vop *vop = to_vop(crtc); + + reinit_completion(&vop->wait_update_complete); + WARN_ON(!wait_for_completion_timeout(&vop->wait_update_complete, 100)); +} + static const struct rockchip_crtc_funcs private_crtc_funcs = { .enable_vblank = vop_crtc_enable_vblank, .disable_vblank = vop_crtc_disable_vblank, + .wait_for_update = vop_crtc_wait_for_update, }; static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, @@ -1117,29 +1079,10 @@ static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, return true; } -static int vop_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, - struct drm_framebuffer *old_fb) -{ - int ret; - - crtc->x = x; - crtc->y = y; - - ret = vop_update_primary_plane(crtc, NULL); - if (ret < 0) { - DRM_ERROR("fail to update plane\n"); - return ret; - } - - return 0; -} - -static int vop_crtc_mode_set(struct drm_crtc *crtc, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode, - int x, int y, struct drm_framebuffer *fb) +static void vop_crtc_enable(struct drm_crtc *crtc) { struct vop *vop = to_vop(crtc); + struct drm_display_mode *adjusted_mode = &crtc->state->adjusted_mode; u16 hsync_len = adjusted_mode->hsync_end - adjusted_mode->hsync_start; u16 hdisplay = adjusted_mode->hdisplay; u16 htotal = adjusted_mode->htotal; @@ -1150,9 +1093,9 @@ static int vop_crtc_mode_set(struct drm_crtc *crtc, u16 vsync_len = adjusted_mode->vsync_end - adjusted_mode->vsync_start; u16 vact_st = adjusted_mode->vtotal - adjusted_mode->vsync_start; u16 vact_end = vact_st + vdisplay; - int ret, ret_clk; uint32_t val; + vop_enable(crtc); /* * disable dclk to stop frame scan, so that we can safe config mode and * enable iommu. @@ -1172,7 +1115,6 @@ static int vop_crtc_mode_set(struct drm_crtc *crtc, default: DRM_ERROR("unsupport connector_type[%d]\n", vop->connector_type); - ret = -EINVAL; goto out; }; VOP_CTRL_SET(vop, out_mode, vop->connector_out_mode); @@ -1194,9 +1136,6 @@ static int vop_crtc_mode_set(struct drm_crtc *crtc, VOP_CTRL_SET(vop, vact_st_end, val); VOP_CTRL_SET(vop, vpost_st_end, val); - ret = vop_crtc_mode_set_base(crtc, x, y, fb); - if (ret) - goto out; /* * reset dclk, take all mode config affect, so the clk would run in @@ -1208,172 +1147,97 @@ static int vop_crtc_mode_set(struct drm_crtc *crtc, clk_set_rate(vop->dclk, adjusted_mode->clock * 1000); out: - ret_clk = clk_enable(vop->dclk); - if (ret_clk < 0) { - dev_err(vop->dev, "failed to enable dclk - %d\n", ret_clk); - return ret_clk; - } - - return ret; + if (clk_enable(vop->dclk) < 0) + dev_err(vop->dev, "failed to enable dclk\n"); } -static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = { - .enable = vop_crtc_enable, - .disable = vop_crtc_disable, - .mode_fixup = vop_crtc_mode_fixup, - .mode_set = vop_crtc_mode_set, - .mode_set_base = vop_crtc_mode_set_base, -}; - -static int vop_crtc_page_flip(struct drm_crtc *crtc, - struct drm_framebuffer *fb, - struct drm_pending_vblank_event *event, - uint32_t page_flip_flags) +static void vop_crtc_atomic_flush(struct drm_crtc *crtc, + struct drm_crtc_state *old_crtc_state) { struct vop *vop = to_vop(crtc); - struct drm_framebuffer *old_fb = crtc->primary->fb; - int ret; - /* when the page flip is requested, crtc should be on */ - if (!vop->is_enabled) { - DRM_DEBUG("page flip request rejected because crtc is off.\n"); - return 0; - } + if (WARN_ON(!vop->is_enabled)) + return; - crtc->primary->fb = fb; + spin_lock(&vop->reg_lock); - ret = vop_update_primary_plane(crtc, event); - if (ret) - crtc->primary->fb = old_fb; + vop_cfg_done(vop); - return ret; + spin_unlock(&vop->reg_lock); } -static void vop_win_state_complete(struct vop_win *vop_win, - struct vop_win_state *state) +static void vop_crtc_atomic_begin(struct drm_crtc *crtc, + struct drm_crtc_state *old_crtc_state) { - struct vop *vop = vop_win->vop; - struct drm_crtc *crtc = &vop->crtc; - struct drm_device *drm = crtc->dev; - unsigned long flags; + struct vop *vop = to_vop(crtc); - if (state->event) { - spin_lock_irqsave(&drm->event_lock, flags); - drm_crtc_send_vblank_event(crtc, state->event); - spin_unlock_irqrestore(&drm->event_lock, flags); - } + if (crtc->state->event) { + WARN_ON(drm_crtc_vblank_get(crtc) != 0); - list_del(&state->head); - drm_crtc_vblank_put(crtc); + vop->event = crtc->state->event; + crtc->state->event = NULL; + } } +static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = { + .enable = vop_crtc_enable, + .disable = vop_crtc_disable, + .mode_fixup = vop_crtc_mode_fixup, + .atomic_flush = vop_crtc_atomic_flush, + .atomic_begin = vop_crtc_atomic_begin, +}; + static void vop_crtc_destroy(struct drm_crtc *crtc) { drm_crtc_cleanup(crtc); } static const struct drm_crtc_funcs vop_crtc_funcs = { - .set_config = drm_crtc_helper_set_config, - .page_flip = vop_crtc_page_flip, + .set_config = drm_atomic_helper_set_config, + .page_flip = drm_atomic_helper_page_flip, .destroy = vop_crtc_destroy, + .reset = drm_atomic_helper_crtc_reset, + .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, }; -static bool vop_win_state_is_active(struct vop_win *vop_win, - struct vop_win_state *state) +static bool vop_win_pending_is_complete(struct vop_win *vop_win) { - bool active = false; - - if (state->fb) { - dma_addr_t yrgb_mst; - - /* check yrgb_mst to tell if pending_fb is now front */ - yrgb_mst = VOP_WIN_GET_YRGBADDR(vop_win->vop, vop_win->data); - - active = (yrgb_mst == state->yrgb_mst); - } else { - bool enabled; - - /* if enable bit is clear, plane is now disabled */ - enabled = VOP_WIN_GET(vop_win->vop, vop_win->data, enable); - - active = (enabled == 0); - } - - return active; -} + struct drm_plane *plane = &vop_win->base; + struct vop_plane_state *state = to_vop_plane_state(plane->state); + dma_addr_t yrgb_mst; -static void vop_win_state_destroy(struct vop_win_state *state) -{ - struct drm_framebuffer *fb = state->fb; + if (!state->enable) + return VOP_WIN_GET(vop_win->vop, vop_win->data, enable) == 0; - if (fb) - drm_framebuffer_unreference(fb); + yrgb_mst = VOP_WIN_GET_YRGBADDR(vop_win->vop, vop_win->data); - kfree(state); + return yrgb_mst == state->yrgb_mst; } -static void vop_win_update_state(struct vop_win *vop_win) +static void vop_handle_vblank(struct vop *vop) { - struct vop_win_state *state, *n, *new_active = NULL; - - /* Check if any pending states are now active */ - list_for_each_entry(state, &vop_win->pending, head) - if (vop_win_state_is_active(vop_win, state)) { - new_active = state; - break; - } - - if (!new_active) - return; + struct drm_device *drm = vop->drm_dev; + struct drm_crtc *crtc = &vop->crtc; + unsigned long flags; + int i; - /* - * Destroy any 'skipped' pending states - states that were queued - * before the newly active state. - */ - list_for_each_entry_safe(state, n, &vop_win->pending, head) { - if (state == new_active) - break; - vop_win_state_complete(vop_win, state); - vop_win_state_destroy(state); + for (i = 0; i < vop->data->win_size; i++) { + if (!vop_win_pending_is_complete(&vop->win[i])) + return; } - vop_win_state_complete(vop_win, new_active); - - if (vop_win->active) - vop_win_state_destroy(vop_win->active); - vop_win->active = new_active; -} - -static bool vop_win_has_pending_state(struct vop_win *vop_win) -{ - return !list_empty(&vop_win->pending); -} - -static irqreturn_t vop_isr_thread(int irq, void *data) -{ - struct vop *vop = data; - const struct vop_data *vop_data = vop->data; - unsigned int i; - - mutex_lock(&vop->vsync_mutex); - - if (!vop->vsync_work_pending) - goto done; + if (vop->event) { + spin_lock_irqsave(&drm->event_lock, flags); - vop->vsync_work_pending = false; + drm_crtc_send_vblank_event(crtc, vop->event); + drm_crtc_vblank_put(crtc); + vop->event = NULL; - for (i = 0; i < vop_data->win_size; i++) { - struct vop_win *vop_win = &vop->win[i]; - - vop_win_update_state(vop_win); - if (vop_win_has_pending_state(vop_win)) - vop->vsync_work_pending = true; + spin_unlock_irqrestore(&drm->event_lock, flags); } - -done: - mutex_unlock(&vop->vsync_mutex); - - return IRQ_HANDLED; + if (!completion_done(&vop->wait_update_complete)) + complete(&vop->wait_update_complete); } static irqreturn_t vop_isr(int irq, void *data) @@ -1409,8 +1273,9 @@ static irqreturn_t vop_isr(int irq, void *data) if (active_irqs & FS_INTR) { drm_crtc_handle_vblank(crtc); + vop_handle_vblank(vop); active_irqs &= ~FS_INTR; - ret = (vop->vsync_work_pending) ? IRQ_WAKE_THREAD : IRQ_HANDLED; + ret = IRQ_HANDLED; } /* Unhandled irqs are spurious. */ @@ -1455,6 +1320,7 @@ static int vop_create_crtc(struct vop *vop) } plane = &vop_win->base; + drm_plane_helper_add(plane, &plane_helper_funcs); if (plane->type == DRM_PLANE_TYPE_PRIMARY) primary = plane; else if (plane->type == DRM_PLANE_TYPE_CURSOR) @@ -1490,6 +1356,7 @@ static int vop_create_crtc(struct vop *vop) DRM_ERROR("failed to initialize overlay plane\n"); goto err_cleanup_crtc; } + drm_plane_helper_add(&vop_win->base, &plane_helper_funcs); } port = of_get_child_by_name(dev->of_node, "port"); @@ -1500,6 +1367,7 @@ static int vop_create_crtc(struct vop *vop) } init_completion(&vop->dsp_hold_completion); + init_completion(&vop->wait_update_complete); crtc->port = port; rockchip_register_crtc_funcs(crtc, &private_crtc_funcs); @@ -1633,7 +1501,6 @@ static void vop_win_init(struct vop *vop) vop_win->data = win_data; vop_win->vop = vop; - INIT_LIST_HEAD(&vop_win->pending); } } @@ -1694,8 +1561,8 @@ static int vop_bind(struct device *dev, struct device *master, void *data) mutex_init(&vop->vsync_mutex); - ret = devm_request_threaded_irq(dev, vop->irq, vop_isr, vop_isr_thread, - IRQF_SHARED, dev_name(dev), vop); + ret = devm_request_irq(dev, vop->irq, vop_isr, + IRQF_SHARED, dev_name(dev), vop); if (ret) return ret; -- cgit v1.2.3 From ce3887ed0d996e6353d739e8139b8e5faeb726d5 Mon Sep 17 00:00:00 2001 From: Mark Yao Date: Wed, 16 Dec 2015 18:08:17 +0800 Subject: drm/rockchip: Optimization vop mode set Rk3288 vop timing registers is immediately register, when configure timing on display active time, will cause tearing. use dclk reset is not a good idea to avoid this tearing. we can avoid tearing by using standby register. Vop standby register will take effect at end of current frame, and go back to work immediately when exit standby. So we can use standby register to protect this context. Signed-off-by: Mark Yao --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 51 ++++++++++++++++++++--------- 1 file changed, 35 insertions(+), 16 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 44f61540a0d1..9ace3ae10819 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -1097,10 +1097,40 @@ static void vop_crtc_enable(struct drm_crtc *crtc) vop_enable(crtc); /* - * disable dclk to stop frame scan, so that we can safe config mode and - * enable iommu. + * If dclk rate is zero, mean that scanout is stop, + * we don't need wait any more. */ - clk_disable(vop->dclk); + if (clk_get_rate(vop->dclk)) { + /* + * Rk3288 vop timing register is immediately, when configure + * display timing on display time, may cause tearing. + * + * Vop standby will take effect at end of current frame, + * if dsp hold valid irq happen, it means standby complete. + * + * mode set: + * standby and wait complete --> |---- + * | display time + * |---- + * |---> dsp hold irq + * configure display timing --> | + * standby exit | + * | new frame start. + */ + + reinit_completion(&vop->dsp_hold_completion); + vop_dsp_hold_valid_irq_enable(vop); + + spin_lock(&vop->reg_lock); + + VOP_CTRL_SET(vop, standby, 1); + + spin_unlock(&vop->reg_lock); + + wait_for_completion(&vop->dsp_hold_completion); + + vop_dsp_hold_valid_irq_disable(vop); + } switch (vop->connector_type) { case DRM_MODE_CONNECTOR_LVDS: @@ -1115,7 +1145,6 @@ static void vop_crtc_enable(struct drm_crtc *crtc) default: DRM_ERROR("unsupport connector_type[%d]\n", vop->connector_type); - goto out; }; VOP_CTRL_SET(vop, out_mode, vop->connector_out_mode); @@ -1136,19 +1165,9 @@ static void vop_crtc_enable(struct drm_crtc *crtc) VOP_CTRL_SET(vop, vact_st_end, val); VOP_CTRL_SET(vop, vpost_st_end, val); - - /* - * reset dclk, take all mode config affect, so the clk would run in - * correct frame. - */ - reset_control_assert(vop->dclk_rst); - usleep_range(10, 20); - reset_control_deassert(vop->dclk_rst); - clk_set_rate(vop->dclk, adjusted_mode->clock * 1000); -out: - if (clk_enable(vop->dclk) < 0) - dev_err(vop->dev, "failed to enable dclk\n"); + + VOP_CTRL_SET(vop, standby, 0); } static void vop_crtc_atomic_flush(struct drm_crtc *crtc, -- cgit v1.2.3 From f32fad51eec51ad816cecdc3723ab443cd69b61f Mon Sep 17 00:00:00 2001 From: Mark Yao Date: Wed, 16 Dec 2015 18:09:38 +0800 Subject: drm/rockchip: support atomic asynchronous commit If drm core requests a async commit, rockchip_drm_atomic_commit will schedule a work task to update later. Signed-off-by: Mark Yao --- drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 3 ++ drivers/gpu/drm/rockchip/rockchip_drm_drv.h | 10 ++++++ drivers/gpu/drm/rockchip/rockchip_drm_fb.c | 54 ++++++++++++++++++++++------- 3 files changed, 54 insertions(+), 13 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c index 929eb30e49e5..8397d1b62ef9 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c @@ -140,6 +140,9 @@ static int rockchip_drm_load(struct drm_device *drm_dev, unsigned long flags) if (!private) return -ENOMEM; + mutex_init(&private->commit.lock); + INIT_WORK(&private->commit.work, rockchip_drm_atomic_work); + drm_dev->dev_private = private; drm_mode_config_init(drm_dev); diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h index 4468f98ec437..bb8b076f1dbb 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h @@ -42,6 +42,13 @@ struct rockchip_crtc_funcs { void (*wait_for_update)(struct drm_crtc *crtc); }; +struct rockchip_atomic_commit { + struct work_struct work; + struct drm_atomic_state *state; + struct drm_device *dev; + struct mutex lock; +}; + /* * Rockchip drm private structure. * @@ -52,8 +59,11 @@ struct rockchip_drm_private { struct drm_fb_helper fbdev_helper; struct drm_gem_object *fbdev_bo; const struct rockchip_crtc_funcs *crtc_funcs[ROCKCHIP_MAX_CRTC]; + + struct rockchip_atomic_commit commit; }; +void rockchip_drm_atomic_work(struct work_struct *work); int rockchip_register_crtc_funcs(struct drm_crtc *crtc, const struct rockchip_crtc_funcs *crtc_funcs); void rockchip_unregister_crtc_funcs(struct drm_crtc *crtc); diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c index df1b7b0e9926..f7844883cb76 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c @@ -210,20 +210,11 @@ rockchip_atomic_wait_for_complete(struct drm_atomic_state *old_state) } } -int rockchip_drm_atomic_commit(struct drm_device *dev, - struct drm_atomic_state *state, - bool async) +static void +rockchip_atomic_commit_complete(struct rockchip_atomic_commit *commit) { - int ret; - - if (async) - return -EBUSY; - - ret = drm_atomic_helper_prepare_planes(dev, state); - if (ret) - return ret; - - drm_atomic_helper_swap_state(dev, state); + struct drm_atomic_state *state = commit->state; + struct drm_device *dev = commit->dev; /* * TODO: do fence wait here. @@ -255,6 +246,43 @@ int rockchip_drm_atomic_commit(struct drm_device *dev, drm_atomic_helper_cleanup_planes(dev, state); drm_atomic_state_free(state); +} + +void rockchip_drm_atomic_work(struct work_struct *work) +{ + struct rockchip_atomic_commit *commit = container_of(work, + struct rockchip_atomic_commit, work); + + rockchip_atomic_commit_complete(commit); +} + +int rockchip_drm_atomic_commit(struct drm_device *dev, + struct drm_atomic_state *state, + bool async) +{ + struct rockchip_drm_private *private = dev->dev_private; + struct rockchip_atomic_commit *commit = &private->commit; + int ret; + + ret = drm_atomic_helper_prepare_planes(dev, state); + if (ret) + return ret; + + /* serialize outstanding asynchronous commits */ + mutex_lock(&commit->lock); + flush_work(&commit->work); + + drm_atomic_helper_swap_state(dev, state); + + commit->dev = dev; + commit->state = state; + + if (async) + schedule_work(&commit->work); + else + rockchip_atomic_commit_complete(commit); + + mutex_unlock(&commit->lock); return 0; } -- cgit v1.2.3 From d0e20d0ebfe40a4eba52bef2e1e03e91fce88528 Mon Sep 17 00:00:00 2001 From: Mark Yao Date: Wed, 16 Dec 2015 18:11:24 +0800 Subject: drm/rockchip: direct config connecter gate and out_mode Both connecter gate and out_mode are not conflict with mode set configure. Direct setting connecter gate and out_mode, that allow connector do rockchip_drm_crtc_mode_config after mode set. Signed-off-by: Mark Yao --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 39 +++++++++++++---------------- 1 file changed, 18 insertions(+), 21 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 9ace3ae10819..6ded4cca0283 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -89,9 +89,6 @@ struct vop { struct drm_device *drm_dev; bool is_enabled; - int connector_type; - int connector_out_mode; - /* mutex vsync_ work */ struct mutex vsync_mutex; bool vsync_work_pending; @@ -1018,8 +1015,24 @@ int rockchip_drm_crtc_mode_config(struct drm_crtc *crtc, { struct vop *vop = to_vop(crtc); - vop->connector_type = connector_type; - vop->connector_out_mode = out_mode; + if (WARN_ON(!vop->is_enabled)) + return -EINVAL; + + switch (connector_type) { + case DRM_MODE_CONNECTOR_LVDS: + VOP_CTRL_SET(vop, rgb_en, 1); + break; + case DRM_MODE_CONNECTOR_eDP: + VOP_CTRL_SET(vop, edp_en, 1); + break; + case DRM_MODE_CONNECTOR_HDMIA: + VOP_CTRL_SET(vop, hdmi_en, 1); + break; + default: + DRM_ERROR("unsupport connector_type[%d]\n", connector_type); + return -EINVAL; + }; + VOP_CTRL_SET(vop, out_mode, out_mode); return 0; } @@ -1132,22 +1145,6 @@ static void vop_crtc_enable(struct drm_crtc *crtc) vop_dsp_hold_valid_irq_disable(vop); } - switch (vop->connector_type) { - case DRM_MODE_CONNECTOR_LVDS: - VOP_CTRL_SET(vop, rgb_en, 1); - break; - case DRM_MODE_CONNECTOR_eDP: - VOP_CTRL_SET(vop, edp_en, 1); - break; - case DRM_MODE_CONNECTOR_HDMIA: - VOP_CTRL_SET(vop, hdmi_en, 1); - break; - default: - DRM_ERROR("unsupport connector_type[%d]\n", - vop->connector_type); - }; - VOP_CTRL_SET(vop, out_mode, vop->connector_out_mode); - val = 0x8; val |= (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : 1; val |= (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : (1 << 1); -- cgit v1.2.3 From a8eef71d38da2bb03e187d3284aac6d3e0540f0f Mon Sep 17 00:00:00 2001 From: Mark Yao Date: Mon, 30 Nov 2015 18:41:06 +0800 Subject: drm/rockchip: dw_hdmi: use encoder enable function encoder.enable is more compatible to atomic api than encoder.prepare/commit Signed-off-by: Mark Yao --- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index bddcabd7a370..c65ce8cb30d3 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -195,12 +195,15 @@ static void dw_hdmi_rockchip_encoder_mode_set(struct drm_encoder *encoder, { } -static void dw_hdmi_rockchip_encoder_commit(struct drm_encoder *encoder) +static void dw_hdmi_rockchip_encoder_enable(struct drm_encoder *encoder) { struct rockchip_hdmi *hdmi = to_rockchip_hdmi(encoder); u32 val; int mux; + rockchip_drm_crtc_mode_config(encoder->crtc, DRM_MODE_CONNECTOR_HDMIA, + ROCKCHIP_OUT_MODE_AAAA); + mux = rockchip_drm_encoder_get_mux_id(hdmi->dev->of_node, encoder); if (mux) val = HDMI_SEL_VOP_LIT | (HDMI_SEL_VOP_LIT << 16); @@ -212,17 +215,10 @@ static void dw_hdmi_rockchip_encoder_commit(struct drm_encoder *encoder) (mux) ? "LIT" : "BIG"); } -static void dw_hdmi_rockchip_encoder_prepare(struct drm_encoder *encoder) -{ - rockchip_drm_crtc_mode_config(encoder->crtc, DRM_MODE_CONNECTOR_HDMIA, - ROCKCHIP_OUT_MODE_AAAA); -} - static const struct drm_encoder_helper_funcs dw_hdmi_rockchip_encoder_helper_funcs = { .mode_fixup = dw_hdmi_rockchip_encoder_mode_fixup, .mode_set = dw_hdmi_rockchip_encoder_mode_set, - .prepare = dw_hdmi_rockchip_encoder_prepare, - .commit = dw_hdmi_rockchip_encoder_commit, + .enable = dw_hdmi_rockchip_encoder_enable, .disable = dw_hdmi_rockchip_encoder_disable, }; -- cgit v1.2.3 From 0cf33fe33d4e9fdbbdd0b93101b078b03d0ba9b5 Mon Sep 17 00:00:00 2001 From: Mark Yao Date: Mon, 14 Dec 2015 18:14:36 +0800 Subject: drm/rockchip: vop: merge vop cfg_done into vop_data Move cfg_done register into vop_data, so it can use at multi-vop driver Signed-off-by: Mark Yao --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 6ded4cca0283..dcb1396a4133 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -164,6 +164,8 @@ struct vop_ctrl { struct vop_reg vact_st_end; struct vop_reg hpost_st_end; struct vop_reg vpost_st_end; + + struct vop_reg cfg_done; }; struct vop_scl_regs { @@ -333,6 +335,7 @@ static const struct vop_ctrl ctrl_data = { .vact_st_end = VOP_REG(DSP_VACT_ST_END, 0x1fff1fff, 0), .hpost_st_end = VOP_REG(POST_DSP_HACT_INFO, 0x1fff1fff, 0), .vpost_st_end = VOP_REG(POST_DSP_VACT_INFO, 0x1fff1fff, 0), + .cfg_done = VOP_REG(REG_CFG_DONE, 0x1, 0), }; static const struct vop_reg_data vop_init_reg_table[] = { @@ -393,11 +396,6 @@ static inline uint32_t vop_read_reg(struct vop *vop, uint32_t base, return (vop_readl(vop, base + reg->offset) >> reg->shift) & reg->mask; } -static inline void vop_cfg_done(struct vop *vop) -{ - writel(0x01, vop->regs + REG_CFG_DONE); -} - static inline void vop_mask_write(struct vop *vop, uint32_t offset, uint32_t mask, uint32_t v) { @@ -422,6 +420,11 @@ static inline void vop_mask_write_relaxed(struct vop *vop, uint32_t offset, } } +static inline void vop_cfg_done(struct vop *vop) +{ + VOP_CTRL_SET(vop, cfg_done, 1); +} + static bool has_rb_swapped(uint32_t format) { switch (format) { -- cgit v1.2.3 From dbb3d94444eaa56cb1a6c9790f2fbe14b14310aa Mon Sep 17 00:00:00 2001 From: Mark Yao Date: Tue, 15 Dec 2015 08:36:55 +0800 Subject: drm/rockchip: vop: move interrupt registers into vop_data Move interrupt registers into vop_data, so it can use at multi-vop driver Signed-off-by: Mark Yao --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 81 ++++++++++++++++++++++++----- 1 file changed, 69 insertions(+), 12 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index dcb1396a4133..7674bdcad39d 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -48,6 +48,8 @@ #define REG_SET(x, base, reg, v, mode) \ __REG_SET_##mode(x, base + reg.offset, reg.mask, reg.shift, v) +#define REG_SET_MASK(x, base, reg, v, mode) \ + __REG_SET_##mode(x, base + reg.offset, reg.mask, reg.shift, v) #define VOP_WIN_SET(x, win, name, v) \ REG_SET(x, win->base, win->phy->name, v, RELAXED) @@ -56,6 +58,23 @@ #define VOP_CTRL_SET(x, name, v) \ REG_SET(x, 0, (x)->data->ctrl->name, v, NORMAL) +#define VOP_INTR_GET(vop, name) \ + vop_read_reg(vop, 0, &vop->data->ctrl->name) + +#define VOP_INTR_SET(vop, name, v) \ + REG_SET(vop, 0, vop->data->intr->name, v, NORMAL) +#define VOP_INTR_SET_TYPE(vop, name, type, v) \ + do { \ + int i, reg = 0; \ + for (i = 0; i < vop->data->intr->nintrs; i++) { \ + if (vop->data->intr->intrs[i] & type) \ + reg |= (v) << i; \ + } \ + VOP_INTR_SET(vop, name, reg); \ + } while (0) +#define VOP_INTR_GET_TYPE(vop, name, type) \ + vop_get_intr_type(vop, &vop->data->intr->name, type) + #define VOP_WIN_GET(x, win, name) \ vop_read_reg(x, win->base, &win->phy->name) @@ -168,6 +187,13 @@ struct vop_ctrl { struct vop_reg cfg_done; }; +struct vop_intr { + const int *intrs; + uint32_t nintrs; + struct vop_reg enable; + struct vop_reg clear; + struct vop_reg status; +}; struct vop_scl_regs { struct vop_reg cbcr_vsd_mode; struct vop_reg cbcr_vsu_mode; @@ -227,6 +253,7 @@ struct vop_data { const struct vop_reg_data *init_table; unsigned int table_size; const struct vop_ctrl *ctrl; + const struct vop_intr *intr; const struct vop_win_data *win; unsigned int win_size; }; @@ -364,8 +391,24 @@ static const struct vop_win_data rk3288_vop_win_data[] = { { .base = 0x50, .phy = &win23_data, .type = DRM_PLANE_TYPE_CURSOR }, }; +static const int rk3288_vop_intrs[] = { + DSP_HOLD_VALID_INTR, + FS_INTR, + LINE_FLAG_INTR, + BUS_ERROR_INTR, +}; + +static const struct vop_intr rk3288_vop_intr = { + .intrs = rk3288_vop_intrs, + .nintrs = ARRAY_SIZE(rk3288_vop_intrs), + .status = VOP_REG(INTR_CTRL0, 0xf, 0), + .enable = VOP_REG(INTR_CTRL0, 0xf, 4), + .clear = VOP_REG(INTR_CTRL0, 0xf, 8), +}; + static const struct vop_data rk3288_vop = { .init_table = vop_init_reg_table, + .intr = &rk3288_vop_intr, .table_size = ARRAY_SIZE(vop_init_reg_table), .ctrl = &ctrl_data, .win = rk3288_vop_win_data, @@ -420,6 +463,20 @@ static inline void vop_mask_write_relaxed(struct vop *vop, uint32_t offset, } } +static inline uint32_t vop_get_intr_type(struct vop *vop, + const struct vop_reg *reg, int type) +{ + uint32_t i, ret = 0; + uint32_t regs = vop_read_reg(vop, 0, reg); + + for (i = 0; i < vop->data->intr->nintrs; i++) { + if ((type & vop->data->intr->intrs[i]) && (regs & 1 << i)) + ret |= vop->data->intr->intrs[i]; + } + + return ret; +} + static inline void vop_cfg_done(struct vop *vop) { VOP_CTRL_SET(vop, cfg_done, 1); @@ -616,8 +673,7 @@ static void vop_dsp_hold_valid_irq_enable(struct vop *vop) spin_lock_irqsave(&vop->irq_lock, flags); - vop_mask_write(vop, INTR_CTRL0, DSP_HOLD_VALID_INTR_MASK, - DSP_HOLD_VALID_INTR_EN(1)); + VOP_INTR_SET_TYPE(vop, enable, DSP_HOLD_VALID_INTR, 1); spin_unlock_irqrestore(&vop->irq_lock, flags); } @@ -631,8 +687,7 @@ static void vop_dsp_hold_valid_irq_disable(struct vop *vop) spin_lock_irqsave(&vop->irq_lock, flags); - vop_mask_write(vop, INTR_CTRL0, DSP_HOLD_VALID_INTR_MASK, - DSP_HOLD_VALID_INTR_EN(0)); + VOP_INTR_SET_TYPE(vop, enable, DSP_HOLD_VALID_INTR, 0); spin_unlock_irqrestore(&vop->irq_lock, flags); } @@ -1051,7 +1106,7 @@ static int vop_crtc_enable_vblank(struct drm_crtc *crtc) spin_lock_irqsave(&vop->irq_lock, flags); - vop_mask_write(vop, INTR_CTRL0, FS_INTR_MASK, FS_INTR_EN(1)); + VOP_INTR_SET_TYPE(vop, enable, FS_INTR, 1); spin_unlock_irqrestore(&vop->irq_lock, flags); @@ -1067,7 +1122,9 @@ static void vop_crtc_disable_vblank(struct drm_crtc *crtc) return; spin_lock_irqsave(&vop->irq_lock, flags); - vop_mask_write(vop, INTR_CTRL0, FS_INTR_MASK, FS_INTR_EN(0)); + + VOP_INTR_SET_TYPE(vop, enable, FS_INTR, 0); + spin_unlock_irqrestore(&vop->irq_lock, flags); } @@ -1263,21 +1320,21 @@ static irqreturn_t vop_isr(int irq, void *data) { struct vop *vop = data; struct drm_crtc *crtc = &vop->crtc; - uint32_t intr0_reg, active_irqs; + uint32_t active_irqs; unsigned long flags; int ret = IRQ_NONE; /* - * INTR_CTRL0 register has interrupt status, enable and clear bits, we + * interrupt register has interrupt status, enable and clear bits, we * must hold irq_lock to avoid a race with enable/disable_vblank(). */ spin_lock_irqsave(&vop->irq_lock, flags); - intr0_reg = vop_readl(vop, INTR_CTRL0); - active_irqs = intr0_reg & INTR_MASK; + + active_irqs = VOP_INTR_GET_TYPE(vop, status, INTR_MASK); /* Clear all active interrupt sources */ if (active_irqs) - vop_writel(vop, INTR_CTRL0, - intr0_reg | (active_irqs << INTR_CLR_SHIFT)); + VOP_INTR_SET_TYPE(vop, clear, active_irqs, 1); + spin_unlock_irqrestore(&vop->irq_lock, flags); /* This is expected for vop iommu irqs, since the irq is shared */ -- cgit v1.2.3 From a67719d182291bf62c6093545b9af27f0431cbeb Mon Sep 17 00:00:00 2001 From: Mark Yao Date: Tue, 15 Dec 2015 08:58:26 +0800 Subject: drm/rockchip: vop: spilt register related into rockchip_reg_vop.c No functional updates. Spilt register related into another file would be nice to multi vop driver, Signed-off-by: Mark Yao --- drivers/gpu/drm/rockchip/Makefile | 3 +- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 325 +--------------------------- drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 220 ++++++++++--------- drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 225 +++++++++++++++++++ drivers/gpu/drm/rockchip/rockchip_vop_reg.h | 124 +++++++++++ 5 files changed, 468 insertions(+), 429 deletions(-) create mode 100644 drivers/gpu/drm/rockchip/rockchip_vop_reg.c create mode 100644 drivers/gpu/drm/rockchip/rockchip_vop_reg.h (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/Makefile b/drivers/gpu/drm/rockchip/Makefile index f3d8a19c641f..a9d380f3a423 100644 --- a/drivers/gpu/drm/rockchip/Makefile +++ b/drivers/gpu/drm/rockchip/Makefile @@ -7,4 +7,5 @@ rockchipdrm-y := rockchip_drm_drv.o rockchip_drm_fb.o rockchip_drm_fbdev.o \ obj-$(CONFIG_ROCKCHIP_DW_HDMI) += dw_hdmi-rockchip.o -obj-$(CONFIG_DRM_ROCKCHIP) += rockchipdrm.o rockchip_drm_vop.o +obj-$(CONFIG_DRM_ROCKCHIP) += rockchipdrm.o rockchip_drm_vop.o \ + rockchip_vop_reg.o diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 7674bdcad39d..bbb781cc2208 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -36,11 +36,6 @@ #include "rockchip_drm_fb.h" #include "rockchip_drm_vop.h" -#define VOP_REG(off, _mask, s) \ - {.offset = off, \ - .mask = _mask, \ - .shift = s,} - #define __REG_SET_RELAXED(x, off, mask, shift, v) \ vop_mask_write_relaxed(x, off, (mask) << shift, (v) << shift) #define __REG_SET_NORMAL(x, off, mask, shift, v) \ @@ -143,285 +138,6 @@ struct vop { struct vop_win win[]; }; -enum vop_data_format { - VOP_FMT_ARGB8888 = 0, - VOP_FMT_RGB888, - VOP_FMT_RGB565, - VOP_FMT_YUV420SP = 4, - VOP_FMT_YUV422SP, - VOP_FMT_YUV444SP, -}; - -struct vop_reg_data { - uint32_t offset; - uint32_t value; -}; - -struct vop_reg { - uint32_t offset; - uint32_t shift; - uint32_t mask; -}; - -struct vop_ctrl { - struct vop_reg standby; - struct vop_reg data_blank; - struct vop_reg gate_en; - struct vop_reg mmu_en; - struct vop_reg rgb_en; - struct vop_reg edp_en; - struct vop_reg hdmi_en; - struct vop_reg mipi_en; - struct vop_reg out_mode; - struct vop_reg dither_down; - struct vop_reg dither_up; - struct vop_reg pin_pol; - - struct vop_reg htotal_pw; - struct vop_reg hact_st_end; - struct vop_reg vtotal_pw; - struct vop_reg vact_st_end; - struct vop_reg hpost_st_end; - struct vop_reg vpost_st_end; - - struct vop_reg cfg_done; -}; - -struct vop_intr { - const int *intrs; - uint32_t nintrs; - struct vop_reg enable; - struct vop_reg clear; - struct vop_reg status; -}; -struct vop_scl_regs { - struct vop_reg cbcr_vsd_mode; - struct vop_reg cbcr_vsu_mode; - struct vop_reg cbcr_hsd_mode; - struct vop_reg cbcr_ver_scl_mode; - struct vop_reg cbcr_hor_scl_mode; - struct vop_reg yrgb_vsd_mode; - struct vop_reg yrgb_vsu_mode; - struct vop_reg yrgb_hsd_mode; - struct vop_reg yrgb_ver_scl_mode; - struct vop_reg yrgb_hor_scl_mode; - struct vop_reg line_load_mode; - struct vop_reg cbcr_axi_gather_num; - struct vop_reg yrgb_axi_gather_num; - struct vop_reg vsd_cbcr_gt2; - struct vop_reg vsd_cbcr_gt4; - struct vop_reg vsd_yrgb_gt2; - struct vop_reg vsd_yrgb_gt4; - struct vop_reg bic_coe_sel; - struct vop_reg cbcr_axi_gather_en; - struct vop_reg yrgb_axi_gather_en; - - struct vop_reg lb_mode; - struct vop_reg scale_yrgb_x; - struct vop_reg scale_yrgb_y; - struct vop_reg scale_cbcr_x; - struct vop_reg scale_cbcr_y; -}; - -struct vop_win_phy { - const struct vop_scl_regs *scl; - const uint32_t *data_formats; - uint32_t nformats; - - struct vop_reg enable; - struct vop_reg format; - struct vop_reg rb_swap; - struct vop_reg act_info; - struct vop_reg dsp_info; - struct vop_reg dsp_st; - struct vop_reg yrgb_mst; - struct vop_reg uv_mst; - struct vop_reg yrgb_vir; - struct vop_reg uv_vir; - - struct vop_reg dst_alpha_ctl; - struct vop_reg src_alpha_ctl; -}; - -struct vop_win_data { - uint32_t base; - const struct vop_win_phy *phy; - enum drm_plane_type type; -}; - -struct vop_data { - const struct vop_reg_data *init_table; - unsigned int table_size; - const struct vop_ctrl *ctrl; - const struct vop_intr *intr; - const struct vop_win_data *win; - unsigned int win_size; -}; - -static const uint32_t formats_01[] = { - DRM_FORMAT_XRGB8888, - DRM_FORMAT_ARGB8888, - DRM_FORMAT_XBGR8888, - DRM_FORMAT_ABGR8888, - DRM_FORMAT_RGB888, - DRM_FORMAT_BGR888, - DRM_FORMAT_RGB565, - DRM_FORMAT_BGR565, - DRM_FORMAT_NV12, - DRM_FORMAT_NV16, - DRM_FORMAT_NV24, -}; - -static const uint32_t formats_234[] = { - DRM_FORMAT_XRGB8888, - DRM_FORMAT_ARGB8888, - DRM_FORMAT_XBGR8888, - DRM_FORMAT_ABGR8888, - DRM_FORMAT_RGB888, - DRM_FORMAT_BGR888, - DRM_FORMAT_RGB565, - DRM_FORMAT_BGR565, -}; - -static const struct vop_scl_regs win_full_scl = { - .cbcr_vsd_mode = VOP_REG(WIN0_CTRL1, 0x1, 31), - .cbcr_vsu_mode = VOP_REG(WIN0_CTRL1, 0x1, 30), - .cbcr_hsd_mode = VOP_REG(WIN0_CTRL1, 0x3, 28), - .cbcr_ver_scl_mode = VOP_REG(WIN0_CTRL1, 0x3, 26), - .cbcr_hor_scl_mode = VOP_REG(WIN0_CTRL1, 0x3, 24), - .yrgb_vsd_mode = VOP_REG(WIN0_CTRL1, 0x1, 23), - .yrgb_vsu_mode = VOP_REG(WIN0_CTRL1, 0x1, 22), - .yrgb_hsd_mode = VOP_REG(WIN0_CTRL1, 0x3, 20), - .yrgb_ver_scl_mode = VOP_REG(WIN0_CTRL1, 0x3, 18), - .yrgb_hor_scl_mode = VOP_REG(WIN0_CTRL1, 0x3, 16), - .line_load_mode = VOP_REG(WIN0_CTRL1, 0x1, 15), - .cbcr_axi_gather_num = VOP_REG(WIN0_CTRL1, 0x7, 12), - .yrgb_axi_gather_num = VOP_REG(WIN0_CTRL1, 0xf, 8), - .vsd_cbcr_gt2 = VOP_REG(WIN0_CTRL1, 0x1, 7), - .vsd_cbcr_gt4 = VOP_REG(WIN0_CTRL1, 0x1, 6), - .vsd_yrgb_gt2 = VOP_REG(WIN0_CTRL1, 0x1, 5), - .vsd_yrgb_gt4 = VOP_REG(WIN0_CTRL1, 0x1, 4), - .bic_coe_sel = VOP_REG(WIN0_CTRL1, 0x3, 2), - .cbcr_axi_gather_en = VOP_REG(WIN0_CTRL1, 0x1, 1), - .yrgb_axi_gather_en = VOP_REG(WIN0_CTRL1, 0x1, 0), - .lb_mode = VOP_REG(WIN0_CTRL0, 0x7, 5), - .scale_yrgb_x = VOP_REG(WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0), - .scale_yrgb_y = VOP_REG(WIN0_SCL_FACTOR_YRGB, 0xffff, 16), - .scale_cbcr_x = VOP_REG(WIN0_SCL_FACTOR_CBR, 0xffff, 0x0), - .scale_cbcr_y = VOP_REG(WIN0_SCL_FACTOR_CBR, 0xffff, 16), -}; - -static const struct vop_win_phy win01_data = { - .scl = &win_full_scl, - .data_formats = formats_01, - .nformats = ARRAY_SIZE(formats_01), - .enable = VOP_REG(WIN0_CTRL0, 0x1, 0), - .format = VOP_REG(WIN0_CTRL0, 0x7, 1), - .rb_swap = VOP_REG(WIN0_CTRL0, 0x1, 12), - .act_info = VOP_REG(WIN0_ACT_INFO, 0x1fff1fff, 0), - .dsp_info = VOP_REG(WIN0_DSP_INFO, 0x0fff0fff, 0), - .dsp_st = VOP_REG(WIN0_DSP_ST, 0x1fff1fff, 0), - .yrgb_mst = VOP_REG(WIN0_YRGB_MST, 0xffffffff, 0), - .uv_mst = VOP_REG(WIN0_CBR_MST, 0xffffffff, 0), - .yrgb_vir = VOP_REG(WIN0_VIR, 0x3fff, 0), - .uv_vir = VOP_REG(WIN0_VIR, 0x3fff, 16), - .src_alpha_ctl = VOP_REG(WIN0_SRC_ALPHA_CTRL, 0xff, 0), - .dst_alpha_ctl = VOP_REG(WIN0_DST_ALPHA_CTRL, 0xff, 0), -}; - -static const struct vop_win_phy win23_data = { - .data_formats = formats_234, - .nformats = ARRAY_SIZE(formats_234), - .enable = VOP_REG(WIN2_CTRL0, 0x1, 0), - .format = VOP_REG(WIN2_CTRL0, 0x7, 1), - .rb_swap = VOP_REG(WIN2_CTRL0, 0x1, 12), - .dsp_info = VOP_REG(WIN2_DSP_INFO0, 0x0fff0fff, 0), - .dsp_st = VOP_REG(WIN2_DSP_ST0, 0x1fff1fff, 0), - .yrgb_mst = VOP_REG(WIN2_MST0, 0xffffffff, 0), - .yrgb_vir = VOP_REG(WIN2_VIR0_1, 0x1fff, 0), - .src_alpha_ctl = VOP_REG(WIN2_SRC_ALPHA_CTRL, 0xff, 0), - .dst_alpha_ctl = VOP_REG(WIN2_DST_ALPHA_CTRL, 0xff, 0), -}; - -static const struct vop_ctrl ctrl_data = { - .standby = VOP_REG(SYS_CTRL, 0x1, 22), - .gate_en = VOP_REG(SYS_CTRL, 0x1, 23), - .mmu_en = VOP_REG(SYS_CTRL, 0x1, 20), - .rgb_en = VOP_REG(SYS_CTRL, 0x1, 12), - .hdmi_en = VOP_REG(SYS_CTRL, 0x1, 13), - .edp_en = VOP_REG(SYS_CTRL, 0x1, 14), - .mipi_en = VOP_REG(SYS_CTRL, 0x1, 15), - .dither_down = VOP_REG(DSP_CTRL1, 0xf, 1), - .dither_up = VOP_REG(DSP_CTRL1, 0x1, 6), - .data_blank = VOP_REG(DSP_CTRL0, 0x1, 19), - .out_mode = VOP_REG(DSP_CTRL0, 0xf, 0), - .pin_pol = VOP_REG(DSP_CTRL0, 0xf, 4), - .htotal_pw = VOP_REG(DSP_HTOTAL_HS_END, 0x1fff1fff, 0), - .hact_st_end = VOP_REG(DSP_HACT_ST_END, 0x1fff1fff, 0), - .vtotal_pw = VOP_REG(DSP_VTOTAL_VS_END, 0x1fff1fff, 0), - .vact_st_end = VOP_REG(DSP_VACT_ST_END, 0x1fff1fff, 0), - .hpost_st_end = VOP_REG(POST_DSP_HACT_INFO, 0x1fff1fff, 0), - .vpost_st_end = VOP_REG(POST_DSP_VACT_INFO, 0x1fff1fff, 0), - .cfg_done = VOP_REG(REG_CFG_DONE, 0x1, 0), -}; - -static const struct vop_reg_data vop_init_reg_table[] = { - {SYS_CTRL, 0x00c00000}, - {DSP_CTRL0, 0x00000000}, - {WIN0_CTRL0, 0x00000080}, - {WIN1_CTRL0, 0x00000080}, - /* TODO: Win2/3 support multiple area function, but we haven't found - * a suitable way to use it yet, so let's just use them as other windows - * with only area 0 enabled. - */ - {WIN2_CTRL0, 0x00000010}, - {WIN3_CTRL0, 0x00000010}, -}; - -/* - * Note: rk3288 has a dedicated 'cursor' window, however, that window requires - * special support to get alpha blending working. For now, just use overlay - * window 3 for the drm cursor. - * - */ -static const struct vop_win_data rk3288_vop_win_data[] = { - { .base = 0x00, .phy = &win01_data, .type = DRM_PLANE_TYPE_PRIMARY }, - { .base = 0x40, .phy = &win01_data, .type = DRM_PLANE_TYPE_OVERLAY }, - { .base = 0x00, .phy = &win23_data, .type = DRM_PLANE_TYPE_OVERLAY }, - { .base = 0x50, .phy = &win23_data, .type = DRM_PLANE_TYPE_CURSOR }, -}; - -static const int rk3288_vop_intrs[] = { - DSP_HOLD_VALID_INTR, - FS_INTR, - LINE_FLAG_INTR, - BUS_ERROR_INTR, -}; - -static const struct vop_intr rk3288_vop_intr = { - .intrs = rk3288_vop_intrs, - .nintrs = ARRAY_SIZE(rk3288_vop_intrs), - .status = VOP_REG(INTR_CTRL0, 0xf, 0), - .enable = VOP_REG(INTR_CTRL0, 0xf, 4), - .clear = VOP_REG(INTR_CTRL0, 0xf, 8), -}; - -static const struct vop_data rk3288_vop = { - .init_table = vop_init_reg_table, - .intr = &rk3288_vop_intr, - .table_size = ARRAY_SIZE(vop_init_reg_table), - .ctrl = &ctrl_data, - .win = rk3288_vop_win_data, - .win_size = ARRAY_SIZE(rk3288_vop_win_data), -}; - -static const struct of_device_id vop_driver_dt_match[] = { - { .compatible = "rockchip,rk3288-vop", - .data = &rk3288_vop }, - {}, -}; -MODULE_DEVICE_TABLE(of, vop_driver_dt_match); - static inline void vop_writel(struct vop *vop, uint32_t offset, uint32_t v) { writel(v, vop->regs + offset); @@ -1583,7 +1299,6 @@ static void vop_win_init(struct vop *vop) static int vop_bind(struct device *dev, struct device *master, void *data) { struct platform_device *pdev = to_platform_device(dev); - const struct of_device_id *of_id; const struct vop_data *vop_data; struct drm_device *drm_dev = data; struct vop *vop; @@ -1591,8 +1306,7 @@ static int vop_bind(struct device *dev, struct device *master, void *data) size_t alloc_size; int ret, irq; - of_id = of_match_device(vop_driver_dt_match, dev); - vop_data = of_id->data; + vop_data = of_device_get_match_data(dev); if (!vop_data) return -ENODEV; @@ -1661,42 +1375,7 @@ static void vop_unbind(struct device *dev, struct device *master, void *data) vop_destroy_crtc(vop); } -static const struct component_ops vop_component_ops = { +const struct component_ops vop_component_ops = { .bind = vop_bind, .unbind = vop_unbind, }; - -static int vop_probe(struct platform_device *pdev) -{ - struct device *dev = &pdev->dev; - - if (!dev->of_node) { - dev_err(dev, "can't find vop devices\n"); - return -ENODEV; - } - - return component_add(dev, &vop_component_ops); -} - -static int vop_remove(struct platform_device *pdev) -{ - component_del(&pdev->dev, &vop_component_ops); - - return 0; -} - -struct platform_driver vop_platform_driver = { - .probe = vop_probe, - .remove = vop_remove, - .driver = { - .name = "rockchip-vop", - .owner = THIS_MODULE, - .of_match_table = of_match_ptr(vop_driver_dt_match), - }, -}; - -module_platform_driver(vop_platform_driver); - -MODULE_AUTHOR("Mark Yao "); -MODULE_DESCRIPTION("ROCKCHIP VOP Driver"); -MODULE_LICENSE("GPL v2"); diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h index a2d4ddb896fa..cbb114aa13c5 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h @@ -15,111 +15,120 @@ #ifndef _ROCKCHIP_DRM_VOP_H #define _ROCKCHIP_DRM_VOP_H -/* register definition */ -#define REG_CFG_DONE 0x0000 -#define VERSION_INFO 0x0004 -#define SYS_CTRL 0x0008 -#define SYS_CTRL1 0x000c -#define DSP_CTRL0 0x0010 -#define DSP_CTRL1 0x0014 -#define DSP_BG 0x0018 -#define MCU_CTRL 0x001c -#define INTR_CTRL0 0x0020 -#define INTR_CTRL1 0x0024 -#define WIN0_CTRL0 0x0030 -#define WIN0_CTRL1 0x0034 -#define WIN0_COLOR_KEY 0x0038 -#define WIN0_VIR 0x003c -#define WIN0_YRGB_MST 0x0040 -#define WIN0_CBR_MST 0x0044 -#define WIN0_ACT_INFO 0x0048 -#define WIN0_DSP_INFO 0x004c -#define WIN0_DSP_ST 0x0050 -#define WIN0_SCL_FACTOR_YRGB 0x0054 -#define WIN0_SCL_FACTOR_CBR 0x0058 -#define WIN0_SCL_OFFSET 0x005c -#define WIN0_SRC_ALPHA_CTRL 0x0060 -#define WIN0_DST_ALPHA_CTRL 0x0064 -#define WIN0_FADING_CTRL 0x0068 -/* win1 register */ -#define WIN1_CTRL0 0x0070 -#define WIN1_CTRL1 0x0074 -#define WIN1_COLOR_KEY 0x0078 -#define WIN1_VIR 0x007c -#define WIN1_YRGB_MST 0x0080 -#define WIN1_CBR_MST 0x0084 -#define WIN1_ACT_INFO 0x0088 -#define WIN1_DSP_INFO 0x008c -#define WIN1_DSP_ST 0x0090 -#define WIN1_SCL_FACTOR_YRGB 0x0094 -#define WIN1_SCL_FACTOR_CBR 0x0098 -#define WIN1_SCL_OFFSET 0x009c -#define WIN1_SRC_ALPHA_CTRL 0x00a0 -#define WIN1_DST_ALPHA_CTRL 0x00a4 -#define WIN1_FADING_CTRL 0x00a8 -/* win2 register */ -#define WIN2_CTRL0 0x00b0 -#define WIN2_CTRL1 0x00b4 -#define WIN2_VIR0_1 0x00b8 -#define WIN2_VIR2_3 0x00bc -#define WIN2_MST0 0x00c0 -#define WIN2_DSP_INFO0 0x00c4 -#define WIN2_DSP_ST0 0x00c8 -#define WIN2_COLOR_KEY 0x00cc -#define WIN2_MST1 0x00d0 -#define WIN2_DSP_INFO1 0x00d4 -#define WIN2_DSP_ST1 0x00d8 -#define WIN2_SRC_ALPHA_CTRL 0x00dc -#define WIN2_MST2 0x00e0 -#define WIN2_DSP_INFO2 0x00e4 -#define WIN2_DSP_ST2 0x00e8 -#define WIN2_DST_ALPHA_CTRL 0x00ec -#define WIN2_MST3 0x00f0 -#define WIN2_DSP_INFO3 0x00f4 -#define WIN2_DSP_ST3 0x00f8 -#define WIN2_FADING_CTRL 0x00fc -/* win3 register */ -#define WIN3_CTRL0 0x0100 -#define WIN3_CTRL1 0x0104 -#define WIN3_VIR0_1 0x0108 -#define WIN3_VIR2_3 0x010c -#define WIN3_MST0 0x0110 -#define WIN3_DSP_INFO0 0x0114 -#define WIN3_DSP_ST0 0x0118 -#define WIN3_COLOR_KEY 0x011c -#define WIN3_MST1 0x0120 -#define WIN3_DSP_INFO1 0x0124 -#define WIN3_DSP_ST1 0x0128 -#define WIN3_SRC_ALPHA_CTRL 0x012c -#define WIN3_MST2 0x0130 -#define WIN3_DSP_INFO2 0x0134 -#define WIN3_DSP_ST2 0x0138 -#define WIN3_DST_ALPHA_CTRL 0x013c -#define WIN3_MST3 0x0140 -#define WIN3_DSP_INFO3 0x0144 -#define WIN3_DSP_ST3 0x0148 -#define WIN3_FADING_CTRL 0x014c -/* hwc register */ -#define HWC_CTRL0 0x0150 -#define HWC_CTRL1 0x0154 -#define HWC_MST 0x0158 -#define HWC_DSP_ST 0x015c -#define HWC_SRC_ALPHA_CTRL 0x0160 -#define HWC_DST_ALPHA_CTRL 0x0164 -#define HWC_FADING_CTRL 0x0168 -/* post process register */ -#define POST_DSP_HACT_INFO 0x0170 -#define POST_DSP_VACT_INFO 0x0174 -#define POST_SCL_FACTOR_YRGB 0x0178 -#define POST_SCL_CTRL 0x0180 -#define POST_DSP_VACT_INFO_F1 0x0184 -#define DSP_HTOTAL_HS_END 0x0188 -#define DSP_HACT_ST_END 0x018c -#define DSP_VTOTAL_VS_END 0x0190 -#define DSP_VACT_ST_END 0x0194 -#define DSP_VS_ST_END_F1 0x0198 -#define DSP_VACT_ST_END_F1 0x019c -/* register definition end */ +enum vop_data_format { + VOP_FMT_ARGB8888 = 0, + VOP_FMT_RGB888, + VOP_FMT_RGB565, + VOP_FMT_YUV420SP = 4, + VOP_FMT_YUV422SP, + VOP_FMT_YUV444SP, +}; + +struct vop_reg_data { + uint32_t offset; + uint32_t value; +}; + +struct vop_reg { + uint32_t offset; + uint32_t shift; + uint32_t mask; +}; + +struct vop_ctrl { + struct vop_reg standby; + struct vop_reg data_blank; + struct vop_reg gate_en; + struct vop_reg mmu_en; + struct vop_reg rgb_en; + struct vop_reg edp_en; + struct vop_reg hdmi_en; + struct vop_reg mipi_en; + struct vop_reg out_mode; + struct vop_reg dither_down; + struct vop_reg dither_up; + struct vop_reg pin_pol; + + struct vop_reg htotal_pw; + struct vop_reg hact_st_end; + struct vop_reg vtotal_pw; + struct vop_reg vact_st_end; + struct vop_reg hpost_st_end; + struct vop_reg vpost_st_end; + + struct vop_reg cfg_done; +}; + +struct vop_intr { + const int *intrs; + uint32_t nintrs; + struct vop_reg enable; + struct vop_reg clear; + struct vop_reg status; +}; +struct vop_scl_regs { + struct vop_reg cbcr_vsd_mode; + struct vop_reg cbcr_vsu_mode; + struct vop_reg cbcr_hsd_mode; + struct vop_reg cbcr_ver_scl_mode; + struct vop_reg cbcr_hor_scl_mode; + struct vop_reg yrgb_vsd_mode; + struct vop_reg yrgb_vsu_mode; + struct vop_reg yrgb_hsd_mode; + struct vop_reg yrgb_ver_scl_mode; + struct vop_reg yrgb_hor_scl_mode; + struct vop_reg line_load_mode; + struct vop_reg cbcr_axi_gather_num; + struct vop_reg yrgb_axi_gather_num; + struct vop_reg vsd_cbcr_gt2; + struct vop_reg vsd_cbcr_gt4; + struct vop_reg vsd_yrgb_gt2; + struct vop_reg vsd_yrgb_gt4; + struct vop_reg bic_coe_sel; + struct vop_reg cbcr_axi_gather_en; + struct vop_reg yrgb_axi_gather_en; + + struct vop_reg lb_mode; + struct vop_reg scale_yrgb_x; + struct vop_reg scale_yrgb_y; + struct vop_reg scale_cbcr_x; + struct vop_reg scale_cbcr_y; +}; + +struct vop_win_phy { + const struct vop_scl_regs *scl; + const uint32_t *data_formats; + uint32_t nformats; + + struct vop_reg enable; + struct vop_reg format; + struct vop_reg rb_swap; + struct vop_reg act_info; + struct vop_reg dsp_info; + struct vop_reg dsp_st; + struct vop_reg yrgb_mst; + struct vop_reg uv_mst; + struct vop_reg yrgb_vir; + struct vop_reg uv_vir; + + struct vop_reg dst_alpha_ctl; + struct vop_reg src_alpha_ctl; +}; + +struct vop_win_data { + uint32_t base; + const struct vop_win_phy *phy; + enum drm_plane_type type; +}; + +struct vop_data { + const struct vop_reg_data *init_table; + unsigned int table_size; + const struct vop_ctrl *ctrl; + const struct vop_intr *intr; + const struct vop_win_data *win; + unsigned int win_size; +}; /* interrupt define */ #define DSP_HOLD_VALID_INTR (1 << 0) @@ -286,4 +295,5 @@ static inline int scl_vop_cal_lb_mode(int width, bool is_yuv) return lb_mode; } +extern const struct component_ops vop_component_ops; #endif /* _ROCKCHIP_DRM_VOP_H */ diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c new file mode 100644 index 000000000000..d47bfc3f753a --- /dev/null +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -0,0 +1,225 @@ +/* + * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd + * Author:Mark Yao + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +#include +#include + +#include "rockchip_drm_vop.h" +#include "rockchip_vop_reg.h" + +#define VOP_REG(off, _mask, s) \ + {.offset = off, \ + .mask = _mask, \ + .shift = s,} + +static const uint32_t formats_01[] = { + DRM_FORMAT_XRGB8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_RGB888, + DRM_FORMAT_BGR888, + DRM_FORMAT_RGB565, + DRM_FORMAT_BGR565, + DRM_FORMAT_NV12, + DRM_FORMAT_NV16, + DRM_FORMAT_NV24, +}; + +static const uint32_t formats_234[] = { + DRM_FORMAT_XRGB8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_RGB888, + DRM_FORMAT_BGR888, + DRM_FORMAT_RGB565, + DRM_FORMAT_BGR565, +}; + +static const struct vop_scl_regs win_full_scl = { + .cbcr_vsd_mode = VOP_REG(WIN0_CTRL1, 0x1, 31), + .cbcr_vsu_mode = VOP_REG(WIN0_CTRL1, 0x1, 30), + .cbcr_hsd_mode = VOP_REG(WIN0_CTRL1, 0x3, 28), + .cbcr_ver_scl_mode = VOP_REG(WIN0_CTRL1, 0x3, 26), + .cbcr_hor_scl_mode = VOP_REG(WIN0_CTRL1, 0x3, 24), + .yrgb_vsd_mode = VOP_REG(WIN0_CTRL1, 0x1, 23), + .yrgb_vsu_mode = VOP_REG(WIN0_CTRL1, 0x1, 22), + .yrgb_hsd_mode = VOP_REG(WIN0_CTRL1, 0x3, 20), + .yrgb_ver_scl_mode = VOP_REG(WIN0_CTRL1, 0x3, 18), + .yrgb_hor_scl_mode = VOP_REG(WIN0_CTRL1, 0x3, 16), + .line_load_mode = VOP_REG(WIN0_CTRL1, 0x1, 15), + .cbcr_axi_gather_num = VOP_REG(WIN0_CTRL1, 0x7, 12), + .yrgb_axi_gather_num = VOP_REG(WIN0_CTRL1, 0xf, 8), + .vsd_cbcr_gt2 = VOP_REG(WIN0_CTRL1, 0x1, 7), + .vsd_cbcr_gt4 = VOP_REG(WIN0_CTRL1, 0x1, 6), + .vsd_yrgb_gt2 = VOP_REG(WIN0_CTRL1, 0x1, 5), + .vsd_yrgb_gt4 = VOP_REG(WIN0_CTRL1, 0x1, 4), + .bic_coe_sel = VOP_REG(WIN0_CTRL1, 0x3, 2), + .cbcr_axi_gather_en = VOP_REG(WIN0_CTRL1, 0x1, 1), + .yrgb_axi_gather_en = VOP_REG(WIN0_CTRL1, 0x1, 0), + .lb_mode = VOP_REG(WIN0_CTRL0, 0x7, 5), + .scale_yrgb_x = VOP_REG(WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0), + .scale_yrgb_y = VOP_REG(WIN0_SCL_FACTOR_YRGB, 0xffff, 16), + .scale_cbcr_x = VOP_REG(WIN0_SCL_FACTOR_CBR, 0xffff, 0x0), + .scale_cbcr_y = VOP_REG(WIN0_SCL_FACTOR_CBR, 0xffff, 16), +}; + +static const struct vop_win_phy win01_data = { + .scl = &win_full_scl, + .data_formats = formats_01, + .nformats = ARRAY_SIZE(formats_01), + .enable = VOP_REG(WIN0_CTRL0, 0x1, 0), + .format = VOP_REG(WIN0_CTRL0, 0x7, 1), + .rb_swap = VOP_REG(WIN0_CTRL0, 0x1, 12), + .act_info = VOP_REG(WIN0_ACT_INFO, 0x1fff1fff, 0), + .dsp_info = VOP_REG(WIN0_DSP_INFO, 0x0fff0fff, 0), + .dsp_st = VOP_REG(WIN0_DSP_ST, 0x1fff1fff, 0), + .yrgb_mst = VOP_REG(WIN0_YRGB_MST, 0xffffffff, 0), + .uv_mst = VOP_REG(WIN0_CBR_MST, 0xffffffff, 0), + .yrgb_vir = VOP_REG(WIN0_VIR, 0x3fff, 0), + .uv_vir = VOP_REG(WIN0_VIR, 0x3fff, 16), + .src_alpha_ctl = VOP_REG(WIN0_SRC_ALPHA_CTRL, 0xff, 0), + .dst_alpha_ctl = VOP_REG(WIN0_DST_ALPHA_CTRL, 0xff, 0), +}; + +static const struct vop_win_phy win23_data = { + .data_formats = formats_234, + .nformats = ARRAY_SIZE(formats_234), + .enable = VOP_REG(WIN2_CTRL0, 0x1, 0), + .format = VOP_REG(WIN2_CTRL0, 0x7, 1), + .rb_swap = VOP_REG(WIN2_CTRL0, 0x1, 12), + .dsp_info = VOP_REG(WIN2_DSP_INFO0, 0x0fff0fff, 0), + .dsp_st = VOP_REG(WIN2_DSP_ST0, 0x1fff1fff, 0), + .yrgb_mst = VOP_REG(WIN2_MST0, 0xffffffff, 0), + .yrgb_vir = VOP_REG(WIN2_VIR0_1, 0x1fff, 0), + .src_alpha_ctl = VOP_REG(WIN2_SRC_ALPHA_CTRL, 0xff, 0), + .dst_alpha_ctl = VOP_REG(WIN2_DST_ALPHA_CTRL, 0xff, 0), +}; + +static const struct vop_ctrl ctrl_data = { + .standby = VOP_REG(SYS_CTRL, 0x1, 22), + .gate_en = VOP_REG(SYS_CTRL, 0x1, 23), + .mmu_en = VOP_REG(SYS_CTRL, 0x1, 20), + .rgb_en = VOP_REG(SYS_CTRL, 0x1, 12), + .hdmi_en = VOP_REG(SYS_CTRL, 0x1, 13), + .edp_en = VOP_REG(SYS_CTRL, 0x1, 14), + .mipi_en = VOP_REG(SYS_CTRL, 0x1, 15), + .dither_down = VOP_REG(DSP_CTRL1, 0xf, 1), + .dither_up = VOP_REG(DSP_CTRL1, 0x1, 6), + .data_blank = VOP_REG(DSP_CTRL0, 0x1, 19), + .out_mode = VOP_REG(DSP_CTRL0, 0xf, 0), + .pin_pol = VOP_REG(DSP_CTRL0, 0xf, 4), + .htotal_pw = VOP_REG(DSP_HTOTAL_HS_END, 0x1fff1fff, 0), + .hact_st_end = VOP_REG(DSP_HACT_ST_END, 0x1fff1fff, 0), + .vtotal_pw = VOP_REG(DSP_VTOTAL_VS_END, 0x1fff1fff, 0), + .vact_st_end = VOP_REG(DSP_VACT_ST_END, 0x1fff1fff, 0), + .hpost_st_end = VOP_REG(POST_DSP_HACT_INFO, 0x1fff1fff, 0), + .vpost_st_end = VOP_REG(POST_DSP_VACT_INFO, 0x1fff1fff, 0), + .cfg_done = VOP_REG(REG_CFG_DONE, 0x1, 0), +}; + +static const struct vop_reg_data vop_init_reg_table[] = { + {SYS_CTRL, 0x00c00000}, + {DSP_CTRL0, 0x00000000}, + {WIN0_CTRL0, 0x00000080}, + {WIN1_CTRL0, 0x00000080}, + /* TODO: Win2/3 support multiple area function, but we haven't found + * a suitable way to use it yet, so let's just use them as other windows + * with only area 0 enabled. + */ + {WIN2_CTRL0, 0x00000010}, + {WIN3_CTRL0, 0x00000010}, +}; + +/* + * Note: rk3288 has a dedicated 'cursor' window, however, that window requires + * special support to get alpha blending working. For now, just use overlay + * window 3 for the drm cursor. + * + */ +static const struct vop_win_data rk3288_vop_win_data[] = { + { .base = 0x00, .phy = &win01_data, .type = DRM_PLANE_TYPE_PRIMARY }, + { .base = 0x40, .phy = &win01_data, .type = DRM_PLANE_TYPE_OVERLAY }, + { .base = 0x00, .phy = &win23_data, .type = DRM_PLANE_TYPE_OVERLAY }, + { .base = 0x50, .phy = &win23_data, .type = DRM_PLANE_TYPE_CURSOR }, +}; + +static const int rk3288_vop_intrs[] = { + DSP_HOLD_VALID_INTR, + FS_INTR, + LINE_FLAG_INTR, + BUS_ERROR_INTR, +}; + +static const struct vop_intr rk3288_vop_intr = { + .intrs = rk3288_vop_intrs, + .nintrs = ARRAY_SIZE(rk3288_vop_intrs), + .status = VOP_REG(INTR_CTRL0, 0xf, 0), + .enable = VOP_REG(INTR_CTRL0, 0xf, 4), + .clear = VOP_REG(INTR_CTRL0, 0xf, 8), +}; + +static const struct vop_data rk3288_vop = { + .init_table = vop_init_reg_table, + .intr = &rk3288_vop_intr, + .table_size = ARRAY_SIZE(vop_init_reg_table), + .ctrl = &ctrl_data, + .win = rk3288_vop_win_data, + .win_size = ARRAY_SIZE(rk3288_vop_win_data), +}; + +static const struct of_device_id vop_driver_dt_match[] = { + { .compatible = "rockchip,rk3288-vop", + .data = &rk3288_vop }, + {}, +}; +MODULE_DEVICE_TABLE(of, vop_driver_dt_match); + +static int vop_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + + if (!dev->of_node) { + dev_err(dev, "can't find vop devices\n"); + return -ENODEV; + } + + return component_add(dev, &vop_component_ops); +} + +static int vop_remove(struct platform_device *pdev) +{ + component_del(&pdev->dev, &vop_component_ops); + + return 0; +} + +struct platform_driver vop_platform_driver = { + .probe = vop_probe, + .remove = vop_remove, + .driver = { + .name = "rockchip-vop", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr(vop_driver_dt_match), + }, +}; + +module_platform_driver(vop_platform_driver); + +MODULE_AUTHOR("Mark Yao "); +MODULE_DESCRIPTION("ROCKCHIP VOP Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h new file mode 100644 index 000000000000..b0fa35d42878 --- /dev/null +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h @@ -0,0 +1,124 @@ +/* + * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd + * Author:Mark Yao + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _ROCKCHIP_VOP_REG_H +#define _ROCKCHIP_VOP_REG_H + +/* register definition */ +#define REG_CFG_DONE 0x0000 +#define VERSION_INFO 0x0004 +#define SYS_CTRL 0x0008 +#define SYS_CTRL1 0x000c +#define DSP_CTRL0 0x0010 +#define DSP_CTRL1 0x0014 +#define DSP_BG 0x0018 +#define MCU_CTRL 0x001c +#define INTR_CTRL0 0x0020 +#define INTR_CTRL1 0x0024 +#define WIN0_CTRL0 0x0030 +#define WIN0_CTRL1 0x0034 +#define WIN0_COLOR_KEY 0x0038 +#define WIN0_VIR 0x003c +#define WIN0_YRGB_MST 0x0040 +#define WIN0_CBR_MST 0x0044 +#define WIN0_ACT_INFO 0x0048 +#define WIN0_DSP_INFO 0x004c +#define WIN0_DSP_ST 0x0050 +#define WIN0_SCL_FACTOR_YRGB 0x0054 +#define WIN0_SCL_FACTOR_CBR 0x0058 +#define WIN0_SCL_OFFSET 0x005c +#define WIN0_SRC_ALPHA_CTRL 0x0060 +#define WIN0_DST_ALPHA_CTRL 0x0064 +#define WIN0_FADING_CTRL 0x0068 +/* win1 register */ +#define WIN1_CTRL0 0x0070 +#define WIN1_CTRL1 0x0074 +#define WIN1_COLOR_KEY 0x0078 +#define WIN1_VIR 0x007c +#define WIN1_YRGB_MST 0x0080 +#define WIN1_CBR_MST 0x0084 +#define WIN1_ACT_INFO 0x0088 +#define WIN1_DSP_INFO 0x008c +#define WIN1_DSP_ST 0x0090 +#define WIN1_SCL_FACTOR_YRGB 0x0094 +#define WIN1_SCL_FACTOR_CBR 0x0098 +#define WIN1_SCL_OFFSET 0x009c +#define WIN1_SRC_ALPHA_CTRL 0x00a0 +#define WIN1_DST_ALPHA_CTRL 0x00a4 +#define WIN1_FADING_CTRL 0x00a8 +/* win2 register */ +#define WIN2_CTRL0 0x00b0 +#define WIN2_CTRL1 0x00b4 +#define WIN2_VIR0_1 0x00b8 +#define WIN2_VIR2_3 0x00bc +#define WIN2_MST0 0x00c0 +#define WIN2_DSP_INFO0 0x00c4 +#define WIN2_DSP_ST0 0x00c8 +#define WIN2_COLOR_KEY 0x00cc +#define WIN2_MST1 0x00d0 +#define WIN2_DSP_INFO1 0x00d4 +#define WIN2_DSP_ST1 0x00d8 +#define WIN2_SRC_ALPHA_CTRL 0x00dc +#define WIN2_MST2 0x00e0 +#define WIN2_DSP_INFO2 0x00e4 +#define WIN2_DSP_ST2 0x00e8 +#define WIN2_DST_ALPHA_CTRL 0x00ec +#define WIN2_MST3 0x00f0 +#define WIN2_DSP_INFO3 0x00f4 +#define WIN2_DSP_ST3 0x00f8 +#define WIN2_FADING_CTRL 0x00fc +/* win3 register */ +#define WIN3_CTRL0 0x0100 +#define WIN3_CTRL1 0x0104 +#define WIN3_VIR0_1 0x0108 +#define WIN3_VIR2_3 0x010c +#define WIN3_MST0 0x0110 +#define WIN3_DSP_INFO0 0x0114 +#define WIN3_DSP_ST0 0x0118 +#define WIN3_COLOR_KEY 0x011c +#define WIN3_MST1 0x0120 +#define WIN3_DSP_INFO1 0x0124 +#define WIN3_DSP_ST1 0x0128 +#define WIN3_SRC_ALPHA_CTRL 0x012c +#define WIN3_MST2 0x0130 +#define WIN3_DSP_INFO2 0x0134 +#define WIN3_DSP_ST2 0x0138 +#define WIN3_DST_ALPHA_CTRL 0x013c +#define WIN3_MST3 0x0140 +#define WIN3_DSP_INFO3 0x0144 +#define WIN3_DSP_ST3 0x0148 +#define WIN3_FADING_CTRL 0x014c +/* hwc register */ +#define HWC_CTRL0 0x0150 +#define HWC_CTRL1 0x0154 +#define HWC_MST 0x0158 +#define HWC_DSP_ST 0x015c +#define HWC_SRC_ALPHA_CTRL 0x0160 +#define HWC_DST_ALPHA_CTRL 0x0164 +#define HWC_FADING_CTRL 0x0168 +/* post process register */ +#define POST_DSP_HACT_INFO 0x0170 +#define POST_DSP_VACT_INFO 0x0174 +#define POST_SCL_FACTOR_YRGB 0x0178 +#define POST_SCL_CTRL 0x0180 +#define POST_DSP_VACT_INFO_F1 0x0184 +#define DSP_HTOTAL_HS_END 0x0188 +#define DSP_HACT_ST_END 0x018c +#define DSP_VTOTAL_VS_END 0x0190 +#define DSP_VACT_ST_END 0x0194 +#define DSP_VS_ST_END_F1 0x0198 +#define DSP_VACT_ST_END_F1 0x019c +/* register definition end */ + +#endif /* _ROCKCHIP_VOP_REG_H */ -- cgit v1.2.3 From 1194fffbb102b1683bcbfc893df20bbf8a038468 Mon Sep 17 00:00:00 2001 From: Mark Yao Date: Tue, 15 Dec 2015 09:08:43 +0800 Subject: drm/rockchip: vop: spilt scale regsters There are two version scale control register found on vop, scale full version found on rk3288, support extension registers. and scale little version found on rk3036, only support common scale. Signed-off-by: Mark Yao --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 46 +++++++++++++++++++---------- drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 14 +++++++-- drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 5 +++- 3 files changed, 47 insertions(+), 18 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index bbb781cc2208..d83bf87ba71e 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -50,6 +50,8 @@ REG_SET(x, win->base, win->phy->name, v, RELAXED) #define VOP_SCL_SET(x, win, name, v) \ REG_SET(x, win->base, win->phy->scl->name, v, RELAXED) +#define VOP_SCL_SET_EXT(x, win, name, v) \ + REG_SET(x, win->base, win->phy->scl->ext->name, v, RELAXED) #define VOP_CTRL_SET(x, name, v) \ REG_SET(x, 0, (x)->data->ctrl->name, v, NORMAL) @@ -313,6 +315,20 @@ static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win, return; } + if (!win->phy->scl->ext) { + VOP_SCL_SET(vop, win, scale_yrgb_x, + scl_cal_scale2(src_w, dst_w)); + VOP_SCL_SET(vop, win, scale_yrgb_y, + scl_cal_scale2(src_h, dst_h)); + if (is_yuv) { + VOP_SCL_SET(vop, win, scale_cbcr_x, + scl_cal_scale2(src_w, dst_w)); + VOP_SCL_SET(vop, win, scale_cbcr_y, + scl_cal_scale2(src_h, dst_h)); + } + return; + } + yrgb_hor_scl_mode = scl_get_scl_mode(src_w, dst_w); yrgb_ver_scl_mode = scl_get_scl_mode(src_h, dst_h); @@ -330,7 +346,7 @@ static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win, lb_mode = scl_vop_cal_lb_mode(src_w, false); } - VOP_SCL_SET(vop, win, lb_mode, lb_mode); + VOP_SCL_SET_EXT(vop, win, lb_mode, lb_mode); if (lb_mode == LB_RGB_3840X2) { if (yrgb_ver_scl_mode != SCALE_NONE) { DRM_ERROR("ERROR : not allow yrgb ver scale\n"); @@ -354,14 +370,14 @@ static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win, false, vsu_mode, &vskiplines); VOP_SCL_SET(vop, win, scale_yrgb_y, val); - VOP_SCL_SET(vop, win, vsd_yrgb_gt4, vskiplines == 4); - VOP_SCL_SET(vop, win, vsd_yrgb_gt2, vskiplines == 2); + VOP_SCL_SET_EXT(vop, win, vsd_yrgb_gt4, vskiplines == 4); + VOP_SCL_SET_EXT(vop, win, vsd_yrgb_gt2, vskiplines == 2); - VOP_SCL_SET(vop, win, yrgb_hor_scl_mode, yrgb_hor_scl_mode); - VOP_SCL_SET(vop, win, yrgb_ver_scl_mode, yrgb_ver_scl_mode); - VOP_SCL_SET(vop, win, yrgb_hsd_mode, SCALE_DOWN_BIL); - VOP_SCL_SET(vop, win, yrgb_vsd_mode, SCALE_DOWN_BIL); - VOP_SCL_SET(vop, win, yrgb_vsu_mode, vsu_mode); + VOP_SCL_SET_EXT(vop, win, yrgb_hor_scl_mode, yrgb_hor_scl_mode); + VOP_SCL_SET_EXT(vop, win, yrgb_ver_scl_mode, yrgb_ver_scl_mode); + VOP_SCL_SET_EXT(vop, win, yrgb_hsd_mode, SCALE_DOWN_BIL); + VOP_SCL_SET_EXT(vop, win, yrgb_vsd_mode, SCALE_DOWN_BIL); + VOP_SCL_SET_EXT(vop, win, yrgb_vsu_mode, vsu_mode); if (is_yuv) { val = scl_vop_cal_scale(cbcr_hor_scl_mode, cbcr_src_w, dst_w, true, 0, NULL); @@ -370,13 +386,13 @@ static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win, dst_h, false, vsu_mode, &vskiplines); VOP_SCL_SET(vop, win, scale_cbcr_y, val); - VOP_SCL_SET(vop, win, vsd_cbcr_gt4, vskiplines == 4); - VOP_SCL_SET(vop, win, vsd_cbcr_gt2, vskiplines == 2); - VOP_SCL_SET(vop, win, cbcr_hor_scl_mode, cbcr_hor_scl_mode); - VOP_SCL_SET(vop, win, cbcr_ver_scl_mode, cbcr_ver_scl_mode); - VOP_SCL_SET(vop, win, cbcr_hsd_mode, SCALE_DOWN_BIL); - VOP_SCL_SET(vop, win, cbcr_vsd_mode, SCALE_DOWN_BIL); - VOP_SCL_SET(vop, win, cbcr_vsu_mode, vsu_mode); + VOP_SCL_SET_EXT(vop, win, vsd_cbcr_gt4, vskiplines == 4); + VOP_SCL_SET_EXT(vop, win, vsd_cbcr_gt2, vskiplines == 2); + VOP_SCL_SET_EXT(vop, win, cbcr_hor_scl_mode, cbcr_hor_scl_mode); + VOP_SCL_SET_EXT(vop, win, cbcr_ver_scl_mode, cbcr_ver_scl_mode); + VOP_SCL_SET_EXT(vop, win, cbcr_hsd_mode, SCALE_DOWN_BIL); + VOP_SCL_SET_EXT(vop, win, cbcr_vsd_mode, SCALE_DOWN_BIL); + VOP_SCL_SET_EXT(vop, win, cbcr_vsu_mode, vsu_mode); } } diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h index cbb114aa13c5..071ff0be7a95 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h @@ -66,7 +66,8 @@ struct vop_intr { struct vop_reg clear; struct vop_reg status; }; -struct vop_scl_regs { + +struct vop_scl_extension { struct vop_reg cbcr_vsd_mode; struct vop_reg cbcr_vsu_mode; struct vop_reg cbcr_hsd_mode; @@ -87,8 +88,12 @@ struct vop_scl_regs { struct vop_reg bic_coe_sel; struct vop_reg cbcr_axi_gather_en; struct vop_reg yrgb_axi_gather_en; - struct vop_reg lb_mode; +}; + +struct vop_scl_regs { + const struct vop_scl_extension *ext; + struct vop_reg scale_yrgb_x; struct vop_reg scale_yrgb_y; struct vop_reg scale_cbcr_x; @@ -242,6 +247,11 @@ static inline uint16_t scl_cal_scale(int src, int dst, int shift) return ((src * 2 - 3) << (shift - 1)) / (dst - 1); } +static inline uint16_t scl_cal_scale2(int src, int dst) +{ + return ((src - 1) << 12) / (dst - 1); +} + #define GET_SCL_FT_BILI_DN(src, dst) scl_cal_scale(src, dst, 12) #define GET_SCL_FT_BILI_UP(src, dst) scl_cal_scale(src, dst, 16) #define GET_SCL_FT_BIC(src, dst) scl_cal_scale(src, dst, 16) diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index d47bfc3f753a..6495114277e0 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -50,7 +50,7 @@ static const uint32_t formats_234[] = { DRM_FORMAT_BGR565, }; -static const struct vop_scl_regs win_full_scl = { +static const struct vop_scl_extension win_full_ext = { .cbcr_vsd_mode = VOP_REG(WIN0_CTRL1, 0x1, 31), .cbcr_vsu_mode = VOP_REG(WIN0_CTRL1, 0x1, 30), .cbcr_hsd_mode = VOP_REG(WIN0_CTRL1, 0x3, 28), @@ -72,6 +72,9 @@ static const struct vop_scl_regs win_full_scl = { .cbcr_axi_gather_en = VOP_REG(WIN0_CTRL1, 0x1, 1), .yrgb_axi_gather_en = VOP_REG(WIN0_CTRL1, 0x1, 0), .lb_mode = VOP_REG(WIN0_CTRL0, 0x7, 5), +}; + +static const struct vop_scl_regs win_full_scl = { .scale_yrgb_x = VOP_REG(WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0), .scale_yrgb_y = VOP_REG(WIN0_SCL_FACTOR_YRGB, 0xffff, 16), .scale_cbcr_x = VOP_REG(WIN0_SCL_FACTOR_CBR, 0xffff, 0x0), -- cgit v1.2.3 From f7673453506035a904b6fb7a36dd6fb101366cd7 Mon Sep 17 00:00:00 2001 From: Mark Yao Date: Tue, 15 Dec 2015 09:57:13 +0800 Subject: drm/rockchip: vop: add rk3036 vop support RK3036 registers layout is quite difference with rk3288 layout, The IC design with different framework, rk3036 vop is VOP LITE, and rk3288 is VOP FULL. RK3036 support two overlay plane and one hwc plane, max output resolution is 1080p. it support IOMMU, and its IOMMU same as rk3288's. Signed-off-by: Mark Yao --- drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 296 ++++++++++++++++++---------- drivers/gpu/drm/rockchip/rockchip_vop_reg.h | 243 +++++++++++++---------- 2 files changed, 336 insertions(+), 203 deletions(-) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 6495114277e0..3166b46a5893 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -25,7 +25,7 @@ .mask = _mask, \ .shift = s,} -static const uint32_t formats_01[] = { +static const uint32_t formats_win_full[] = { DRM_FORMAT_XRGB8888, DRM_FORMAT_ARGB8888, DRM_FORMAT_XBGR8888, @@ -39,7 +39,7 @@ static const uint32_t formats_01[] = { DRM_FORMAT_NV24, }; -static const uint32_t formats_234[] = { +static const uint32_t formats_win_lite[] = { DRM_FORMAT_XRGB8888, DRM_FORMAT_ARGB8888, DRM_FORMAT_XBGR8888, @@ -50,102 +50,103 @@ static const uint32_t formats_234[] = { DRM_FORMAT_BGR565, }; -static const struct vop_scl_extension win_full_ext = { - .cbcr_vsd_mode = VOP_REG(WIN0_CTRL1, 0x1, 31), - .cbcr_vsu_mode = VOP_REG(WIN0_CTRL1, 0x1, 30), - .cbcr_hsd_mode = VOP_REG(WIN0_CTRL1, 0x3, 28), - .cbcr_ver_scl_mode = VOP_REG(WIN0_CTRL1, 0x3, 26), - .cbcr_hor_scl_mode = VOP_REG(WIN0_CTRL1, 0x3, 24), - .yrgb_vsd_mode = VOP_REG(WIN0_CTRL1, 0x1, 23), - .yrgb_vsu_mode = VOP_REG(WIN0_CTRL1, 0x1, 22), - .yrgb_hsd_mode = VOP_REG(WIN0_CTRL1, 0x3, 20), - .yrgb_ver_scl_mode = VOP_REG(WIN0_CTRL1, 0x3, 18), - .yrgb_hor_scl_mode = VOP_REG(WIN0_CTRL1, 0x3, 16), - .line_load_mode = VOP_REG(WIN0_CTRL1, 0x1, 15), - .cbcr_axi_gather_num = VOP_REG(WIN0_CTRL1, 0x7, 12), - .yrgb_axi_gather_num = VOP_REG(WIN0_CTRL1, 0xf, 8), - .vsd_cbcr_gt2 = VOP_REG(WIN0_CTRL1, 0x1, 7), - .vsd_cbcr_gt4 = VOP_REG(WIN0_CTRL1, 0x1, 6), - .vsd_yrgb_gt2 = VOP_REG(WIN0_CTRL1, 0x1, 5), - .vsd_yrgb_gt4 = VOP_REG(WIN0_CTRL1, 0x1, 4), - .bic_coe_sel = VOP_REG(WIN0_CTRL1, 0x3, 2), - .cbcr_axi_gather_en = VOP_REG(WIN0_CTRL1, 0x1, 1), - .yrgb_axi_gather_en = VOP_REG(WIN0_CTRL1, 0x1, 0), - .lb_mode = VOP_REG(WIN0_CTRL0, 0x7, 5), -}; - -static const struct vop_scl_regs win_full_scl = { - .scale_yrgb_x = VOP_REG(WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0), - .scale_yrgb_y = VOP_REG(WIN0_SCL_FACTOR_YRGB, 0xffff, 16), - .scale_cbcr_x = VOP_REG(WIN0_SCL_FACTOR_CBR, 0xffff, 0x0), - .scale_cbcr_y = VOP_REG(WIN0_SCL_FACTOR_CBR, 0xffff, 16), -}; - -static const struct vop_win_phy win01_data = { - .scl = &win_full_scl, - .data_formats = formats_01, - .nformats = ARRAY_SIZE(formats_01), - .enable = VOP_REG(WIN0_CTRL0, 0x1, 0), - .format = VOP_REG(WIN0_CTRL0, 0x7, 1), - .rb_swap = VOP_REG(WIN0_CTRL0, 0x1, 12), - .act_info = VOP_REG(WIN0_ACT_INFO, 0x1fff1fff, 0), - .dsp_info = VOP_REG(WIN0_DSP_INFO, 0x0fff0fff, 0), - .dsp_st = VOP_REG(WIN0_DSP_ST, 0x1fff1fff, 0), - .yrgb_mst = VOP_REG(WIN0_YRGB_MST, 0xffffffff, 0), - .uv_mst = VOP_REG(WIN0_CBR_MST, 0xffffffff, 0), - .yrgb_vir = VOP_REG(WIN0_VIR, 0x3fff, 0), - .uv_vir = VOP_REG(WIN0_VIR, 0x3fff, 16), - .src_alpha_ctl = VOP_REG(WIN0_SRC_ALPHA_CTRL, 0xff, 0), - .dst_alpha_ctl = VOP_REG(WIN0_DST_ALPHA_CTRL, 0xff, 0), -}; - -static const struct vop_win_phy win23_data = { - .data_formats = formats_234, - .nformats = ARRAY_SIZE(formats_234), - .enable = VOP_REG(WIN2_CTRL0, 0x1, 0), - .format = VOP_REG(WIN2_CTRL0, 0x7, 1), - .rb_swap = VOP_REG(WIN2_CTRL0, 0x1, 12), - .dsp_info = VOP_REG(WIN2_DSP_INFO0, 0x0fff0fff, 0), - .dsp_st = VOP_REG(WIN2_DSP_ST0, 0x1fff1fff, 0), - .yrgb_mst = VOP_REG(WIN2_MST0, 0xffffffff, 0), - .yrgb_vir = VOP_REG(WIN2_VIR0_1, 0x1fff, 0), - .src_alpha_ctl = VOP_REG(WIN2_SRC_ALPHA_CTRL, 0xff, 0), - .dst_alpha_ctl = VOP_REG(WIN2_DST_ALPHA_CTRL, 0xff, 0), -}; - -static const struct vop_ctrl ctrl_data = { - .standby = VOP_REG(SYS_CTRL, 0x1, 22), - .gate_en = VOP_REG(SYS_CTRL, 0x1, 23), - .mmu_en = VOP_REG(SYS_CTRL, 0x1, 20), - .rgb_en = VOP_REG(SYS_CTRL, 0x1, 12), - .hdmi_en = VOP_REG(SYS_CTRL, 0x1, 13), - .edp_en = VOP_REG(SYS_CTRL, 0x1, 14), - .mipi_en = VOP_REG(SYS_CTRL, 0x1, 15), - .dither_down = VOP_REG(DSP_CTRL1, 0xf, 1), - .dither_up = VOP_REG(DSP_CTRL1, 0x1, 6), - .data_blank = VOP_REG(DSP_CTRL0, 0x1, 19), - .out_mode = VOP_REG(DSP_CTRL0, 0xf, 0), - .pin_pol = VOP_REG(DSP_CTRL0, 0xf, 4), - .htotal_pw = VOP_REG(DSP_HTOTAL_HS_END, 0x1fff1fff, 0), - .hact_st_end = VOP_REG(DSP_HACT_ST_END, 0x1fff1fff, 0), - .vtotal_pw = VOP_REG(DSP_VTOTAL_VS_END, 0x1fff1fff, 0), - .vact_st_end = VOP_REG(DSP_VACT_ST_END, 0x1fff1fff, 0), - .hpost_st_end = VOP_REG(POST_DSP_HACT_INFO, 0x1fff1fff, 0), - .vpost_st_end = VOP_REG(POST_DSP_VACT_INFO, 0x1fff1fff, 0), - .cfg_done = VOP_REG(REG_CFG_DONE, 0x1, 0), -}; - -static const struct vop_reg_data vop_init_reg_table[] = { - {SYS_CTRL, 0x00c00000}, - {DSP_CTRL0, 0x00000000}, - {WIN0_CTRL0, 0x00000080}, - {WIN1_CTRL0, 0x00000080}, +static const struct vop_scl_extension rk3288_win_full_scl_ext = { + .cbcr_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 31), + .cbcr_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 30), + .cbcr_hsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 28), + .cbcr_ver_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 26), + .cbcr_hor_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 24), + .yrgb_vsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 23), + .yrgb_vsu_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 22), + .yrgb_hsd_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 20), + .yrgb_ver_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 18), + .yrgb_hor_scl_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 16), + .line_load_mode = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 15), + .cbcr_axi_gather_num = VOP_REG(RK3288_WIN0_CTRL1, 0x7, 12), + .yrgb_axi_gather_num = VOP_REG(RK3288_WIN0_CTRL1, 0xf, 8), + .vsd_cbcr_gt2 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 7), + .vsd_cbcr_gt4 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 6), + .vsd_yrgb_gt2 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 5), + .vsd_yrgb_gt4 = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 4), + .bic_coe_sel = VOP_REG(RK3288_WIN0_CTRL1, 0x3, 2), + .cbcr_axi_gather_en = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 1), + .yrgb_axi_gather_en = VOP_REG(RK3288_WIN0_CTRL1, 0x1, 0), + .lb_mode = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 5), +}; + +static const struct vop_scl_regs rk3288_win_full_scl = { + .ext = &rk3288_win_full_scl_ext, + .scale_yrgb_x = VOP_REG(RK3288_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0), + .scale_yrgb_y = VOP_REG(RK3288_WIN0_SCL_FACTOR_YRGB, 0xffff, 16), + .scale_cbcr_x = VOP_REG(RK3288_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0), + .scale_cbcr_y = VOP_REG(RK3288_WIN0_SCL_FACTOR_CBR, 0xffff, 16), +}; + +static const struct vop_win_phy rk3288_win01_data = { + .scl = &rk3288_win_full_scl, + .data_formats = formats_win_full, + .nformats = ARRAY_SIZE(formats_win_full), + .enable = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 0), + .format = VOP_REG(RK3288_WIN0_CTRL0, 0x7, 1), + .rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12), + .act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0), + .dsp_info = VOP_REG(RK3288_WIN0_DSP_INFO, 0x0fff0fff, 0), + .dsp_st = VOP_REG(RK3288_WIN0_DSP_ST, 0x1fff1fff, 0), + .yrgb_mst = VOP_REG(RK3288_WIN0_YRGB_MST, 0xffffffff, 0), + .uv_mst = VOP_REG(RK3288_WIN0_CBR_MST, 0xffffffff, 0), + .yrgb_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 0), + .uv_vir = VOP_REG(RK3288_WIN0_VIR, 0x3fff, 16), + .src_alpha_ctl = VOP_REG(RK3288_WIN0_SRC_ALPHA_CTRL, 0xff, 0), + .dst_alpha_ctl = VOP_REG(RK3288_WIN0_DST_ALPHA_CTRL, 0xff, 0), +}; + +static const struct vop_win_phy rk3288_win23_data = { + .data_formats = formats_win_lite, + .nformats = ARRAY_SIZE(formats_win_lite), + .enable = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 0), + .format = VOP_REG(RK3288_WIN2_CTRL0, 0x7, 1), + .rb_swap = VOP_REG(RK3288_WIN2_CTRL0, 0x1, 12), + .dsp_info = VOP_REG(RK3288_WIN2_DSP_INFO0, 0x0fff0fff, 0), + .dsp_st = VOP_REG(RK3288_WIN2_DSP_ST0, 0x1fff1fff, 0), + .yrgb_mst = VOP_REG(RK3288_WIN2_MST0, 0xffffffff, 0), + .yrgb_vir = VOP_REG(RK3288_WIN2_VIR0_1, 0x1fff, 0), + .src_alpha_ctl = VOP_REG(RK3288_WIN2_SRC_ALPHA_CTRL, 0xff, 0), + .dst_alpha_ctl = VOP_REG(RK3288_WIN2_DST_ALPHA_CTRL, 0xff, 0), +}; + +static const struct vop_ctrl rk3288_ctrl_data = { + .standby = VOP_REG(RK3288_SYS_CTRL, 0x1, 22), + .gate_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 23), + .mmu_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 20), + .rgb_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 12), + .hdmi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 13), + .edp_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 14), + .mipi_en = VOP_REG(RK3288_SYS_CTRL, 0x1, 15), + .dither_down = VOP_REG(RK3288_DSP_CTRL1, 0xf, 1), + .dither_up = VOP_REG(RK3288_DSP_CTRL1, 0x1, 6), + .data_blank = VOP_REG(RK3288_DSP_CTRL0, 0x1, 19), + .out_mode = VOP_REG(RK3288_DSP_CTRL0, 0xf, 0), + .pin_pol = VOP_REG(RK3288_DSP_CTRL0, 0xf, 4), + .htotal_pw = VOP_REG(RK3288_DSP_HTOTAL_HS_END, 0x1fff1fff, 0), + .hact_st_end = VOP_REG(RK3288_DSP_HACT_ST_END, 0x1fff1fff, 0), + .vtotal_pw = VOP_REG(RK3288_DSP_VTOTAL_VS_END, 0x1fff1fff, 0), + .vact_st_end = VOP_REG(RK3288_DSP_VACT_ST_END, 0x1fff1fff, 0), + .hpost_st_end = VOP_REG(RK3288_POST_DSP_HACT_INFO, 0x1fff1fff, 0), + .vpost_st_end = VOP_REG(RK3288_POST_DSP_VACT_INFO, 0x1fff1fff, 0), + .cfg_done = VOP_REG(RK3288_REG_CFG_DONE, 0x1, 0), +}; + +static const struct vop_reg_data rk3288_init_reg_table[] = { + {RK3288_SYS_CTRL, 0x00c00000}, + {RK3288_DSP_CTRL0, 0x00000000}, + {RK3288_WIN0_CTRL0, 0x00000080}, + {RK3288_WIN1_CTRL0, 0x00000080}, /* TODO: Win2/3 support multiple area function, but we haven't found * a suitable way to use it yet, so let's just use them as other windows * with only area 0 enabled. */ - {WIN2_CTRL0, 0x00000010}, - {WIN3_CTRL0, 0x00000010}, + {RK3288_WIN2_CTRL0, 0x00000010}, + {RK3288_WIN3_CTRL0, 0x00000010}, }; /* @@ -155,10 +156,14 @@ static const struct vop_reg_data vop_init_reg_table[] = { * */ static const struct vop_win_data rk3288_vop_win_data[] = { - { .base = 0x00, .phy = &win01_data, .type = DRM_PLANE_TYPE_PRIMARY }, - { .base = 0x40, .phy = &win01_data, .type = DRM_PLANE_TYPE_OVERLAY }, - { .base = 0x00, .phy = &win23_data, .type = DRM_PLANE_TYPE_OVERLAY }, - { .base = 0x50, .phy = &win23_data, .type = DRM_PLANE_TYPE_CURSOR }, + { .base = 0x00, .phy = &rk3288_win01_data, + .type = DRM_PLANE_TYPE_PRIMARY }, + { .base = 0x40, .phy = &rk3288_win01_data, + .type = DRM_PLANE_TYPE_OVERLAY }, + { .base = 0x00, .phy = &rk3288_win23_data, + .type = DRM_PLANE_TYPE_OVERLAY }, + { .base = 0x50, .phy = &rk3288_win23_data, + .type = DRM_PLANE_TYPE_CURSOR }, }; static const int rk3288_vop_intrs[] = { @@ -171,23 +176,106 @@ static const int rk3288_vop_intrs[] = { static const struct vop_intr rk3288_vop_intr = { .intrs = rk3288_vop_intrs, .nintrs = ARRAY_SIZE(rk3288_vop_intrs), - .status = VOP_REG(INTR_CTRL0, 0xf, 0), - .enable = VOP_REG(INTR_CTRL0, 0xf, 4), - .clear = VOP_REG(INTR_CTRL0, 0xf, 8), + .status = VOP_REG(RK3288_INTR_CTRL0, 0xf, 0), + .enable = VOP_REG(RK3288_INTR_CTRL0, 0xf, 4), + .clear = VOP_REG(RK3288_INTR_CTRL0, 0xf, 8), }; static const struct vop_data rk3288_vop = { - .init_table = vop_init_reg_table, + .init_table = rk3288_init_reg_table, + .table_size = ARRAY_SIZE(rk3288_init_reg_table), .intr = &rk3288_vop_intr, - .table_size = ARRAY_SIZE(vop_init_reg_table), - .ctrl = &ctrl_data, + .ctrl = &rk3288_ctrl_data, .win = rk3288_vop_win_data, .win_size = ARRAY_SIZE(rk3288_vop_win_data), }; +static const struct vop_scl_regs rk3066_win_scl = { + .scale_yrgb_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0), + .scale_yrgb_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 16), + .scale_cbcr_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 0x0), + .scale_cbcr_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_CBR, 0xffff, 16), +}; + +static const struct vop_win_phy rk3036_win0_data = { + .scl = &rk3066_win_scl, + .data_formats = formats_win_full, + .nformats = ARRAY_SIZE(formats_win_full), + .enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 0), + .format = VOP_REG(RK3036_SYS_CTRL, 0x7, 3), + .rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 15), + .act_info = VOP_REG(RK3036_WIN0_ACT_INFO, 0x1fff1fff, 0), + .dsp_info = VOP_REG(RK3036_WIN0_DSP_INFO, 0x0fff0fff, 0), + .dsp_st = VOP_REG(RK3036_WIN0_DSP_ST, 0x1fff1fff, 0), + .yrgb_mst = VOP_REG(RK3036_WIN0_YRGB_MST, 0xffffffff, 0), + .uv_mst = VOP_REG(RK3036_WIN0_CBR_MST, 0xffffffff, 0), + .yrgb_vir = VOP_REG(RK3036_WIN0_VIR, 0xffff, 0), +}; + +static const struct vop_win_phy rk3036_win1_data = { + .data_formats = formats_win_lite, + .nformats = ARRAY_SIZE(formats_win_lite), + .enable = VOP_REG(RK3036_SYS_CTRL, 0x1, 1), + .format = VOP_REG(RK3036_SYS_CTRL, 0x7, 6), + .rb_swap = VOP_REG(RK3036_SYS_CTRL, 0x1, 19), + .act_info = VOP_REG(RK3036_WIN1_ACT_INFO, 0x1fff1fff, 0), + .dsp_info = VOP_REG(RK3036_WIN1_DSP_INFO, 0x0fff0fff, 0), + .dsp_st = VOP_REG(RK3036_WIN1_DSP_ST, 0x1fff1fff, 0), + .yrgb_mst = VOP_REG(RK3036_WIN1_MST, 0xffffffff, 0), + .yrgb_vir = VOP_REG(RK3036_WIN1_VIR, 0xffff, 0), +}; + +static const struct vop_win_data rk3036_vop_win_data[] = { + { .base = 0x00, .phy = &rk3036_win0_data, + .type = DRM_PLANE_TYPE_PRIMARY }, + { .base = 0x00, .phy = &rk3036_win1_data, + .type = DRM_PLANE_TYPE_CURSOR }, +}; + +static const int rk3036_vop_intrs[] = { + DSP_HOLD_VALID_INTR, + FS_INTR, + LINE_FLAG_INTR, + BUS_ERROR_INTR, +}; + +static const struct vop_intr rk3036_intr = { + .intrs = rk3036_vop_intrs, + .nintrs = ARRAY_SIZE(rk3036_vop_intrs), + .status = VOP_REG(RK3036_INT_STATUS, 0xf, 0), + .enable = VOP_REG(RK3036_INT_STATUS, 0xf, 4), + .clear = VOP_REG(RK3036_INT_STATUS, 0xf, 8), +}; + +static const struct vop_ctrl rk3036_ctrl_data = { + .standby = VOP_REG(RK3036_SYS_CTRL, 0x1, 30), + .out_mode = VOP_REG(RK3036_DSP_CTRL0, 0xf, 0), + .pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4), + .htotal_pw = VOP_REG(RK3036_DSP_HTOTAL_HS_END, 0x1fff1fff, 0), + .hact_st_end = VOP_REG(RK3036_DSP_HACT_ST_END, 0x1fff1fff, 0), + .vtotal_pw = VOP_REG(RK3036_DSP_VTOTAL_VS_END, 0x1fff1fff, 0), + .vact_st_end = VOP_REG(RK3036_DSP_VACT_ST_END, 0x1fff1fff, 0), + .cfg_done = VOP_REG(RK3036_REG_CFG_DONE, 0x1, 0), +}; + +static const struct vop_reg_data rk3036_vop_init_reg_table[] = { + {RK3036_DSP_CTRL1, 0x00000000}, +}; + +static const struct vop_data rk3036_vop = { + .init_table = rk3036_vop_init_reg_table, + .table_size = ARRAY_SIZE(rk3036_vop_init_reg_table), + .ctrl = &rk3036_ctrl_data, + .intr = &rk3036_intr, + .win = rk3036_vop_win_data, + .win_size = ARRAY_SIZE(rk3036_vop_win_data), +}; + static const struct of_device_id vop_driver_dt_match[] = { { .compatible = "rockchip,rk3288-vop", .data = &rk3288_vop }, + { .compatible = "rockchip,rk3036-vop", + .data = &rk3036_vop }, {}, }; MODULE_DEVICE_TABLE(of, vop_driver_dt_match); diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h index b0fa35d42878..d4b46cba2f26 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h @@ -15,110 +15,155 @@ #ifndef _ROCKCHIP_VOP_REG_H #define _ROCKCHIP_VOP_REG_H -/* register definition */ -#define REG_CFG_DONE 0x0000 -#define VERSION_INFO 0x0004 -#define SYS_CTRL 0x0008 -#define SYS_CTRL1 0x000c -#define DSP_CTRL0 0x0010 -#define DSP_CTRL1 0x0014 -#define DSP_BG 0x0018 -#define MCU_CTRL 0x001c -#define INTR_CTRL0 0x0020 -#define INTR_CTRL1 0x0024 -#define WIN0_CTRL0 0x0030 -#define WIN0_CTRL1 0x0034 -#define WIN0_COLOR_KEY 0x0038 -#define WIN0_VIR 0x003c -#define WIN0_YRGB_MST 0x0040 -#define WIN0_CBR_MST 0x0044 -#define WIN0_ACT_INFO 0x0048 -#define WIN0_DSP_INFO 0x004c -#define WIN0_DSP_ST 0x0050 -#define WIN0_SCL_FACTOR_YRGB 0x0054 -#define WIN0_SCL_FACTOR_CBR 0x0058 -#define WIN0_SCL_OFFSET 0x005c -#define WIN0_SRC_ALPHA_CTRL 0x0060 -#define WIN0_DST_ALPHA_CTRL 0x0064 -#define WIN0_FADING_CTRL 0x0068 +/* rk3288 register definition */ +#define RK3288_REG_CFG_DONE 0x0000 +#define RK3288_VERSION_INFO 0x0004 +#define RK3288_SYS_CTRL 0x0008 +#define RK3288_SYS_CTRL1 0x000c +#define RK3288_DSP_CTRL0 0x0010 +#define RK3288_DSP_CTRL1 0x0014 +#define RK3288_DSP_BG 0x0018 +#define RK3288_MCU_CTRL 0x001c +#define RK3288_INTR_CTRL0 0x0020 +#define RK3288_INTR_CTRL1 0x0024 +#define RK3288_WIN0_CTRL0 0x0030 +#define RK3288_WIN0_CTRL1 0x0034 +#define RK3288_WIN0_COLOR_KEY 0x0038 +#define RK3288_WIN0_VIR 0x003c +#define RK3288_WIN0_YRGB_MST 0x0040 +#define RK3288_WIN0_CBR_MST 0x0044 +#define RK3288_WIN0_ACT_INFO 0x0048 +#define RK3288_WIN0_DSP_INFO 0x004c +#define RK3288_WIN0_DSP_ST 0x0050 +#define RK3288_WIN0_SCL_FACTOR_YRGB 0x0054 +#define RK3288_WIN0_SCL_FACTOR_CBR 0x0058 +#define RK3288_WIN0_SCL_OFFSET 0x005c +#define RK3288_WIN0_SRC_ALPHA_CTRL 0x0060 +#define RK3288_WIN0_DST_ALPHA_CTRL 0x0064 +#define RK3288_WIN0_FADING_CTRL 0x0068 + /* win1 register */ -#define WIN1_CTRL0 0x0070 -#define WIN1_CTRL1 0x0074 -#define WIN1_COLOR_KEY 0x0078 -#define WIN1_VIR 0x007c -#define WIN1_YRGB_MST 0x0080 -#define WIN1_CBR_MST 0x0084 -#define WIN1_ACT_INFO 0x0088 -#define WIN1_DSP_INFO 0x008c -#define WIN1_DSP_ST 0x0090 -#define WIN1_SCL_FACTOR_YRGB 0x0094 -#define WIN1_SCL_FACTOR_CBR 0x0098 -#define WIN1_SCL_OFFSET 0x009c -#define WIN1_SRC_ALPHA_CTRL 0x00a0 -#define WIN1_DST_ALPHA_CTRL 0x00a4 -#define WIN1_FADING_CTRL 0x00a8 +#define RK3288_WIN1_CTRL0 0x0070 +#define RK3288_WIN1_CTRL1 0x0074 +#define RK3288_WIN1_COLOR_KEY 0x0078 +#define RK3288_WIN1_VIR 0x007c +#define RK3288_WIN1_YRGB_MST 0x0080 +#define RK3288_WIN1_CBR_MST 0x0084 +#define RK3288_WIN1_ACT_INFO 0x0088 +#define RK3288_WIN1_DSP_INFO 0x008c +#define RK3288_WIN1_DSP_ST 0x0090 +#define RK3288_WIN1_SCL_FACTOR_YRGB 0x0094 +#define RK3288_WIN1_SCL_FACTOR_CBR 0x0098 +#define RK3288_WIN1_SCL_OFFSET 0x009c +#define RK3288_WIN1_SRC_ALPHA_CTRL 0x00a0 +#define RK3288_WIN1_DST_ALPHA_CTRL 0x00a4 +#define RK3288_WIN1_FADING_CTRL 0x00a8 /* win2 register */ -#define WIN2_CTRL0 0x00b0 -#define WIN2_CTRL1 0x00b4 -#define WIN2_VIR0_1 0x00b8 -#define WIN2_VIR2_3 0x00bc -#define WIN2_MST0 0x00c0 -#define WIN2_DSP_INFO0 0x00c4 -#define WIN2_DSP_ST0 0x00c8 -#define WIN2_COLOR_KEY 0x00cc -#define WIN2_MST1 0x00d0 -#define WIN2_DSP_INFO1 0x00d4 -#define WIN2_DSP_ST1 0x00d8 -#define WIN2_SRC_ALPHA_CTRL 0x00dc -#define WIN2_MST2 0x00e0 -#define WIN2_DSP_INFO2 0x00e4 -#define WIN2_DSP_ST2 0x00e8 -#define WIN2_DST_ALPHA_CTRL 0x00ec -#define WIN2_MST3 0x00f0 -#define WIN2_DSP_INFO3 0x00f4 -#define WIN2_DSP_ST3 0x00f8 -#define WIN2_FADING_CTRL 0x00fc +#define RK3288_WIN2_CTRL0 0x00b0 +#define RK3288_WIN2_CTRL1 0x00b4 +#define RK3288_WIN2_VIR0_1 0x00b8 +#define RK3288_WIN2_VIR2_3 0x00bc +#define RK3288_WIN2_MST0 0x00c0 +#define RK3288_WIN2_DSP_INFO0 0x00c4 +#define RK3288_WIN2_DSP_ST0 0x00c8 +#define RK3288_WIN2_COLOR_KEY 0x00cc +#define RK3288_WIN2_MST1 0x00d0 +#define RK3288_WIN2_DSP_INFO1 0x00d4 +#define RK3288_WIN2_DSP_ST1 0x00d8 +#define RK3288_WIN2_SRC_ALPHA_CTRL 0x00dc +#define RK3288_WIN2_MST2 0x00e0 +#define RK3288_WIN2_DSP_INFO2 0x00e4 +#define RK3288_WIN2_DSP_ST2 0x00e8 +#define RK3288_WIN2_DST_ALPHA_CTRL 0x00ec +#define RK3288_WIN2_MST3 0x00f0 +#define RK3288_WIN2_DSP_INFO3 0x00f4 +#define RK3288_WIN2_DSP_ST3 0x00f8 +#define RK3288_WIN2_FADING_CTRL 0x00fc /* win3 register */ -#define WIN3_CTRL0 0x0100 -#define WIN3_CTRL1 0x0104 -#define WIN3_VIR0_1 0x0108 -#define WIN3_VIR2_3 0x010c -#define WIN3_MST0 0x0110 -#define WIN3_DSP_INFO0 0x0114 -#define WIN3_DSP_ST0 0x0118 -#define WIN3_COLOR_KEY 0x011c -#define WIN3_MST1 0x0120 -#define WIN3_DSP_INFO1 0x0124 -#define WIN3_DSP_ST1 0x0128 -#define WIN3_SRC_ALPHA_CTRL 0x012c -#define WIN3_MST2 0x0130 -#define WIN3_DSP_INFO2 0x0134 -#define WIN3_DSP_ST2 0x0138 -#define WIN3_DST_ALPHA_CTRL 0x013c -#define WIN3_MST3 0x0140 -#define WIN3_DSP_INFO3 0x0144 -#define WIN3_DSP_ST3 0x0148 -#define WIN3_FADING_CTRL 0x014c +#define RK3288_WIN3_CTRL0 0x0100 +#define RK3288_WIN3_CTRL1 0x0104 +#define RK3288_WIN3_VIR0_1 0x0108 +#define RK3288_WIN3_VIR2_3 0x010c +#define RK3288_WIN3_MST0 0x0110 +#define RK3288_WIN3_DSP_INFO0 0x0114 +#define RK3288_WIN3_DSP_ST0 0x0118 +#define RK3288_WIN3_COLOR_KEY 0x011c +#define RK3288_WIN3_MST1 0x0120 +#define RK3288_WIN3_DSP_INFO1 0x0124 +#define RK3288_WIN3_DSP_ST1 0x0128 +#define RK3288_WIN3_SRC_ALPHA_CTRL 0x012c +#define RK3288_WIN3_MST2 0x0130 +#define RK3288_WIN3_DSP_INFO2 0x0134 +#define RK3288_WIN3_DSP_ST2 0x0138 +#define RK3288_WIN3_DST_ALPHA_CTRL 0x013c +#define RK3288_WIN3_MST3 0x0140 +#define RK3288_WIN3_DSP_INFO3 0x0144 +#define RK3288_WIN3_DSP_ST3 0x0148 +#define RK3288_WIN3_FADING_CTRL 0x014c /* hwc register */ -#define HWC_CTRL0 0x0150 -#define HWC_CTRL1 0x0154 -#define HWC_MST 0x0158 -#define HWC_DSP_ST 0x015c -#define HWC_SRC_ALPHA_CTRL 0x0160 -#define HWC_DST_ALPHA_CTRL 0x0164 -#define HWC_FADING_CTRL 0x0168 +#define RK3288_HWC_CTRL0 0x0150 +#define RK3288_HWC_CTRL1 0x0154 +#define RK3288_HWC_MST 0x0158 +#define RK3288_HWC_DSP_ST 0x015c +#define RK3288_HWC_SRC_ALPHA_CTRL 0x0160 +#define RK3288_HWC_DST_ALPHA_CTRL 0x0164 +#define RK3288_HWC_FADING_CTRL 0x0168 /* post process register */ -#define POST_DSP_HACT_INFO 0x0170 -#define POST_DSP_VACT_INFO 0x0174 -#define POST_SCL_FACTOR_YRGB 0x0178 -#define POST_SCL_CTRL 0x0180 -#define POST_DSP_VACT_INFO_F1 0x0184 -#define DSP_HTOTAL_HS_END 0x0188 -#define DSP_HACT_ST_END 0x018c -#define DSP_VTOTAL_VS_END 0x0190 -#define DSP_VACT_ST_END 0x0194 -#define DSP_VS_ST_END_F1 0x0198 -#define DSP_VACT_ST_END_F1 0x019c +#define RK3288_POST_DSP_HACT_INFO 0x0170 +#define RK3288_POST_DSP_VACT_INFO 0x0174 +#define RK3288_POST_SCL_FACTOR_YRGB 0x0178 +#define RK3288_POST_SCL_CTRL 0x0180 +#define RK3288_POST_DSP_VACT_INFO_F1 0x0184 +#define RK3288_DSP_HTOTAL_HS_END 0x0188 +#define RK3288_DSP_HACT_ST_END 0x018c +#define RK3288_DSP_VTOTAL_VS_END 0x0190 +#define RK3288_DSP_VACT_ST_END 0x0194 +#define RK3288_DSP_VS_ST_END_F1 0x0198 +#define RK3288_DSP_VACT_ST_END_F1 0x019c /* register definition end */ +/* rk3036 register definition */ +#define RK3036_SYS_CTRL 0x00 +#define RK3036_DSP_CTRL0 0x04 +#define RK3036_DSP_CTRL1 0x08 +#define RK3036_INT_STATUS 0x10 +#define RK3036_ALPHA_CTRL 0x14 +#define RK3036_WIN0_COLOR_KEY 0x18 +#define RK3036_WIN1_COLOR_KEY 0x1c +#define RK3036_WIN0_YRGB_MST 0x20 +#define RK3036_WIN0_CBR_MST 0x24 +#define RK3036_WIN1_VIR 0x28 +#define RK3036_AXI_BUS_CTRL 0x2c +#define RK3036_WIN0_VIR 0x30 +#define RK3036_WIN0_ACT_INFO 0x34 +#define RK3036_WIN0_DSP_INFO 0x38 +#define RK3036_WIN0_DSP_ST 0x3c +#define RK3036_WIN0_SCL_FACTOR_YRGB 0x40 +#define RK3036_WIN0_SCL_FACTOR_CBR 0x44 +#define RK3036_WIN0_SCL_OFFSET 0x48 +#define RK3036_HWC_MST 0x58 +#define RK3036_HWC_DSP_ST 0x5c +#define RK3036_DSP_HTOTAL_HS_END 0x6c +#define RK3036_DSP_HACT_ST_END 0x70 +#define RK3036_DSP_VTOTAL_VS_END 0x74 +#define RK3036_DSP_VACT_ST_END 0x78 +#define RK3036_DSP_VS_ST_END_F1 0x7c +#define RK3036_DSP_VACT_ST_END_F1 0x80 +#define RK3036_GATHER_TRANSFER 0x84 +#define RK3036_VERSION_INFO 0x94 +#define RK3036_REG_CFG_DONE 0x90 +#define RK3036_WIN1_MST 0xa0 +#define RK3036_WIN1_ACT_INFO 0xb4 +#define RK3036_WIN1_DSP_INFO 0xb8 +#define RK3036_WIN1_DSP_ST 0xbc +#define RK3036_WIN1_SCL_FACTOR_YRGB 0xc0 +#define RK3036_WIN1_SCL_OFFSET 0xc8 +#define RK3036_BCSH_CTRL 0xd0 +#define RK3036_BCSH_COLOR_BAR 0xd4 +#define RK3036_BCSH_BCS 0xd8 +#define RK3036_BCSH_H 0xdc +#define RK3036_WIN1_LUT_ADDR 0x400 +#define RK3036_HWC_LUT_ADDR 0x800 +/* rk3036 register definition end */ + #endif /* _ROCKCHIP_VOP_REG_H */ -- cgit v1.2.3 From 54255e818ef7a5e968c0230bc75649a68932d8ca Mon Sep 17 00:00:00 2001 From: Stephen Rothwell Date: Thu, 31 Dec 2015 13:40:11 +1100 Subject: drm/rockchip: vop: export vop_component_ops to modules Fixes: a67719d18229 ("drm/rockchip: vop: spilt register related into rockchip_reg_vop.c") Signed-off-by: Stephen Rothwell Acked-by: Mark Yao Signed-off-by: Dave Airlie --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index d83bf87ba71e..f5b3da2f92d7 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -1395,3 +1395,4 @@ const struct component_ops vop_component_ops = { .bind = vop_bind, .unbind = vop_unbind, }; +EXPORT_SYMBOL_GPL(vop_component_ops); -- cgit v1.2.3 From b59b8de3149736e5094cb786978a1ba8d6d55b34 Mon Sep 17 00:00:00 2001 From: Chris Zhong Date: Wed, 6 Jan 2016 12:03:53 +0800 Subject: drm/rockchip: return a true clock rate to adjusted_mode Since the mipi dsi driver need to use the clock of vop to make the calculation of Blanking. But sometimes the clock driver can not set a accurate clock_rate for vop, get it by clk_round_rate before mode_set, so we can get the true value. Signed-off-by: Chris Zhong Acked-by: Mark Yao --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index f5b3da2f92d7..056cac3f0fb1 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -878,9 +878,14 @@ static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) { + struct vop *vop = to_vop(crtc); + if (adjusted_mode->htotal == 0 || adjusted_mode->vtotal == 0) return false; + adjusted_mode->clock = + clk_round_rate(vop->dclk, mode->clock * 1000) / 1000; + return true; } -- cgit v1.2.3 From 84e05408fcfefb9b28050f701e1e94fe9f86804b Mon Sep 17 00:00:00 2001 From: Chris Zhong Date: Wed, 6 Jan 2016 16:12:54 +0800 Subject: drm: rockchip: Support Synopsys DW MIPI DSI Add support for Synopsys DesignWare MIPI DSI controller which is embedded in the rk3288 SoCs. Signed-off-by: Chris Zhong Acked-by: Mark Yao --- drivers/gpu/drm/rockchip/Kconfig | 10 + drivers/gpu/drm/rockchip/Makefile | 1 + drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 1194 +++++++++++++++++++++++++++ drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 3 + 4 files changed, 1208 insertions(+) create mode 100644 drivers/gpu/drm/rockchip/dw-mipi-dsi.c (limited to 'drivers/gpu/drm/rockchip') diff --git a/drivers/gpu/drm/rockchip/Kconfig b/drivers/gpu/drm/rockchip/Kconfig index 35215f6867d3..85739859dffc 100644 --- a/drivers/gpu/drm/rockchip/Kconfig +++ b/drivers/gpu/drm/rockchip/Kconfig @@ -25,3 +25,13 @@ config ROCKCHIP_DW_HDMI for the Synopsys DesignWare HDMI driver. If you want to enable HDMI on RK3288 based SoC, you should selet this option. + +config ROCKCHIP_DW_MIPI_DSI + tristate "Rockchip specific extensions for Synopsys DW MIPI DSI" + depends on DRM_ROCKCHIP + select DRM_MIPI_DSI + help + This selects support for Rockchip SoC specific extensions + for the Synopsys DesignWare HDMI driver. If you want to + enable MIPI DSI on RK3288 based SoC, you should selet this + option. diff --git a/drivers/gpu/drm/rockchip/Makefile b/drivers/gpu/drm/rockchip/Makefile index a9d380f3a423..d1dc0f7b01db 100644 --- a/drivers/gpu/drm/rockchip/Makefile +++ b/drivers/gpu/drm/rockchip/Makefile @@ -6,6 +6,7 @@ rockchipdrm-y := rockchip_drm_drv.o rockchip_drm_fb.o rockchip_drm_fbdev.o \ rockchip_drm_gem.o obj-$(CONFIG_ROCKCHIP_DW_HDMI) += dw_hdmi-rockchip.o +obj-$(CONFIG_ROCKCHIP_DW_MIPI_DSI) += dw-mipi-dsi.o obj-$(CONFIG_DRM_ROCKCHIP) += rockchipdrm.o rockchip_drm_vop.o \ rockchip_vop_reg.o diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c new file mode 100644 index 000000000000..7bfe243c6173 --- /dev/null +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c @@ -0,0 +1,1194 @@ +/* + * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include