From cb049419050f572d09c592fd103eaa90a8b6d9fe Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 26 Jul 2011 10:59:09 +0100 Subject: ARM: gpio: ixp2000: convert drivers to use asm/gpio.h rather than mach/gpio.h Signed-off-by: Russell King --- drivers/i2c/busses/i2c-ixp2000.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-ixp2000.c b/drivers/i2c/busses/i2c-ixp2000.c index 5d8aed5ec21b..be9991bc2a74 100644 --- a/drivers/i2c/busses/i2c-ixp2000.c +++ b/drivers/i2c/busses/i2c-ixp2000.c @@ -35,7 +35,7 @@ #include #include /* Pick up IXP2000-specific bits */ -#include +#include static inline int ixp2000_scl_pin(void *data) { -- cgit v1.2.3 From 87f911a38d7964b50b3be20da5c06fab69a90576 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 22 Aug 2011 08:44:18 +0100 Subject: ARM: 7043/1: mach-ixp2000: rename GPIO header The ixp2000 abuses the namespace by not implementing any generic GPIO nor gpiolib functions in it - just custom GPIO. Rename the header to for clarity. Cc: Lennert Buytenhek Signed-off-by: Linus Walleij Signed-off-by: Russell King --- arch/arm/mach-ixp2000/core.c | 2 + arch/arm/mach-ixp2000/include/mach/gpio-ixp2000.h | 48 +++++++++++++++++++++++ arch/arm/mach-ixp2000/include/mach/gpio.h | 48 ----------------------- arch/arm/mach-ixp2000/ixdp2x00.c | 1 + drivers/i2c/busses/i2c-ixp2000.c | 2 +- 5 files changed, 52 insertions(+), 49 deletions(-) create mode 100644 arch/arm/mach-ixp2000/include/mach/gpio-ixp2000.h delete mode 100644 arch/arm/mach-ixp2000/include/mach/gpio.h (limited to 'drivers/i2c') diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index e95c5e74238d..59a512672bb9 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c @@ -39,6 +39,8 @@ #include #include +#include + static DEFINE_SPINLOCK(ixp2000_slowport_lock); static unsigned long ixp2000_slowport_irq_flags; diff --git a/arch/arm/mach-ixp2000/include/mach/gpio-ixp2000.h b/arch/arm/mach-ixp2000/include/mach/gpio-ixp2000.h new file mode 100644 index 000000000000..af836c76c3f1 --- /dev/null +++ b/arch/arm/mach-ixp2000/include/mach/gpio-ixp2000.h @@ -0,0 +1,48 @@ +/* + * arch/arm/mach-ixp2000/include/mach/gpio.h + * + * Copyright (C) 2002 Intel Corporation. + * + * This program is free software, you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * IXP2000 GPIO in/out, edge/level detection for IRQs: + * IRQs are generated on Falling-edge, Rising-Edge, Level-low, Level-High + * or both Falling-edge and Rising-edge. + * This must be called *before* the corresponding IRQ is registerd. + * Use this instead of directly setting the GPIO registers. + * GPIOs may also be used as GPIOs (e.g. for emulating i2c/smb) + */ +#ifndef __ASM_ARCH_GPIO_H +#define __ASM_ARCH_GPIO_H + +#ifndef __ASSEMBLY__ + +#define GPIO_IN 0 +#define GPIO_OUT 1 + +#define IXP2000_GPIO_LOW 0 +#define IXP2000_GPIO_HIGH 1 + +extern void gpio_line_config(int line, int direction); + +static inline int gpio_line_get(int line) +{ + return (((*IXP2000_GPIO_PLR) >> line) & 1); +} + +static inline void gpio_line_set(int line, int value) +{ + if (value == IXP2000_GPIO_HIGH) { + ixp2000_reg_write(IXP2000_GPIO_POSR, 1 << line); + } else if (value == IXP2000_GPIO_LOW) { + ixp2000_reg_write(IXP2000_GPIO_POCR, 1 << line); + } +} + +#endif /* !__ASSEMBLY__ */ + +#endif /* ASM_ARCH_IXP2000_GPIO_H_ */ diff --git a/arch/arm/mach-ixp2000/include/mach/gpio.h b/arch/arm/mach-ixp2000/include/mach/gpio.h deleted file mode 100644 index 4a88d2c33dac..000000000000 --- a/arch/arm/mach-ixp2000/include/mach/gpio.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * arch/arm/mach-ixp2000/include/mach/gpio.h - * - * Copyright (C) 2002 Intel Corporation. - * - * This program is free software, you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/* - * IXP2000 GPIO in/out, edge/level detection for IRQs: - * IRQs are generated on Falling-edge, Rising-Edge, Level-low, Level-High - * or both Falling-edge and Rising-edge. - * This must be called *before* the corresponding IRQ is registerd. - * Use this instead of directly setting the GPIO registers. - * GPIOs may also be used as GPIOs (e.g. for emulating i2c/smb) - */ -#ifndef __ASM_ARCH_GPIO_H -#define __ASM_ARCH_GPIO_H - -#ifndef __ASSEMBLY__ - -#define GPIO_IN 0 -#define GPIO_OUT 1 - -#define IXP2000_GPIO_LOW 0 -#define IXP2000_GPIO_HIGH 1 - -extern void gpio_line_config(int line, int direction); - -static inline int gpio_line_get(int line) -{ - return (((*IXP2000_GPIO_PLR) >> line) & 1); -} - -static inline void gpio_line_set(int line, int value) -{ - if (value == IXP2000_GPIO_HIGH) { - ixp2000_reg_write(IXP2000_GPIO_POSR, 1 << line); - } else if (value == IXP2000_GPIO_LOW) { - ixp2000_reg_write(IXP2000_GPIO_POCR, 1 << line); - } -} - -#endif /* !__ASSEMBLY__ */ - -#endif /* ASM_ARCH_IXP2000_GPIO_H_ */ diff --git a/arch/arm/mach-ixp2000/ixdp2x00.c b/arch/arm/mach-ixp2000/ixdp2x00.c index f61506822ad8..634b6c852f68 100644 --- a/arch/arm/mach-ixp2000/ixdp2x00.c +++ b/arch/arm/mach-ixp2000/ixdp2x00.c @@ -41,6 +41,7 @@ #include #include +#include /************************************************************************* * IXDP2x00 IRQ Initialization diff --git a/drivers/i2c/busses/i2c-ixp2000.c b/drivers/i2c/busses/i2c-ixp2000.c index be9991bc2a74..c01e9519f6c1 100644 --- a/drivers/i2c/busses/i2c-ixp2000.c +++ b/drivers/i2c/busses/i2c-ixp2000.c @@ -35,7 +35,7 @@ #include #include /* Pick up IXP2000-specific bits */ -#include +#include static inline int ixp2000_scl_pin(void *data) { -- cgit v1.2.3 From 4b723a471050a8b80f7fa86e76f01f4c711b3443 Mon Sep 17 00:00:00 2001 From: srinidhi kasagar Date: Tue, 9 Aug 2011 20:17:22 +0200 Subject: i2c-nomadik: Do not use _interruptible_ variant call If there is a signal pending and wait_for_completion_interruptible_timeout exited because of the -ERESTARTSYS error we are unable to send any more i2c messages. So, deprecate this _interruptible_ variant call. Signed-off-by: Srinidhi Kasagar Signed-off-by: Linus Walleij Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-nomadik.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c index 0c731ca69f15..f9b8854fe0a5 100644 --- a/drivers/i2c/busses/i2c-nomadik.c +++ b/drivers/i2c/busses/i2c-nomadik.c @@ -417,12 +417,12 @@ static int read_i2c(struct nmk_i2c_dev *dev) writel(readl(dev->virtbase + I2C_IMSCR) | irq_mask, dev->virtbase + I2C_IMSCR); - timeout = wait_for_completion_interruptible_timeout( + timeout = wait_for_completion_timeout( &dev->xfer_complete, dev->adap.timeout); if (timeout < 0) { dev_err(&dev->pdev->dev, - "wait_for_completion_interruptible_timeout" + "wait_for_completion_timeout" "returned %d waiting for event\n", timeout); status = timeout; } @@ -504,12 +504,12 @@ static int write_i2c(struct nmk_i2c_dev *dev) writel(readl(dev->virtbase + I2C_IMSCR) | irq_mask, dev->virtbase + I2C_IMSCR); - timeout = wait_for_completion_interruptible_timeout( + timeout = wait_for_completion_timeout( &dev->xfer_complete, dev->adap.timeout); if (timeout < 0) { dev_err(&dev->pdev->dev, - "wait_for_completion_interruptible_timeout" + "wait_for_completion_timeout" "returned %d waiting for event\n", timeout); status = timeout; } -- cgit v1.2.3 From 584b408d37af4e0b38ad5b60f236381bcdf396bc Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 4 Aug 2011 07:53:02 -0700 Subject: Revert "i2c-omap: fix static suspend vs. runtime suspend" This reverts commit adf6e07922255937c8bfeea777d19502b4c9a2be. Remove system PM methods which can race with runtime PM methods. Also, as of v3.1, the PM domain level code for OMAP handles device power state transistions automatically for devices, so drivers no longer need to specifically call the bus/pm_domain methods themselves. Signed-off-by: Kevin Hilman Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-omap.c | 29 ----------------------------- 1 file changed, 29 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 1a766cf74f6b..2dfb63176856 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -1139,41 +1139,12 @@ omap_i2c_remove(struct platform_device *pdev) return 0; } -#ifdef CONFIG_SUSPEND -static int omap_i2c_suspend(struct device *dev) -{ - if (!pm_runtime_suspended(dev)) - if (dev->bus && dev->bus->pm && dev->bus->pm->runtime_suspend) - dev->bus->pm->runtime_suspend(dev); - - return 0; -} - -static int omap_i2c_resume(struct device *dev) -{ - if (!pm_runtime_suspended(dev)) - if (dev->bus && dev->bus->pm && dev->bus->pm->runtime_resume) - dev->bus->pm->runtime_resume(dev); - - return 0; -} - -static struct dev_pm_ops omap_i2c_pm_ops = { - .suspend = omap_i2c_suspend, - .resume = omap_i2c_resume, -}; -#define OMAP_I2C_PM_OPS (&omap_i2c_pm_ops) -#else -#define OMAP_I2C_PM_OPS NULL -#endif - static struct platform_driver omap_i2c_driver = { .probe = omap_i2c_probe, .remove = omap_i2c_remove, .driver = { .name = "omap_i2c", .owner = THIS_MODULE, - .pm = OMAP_I2C_PM_OPS, }, }; -- cgit v1.2.3 From c8d47631a48f254d062db8084776d1fb24785e7b Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 9 Aug 2011 20:17:29 +0200 Subject: i2c-nomadik: fix kerneldoc warning There was a missing struct item in the kerneldoc, add it and fix another pretty-printing formatting issue with a missing space. Signed-off-by: Linus Walleij Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-nomadik.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c index f9b8854fe0a5..b228e09c5d05 100644 --- a/drivers/i2c/busses/i2c-nomadik.c +++ b/drivers/i2c/busses/i2c-nomadik.c @@ -146,6 +146,7 @@ struct i2c_nmk_client { * @stop: stop condition * @xfer_complete: acknowledge completion for a I2C message * @result: controller propogated result + * @regulator: pointer to i2c regulator * @busy: Busy doing transfer */ struct nmk_i2c_dev { @@ -509,7 +510,7 @@ static int write_i2c(struct nmk_i2c_dev *dev) if (timeout < 0) { dev_err(&dev->pdev->dev, - "wait_for_completion_timeout" + "wait_for_completion_timeout " "returned %d waiting for event\n", timeout); status = timeout; } -- cgit v1.2.3 From 7a703aded97e01d7f4a6b8440a431117399666ba Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Tue, 30 Aug 2011 14:37:37 +0800 Subject: i2c-pxa2xx: return proper error code in ce4100_i2c_probe error paths Signed-off-by: Axel Lin Acked-by: Sebastian Andrzej Siewior Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-pxa-pci.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-pxa-pci.c b/drivers/i2c/busses/i2c-pxa-pci.c index 6659d269b841..b73da6cd6f91 100644 --- a/drivers/i2c/busses/i2c-pxa-pci.c +++ b/drivers/i2c/busses/i2c-pxa-pci.c @@ -109,12 +109,15 @@ static int __devinit ce4100_i2c_probe(struct pci_dev *dev, return -EINVAL; } sds = kzalloc(sizeof(*sds), GFP_KERNEL); - if (!sds) + if (!sds) { + ret = -ENOMEM; goto err_mem; + } for (i = 0; i < ARRAY_SIZE(sds->pdev); i++) { sds->pdev[i] = add_i2c_device(dev, i); if (IS_ERR(sds->pdev[i])) { + ret = PTR_ERR(sds->pdev[i]); while (--i >= 0) platform_device_unregister(sds->pdev[i]); goto err_dev_add; -- cgit v1.2.3 From 406bd18a7a39ef69f1d60a41d9de74932bcb98d4 Mon Sep 17 00:00:00 2001 From: John Bonesio Date: Tue, 30 Aug 2011 11:46:08 -0600 Subject: i2c-tegra: Add of_match_table This patch was intended to be part of 7ca2d1a105a239e300b937e9c41a10a4bd08f569 "i2c: Tegra: Add DeviceTree support". However, an early version of that patch, which was missing a chunk, was applied to next-i2c. This change is that missing chunk. Signed-off-by: John Bonesio Signed-off-by: Stephen Warren Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-tegra.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 2440b7411978..126b4f060231 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -719,6 +719,17 @@ static int tegra_i2c_resume(struct platform_device *pdev) } #endif +#if defined(CONFIG_OF) +/* Match table for of_platform binding */ +static const struct of_device_id tegra_i2c_of_match[] __devinitconst = { + { .compatible = "nvidia,tegra20-i2c", }, + {}, +}; +MODULE_DEVICE_TABLE(of, tegra_i2c_of_match); +#else +#define tegra_i2c_of_match NULL +#endif + static struct platform_driver tegra_i2c_driver = { .probe = tegra_i2c_probe, .remove = tegra_i2c_remove, @@ -729,6 +740,7 @@ static struct platform_driver tegra_i2c_driver = { .driver = { .name = "tegra-i2c", .owner = THIS_MODULE, + .of_match_table = tegra_i2c_of_match, }, }; -- cgit v1.2.3 From 048e29cff95168ea3a9f176e84cc0bae54d0ae64 Mon Sep 17 00:00:00 2001 From: Mike Rapoport Date: Tue, 30 Aug 2011 11:46:09 -0600 Subject: i2c-tegra: add I2C_FUNC_SMBUS_EMUL Signed-off-by: Mike Rapoport Signed-off-by: Stephen Warren Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-tegra.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 126b4f060231..17ded1d2f11d 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -531,7 +531,7 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], static u32 tegra_i2c_func(struct i2c_adapter *adap) { - return I2C_FUNC_I2C; + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; } static const struct i2c_algorithm tegra_i2c_algo = { -- cgit v1.2.3 From 96219c3a257cc8ba3b3cae67efdc88be37cf7c9d Mon Sep 17 00:00:00 2001 From: Doug Anderson Date: Tue, 30 Aug 2011 11:46:10 -0600 Subject: i2c-tegra: fix possible race condition after tx In tegra_i2c_fill_tx_fifo, once we have finished pushing all the bytes to the I2C hardware controller, the interrupt might happen before we have updated i2c_dev->msg_buf_remaining at the end of the function. Then, in tegra_i2c_isr, we will call again tegra_i2c_fill_tx_fifo triggering weird behaviour. This has been shown to happen under real conditions. Signed-off-by: Doug Anderson Tested-by: Vincent Palatin Acked-by: Rhyland Klein Acked-by: Stephen Warren Signed-off-by: Stephen Warren Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-tegra.c | 46 +++++++++++++++++++++++++++++------------- 1 file changed, 32 insertions(+), 14 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 17ded1d2f11d..3c94c4a81a55 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -270,14 +270,30 @@ static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev) /* Rounds down to not include partial word at the end of buf */ words_to_transfer = buf_remaining / BYTES_PER_FIFO_WORD; - if (words_to_transfer > tx_fifo_avail) - words_to_transfer = tx_fifo_avail; - i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer); - - buf += words_to_transfer * BYTES_PER_FIFO_WORD; - buf_remaining -= words_to_transfer * BYTES_PER_FIFO_WORD; - tx_fifo_avail -= words_to_transfer; + /* It's very common to have < 4 bytes, so optimize that case. */ + if (words_to_transfer) { + if (words_to_transfer > tx_fifo_avail) + words_to_transfer = tx_fifo_avail; + + /* + * Update state before writing to FIFO. If this casues us + * to finish writing all bytes (AKA buf_remaining goes to 0) we + * have a potential for an interrupt (PACKET_XFER_COMPLETE is + * not maskable). We need to make sure that the isr sees + * buf_remaining as 0 and doesn't call us back re-entrantly. + */ + buf_remaining -= words_to_transfer * BYTES_PER_FIFO_WORD; + tx_fifo_avail -= words_to_transfer; + i2c_dev->msg_buf_remaining = buf_remaining; + i2c_dev->msg_buf = buf + + words_to_transfer * BYTES_PER_FIFO_WORD; + barrier(); + + i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer); + + buf += words_to_transfer * BYTES_PER_FIFO_WORD; + } /* * If there is a partial word at the end of buf, handle it manually to @@ -287,14 +303,15 @@ static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev) if (tx_fifo_avail > 0 && buf_remaining > 0) { BUG_ON(buf_remaining > 3); memcpy(&val, buf, buf_remaining); + + /* Again update before writing to FIFO to make sure isr sees. */ + i2c_dev->msg_buf_remaining = 0; + i2c_dev->msg_buf = NULL; + barrier(); + i2c_writel(i2c_dev, val, I2C_TX_FIFO); - buf_remaining = 0; - tx_fifo_avail--; } - BUG_ON(tx_fifo_avail > 0 && buf_remaining > 0); - i2c_dev->msg_buf_remaining = buf_remaining; - i2c_dev->msg_buf = buf; return 0; } @@ -411,9 +428,10 @@ static irqreturn_t tegra_i2c_isr(int irq, void *dev_id) tegra_i2c_mask_irq(i2c_dev, I2C_INT_TX_FIFO_DATA_REQ); } - if ((status & I2C_INT_PACKET_XFER_COMPLETE) && - !i2c_dev->msg_buf_remaining) + if (status & I2C_INT_PACKET_XFER_COMPLETE) { + BUG_ON(i2c_dev->msg_buf_remaining); complete(&i2c_dev->msg_complete); + } i2c_writel(i2c_dev, status, I2C_INT_STATUS); if (i2c_dev->is_dvc) -- cgit v1.2.3 From 593702c71a415b153bd81fbc487394979f3e7a63 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 8 Sep 2011 15:09:34 +0800 Subject: i2c-imx: remove init/exit hooks from platform data The init/exit hooks in platform data are being used nowhere, so can be removed. Signed-off-by: Shawn Guo Cc: Darius Augulis Cc: Ben Dooks Acked-by: Grant Likely Acked-by: Sascha Hauer Signed-off-by: Ben Dooks --- arch/arm/plat-mxc/include/mach/i2c.h | 4 ---- drivers/i2c/busses/i2c-imx.c | 21 +++------------------ 2 files changed, 3 insertions(+), 22 deletions(-) (limited to 'drivers/i2c') diff --git a/arch/arm/plat-mxc/include/mach/i2c.h b/arch/arm/plat-mxc/include/mach/i2c.h index 4a5dc5c6d8e8..375cdd0cf876 100644 --- a/arch/arm/plat-mxc/include/mach/i2c.h +++ b/arch/arm/plat-mxc/include/mach/i2c.h @@ -11,14 +11,10 @@ /** * struct imxi2c_platform_data - structure of platform data for MXC I2C driver - * @init: Initialise gpio's and other board specific things - * @exit: Free everything initialised by @init * @bitrate: Bus speed measured in Hz * **/ struct imxi2c_platform_data { - int (*init)(struct device *dev); - void (*exit)(struct device *dev); int bitrate; }; diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index 4c2a62b75b5c..54d809ed20be 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -466,7 +466,7 @@ static int __init i2c_imx_probe(struct platform_device *pdev) { struct imx_i2c_struct *i2c_imx; struct resource *res; - struct imxi2c_platform_data *pdata; + struct imxi2c_platform_data *pdata = pdev->dev.platform_data; void __iomem *base; resource_size_t res_size; int irq; @@ -485,19 +485,11 @@ static int __init i2c_imx_probe(struct platform_device *pdev) return -ENOENT; } - pdata = pdev->dev.platform_data; - - if (pdata && pdata->init) { - ret = pdata->init(&pdev->dev); - if (ret) - return ret; - } - res_size = resource_size(res); if (!request_mem_region(res->start, res_size, DRIVER_NAME)) { - ret = -EBUSY; - goto fail0; + dev_err(&pdev->dev, "request_mem_region failed\n"); + return -EBUSY; } base = ioremap(res->start, res_size); @@ -586,9 +578,6 @@ fail2: iounmap(base); fail1: release_mem_region(res->start, resource_size(res)); -fail0: - if (pdata && pdata->exit) - pdata->exit(&pdev->dev); return ret; /* Return error number */ } @@ -611,10 +600,6 @@ static int __exit i2c_imx_remove(struct platform_device *pdev) writeb(0, i2c_imx->base + IMX_I2C_I2CR); writeb(0, i2c_imx->base + IMX_I2C_I2SR); - /* Shut down hardware */ - if (pdata && pdata->exit) - pdata->exit(&pdev->dev); - clk_put(i2c_imx->clk); iounmap(i2c_imx->base); -- cgit v1.2.3 From dfcd04b19d16c0016c705ed96a8b3cfa5315a2e9 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 8 Sep 2011 15:09:35 +0800 Subject: i2c-imx: add device tree probe support It adds device tree probe support for i2c-imx driver. Signed-off-by: Shawn Guo Cc: Grant Likely Cc: Darius Augulis Cc: Ben Dooks Acked-by: Grant Likely Signed-off-by: Ben Dooks --- .../devicetree/bindings/i2c/fsl-imx-i2c.txt | 25 ++++++++++++++++++++++ drivers/i2c/busses/i2c-imx.c | 25 ++++++++++++++++------ 2 files changed, 44 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt (limited to 'drivers/i2c') diff --git a/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt b/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt new file mode 100644 index 000000000000..f3cf43b66f7e --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/fsl-imx-i2c.txt @@ -0,0 +1,25 @@ +* Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX + +Required properties: +- compatible : Should be "fsl,-i2c" +- reg : Should contain I2C/HS-I2C registers location and length +- interrupts : Should contain I2C/HS-I2C interrupt + +Optional properties: +- clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz. + The absence of the propoerty indicates the default frequency 100 kHz. + +Examples: + +i2c@83fc4000 { /* I2C2 on i.MX51 */ + compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; + reg = <0x83fc4000 0x4000>; + interrupts = <63>; +}; + +i2c@70038000 { /* HS-I2C on i.MX51 */ + compatible = "fsl,imx51-i2c", "fsl,imx1-i2c"; + reg = <0x70038000 0x4000>; + interrupts = <64>; + clock-frequency = <400000>; +}; diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index 54d809ed20be..58832e578fff 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -48,6 +48,9 @@ #include #include #include +#include +#include +#include #include #include @@ -125,6 +128,11 @@ struct imx_i2c_struct { unsigned int ifdr; /* IMX_I2C_IFDR */ }; +static const struct of_device_id i2c_imx_dt_ids[] = { + { .compatible = "fsl,imx1-i2c", }, + { /* sentinel */ } +}; + /** Functions for IMX I2C adapter driver *************************************** *******************************************************************************/ @@ -469,7 +477,7 @@ static int __init i2c_imx_probe(struct platform_device *pdev) struct imxi2c_platform_data *pdata = pdev->dev.platform_data; void __iomem *base; resource_size_t res_size; - int irq; + int irq, bitrate; int ret; dev_dbg(&pdev->dev, "<%s>\n", __func__); @@ -512,6 +520,7 @@ static int __init i2c_imx_probe(struct platform_device *pdev) i2c_imx->adapter.algo = &i2c_imx_algo; i2c_imx->adapter.dev.parent = &pdev->dev; i2c_imx->adapter.nr = pdev->id; + i2c_imx->adapter.dev.of_node = pdev->dev.of_node; i2c_imx->irq = irq; i2c_imx->base = base; i2c_imx->res = res; @@ -538,10 +547,12 @@ static int __init i2c_imx_probe(struct platform_device *pdev) i2c_set_adapdata(&i2c_imx->adapter, i2c_imx); /* Set up clock divider */ - if (pdata && pdata->bitrate) - i2c_imx_set_clk(i2c_imx, pdata->bitrate); - else - i2c_imx_set_clk(i2c_imx, IMX_I2C_BIT_RATE); + bitrate = IMX_I2C_BIT_RATE; + ret = of_property_read_u32(pdev->dev.of_node, + "clock-frequency", &bitrate); + if (ret < 0 && pdata && pdata->bitrate) + bitrate = pdata->bitrate; + i2c_imx_set_clk(i2c_imx, bitrate); /* Set up chip registers to defaults */ writeb(0, i2c_imx->base + IMX_I2C_I2CR); @@ -554,6 +565,8 @@ static int __init i2c_imx_probe(struct platform_device *pdev) goto fail5; } + of_i2c_register_devices(&i2c_imx->adapter); + /* Set up platform driver data */ platform_set_drvdata(pdev, i2c_imx); @@ -584,7 +597,6 @@ fail1: static int __exit i2c_imx_remove(struct platform_device *pdev) { struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev); - struct imxi2c_platform_data *pdata = pdev->dev.platform_data; /* remove adapter */ dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n"); @@ -613,6 +625,7 @@ static struct platform_driver i2c_imx_driver = { .driver = { .name = DRIVER_NAME, .owner = THIS_MODULE, + .of_match_table = i2c_imx_dt_ids, } }; -- cgit v1.2.3 From 699324871fcc3650f2023c5e36cb119a92d7894b Mon Sep 17 00:00:00 2001 From: "Justin P. Mattock" Date: Tue, 26 Jul 2011 23:06:29 -0700 Subject: treewide: remove extra semicolons from various parts of the kernel This is a resend from the original, changing the title from PATCH to RFC(since this is a review for commit, and I should have put that the first go around). and also removing some of the commit's with ia64 and bash since it is significant. let me know if I might have missed anything etc.. Signed-off-by: Justin P. Mattock Signed-off-by: Jiri Kosina --- arch/arm/mach-nuc93x/time.c | 2 +- arch/arm/mach-w90x900/cpu.c | 2 +- drivers/block/rbd.c | 2 +- drivers/gpu/drm/radeon/radeon_fence.c | 2 +- drivers/i2c/busses/i2c-designware.c | 2 +- drivers/media/radio/wl128x/fmdrv_v4l2.c | 2 +- drivers/scsi/isci/phy.c | 2 +- drivers/staging/iio/addac/adt7316-i2c.c | 2 +- drivers/staging/iio/dds/ad9832.c | 2 +- drivers/usb/gadget/mv_udc_core.c | 4 ++-- scripts/checkpatch.pl | 4 ++-- 11 files changed, 13 insertions(+), 13 deletions(-) (limited to 'drivers/i2c') diff --git a/arch/arm/mach-nuc93x/time.c b/arch/arm/mach-nuc93x/time.c index 2f90f9dc6e30..f9807c029ec5 100644 --- a/arch/arm/mach-nuc93x/time.c +++ b/arch/arm/mach-nuc93x/time.c @@ -82,7 +82,7 @@ static void nuc93x_timer_setup(void) timer0_load = (rate / TICKS_PER_SEC); __raw_writel(timer0_load, REG_TICR0); - val |= (PERIOD | COUNTEN | INTEN | PRESCALE);; + val |= (PERIOD | COUNTEN | INTEN | PRESCALE); __raw_writel(val, REG_TCSR0); } diff --git a/arch/arm/mach-w90x900/cpu.c b/arch/arm/mach-w90x900/cpu.c index 83c56324a472..0a235e502330 100644 --- a/arch/arm/mach-w90x900/cpu.c +++ b/arch/arm/mach-w90x900/cpu.c @@ -60,7 +60,7 @@ static DEFINE_CLK(emc, 7); static DEFINE_SUBCLK(rmii, 2); static DEFINE_CLK(usbd, 8); static DEFINE_CLK(usbh, 9); -static DEFINE_CLK(g2d, 10);; +static DEFINE_CLK(g2d, 10); static DEFINE_CLK(pwm, 18); static DEFINE_CLK(ps2, 24); static DEFINE_CLK(kpi, 25); diff --git a/drivers/block/rbd.c b/drivers/block/rbd.c index 1278098624e6..2c09102adbaa 100644 --- a/drivers/block/rbd.c +++ b/drivers/block/rbd.c @@ -192,7 +192,7 @@ static ssize_t rbd_snap_add(struct device *dev, const char *buf, size_t count); static void __rbd_remove_snap_dev(struct rbd_device *rbd_dev, - struct rbd_snap *snap);; + struct rbd_snap *snap); static struct rbd_device *dev_to_rbd(struct device *dev) diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c index 021d2b6b556f..9a9f9fcde378 100644 --- a/drivers/gpu/drm/radeon/radeon_fence.c +++ b/drivers/gpu/drm/radeon/radeon_fence.c @@ -48,7 +48,7 @@ static void radeon_fence_write(struct radeon_device *rdev, u32 seq) scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; else scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; - rdev->wb.wb[scratch_index/4] = cpu_to_le32(seq);; + rdev->wb.wb[scratch_index/4] = cpu_to_le32(seq); } else WREG32(rdev->fence_drv.scratch_reg, seq); } diff --git a/drivers/i2c/busses/i2c-designware.c b/drivers/i2c/busses/i2c-designware.c index b7a51c43b185..1b42b50b5992 100644 --- a/drivers/i2c/busses/i2c-designware.c +++ b/drivers/i2c/busses/i2c-designware.c @@ -390,7 +390,7 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev) int tx_limit, rx_limit; u32 addr = msgs[dev->msg_write_idx].addr; u32 buf_len = dev->tx_buf_len; - u8 *buf = dev->tx_buf;; + u8 *buf = dev->tx_buf; intr_mask = DW_IC_INTR_DEFAULT_MASK; diff --git a/drivers/media/radio/wl128x/fmdrv_v4l2.c b/drivers/media/radio/wl128x/fmdrv_v4l2.c index 87010724f914..a4f07f8b2f20 100644 --- a/drivers/media/radio/wl128x/fmdrv_v4l2.c +++ b/drivers/media/radio/wl128x/fmdrv_v4l2.c @@ -403,7 +403,7 @@ static int fm_v4l2_vidioc_s_hw_freq_seek(struct file *file, void *priv, static int fm_v4l2_vidioc_g_modulator(struct file *file, void *priv, struct v4l2_modulator *mod) { - struct fmdev *fmdev = video_drvdata(file);; + struct fmdev *fmdev = video_drvdata(file); if (mod->index != 0) return -EINVAL; diff --git a/drivers/scsi/isci/phy.c b/drivers/scsi/isci/phy.c index 79313a7a2356..8d9192d49f4a 100644 --- a/drivers/scsi/isci/phy.c +++ b/drivers/scsi/isci/phy.c @@ -695,7 +695,7 @@ enum sci_status sci_phy_event_handler(struct isci_phy *iphy, u32 event_code) __func__, event_code); - return SCI_FAILURE;; + return SCI_FAILURE; } return SCI_SUCCESS; case SCI_PHY_SUB_AWAIT_SATA_SPEED_EN: diff --git a/drivers/staging/iio/addac/adt7316-i2c.c b/drivers/staging/iio/addac/adt7316-i2c.c index 52d1ea349635..1c86cf11ab94 100644 --- a/drivers/staging/iio/addac/adt7316-i2c.c +++ b/drivers/staging/iio/addac/adt7316-i2c.c @@ -109,7 +109,7 @@ static int __devinit adt7316_i2c_probe(struct i2c_client *client, static int __devexit adt7316_i2c_remove(struct i2c_client *client) { - return adt7316_remove(&client->dev);; + return adt7316_remove(&client->dev); } static const struct i2c_device_id adt7316_i2c_id[] = { diff --git a/drivers/staging/iio/dds/ad9832.c b/drivers/staging/iio/dds/ad9832.c index e3e61a469bb8..6f0efe6580e7 100644 --- a/drivers/staging/iio/dds/ad9832.c +++ b/drivers/staging/iio/dds/ad9832.c @@ -52,7 +52,7 @@ static int ad9832_write_frequency(struct ad9832_state *st, ((addr - 3) << ADD_SHIFT) | ((regval >> 0) & 0xFF)); - return spi_sync(st->spi, &st->freq_msg);; + return spi_sync(st->spi, &st->freq_msg); } static int ad9832_write_phase(struct ad9832_state *st, diff --git a/drivers/usb/gadget/mv_udc_core.c b/drivers/usb/gadget/mv_udc_core.c index ce1ac2bcb314..0b3b8d0462db 100644 --- a/drivers/usb/gadget/mv_udc_core.c +++ b/drivers/usb/gadget/mv_udc_core.c @@ -335,7 +335,7 @@ static int queue_dtd(struct mv_ep *ep, struct mv_req *req) } else { /* Write dQH next pointer and terminate bit to 0 */ dqh->next_dtd_ptr = req->head->td_dma - & EP_QUEUE_HEAD_NEXT_POINTER_MASK;; + & EP_QUEUE_HEAD_NEXT_POINTER_MASK; dqh->size_ioc_int_sts = 0; /* Ensure that updates to the QH will occur before priming. */ @@ -376,7 +376,7 @@ static int queue_dtd(struct mv_ep *ep, struct mv_req *req) } } done: - return retval;; + return retval; } static struct mv_dtd *build_dtd(struct mv_req *req, unsigned *length, diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index 9d761c95eca2..14f6a90ca217 100755 --- a/scripts/checkpatch.pl +++ b/scripts/checkpatch.pl @@ -2931,11 +2931,11 @@ sub process { } } if ($level == 0 && $block =~ /^\s*\{/ && !$allowed) { - my $herectx = $here . "\n";; + my $herectx = $here . "\n"; my $cnt = statement_rawlines($block); for (my $n = 0; $n < $cnt; $n++) { - $herectx .= raw_line($linenr, $n) . "\n";; + $herectx .= raw_line($linenr, $n) . "\n"; } WARN("BRACES", -- cgit v1.2.3 From 8a0a8e8e42a4e30a1fc4c40205fa790e264d00f3 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 2 Sep 2011 16:43:36 +0200 Subject: mfd: remove CONFIG_MFD_SUPPORT We currently have two symbols to control compilation the MFD subsystem, MFD_SUPPORT and MFD_CORE. The MFD_SUPPORT is actually not required at all, it only hides the submenu when not set, with the effect that Kconfig warns about missing dependencies when another driver selects an MFD driver while MFD_SUPPORT is disabled. Turning the MFD submenu back from menuconfig into a plain menu simplifies the Kconfig syntax for those kinds of users and avoids the surprise when the menu suddenly appears because another driver was enabled that selects this symbol. Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap2/Kconfig | 1 - drivers/gpio/Kconfig | 3 +-- drivers/i2c/busses/Kconfig | 1 - drivers/media/radio/Kconfig | 1 - drivers/mfd/Kconfig | 22 ++++------------------ 5 files changed, 5 insertions(+), 23 deletions(-) (limited to 'drivers/i2c') diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 57b66d590c52..1aee224c9e47 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -14,7 +14,6 @@ config ARCH_OMAP2PLUS_TYPICAL select SERIAL_OMAP_CONSOLE select I2C select I2C_OMAP - select MFD_SUPPORT select MENELAUS if ARCH_OMAP2 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index d539efd96d4b..fbc5fd449a04 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -180,7 +180,7 @@ config GPIO_SCH config GPIO_VX855 tristate "VIA VX855/VX875 GPIO" - depends on MFD_SUPPORT && PCI + depends on PCI select MFD_CORE select MFD_VX855 help @@ -417,7 +417,6 @@ config GPIO_TIMBERDALE config GPIO_RDC321X tristate "RDC R-321x GPIO support" depends on PCI - select MFD_SUPPORT select MFD_CORE select MFD_RDC321X help diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 646068e5100b..d625a484fa85 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -110,7 +110,6 @@ config I2C_I801 config I2C_ISCH tristate "Intel SCH SMBus 1.0" depends on PCI - select MFD_CORE select LPC_SCH help Say Y here if you want to use SMBus controller on the Intel SCH diff --git a/drivers/media/radio/Kconfig b/drivers/media/radio/Kconfig index 52798a111e16..ccd5f0d8a012 100644 --- a/drivers/media/radio/Kconfig +++ b/drivers/media/radio/Kconfig @@ -426,7 +426,6 @@ config RADIO_TIMBERDALE config RADIO_WL1273 tristate "Texas Instruments WL1273 I2C FM Radio" depends on I2C && VIDEO_V4L2 - select MFD_CORE select MFD_WL1273_CORE select FW_LOADER ---help--- diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 9c1347dc7a4a..ac8bd4feb047 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -2,23 +2,8 @@ # Multifunction miscellaneous devices # -menuconfig MFD_SUPPORT - bool "Multifunction device drivers" - depends on HAS_IOMEM - default y - help - Multifunction devices embed several functions (e.g. GPIOs, - touchscreens, keyboards, current regulators, power management chips, - etc...) in one single integrated circuit. They usually talk to the - main CPU through one or more IRQ lines and low speed data busses (SPI, - I2C, etc..). They appear as one single device to the main system - through the data bus and the MFD framework allows for sub devices - (a.k.a. functions) to appear as discrete platform devices. - MFDs are typically found on embedded platforms. - - This option alone does not add any kernel code. - -if MFD_SUPPORT +if HAS_IOMEM +menu "Multifunction device drivers" config MFD_CORE tristate @@ -772,7 +757,8 @@ config MFD_AAT2870_CORE additional drivers must be enabled in order to use the functionality of the device. -endif # MFD_SUPPORT +endmenu +endif menu "Multimedia Capabilities Port drivers" depends on ARCH_SA1100 -- cgit v1.2.3 From 50d5676ebac57c187ac347bae24290f0dc16fdbe Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Fri, 12 Aug 2011 11:39:43 +0200 Subject: MIPS: Alchemy: kill au1xxx.h header No longer required Signed-off-by: Manuel Lauss To: Linux-MIPS Patchwork: https://patchwork.linux-mips.org/patch/2705/ Signed-off-by: Ralf Baechle delete mode 100644 arch/mips/include/asm/mach-au1x00/au1xxx.h --- arch/mips/alchemy/common/platform.c | 2 +- arch/mips/alchemy/devboards/db1x00/platform.c | 2 +- arch/mips/alchemy/devboards/pb1200/platform.c | 3 +- arch/mips/include/asm/mach-au1x00/au1xxx.h | 43 --------------------------- drivers/i2c/busses/i2c-au1550.c | 2 +- drivers/ide/au1xxx-ide.c | 2 +- drivers/mtd/nand/au1550nd.c | 6 +++- 7 files changed, 11 insertions(+), 49 deletions(-) delete mode 100644 arch/mips/include/asm/mach-au1x00/au1xxx.h (limited to 'drivers/i2c') diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c index 7eca306175f1..657ae2778374 100644 --- a/arch/mips/alchemy/common/platform.c +++ b/arch/mips/alchemy/common/platform.c @@ -18,7 +18,7 @@ #include #include -#include +#include #include #include #include diff --git a/arch/mips/alchemy/devboards/db1x00/platform.c b/arch/mips/alchemy/devboards/db1x00/platform.c index 9030108928a4..990367f8401d 100644 --- a/arch/mips/alchemy/devboards/db1x00/platform.c +++ b/arch/mips/alchemy/devboards/db1x00/platform.c @@ -21,7 +21,7 @@ #include #include -#include +#include #include #include "../platform.h" diff --git a/arch/mips/alchemy/devboards/pb1200/platform.c b/arch/mips/alchemy/devboards/pb1200/platform.c index 7de4f883da1c..d7915b054be7 100644 --- a/arch/mips/alchemy/devboards/pb1200/platform.c +++ b/arch/mips/alchemy/devboards/pb1200/platform.c @@ -24,10 +24,11 @@ #include #include -#include +#include #include #include #include +#include #include "../platform.h" diff --git a/arch/mips/include/asm/mach-au1x00/au1xxx.h b/arch/mips/include/asm/mach-au1x00/au1xxx.h deleted file mode 100644 index 1b3655090ed3..000000000000 --- a/arch/mips/include/asm/mach-au1x00/au1xxx.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef _AU1XXX_H_ -#define _AU1XXX_H_ - -#include - -#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || \ - defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) -#include - -#elif defined(CONFIG_MIPS_PB1550) -#include - -#elif defined(CONFIG_MIPS_PB1200) -#include - -#elif defined(CONFIG_MIPS_DB1200) -#include - -#endif - -#endif /* _AU1XXX_H_ */ diff --git a/drivers/i2c/busses/i2c-au1550.c b/drivers/i2c/busses/i2c-au1550.c index 532828bc50e6..a714534ff321 100644 --- a/drivers/i2c/busses/i2c-au1550.c +++ b/drivers/i2c/busses/i2c-au1550.c @@ -36,7 +36,7 @@ #include #include -#include +#include #include struct i2c_au1550_data { diff --git a/drivers/ide/au1xxx-ide.c b/drivers/ide/au1xxx-ide.c index c7783733f3c3..259786ca8b75 100644 --- a/drivers/ide/au1xxx-ide.c +++ b/drivers/ide/au1xxx-ide.c @@ -36,7 +36,7 @@ #include #include -#include +#include #include #include diff --git a/drivers/mtd/nand/au1550nd.c b/drivers/mtd/nand/au1550nd.c index e7767eef4505..fa5736b9286c 100644 --- a/drivers/mtd/nand/au1550nd.c +++ b/drivers/mtd/nand/au1550nd.c @@ -19,7 +19,11 @@ #include #include -#include +#ifdef CONFIG_MIPS_PB1550 +#include +#elif defined(CONFIG_MIPS_DB1550) +#include +#endif #include /* -- cgit v1.2.3 From 3766386037827fe7064f57f9aec27b3b5e9417aa Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Fri, 12 Aug 2011 11:39:45 +0200 Subject: MIPS: Alchemy: remove all CONFIG_SOC_AU1??? defines Now that no driver any longer depends on the CONFIG_SOC_AU1??? symbols, it's time to get rid of them: Move some of the platform devices to the boards which can use them, Rename a few (unused) constants in the header, Replace them with MIPS_ALCHEMY in the various Kconfig files. Finally delete them altogether from the Alchemy Kconfig file. Signed-off-by: Manuel Lauss To: Linux-MIPS Patchwork: https://patchwork.linux-mips.org/patch/2707/ Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 2 + arch/mips/alchemy/Kconfig | 50 ++---- arch/mips/alchemy/common/platform.c | 175 +------------------ arch/mips/alchemy/devboards/db1200/platform.c | 78 ++++++++- arch/mips/alchemy/devboards/db1x00/board_setup.c | 4 +- arch/mips/alchemy/devboards/db1x00/platform.c | 32 ++++ arch/mips/alchemy/devboards/pb1100/platform.c | 29 ++++ arch/mips/alchemy/devboards/pb1200/platform.c | 137 ++++++++++++++- arch/mips/alchemy/devboards/pb1500/platform.c | 1 + arch/mips/alchemy/devboards/pb1550/platform.c | 33 ++++ arch/mips/include/asm/mach-au1x00/au1000.h | 203 ++++++++++------------- drivers/i2c/busses/Kconfig | 2 +- drivers/ide/Kconfig | 6 +- drivers/mmc/host/Kconfig | 2 +- drivers/mtd/nand/Kconfig | 2 +- drivers/net/irda/Kconfig | 2 +- drivers/spi/Kconfig | 2 +- drivers/usb/Kconfig | 1 - drivers/usb/host/ehci-hcd.c | 2 +- drivers/video/Kconfig | 4 +- sound/mips/Kconfig | 2 +- sound/soc/au1x/Kconfig | 2 +- 22 files changed, 423 insertions(+), 348 deletions(-) (limited to 'drivers/i2c') diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index b122adc8bdbb..d4d569b158fd 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -47,6 +47,8 @@ config MIPS_ALCHEMY select GENERIC_GPIO select ARCH_WANT_OPTIONAL_GPIOLIB select SYS_SUPPORTS_ZBOOT + select USB_ARCH_HAS_OHCI + select USB_ARCH_HAS_EHCI config AR7 bool "Texas Instruments AR7" diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig index 2ccfd4a135bc..2a68be6a1b97 100644 --- a/arch/mips/alchemy/Kconfig +++ b/arch/mips/alchemy/Kconfig @@ -18,20 +18,20 @@ config MIPS_MTX1 bool "4G Systems MTX-1 board" select DMA_NONCOHERENT select HW_HAS_PCI - select SOC_AU1500 + select ALCHEMY_GPIOINT_AU1000 select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_HAS_EARLY_PRINTK config MIPS_BOSPORUS bool "Alchemy Bosporus board" - select SOC_AU1500 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_HAS_EARLY_PRINTK config MIPS_DB1000 bool "Alchemy DB1000 board" - select SOC_AU1000 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select HW_HAS_PCI select SYS_SUPPORTS_LITTLE_ENDIAN @@ -39,14 +39,14 @@ config MIPS_DB1000 config MIPS_DB1100 bool "Alchemy DB1100 board" - select SOC_AU1100 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_HAS_EARLY_PRINTK config MIPS_DB1200 bool "Alchemy DB1200 board" - select SOC_AU1200 + select ALCHEMY_GPIOINT_AU1000 select DMA_COHERENT select MIPS_DISABLE_OBSOLETE_IDE select SYS_SUPPORTS_LITTLE_ENDIAN @@ -54,7 +54,7 @@ config MIPS_DB1200 config MIPS_DB1500 bool "Alchemy DB1500 board" - select SOC_AU1500 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select HW_HAS_PCI select MIPS_DISABLE_OBSOLETE_IDE @@ -64,7 +64,7 @@ config MIPS_DB1500 config MIPS_DB1550 bool "Alchemy DB1550 board" - select SOC_AU1550 + select ALCHEMY_GPIOINT_AU1000 select HW_HAS_PCI select DMA_NONCOHERENT select MIPS_DISABLE_OBSOLETE_IDE @@ -74,13 +74,13 @@ config MIPS_DB1550 config MIPS_MIRAGE bool "Alchemy Mirage board" select DMA_NONCOHERENT - select SOC_AU1500 + select ALCHEMY_GPIOINT_AU1000 select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_HAS_EARLY_PRINTK config MIPS_PB1000 bool "Alchemy PB1000 board" - select SOC_AU1000 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select HW_HAS_PCI select SWAP_IO_SPACE @@ -89,7 +89,7 @@ config MIPS_PB1000 config MIPS_PB1100 bool "Alchemy PB1100 board" - select SOC_AU1100 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select HW_HAS_PCI select SWAP_IO_SPACE @@ -98,7 +98,7 @@ config MIPS_PB1100 config MIPS_PB1200 bool "Alchemy PB1200 board" - select SOC_AU1200 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select MIPS_DISABLE_OBSOLETE_IDE select SYS_SUPPORTS_LITTLE_ENDIAN @@ -106,7 +106,7 @@ config MIPS_PB1200 config MIPS_PB1500 bool "Alchemy PB1500 board" - select SOC_AU1500 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select HW_HAS_PCI select SYS_SUPPORTS_LITTLE_ENDIAN @@ -114,7 +114,7 @@ config MIPS_PB1500 config MIPS_PB1550 bool "Alchemy PB1550 board" - select SOC_AU1550 + select ALCHEMY_GPIOINT_AU1000 select DMA_NONCOHERENT select HW_HAS_PCI select MIPS_DISABLE_OBSOLETE_IDE @@ -124,13 +124,13 @@ config MIPS_PB1550 config MIPS_XXS1500 bool "MyCable XXS1500 board" select DMA_NONCOHERENT - select SOC_AU1500 + select ALCHEMY_GPIOINT_AU1000 select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_HAS_EARLY_PRINTK config MIPS_GPR bool "Trapeze ITS GPR board" - select SOC_AU1550 + select ALCHEMY_GPIOINT_AU1000 select HW_HAS_PCI select DMA_NONCOHERENT select MIPS_DISABLE_OBSOLETE_IDE @@ -138,23 +138,3 @@ config MIPS_GPR select SYS_HAS_EARLY_PRINTK endchoice - -config SOC_AU1000 - bool - select ALCHEMY_GPIOINT_AU1000 - -config SOC_AU1100 - bool - select ALCHEMY_GPIOINT_AU1000 - -config SOC_AU1500 - bool - select ALCHEMY_GPIOINT_AU1000 - -config SOC_AU1550 - bool - select ALCHEMY_GPIOINT_AU1000 - -config SOC_AU1200 - bool - select ALCHEMY_GPIOINT_AU1000 diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c index 657ae2778374..c8e5d72a5826 100644 --- a/arch/mips/alchemy/common/platform.c +++ b/arch/mips/alchemy/common/platform.c @@ -189,159 +189,6 @@ static void __init alchemy_setup_usb(int ctype) } } -/*** AU1100 LCD controller ***/ - -#ifdef CONFIG_FB_AU1100 -static struct resource au1100_lcd_resources[] = { - [0] = { - .start = AU1100_LCD_PHYS_ADDR, - .end = AU1100_LCD_PHYS_ADDR + 0x800 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AU1100_LCD_INT, - .end = AU1100_LCD_INT, - .flags = IORESOURCE_IRQ, - } -}; - -static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32); - -static struct platform_device au1100_lcd_device = { - .name = "au1100-lcd", - .id = 0, - .dev = { - .dma_mask = &au1100_lcd_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .num_resources = ARRAY_SIZE(au1100_lcd_resources), - .resource = au1100_lcd_resources, -}; -#endif - -#ifdef CONFIG_SOC_AU1200 - -static struct resource au1200_lcd_resources[] = { - [0] = { - .start = AU1200_LCD_PHYS_ADDR, - .end = AU1200_LCD_PHYS_ADDR + 0x800 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AU1200_LCD_INT, - .end = AU1200_LCD_INT, - .flags = IORESOURCE_IRQ, - } -}; - -static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32); - -static struct platform_device au1200_lcd_device = { - .name = "au1200-lcd", - .id = 0, - .dev = { - .dma_mask = &au1200_lcd_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, - .num_resources = ARRAY_SIZE(au1200_lcd_resources), - .resource = au1200_lcd_resources, -}; - -static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32); - -extern struct au1xmmc_platform_data au1xmmc_platdata[2]; - -static struct resource au1200_mmc0_resources[] = { - [0] = { - .start = AU1100_SD0_PHYS_ADDR, - .end = AU1100_SD0_PHYS_ADDR + 0xfff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AU1200_SD_INT, - .end = AU1200_SD_INT, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = AU1200_DSCR_CMD0_SDMS_TX0, - .end = AU1200_DSCR_CMD0_SDMS_TX0, - .flags = IORESOURCE_DMA, - }, - [3] = { - .start = AU1200_DSCR_CMD0_SDMS_RX0, - .end = AU1200_DSCR_CMD0_SDMS_RX0, - .flags = IORESOURCE_DMA, - } -}; - -static struct platform_device au1200_mmc0_device = { - .name = "au1xxx-mmc", - .id = 0, - .dev = { - .dma_mask = &au1xxx_mmc_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &au1xmmc_platdata[0], - }, - .num_resources = ARRAY_SIZE(au1200_mmc0_resources), - .resource = au1200_mmc0_resources, -}; - -#ifndef CONFIG_MIPS_DB1200 -static struct resource au1200_mmc1_resources[] = { - [0] = { - .start = AU1100_SD1_PHYS_ADDR, - .end = AU1100_SD1_PHYS_ADDR + 0xfff, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = AU1200_SD_INT, - .end = AU1200_SD_INT, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = AU1200_DSCR_CMD0_SDMS_TX1, - .end = AU1200_DSCR_CMD0_SDMS_TX1, - .flags = IORESOURCE_DMA, - }, - [3] = { - .start = AU1200_DSCR_CMD0_SDMS_RX1, - .end = AU1200_DSCR_CMD0_SDMS_RX1, - .flags = IORESOURCE_DMA, - } -}; - -static struct platform_device au1200_mmc1_device = { - .name = "au1xxx-mmc", - .id = 1, - .dev = { - .dma_mask = &au1xxx_mmc_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &au1xmmc_platdata[1], - }, - .num_resources = ARRAY_SIZE(au1200_mmc1_resources), - .resource = au1200_mmc1_resources, -}; -#endif /* #ifndef CONFIG_MIPS_DB1200 */ -#endif /* #ifdef CONFIG_SOC_AU1200 */ - -/* All Alchemy demoboards with I2C have this #define in their headers */ -#ifdef SMBUS_PSC_BASE -static struct resource pbdb_smbus_resources[] = { - { - .start = SMBUS_PSC_BASE, - .end = SMBUS_PSC_BASE + 0xfff, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device pbdb_smbus_device = { - .name = "au1xpsc_smbus", - .id = 0, /* bus number */ - .num_resources = ARRAY_SIZE(pbdb_smbus_resources), - .resource = pbdb_smbus_resources, -}; -#endif - /* Macro to help defining the Ethernet MAC resources */ #define MAC_RES_COUNT 4 /* MAC regs, MAC en, MAC INT, MACDMA regs */ #define MAC_RES(_base, _enable, _irq, _macdma) \ @@ -503,33 +350,15 @@ static void __init alchemy_setup_macs(int ctype) } } -static struct platform_device *au1xxx_platform_devices[] __initdata = { -#ifdef CONFIG_FB_AU1100 - &au1100_lcd_device, -#endif -#ifdef CONFIG_SOC_AU1200 - &au1200_lcd_device, - &au1200_mmc0_device, -#ifndef CONFIG_MIPS_DB1200 - &au1200_mmc1_device, -#endif -#endif -#ifdef SMBUS_PSC_BASE - &pbdb_smbus_device, -#endif -}; - static int __init au1xxx_platform_init(void) { - int err, ctype = alchemy_get_cputype(); + int ctype = alchemy_get_cputype(); alchemy_setup_uarts(ctype); alchemy_setup_macs(ctype); alchemy_setup_usb(ctype); - err = platform_add_devices(au1xxx_platform_devices, - ARRAY_SIZE(au1xxx_platform_devices)); - return err; + return 0; } arch_initcall(au1xxx_platform_init); diff --git a/arch/mips/alchemy/devboards/db1200/platform.c b/arch/mips/alchemy/devboards/db1200/platform.c index 1bc16f0e3651..aae08c1e876e 100644 --- a/arch/mips/alchemy/devboards/db1200/platform.c +++ b/arch/mips/alchemy/devboards/db1200/platform.c @@ -333,15 +333,77 @@ static struct led_classdev db1200_mmc_led = { .brightness_set = db1200_mmcled_set, }; -/* needed by arch/mips/alchemy/common/platform.c */ -struct au1xmmc_platform_data au1xmmc_platdata[] = { +static struct au1xmmc_platform_data db1200mmc_platdata = { + .cd_setup = db1200_mmc_cd_setup, + .set_power = db1200_mmc_set_power, + .card_inserted = db1200_mmc_card_inserted, + .card_readonly = db1200_mmc_card_readonly, + .led = &db1200_mmc_led, +}; + +static struct resource au1200_mmc0_resources[] = { + [0] = { + .start = AU1100_SD0_PHYS_ADDR, + .end = AU1100_SD0_PHYS_ADDR + 0xfff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1200_SD_INT, + .end = AU1200_SD_INT, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = AU1200_DSCR_CMD0_SDMS_TX0, + .end = AU1200_DSCR_CMD0_SDMS_TX0, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = AU1200_DSCR_CMD0_SDMS_RX0, + .end = AU1200_DSCR_CMD0_SDMS_RX0, + .flags = IORESOURCE_DMA, + } +}; + +static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32); + +static struct platform_device db1200_mmc0_dev = { + .name = "au1xxx-mmc", + .id = 0, + .dev = { + .dma_mask = &au1xxx_mmc_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &db1200mmc_platdata, + }, + .num_resources = ARRAY_SIZE(au1200_mmc0_resources), + .resource = au1200_mmc0_resources, +}; + +/**********************************************************************/ + +static struct resource au1200_lcd_res[] = { [0] = { - .cd_setup = db1200_mmc_cd_setup, - .set_power = db1200_mmc_set_power, - .card_inserted = db1200_mmc_card_inserted, - .card_readonly = db1200_mmc_card_readonly, - .led = &db1200_mmc_led, + .start = AU1200_LCD_PHYS_ADDR, + .end = AU1200_LCD_PHYS_ADDR + 0x800 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1200_LCD_INT, + .end = AU1200_LCD_INT, + .flags = IORESOURCE_IRQ, + } +}; + +static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32); + +static struct platform_device au1200_lcd_dev = { + .name = "au1200-lcd", + .id = 0, + .dev = { + .dma_mask = &au1200_lcd_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), }, + .num_resources = ARRAY_SIZE(au1200_lcd_res), + .resource = au1200_lcd_res, }; /**********************************************************************/ @@ -442,6 +504,8 @@ static struct platform_device db1200_stac_dev = { static struct platform_device *db1200_devs[] __initdata = { NULL, /* PSC0, selected by S6.8 */ &db1200_ide_dev, + &db1200_mmc0_dev, + &au1200_lcd_dev, &db1200_eth_dev, &db1200_rtc_dev, &db1200_nand_dev, diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c index 2b2178f3f30b..7cd36e631f6c 100644 --- a/arch/mips/alchemy/devboards/db1x00/board_setup.c +++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c @@ -134,9 +134,7 @@ void __init board_setup(void) /* initialize board register space */ bcsr_init(bcsr1, bcsr2); - /* Not valid for Au1550 */ -#if defined(CONFIG_IRDA) && \ - (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100)) +#if defined(CONFIG_IRDA) && defined(CONFIG_AU1000_FIR) { u32 pin_func; diff --git a/arch/mips/alchemy/devboards/db1x00/platform.c b/arch/mips/alchemy/devboards/db1x00/platform.c index 990367f8401d..8704865306a5 100644 --- a/arch/mips/alchemy/devboards/db1x00/platform.c +++ b/arch/mips/alchemy/devboards/db1x00/platform.c @@ -19,6 +19,7 @@ */ #include +#include #include #include @@ -208,6 +209,34 @@ static int __init db15x0_pci_init(void) arch_initcall(db15x0_pci_init); #endif +#ifdef CONFIG_MIPS_DB1100 +static struct resource au1100_lcd_resources[] = { + [0] = { + .start = AU1100_LCD_PHYS_ADDR, + .end = AU1100_LCD_PHYS_ADDR + 0x800 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1100_LCD_INT, + .end = AU1100_LCD_INT, + .flags = IORESOURCE_IRQ, + } +}; + +static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32); + +static struct platform_device au1100_lcd_device = { + .name = "au1100-lcd", + .id = 0, + .dev = { + .dma_mask = &au1100_lcd_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .num_resources = ARRAY_SIZE(au1100_lcd_resources), + .resource = au1100_lcd_resources, +}; +#endif + static int __init db1xxx_dev_init(void) { #ifdef DB1XXX_HAS_PCMCIA @@ -230,6 +259,9 @@ static int __init db1xxx_dev_init(void) AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1, DB1XXX_PCMCIA_CARD1, DB1XXX_PCMCIA_CD1, /*DB1XXX_PCMCIA_STSCHG1*/0, 0, 1); +#endif +#ifdef CONFIG_MIPS_DB1100 + platform_device_register(&au1100_lcd_device); #endif db1x_register_norflash(BOARD_FLASH_SIZE, BOARD_FLASH_WIDTH, F_SWAPPED); return 0; diff --git a/arch/mips/alchemy/devboards/pb1100/platform.c b/arch/mips/alchemy/devboards/pb1100/platform.c index 8a4e733f0f9f..9c57c01a68c4 100644 --- a/arch/mips/alchemy/devboards/pb1100/platform.c +++ b/arch/mips/alchemy/devboards/pb1100/platform.c @@ -19,12 +19,40 @@ */ #include +#include +#include #include #include #include "../platform.h" +static struct resource au1100_lcd_resources[] = { + [0] = { + .start = AU1100_LCD_PHYS_ADDR, + .end = AU1100_LCD_PHYS_ADDR + 0x800 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1100_LCD_INT, + .end = AU1100_LCD_INT, + .flags = IORESOURCE_IRQ, + } +}; + +static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32); + +static struct platform_device au1100_lcd_device = { + .name = "au1100-lcd", + .id = 0, + .dev = { + .dma_mask = &au1100_lcd_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .num_resources = ARRAY_SIZE(au1100_lcd_resources), + .resource = au1100_lcd_resources, +}; + static int __init pb1100_dev_init(void) { int swapped; @@ -42,6 +70,7 @@ static int __init pb1100_dev_init(void) swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT; db1x_register_norflash(64 * 1024 * 1024, 4, swapped); + platform_device_register(&au1100_lcd_device); return 0; } diff --git a/arch/mips/alchemy/devboards/pb1200/platform.c b/arch/mips/alchemy/devboards/pb1200/platform.c index d7915b054be7..54f7f7b0676e 100644 --- a/arch/mips/alchemy/devboards/pb1200/platform.c +++ b/arch/mips/alchemy/devboards/pb1200/platform.c @@ -90,7 +90,7 @@ static int pb1200mmc1_card_inserted(void *mmc_host) return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD1INSERT) ? 1 : 0; } -const struct au1xmmc_platform_data au1xmmc_platdata[2] = { +static struct au1xmmc_platform_data pb1200mmc_platdata[2] = { [0] = { .set_power = pb1200mmc0_set_power, .card_inserted = pb1200mmc0_card_inserted, @@ -107,6 +107,79 @@ const struct au1xmmc_platform_data au1xmmc_platdata[2] = { }, }; +static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32); + +static struct resource au1200_mmc0_res[] = { + [0] = { + .start = AU1100_SD0_PHYS_ADDR, + .end = AU1100_SD0_PHYS_ADDR + 0xfff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1200_SD_INT, + .end = AU1200_SD_INT, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = AU1200_DSCR_CMD0_SDMS_TX0, + .end = AU1200_DSCR_CMD0_SDMS_TX0, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = AU1200_DSCR_CMD0_SDMS_RX0, + .end = AU1200_DSCR_CMD0_SDMS_RX0, + .flags = IORESOURCE_DMA, + } +}; + +static struct platform_device pb1200_mmc0_dev = { + .name = "au1xxx-mmc", + .id = 0, + .dev = { + .dma_mask = &au1xxx_mmc_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &pb1200mmc_platdata[0], + }, + .num_resources = ARRAY_SIZE(au1200_mmc0_res), + .resource = au1200_mmc0_res, +}; + +static struct resource au1200_mmc1_res[] = { + [0] = { + .start = AU1100_SD1_PHYS_ADDR, + .end = AU1100_SD1_PHYS_ADDR + 0xfff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1200_SD_INT, + .end = AU1200_SD_INT, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = AU1200_DSCR_CMD0_SDMS_TX1, + .end = AU1200_DSCR_CMD0_SDMS_TX1, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = AU1200_DSCR_CMD0_SDMS_RX1, + .end = AU1200_DSCR_CMD0_SDMS_RX1, + .flags = IORESOURCE_DMA, + } +}; + +static struct platform_device pb1200_mmc1_dev = { + .name = "au1xxx-mmc", + .id = 1, + .dev = { + .dma_mask = &au1xxx_mmc_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &pb1200mmc_platdata[1], + }, + .num_resources = ARRAY_SIZE(au1200_mmc1_res), + .resource = au1200_mmc1_res, +}; + + static struct resource ide_resources[] = { [0] = { .start = IDE_PHYS_ADDR, @@ -168,9 +241,69 @@ static struct platform_device smc91c111_device = { .resource = smc91c111_resources }; +static struct resource au1200_psc0_res[] = { + [0] = { + .start = AU1550_PSC0_PHYS_ADDR, + .end = AU1550_PSC0_PHYS_ADDR + 0xfff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1200_PSC0_INT, + .end = AU1200_PSC0_INT, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = AU1200_DSCR_CMD0_PSC0_TX, + .end = AU1200_DSCR_CMD0_PSC0_TX, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = AU1200_DSCR_CMD0_PSC0_RX, + .end = AU1200_DSCR_CMD0_PSC0_RX, + .flags = IORESOURCE_DMA, + }, +}; + +static struct platform_device pb1200_i2c_dev = { + .name = "au1xpsc_smbus", + .id = 0, /* bus number */ + .num_resources = ARRAY_SIZE(au1200_psc0_res), + .resource = au1200_psc0_res, +}; + +static struct resource au1200_lcd_res[] = { + [0] = { + .start = AU1200_LCD_PHYS_ADDR, + .end = AU1200_LCD_PHYS_ADDR + 0x800 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1200_LCD_INT, + .end = AU1200_LCD_INT, + .flags = IORESOURCE_IRQ, + } +}; + +static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32); + +static struct platform_device au1200_lcd_dev = { + .name = "au1200-lcd", + .id = 0, + .dev = { + .dma_mask = &au1200_lcd_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, + .num_resources = ARRAY_SIZE(au1200_lcd_res), + .resource = au1200_lcd_res, +}; + static struct platform_device *board_platform_devices[] __initdata = { &ide_device, - &smc91c111_device + &smc91c111_device, + &pb1200_i2c_dev, + &pb1200_mmc0_dev, + &pb1200_mmc1_dev, + &au1200_lcd_dev, }; static int __init board_register_devices(void) diff --git a/arch/mips/alchemy/devboards/pb1500/platform.c b/arch/mips/alchemy/devboards/pb1500/platform.c index 9f0b5a0b4795..1e52a01bac00 100644 --- a/arch/mips/alchemy/devboards/pb1500/platform.c +++ b/arch/mips/alchemy/devboards/pb1500/platform.c @@ -18,6 +18,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include #include #include #include diff --git a/arch/mips/alchemy/devboards/pb1550/platform.c b/arch/mips/alchemy/devboards/pb1550/platform.c index 0c5711fa0734..a4604b8a349e 100644 --- a/arch/mips/alchemy/devboards/pb1550/platform.c +++ b/arch/mips/alchemy/devboards/pb1550/platform.c @@ -18,9 +18,11 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include #include #include #include +#include #include #include @@ -69,6 +71,36 @@ static struct platform_device pb1550_pci_host = { .resource = alchemy_pci_host_res, }; +static struct resource au1550_psc2_res[] = { + [0] = { + .start = AU1550_PSC2_PHYS_ADDR, + .end = AU1550_PSC2_PHYS_ADDR + 0xfff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AU1550_PSC2_INT, + .end = AU1550_PSC2_INT, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = AU1550_DSCR_CMD0_PSC2_TX, + .end = AU1550_DSCR_CMD0_PSC2_TX, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = AU1550_DSCR_CMD0_PSC2_RX, + .end = AU1550_DSCR_CMD0_PSC2_RX, + .flags = IORESOURCE_DMA, + }, +}; + +static struct platform_device pb1550_i2c_dev = { + .name = "au1xpsc_smbus", + .id = 0, /* bus number */ + .num_resources = ARRAY_SIZE(au1550_psc2_res), + .resource = au1550_psc2_res, +}; + static int __init pb1550_dev_init(void) { int swapped; @@ -101,6 +133,7 @@ static int __init pb1550_dev_init(void) swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_PB1550_SWAPBOOT; db1x_register_norflash(128 * 1024 * 1024, 4, swapped); platform_device_register(&pb1550_pci_host); + platform_device_register(&pb1550_i2c_dev); return 0; } diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h index 49a227d681e3..de24ec57dd2f 100644 --- a/arch/mips/include/asm/mach-au1x00/au1000.h +++ b/arch/mips/include/asm/mach-au1x00/au1000.h @@ -591,113 +591,6 @@ enum soc_au1200_ints { #endif /* !defined (_LANGUAGE_ASSEMBLY) */ -/* - * SDRAM register offsets - */ -#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || \ - defined(CONFIG_SOC_AU1100) -#define MEM_SDMODE0 0x0000 -#define MEM_SDMODE1 0x0004 -#define MEM_SDMODE2 0x0008 -#define MEM_SDADDR0 0x000C -#define MEM_SDADDR1 0x0010 -#define MEM_SDADDR2 0x0014 -#define MEM_SDREFCFG 0x0018 -#define MEM_SDPRECMD 0x001C -#define MEM_SDAUTOREF 0x0020 -#define MEM_SDWRMD0 0x0024 -#define MEM_SDWRMD1 0x0028 -#define MEM_SDWRMD2 0x002C -#define MEM_SDSLEEP 0x0030 -#define MEM_SDSMCKE 0x0034 - -/* - * MEM_SDMODE register content definitions - */ -#define MEM_SDMODE_F (1 << 22) -#define MEM_SDMODE_SR (1 << 21) -#define MEM_SDMODE_BS (1 << 20) -#define MEM_SDMODE_RS (3 << 18) -#define MEM_SDMODE_CS (7 << 15) -#define MEM_SDMODE_TRAS (15 << 11) -#define MEM_SDMODE_TMRD (3 << 9) -#define MEM_SDMODE_TWR (3 << 7) -#define MEM_SDMODE_TRP (3 << 5) -#define MEM_SDMODE_TRCD (3 << 3) -#define MEM_SDMODE_TCL (7 << 0) - -#define MEM_SDMODE_BS_2Bank (0 << 20) -#define MEM_SDMODE_BS_4Bank (1 << 20) -#define MEM_SDMODE_RS_11Row (0 << 18) -#define MEM_SDMODE_RS_12Row (1 << 18) -#define MEM_SDMODE_RS_13Row (2 << 18) -#define MEM_SDMODE_RS_N(N) ((N) << 18) -#define MEM_SDMODE_CS_7Col (0 << 15) -#define MEM_SDMODE_CS_8Col (1 << 15) -#define MEM_SDMODE_CS_9Col (2 << 15) -#define MEM_SDMODE_CS_10Col (3 << 15) -#define MEM_SDMODE_CS_11Col (4 << 15) -#define MEM_SDMODE_CS_N(N) ((N) << 15) -#define MEM_SDMODE_TRAS_N(N) ((N) << 11) -#define MEM_SDMODE_TMRD_N(N) ((N) << 9) -#define MEM_SDMODE_TWR_N(N) ((N) << 7) -#define MEM_SDMODE_TRP_N(N) ((N) << 5) -#define MEM_SDMODE_TRCD_N(N) ((N) << 3) -#define MEM_SDMODE_TCL_N(N) ((N) << 0) - -/* - * MEM_SDADDR register contents definitions - */ -#define MEM_SDADDR_E (1 << 20) -#define MEM_SDADDR_CSBA (0x03FF << 10) -#define MEM_SDADDR_CSMASK (0x03FF << 0) -#define MEM_SDADDR_CSBA_N(N) ((N) & (0x03FF << 22) >> 12) -#define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF << 22) >> 22) - -/* - * MEM_SDREFCFG register content definitions - */ -#define MEM_SDREFCFG_TRC (15 << 28) -#define MEM_SDREFCFG_TRPM (3 << 26) -#define MEM_SDREFCFG_E (1 << 25) -#define MEM_SDREFCFG_RE (0x1ffffff << 0) -#define MEM_SDREFCFG_TRC_N(N) ((N) << MEM_SDREFCFG_TRC) -#define MEM_SDREFCFG_TRPM_N(N) ((N) << MEM_SDREFCFG_TRPM) -#define MEM_SDREFCFG_REF_N(N) (N) -#endif - -/***********************************************************************/ - -/* - * Au1550 SDRAM Register Offsets - */ - -/***********************************************************************/ - -#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) -#define MEM_SDMODE0 0x0800 -#define MEM_SDMODE1 0x0808 -#define MEM_SDMODE2 0x0810 -#define MEM_SDADDR0 0x0820 -#define MEM_SDADDR1 0x0828 -#define MEM_SDADDR2 0x0830 -#define MEM_SDCONFIGA 0x0840 -#define MEM_SDCONFIGB 0x0848 -#define MEM_SDSTAT 0x0850 -#define MEM_SDERRADDR 0x0858 -#define MEM_SDSTRIDE0 0x0860 -#define MEM_SDSTRIDE1 0x0868 -#define MEM_SDSTRIDE2 0x0870 -#define MEM_SDWRMD0 0x0880 -#define MEM_SDWRMD1 0x0888 -#define MEM_SDWRMD2 0x0890 -#define MEM_SDPRECMD 0x08C0 -#define MEM_SDAUTOREF 0x08C8 -#define MEM_SDSREF 0x08D0 -#define MEM_SDSLEEP MEM_SDSREF - -#endif - /* * Physical base addresses for integrated peripherals * 0..au1000 1..au1500 2..au1100 3..au1550 4..au1200 @@ -761,6 +654,92 @@ enum soc_au1200_ints { #define AU1000_PCMCIA_MEM_PHYS_ADDR 0xF80000000ULL /* 01234 */ +/* Au1000 SDRAM memory controller register offsets */ +#define AU1000_MEM_SDMODE0 0x0000 +#define AU1000_MEM_SDMODE1 0x0004 +#define AU1000_MEM_SDMODE2 0x0008 +#define AU1000_MEM_SDADDR0 0x000C +#define AU1000_MEM_SDADDR1 0x0010 +#define AU1000_MEM_SDADDR2 0x0014 +#define AU1000_MEM_SDREFCFG 0x0018 +#define AU1000_MEM_SDPRECMD 0x001C +#define AU1000_MEM_SDAUTOREF 0x0020 +#define AU1000_MEM_SDWRMD0 0x0024 +#define AU1000_MEM_SDWRMD1 0x0028 +#define AU1000_MEM_SDWRMD2 0x002C +#define AU1000_MEM_SDSLEEP 0x0030 +#define AU1000_MEM_SDSMCKE 0x0034 + +/* MEM_SDMODE register content definitions */ +#define MEM_SDMODE_F (1 << 22) +#define MEM_SDMODE_SR (1 << 21) +#define MEM_SDMODE_BS (1 << 20) +#define MEM_SDMODE_RS (3 << 18) +#define MEM_SDMODE_CS (7 << 15) +#define MEM_SDMODE_TRAS (15 << 11) +#define MEM_SDMODE_TMRD (3 << 9) +#define MEM_SDMODE_TWR (3 << 7) +#define MEM_SDMODE_TRP (3 << 5) +#define MEM_SDMODE_TRCD (3 << 3) +#define MEM_SDMODE_TCL (7 << 0) + +#define MEM_SDMODE_BS_2Bank (0 << 20) +#define MEM_SDMODE_BS_4Bank (1 << 20) +#define MEM_SDMODE_RS_11Row (0 << 18) +#define MEM_SDMODE_RS_12Row (1 << 18) +#define MEM_SDMODE_RS_13Row (2 << 18) +#define MEM_SDMODE_RS_N(N) ((N) << 18) +#define MEM_SDMODE_CS_7Col (0 << 15) +#define MEM_SDMODE_CS_8Col (1 << 15) +#define MEM_SDMODE_CS_9Col (2 << 15) +#define MEM_SDMODE_CS_10Col (3 << 15) +#define MEM_SDMODE_CS_11Col (4 << 15) +#define MEM_SDMODE_CS_N(N) ((N) << 15) +#define MEM_SDMODE_TRAS_N(N) ((N) << 11) +#define MEM_SDMODE_TMRD_N(N) ((N) << 9) +#define MEM_SDMODE_TWR_N(N) ((N) << 7) +#define MEM_SDMODE_TRP_N(N) ((N) << 5) +#define MEM_SDMODE_TRCD_N(N) ((N) << 3) +#define MEM_SDMODE_TCL_N(N) ((N) << 0) + +/* MEM_SDADDR register contents definitions */ +#define MEM_SDADDR_E (1 << 20) +#define MEM_SDADDR_CSBA (0x03FF << 10) +#define MEM_SDADDR_CSMASK (0x03FF << 0) +#define MEM_SDADDR_CSBA_N(N) ((N) & (0x03FF << 22) >> 12) +#define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF << 22) >> 22) + +/* MEM_SDREFCFG register content definitions */ +#define MEM_SDREFCFG_TRC (15 << 28) +#define MEM_SDREFCFG_TRPM (3 << 26) +#define MEM_SDREFCFG_E (1 << 25) +#define MEM_SDREFCFG_RE (0x1ffffff << 0) +#define MEM_SDREFCFG_TRC_N(N) ((N) << MEM_SDREFCFG_TRC) +#define MEM_SDREFCFG_TRPM_N(N) ((N) << MEM_SDREFCFG_TRPM) +#define MEM_SDREFCFG_REF_N(N) (N) + +/* Au1550 SDRAM Register Offsets */ +#define AU1550_MEM_SDMODE0 0x0800 +#define AU1550_MEM_SDMODE1 0x0808 +#define AU1550_MEM_SDMODE2 0x0810 +#define AU1550_MEM_SDADDR0 0x0820 +#define AU1550_MEM_SDADDR1 0x0828 +#define AU1550_MEM_SDADDR2 0x0830 +#define AU1550_MEM_SDCONFIGA 0x0840 +#define AU1550_MEM_SDCONFIGB 0x0848 +#define AU1550_MEM_SDSTAT 0x0850 +#define AU1550_MEM_SDERRADDR 0x0858 +#define AU1550_MEM_SDSTRIDE0 0x0860 +#define AU1550_MEM_SDSTRIDE1 0x0868 +#define AU1550_MEM_SDSTRIDE2 0x0870 +#define AU1550_MEM_SDWRMD0 0x0880 +#define AU1550_MEM_SDWRMD1 0x0888 +#define AU1550_MEM_SDWRMD2 0x0890 +#define AU1550_MEM_SDPRECMD 0x08C0 +#define AU1550_MEM_SDAUTOREF 0x08C8 +#define AU1550_MEM_SDSREF 0x08D0 +#define AU1550_MEM_SDSLEEP MEM_SDSREF + /* Static Bus Controller */ #define MEM_STCFG0 0xB4001000 #define MEM_STTIME0 0xB4001004 @@ -778,14 +757,12 @@ enum soc_au1200_ints { #define MEM_STTIME3 0xB4001034 #define MEM_STADDR3 0xB4001038 -#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) #define MEM_STNDCTL 0xB4001100 #define MEM_STSTAT 0xB4001104 #define MEM_STNAND_CMD 0x0 #define MEM_STNAND_ADDR 0x4 #define MEM_STNAND_DATA 0x20 -#endif /* Programmable Counters 0 and 1 */ @@ -1172,7 +1149,6 @@ enum soc_au1200_ints { # define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2)) /* Au1200 only */ -#ifdef CONFIG_SOC_AU1200 #define SYS_PINFUNC_DMA (1 << 31) #define SYS_PINFUNC_S0A (1 << 30) #define SYS_PINFUNC_S1A (1 << 29) @@ -1200,7 +1176,6 @@ enum soc_au1200_ints { #define SYS_PINFUNC_P0B (1 << 4) #define SYS_PINFUNC_U0T (1 << 3) #define SYS_PINFUNC_S1B (1 << 2) -#endif /* Power Management */ #define SYS_SCRATCH0 0xB1900018 @@ -1256,12 +1231,12 @@ enum soc_au1200_ints { # define SYS_CS_MI2_MASK (0x7 << SYS_CS_MI2_BIT) # define SYS_CS_DI2 (1 << 16) # define SYS_CS_CI2 (1 << 15) -#ifdef CONFIG_SOC_AU1100 + # define SYS_CS_ML_BIT 7 # define SYS_CS_ML_MASK (0x7 << SYS_CS_ML_BIT) # define SYS_CS_DL (1 << 6) # define SYS_CS_CL (1 << 5) -#else + # define SYS_CS_MUH_BIT 12 # define SYS_CS_MUH_MASK (0x7 << SYS_CS_MUH_BIT) # define SYS_CS_DUH (1 << 11) @@ -1270,7 +1245,7 @@ enum soc_au1200_ints { # define SYS_CS_MUD_MASK (0x7 << SYS_CS_MUD_BIT) # define SYS_CS_DUD (1 << 6) # define SYS_CS_CUD (1 << 5) -#endif + # define SYS_CS_MIR_BIT 2 # define SYS_CS_MIR_MASK (0x7 << SYS_CS_MIR_BIT) # define SYS_CS_DIR (1 << 1) diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 646068e5100b..1908195328f1 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -301,7 +301,7 @@ config I2C_AT91 config I2C_AU1550 tristate "Au1550/Au1200 SMBus interface" - depends on SOC_AU1550 || SOC_AU1200 + depends on MIPS_ALCHEMY help If you say yes to this option, support will be included for the Au1550 and Au1200 SMBus interface. diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig index 811dbbd9306c..ff7c6bbec225 100644 --- a/drivers/ide/Kconfig +++ b/drivers/ide/Kconfig @@ -677,19 +677,19 @@ config BLK_DEV_IDE_PMAC_ATA100FIRST config BLK_DEV_IDE_AU1XXX bool "IDE for AMD Alchemy Au1200" - depends on SOC_AU1200 + depends on MIPS_ALCHEMY select IDE_XFER_MODE choice prompt "IDE Mode for AMD Alchemy Au1200" default CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA - depends on SOC_AU1200 && BLK_DEV_IDE_AU1XXX + depends on BLK_DEV_IDE_AU1XXX config BLK_DEV_IDE_AU1XXX_PIO_DBDMA bool "PIO+DbDMA IDE for AMD Alchemy Au1200" config BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA bool "MDMA2+DbDMA IDE for AMD Alchemy Au1200" - depends on SOC_AU1200 && BLK_DEV_IDE_AU1XXX + depends on BLK_DEV_IDE_AU1XXX endchoice config BLK_DEV_IDE_TX4938 diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 8c87096531e9..6d74f497a2ca 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -263,7 +263,7 @@ config MMC_WBSD config MMC_AU1X tristate "Alchemy AU1XX0 MMC Card Interface support" - depends on SOC_AU1200 + depends on MIPS_ALCHEMY help This selects the AMD Alchemy(R) Multimedia card interface. If you have a Alchemy platform with a MMC slot, say Y or M here. diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 4c3425235adc..dbfa0f7fb464 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -138,7 +138,7 @@ config MTD_NAND_RICOH config MTD_NAND_AU1550 tristate "Au1550/1200 NAND support" - depends on SOC_AU1200 || SOC_AU1550 + depends on MIPS_ALCHEMY help This enables the driver for the NAND flash controller on the AMD/Alchemy 1550 SOC. diff --git a/drivers/net/irda/Kconfig b/drivers/net/irda/Kconfig index 25bb2a015e18..0cda6c4602f3 100644 --- a/drivers/net/irda/Kconfig +++ b/drivers/net/irda/Kconfig @@ -314,7 +314,7 @@ config TOSHIBA_FIR config AU1000_FIR tristate "Alchemy Au1000 SIR/FIR" - depends on SOC_AU1000 && IRDA + depends on IRDA && MIPS_ALCHEMY config SMC_IRCC_FIR tristate "SMSC IrCC (EXPERIMENTAL)" diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 52e2900d9d8e..a1fd73df5416 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -88,7 +88,7 @@ config SPI_BFIN_SPORT config SPI_AU1550 tristate "Au1550/Au12x0 SPI Controller" - depends on (SOC_AU1550 || SOC_AU1200) && EXPERIMENTAL + depends on MIPS_ALCHEMY && EXPERIMENTAL select SPI_BITBANG help If you say yes to this option, support will be included for the diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 48f1781352f1..85d5a011dca6 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -56,7 +56,6 @@ config USB_ARCH_HAS_EHCI boolean default y if PPC_83xx default y if PPC_MPC512x - default y if SOC_AU1200 default y if ARCH_IXP4XX default y if ARCH_W90X900 default y if ARCH_AT91SAM9G45 diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index f72ae0b6ee7f..47aa22d43d63 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -1196,7 +1196,7 @@ MODULE_LICENSE ("GPL"); #define PLATFORM_DRIVER ehci_hcd_sh_driver #endif -#ifdef CONFIG_SOC_AU1200 +#ifdef CONFIG_MIPS_ALCHEMY #include "ehci-au1xxx.c" #define PLATFORM_DRIVER ehci_hcd_au1xxx_driver #endif diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 549b960667c8..55a7df4ea8de 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -1744,7 +1744,7 @@ endchoice config FB_AU1100 bool "Au1100 LCD Driver" - depends on (FB = y) && MIPS && SOC_AU1100 + depends on (FB = y) && MIPS_ALCHEMY select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT @@ -1755,7 +1755,7 @@ config FB_AU1100 config FB_AU1200 bool "Au1200 LCD Driver" - depends on (FB = y) && MIPS && SOC_AU1200 + depends on (FB = y) && MIPS_ALCHEMY select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT diff --git a/sound/mips/Kconfig b/sound/mips/Kconfig index a9823fad85c2..0a0d5017a642 100644 --- a/sound/mips/Kconfig +++ b/sound/mips/Kconfig @@ -24,7 +24,7 @@ config SND_SGI_HAL2 config SND_AU1X00 tristate "Au1x00 AC97 Port Driver" - depends on SOC_AU1000 || SOC_AU1100 || SOC_AU1500 + depends on MIPS_ALCHEMY select SND_PCM select SND_AC97_CODEC help diff --git a/sound/soc/au1x/Kconfig b/sound/soc/au1x/Kconfig index 4b67140fdec3..606039fd2738 100644 --- a/sound/soc/au1x/Kconfig +++ b/sound/soc/au1x/Kconfig @@ -3,7 +3,7 @@ ## config SND_SOC_AU1XPSC tristate "SoC Audio for Au1200/Au1250/Au1550" - depends on SOC_AU1200 || SOC_AU1550 + depends on MIPS_ALCHEMY help This option enables support for the Programmable Serial Controllers in AC97 and I2S mode, and the Descriptor-Based DMA -- cgit v1.2.3 From b88530884141e977b3702d8e82de52e553b45876 Mon Sep 17 00:00:00 2001 From: Andy Green Date: Mon, 30 May 2011 07:43:04 -0700 Subject: I2C: OMAP2+: Name registers in I2C IP V2 only accordingly The OMAP I2C driver dynamically chooses between two register sets of differing sizes depending on the cpu type it finds itself on. It has been observed that the existing code references non-existing registers on OMAP3530, because while it correctly chose the smaller register layout based on cpu type, the code uses the probed register ID to decide if to execute code referencing an extra register, and both register layout devices on OMAP3530 and OMAP4430 report the same probed ID of 0x40. This patch changes the extended register names only found on IP V2 of the I2C peripheral unit accordingly to help show up errors in usage. Cc: patches@linaro.org Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Acked-by: Ben Dooks Signed-off-by: Kevin Hilman --- drivers/i2c/busses/i2c-omap.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 2dfb63176856..d40943c23fcc 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -72,11 +72,12 @@ enum { OMAP_I2C_SCLH_REG, OMAP_I2C_SYSTEST_REG, OMAP_I2C_BUFSTAT_REG, - OMAP_I2C_REVNB_LO, - OMAP_I2C_REVNB_HI, - OMAP_I2C_IRQSTATUS_RAW, - OMAP_I2C_IRQENABLE_SET, - OMAP_I2C_IRQENABLE_CLR, + /* only on OMAP4430 */ + OMAP_I2C_IP_V2_REVNB_LO, + OMAP_I2C_IP_V2_REVNB_HI, + OMAP_I2C_IP_V2_IRQSTATUS_RAW, + OMAP_I2C_IP_V2_IRQENABLE_SET, + OMAP_I2C_IP_V2_IRQENABLE_CLR, }; /* I2C Interrupt Enable Register (OMAP_I2C_IE): */ @@ -244,11 +245,11 @@ static const u8 omap4_reg_map[] = { [OMAP_I2C_SCLH_REG] = 0xb8, [OMAP_I2C_SYSTEST_REG] = 0xbC, [OMAP_I2C_BUFSTAT_REG] = 0xc0, - [OMAP_I2C_REVNB_LO] = 0x00, - [OMAP_I2C_REVNB_HI] = 0x04, - [OMAP_I2C_IRQSTATUS_RAW] = 0x24, - [OMAP_I2C_IRQENABLE_SET] = 0x2c, - [OMAP_I2C_IRQENABLE_CLR] = 0x30, + [OMAP_I2C_IP_V2_REVNB_LO] = 0x00, + [OMAP_I2C_IP_V2_REVNB_HI] = 0x04, + [OMAP_I2C_IP_V2_IRQSTATUS_RAW] = 0x24, + [OMAP_I2C_IP_V2_IRQENABLE_SET] = 0x2c, + [OMAP_I2C_IP_V2_IRQENABLE_CLR] = 0x30, }; static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev, @@ -309,7 +310,7 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev) dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); if (dev->rev >= OMAP_I2C_REV_ON_4430) - omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1); + omap_i2c_write_reg(dev, OMAP_I2C_IP_V2_IRQENABLE_CLR, 1); else omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0); -- cgit v1.2.3 From a1295577773d9756b65972be7b462e4382996d08 Mon Sep 17 00:00:00 2001 From: Andy Green Date: Mon, 30 May 2011 07:43:06 -0700 Subject: I2C: OMAP2+: use platform_data ip revision to select register map Change the register map names to reflect the IP revision they are representing, and use the platform_data IP revision index to select between them at init time. Eliminates 1 of 17 cpu_...() calls in the driver. Cc: patches@linaro.org Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Acked-by: Ben Dooks Signed-off-by: Kevin Hilman --- drivers/i2c/busses/i2c-omap.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index d40943c23fcc..9172a57ea3c0 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -205,7 +205,7 @@ struct omap_i2c_dev { u16 errata; }; -static const u8 reg_map[] = { +static const u8 reg_map_ip_v1[] = { [OMAP_I2C_REV_REG] = 0x00, [OMAP_I2C_IE_REG] = 0x01, [OMAP_I2C_STAT_REG] = 0x02, @@ -226,7 +226,7 @@ static const u8 reg_map[] = { [OMAP_I2C_BUFSTAT_REG] = 0x10, }; -static const u8 omap4_reg_map[] = { +static const u8 reg_map_ip_v2[] = { [OMAP_I2C_REV_REG] = 0x04, [OMAP_I2C_IE_REG] = 0x2c, [OMAP_I2C_STAT_REG] = 0x28, @@ -1035,10 +1035,10 @@ omap_i2c_probe(struct platform_device *pdev) else dev->reg_shift = 2; - if (cpu_is_omap44xx()) - dev->regs = (u8 *) omap4_reg_map; + if (pdata->rev == OMAP_I2C_IP_VERSION_2) + dev->regs = (u8 *)reg_map_ip_v2; else - dev->regs = (u8 *) reg_map; + dev->regs = (u8 *)reg_map_ip_v1; pm_runtime_enable(&pdev->dev); omap_i2c_unidle(dev); -- cgit v1.2.3 From 6314f09e9517ed3d7d951525a111df858a6dd1a4 Mon Sep 17 00:00:00 2001 From: Andy Green Date: Mon, 30 May 2011 07:43:07 -0700 Subject: I2C: OMAP2+: Solve array bounds overflow error on i2c idle This solves the main problem the patch series is about. Prior to this patch on OMAP3530 the driver wrongly interprets the I2C peripheral unit's own reported revision as meaning it is running on an IP V2 device and must use the extended registers. In fact OMAP3530 is IP V1 with the smaller register set, the reason for the confusion is that the hardware does in fact report having the same IP revision index as is found on an OMAP4430, which really is IP V2 and has the extended registers. This corrects the test for which registers to use so that it decides using hwmod knowledge found in the platform_data. Cc: patches@linaro.org Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Acked-by: Ben Dooks Signed-off-by: Kevin Hilman --- drivers/i2c/busses/i2c-omap.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 9172a57ea3c0..e6792abfc2bb 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -309,7 +309,7 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev) pdata = pdev->dev.platform_data; dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); - if (dev->rev >= OMAP_I2C_REV_ON_4430) + if (pdata->rev == OMAP_I2C_IP_VERSION_2) omap_i2c_write_reg(dev, OMAP_I2C_IP_V2_IRQENABLE_CLR, 1); else omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0); -- cgit v1.2.3 From 4e80f727bf59e8c1ea8e47c45c9ef368d353d835 Mon Sep 17 00:00:00 2001 From: Andy Green Date: Mon, 30 May 2011 07:43:07 -0700 Subject: I2C: OMAP2+: address confused probed version naming The driver reflects the confusion that probed I2C revision from the hardware of 0x40 means it is on an OMAP4430. However, you will probe the same 0x40 ID on an OMAP3530. So this patch changes the name to reflect that. It also clarifies that the original name OMAP_I2C_REV_2 is referring to some ancient OMAP1 revision number, not to be confused with the IP revisions this patch series introduces. Similarly the term "rev" is used in the ancient OMAP1 ISR, the term is changed to use omap1 instead. Cc: patches@linaro.org Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Acked-by: Ben Dooks Signed-off-by: Kevin Hilman --- drivers/i2c/busses/i2c-omap.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index e6792abfc2bb..0254da47952b 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -42,12 +42,12 @@ #include /* I2C controller revisions */ -#define OMAP_I2C_REV_2 0x20 +#define OMAP_I2C_OMAP1_REV_2 0x20 /* I2C controller revisions present on specific hardware */ #define OMAP_I2C_REV_ON_2430 0x36 #define OMAP_I2C_REV_ON_3430 0x3C -#define OMAP_I2C_REV_ON_4430 0x40 +#define OMAP_I2C_REV_ON_3530_4430 0x40 /* timeout waiting for the controller to respond */ #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000)) @@ -314,7 +314,7 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev) else omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0); - if (dev->rev < OMAP_I2C_REV_2) { + if (dev->rev < OMAP_I2C_OMAP1_REV_2) { iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); /* Read clears */ } else { omap_i2c_write_reg(dev, OMAP_I2C_STAT_REG, dev->iestate); @@ -336,7 +336,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) unsigned long internal_clk = 0; struct clk *fclk; - if (dev->rev >= OMAP_I2C_REV_2) { + if (dev->rev >= OMAP_I2C_OMAP1_REV_2) { /* Disable I2C controller before soft reset */ omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, omap_i2c_read_reg(dev, OMAP_I2C_CON_REG) & @@ -379,7 +379,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) * REVISIT: Some wkup sources might not be needed. */ dev->westate = OMAP_I2C_WE_ALL; - omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate); + if (dev->rev < OMAP_I2C_REV_ON_3530_4430) + omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, + dev->westate); } } omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); @@ -721,7 +723,7 @@ static inline void i2c_omap_errata_i207(struct omap_i2c_dev *dev, u16 stat) #ifdef CONFIG_ARCH_OMAP15XX static irqreturn_t -omap_i2c_rev1_isr(int this_irq, void *dev_id) +omap_i2c_omap1_isr(int this_irq, void *dev_id) { struct omap_i2c_dev *dev = dev_id; u16 iv, w; @@ -775,7 +777,7 @@ omap_i2c_rev1_isr(int this_irq, void *dev_id) return IRQ_HANDLED; } #else -#define omap_i2c_rev1_isr NULL +#define omap_i2c_omap1_isr NULL #endif /* @@ -1060,7 +1062,7 @@ omap_i2c_probe(struct platform_device *pdev) * size. This is to ensure that we can handle the status on int * call back latencies. */ - if (dev->rev >= OMAP_I2C_REV_ON_4430) { + if (dev->rev >= OMAP_I2C_REV_ON_3530_4430) { dev->fifo_size = 0; dev->b_hw = 0; /* Disable hardware fixes */ } else { @@ -1076,7 +1078,8 @@ omap_i2c_probe(struct platform_device *pdev) /* reset ASAP, clearing any IRQs */ omap_i2c_init(dev); - isr = (dev->rev < OMAP_I2C_REV_2) ? omap_i2c_rev1_isr : omap_i2c_isr; + isr = (dev->rev < OMAP_I2C_OMAP1_REV_2) ? omap_i2c_omap1_isr : + omap_i2c_isr; r = request_irq(dev->irq, isr, 0, pdev->name, dev); if (r) { -- cgit v1.2.3 From 3be0053ee1a8bfb68de82716ae784f75e1610d60 Mon Sep 17 00:00:00 2001 From: Andy Green Date: Mon, 30 May 2011 07:43:09 -0700 Subject: I2C: OMAP2+: Convert omap I2C driver to use feature implementation flags from platform data This patch eliminates all cpu_...() tests from the OMAP I2C driver. Instead, it uses the functionality flags in the platform data to make the decisions about product variations the driver needs to handle. Cc: patches@linaro.org Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Acked-by: Ben Dooks Signed-off-by: Kevin Hilman --- drivers/i2c/busses/i2c-omap.c | 40 +++++++++++++++++++++++----------------- 1 file changed, 23 insertions(+), 17 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 0254da47952b..3aaf7f127514 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -277,7 +277,7 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev) pm_runtime_get_sync(&pdev->dev); - if (cpu_is_omap34xx()) { + if (pdata->flags & OMAP_I2C_FLAG_RESET_REGS_POSTIDLE) { omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->pscstate); omap_i2c_write_reg(dev, OMAP_I2C_SCLL_REG, dev->scllstate); @@ -335,6 +335,11 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) unsigned long timeout; unsigned long internal_clk = 0; struct clk *fclk; + struct platform_device *pdev; + struct omap_i2c_bus_platform_data *pdata; + + pdev = to_platform_device(dev->dev); + pdata = pdev->dev.platform_data; if (dev->rev >= OMAP_I2C_OMAP1_REV_2) { /* Disable I2C controller before soft reset */ @@ -386,7 +391,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) } omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); - if (cpu_class_is_omap1()) { + if (pdata->flags & OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK) { /* * The I2C functional clock is the armxor_ck, so there's * no need to get "armxor_ck" separately. Now, if OMAP2420 @@ -410,7 +415,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) psc = fclk_rate / 12000000; } - if (!(cpu_class_is_omap1() || cpu_is_omap2420())) { + if (!(pdata->flags & OMAP_I2C_FLAG_SIMPLE_CLOCK)) { /* * HSI2C controller internal clk rate should be 19.2 Mhz for @@ -418,7 +423,8 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) * to get longer filter period for better noise suppression. * The filter is iclk (fclk for HS) period. */ - if (dev->speed > 400 || cpu_is_omap2430()) + if (dev->speed > 400 || + pdata->flags & OMAP_I2C_FLAG_FORCE_19200_INT_CLK) internal_clk = 19200; else if (dev->speed > 100) internal_clk = 9600; @@ -487,7 +493,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) dev->errata = 0; - if (cpu_is_omap2430() || cpu_is_omap34xx()) + if (pdata->flags & OMAP_I2C_FLAG_APPLY_ERRATA_I207) dev->errata |= I2C_OMAP_ERRATA_I207; /* Enable interrupts */ @@ -496,7 +502,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) OMAP_I2C_IE_AL) | ((dev->fifo_size) ? (OMAP_I2C_IE_RDR | OMAP_I2C_IE_XDR) : 0); omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate); - if (cpu_is_omap34xx()) { + if (pdata->flags & OMAP_I2C_FLAG_RESET_REGS_POSTIDLE) { dev->pscstate = psc; dev->scllstate = scll; dev->sclhstate = sclh; @@ -816,6 +822,11 @@ omap_i2c_isr(int this_irq, void *dev_id) u16 bits; u16 stat, w; int err, count = 0; + struct platform_device *pdev; + struct omap_i2c_bus_platform_data *pdata; + + pdev = to_platform_device(dev->dev); + pdata = pdev->dev.platform_data; if (dev->idle) return IRQ_NONE; @@ -884,8 +895,8 @@ complete: * Data reg in 2430, omap3 and * omap4 is 8 bit wide */ - if (cpu_class_is_omap1() || - cpu_is_omap2420()) { + if (pdata->flags & + OMAP_I2C_FLAG_16BIT_DATA_REG) { if (dev->buf_len) { *dev->buf++ = w >> 8; dev->buf_len--; @@ -927,8 +938,8 @@ complete: * Data reg in 2430, omap3 and * omap4 is 8 bit wide */ - if (cpu_class_is_omap1() || - cpu_is_omap2420()) { + if (pdata->flags & + OMAP_I2C_FLAG_16BIT_DATA_REG) { if (dev->buf_len) { w |= *dev->buf++ << 8; dev->buf_len--; @@ -1030,12 +1041,7 @@ omap_i2c_probe(struct platform_device *pdev) platform_set_drvdata(pdev, dev); - if (cpu_is_omap7xx()) - dev->reg_shift = 1; - else if (cpu_is_omap44xx()) - dev->reg_shift = 0; - else - dev->reg_shift = 2; + dev->reg_shift = (pdata->flags >> OMAP_I2C_FLAG_BUS_SHIFT__SHIFT) & 3; if (pdata->rev == OMAP_I2C_IP_VERSION_2) dev->regs = (u8 *)reg_map_ip_v2; @@ -1050,7 +1056,7 @@ omap_i2c_probe(struct platform_device *pdev) if (dev->rev <= OMAP_I2C_REV_ON_3430) dev->errata |= I2C_OMAP3_1P153; - if (!(cpu_class_is_omap1() || cpu_is_omap2420())) { + if (!(pdata->flags & OMAP_I2C_FLAG_NO_FIFO)) { u16 s; /* Set up the fifo size - Get total size */ -- cgit v1.2.3 From 9550d4d7ab9aff125d3f7d48d3e97c093d19bdbe Mon Sep 17 00:00:00 2001 From: Andy Green Date: Mon, 30 May 2011 07:43:10 -0700 Subject: I2C: OMAP1/OMAP2+: prepend I2C IP version to probed version shown in dev_info The IP version is prepended to the existing printed probed version as an "epoch" version. Cc: patches@linaro.org Reported-by: Peter Maydell Signed-off-by: Andy Green Signed-off-by: Tony Lindgren Acked-by: Ben Dooks Signed-off-by: Kevin Hilman --- drivers/i2c/busses/i2c-omap.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 3aaf7f127514..642a233a6c84 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -1093,8 +1093,8 @@ omap_i2c_probe(struct platform_device *pdev) goto err_unuse_clocks; } - dev_info(dev->dev, "bus %d rev%d.%d at %d kHz\n", - pdev->id, dev->rev >> 4, dev->rev & 0xf, dev->speed); + dev_info(dev->dev, "bus %d rev%d.%d.%d at %d kHz\n", pdev->id, + pdata->rev, dev->rev >> 4, dev->rev & 0xf, dev->speed); omap_i2c_idle(dev); -- cgit v1.2.3 From cb28e5823588cc357865cc0eab2afeec90e1f057 Mon Sep 17 00:00:00 2001 From: Shubhrajyoti D Date: Wed, 3 Aug 2011 13:58:08 +0530 Subject: OMAP4: I2C: Enable the wakeup in I2C_WE Currently for OMAP4 the I2C_WE is not programmed. This patch enables the programming for OMAP4. This patch fixes a bad conflict resolution. This effectively restores the following commit Commit 120bdaa47[i2c-omap: Program I2C_WE on OMAP4 to enable i2c wakeup] which got changed by Commit a3a7acbc[I2C: OMAP2+: address confused probed version naming] Reviewed-by: Felipe Balbi Reported-by: Santosh Shilimkar Signed-off-by: Shubhrajyoti D Signed-off-by: Kevin Hilman --- drivers/i2c/busses/i2c-omap.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 642a233a6c84..5df938ff0e91 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -384,9 +384,8 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) * REVISIT: Some wkup sources might not be needed. */ dev->westate = OMAP_I2C_WE_ALL; - if (dev->rev < OMAP_I2C_REV_ON_3530_4430) - omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, - dev->westate); + omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, + dev->westate); } } omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); -- cgit v1.2.3 From 7f4b08eeeedd90d97c8c581d048074e0c2643bec Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 17 May 2011 16:31:37 +0200 Subject: I2C: OMAP: remove unneccesary use of pdev A pointer to the struct device associated with the i2c device is already kept in the struct omap_i2c_dev, so use omap_i2c_device to find the pointer to struct device. Reviewed-by: Felipe Balbi Signed-off-by: Kevin Hilman --- drivers/i2c/busses/i2c-omap.c | 22 +++++++--------------- 1 file changed, 7 insertions(+), 15 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 5df938ff0e91..cddb29c15314 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -267,15 +267,13 @@ static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg) static void omap_i2c_unidle(struct omap_i2c_dev *dev) { - struct platform_device *pdev; struct omap_i2c_bus_platform_data *pdata; WARN_ON(!dev->idle); - pdev = to_platform_device(dev->dev); - pdata = pdev->dev.platform_data; + pdata = dev->dev->platform_data; - pm_runtime_get_sync(&pdev->dev); + pm_runtime_get_sync(dev->dev); if (pdata->flags & OMAP_I2C_FLAG_RESET_REGS_POSTIDLE) { omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); @@ -299,14 +297,12 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev) static void omap_i2c_idle(struct omap_i2c_dev *dev) { - struct platform_device *pdev; struct omap_i2c_bus_platform_data *pdata; u16 iv; WARN_ON(dev->idle); - pdev = to_platform_device(dev->dev); - pdata = pdev->dev.platform_data; + pdata = dev->dev->platform_data; dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); if (pdata->rev == OMAP_I2C_IP_VERSION_2) @@ -324,7 +320,7 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev) } dev->idle = 1; - pm_runtime_put_sync(&pdev->dev); + pm_runtime_put_sync(dev->dev); } static int omap_i2c_init(struct omap_i2c_dev *dev) @@ -335,11 +331,9 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) unsigned long timeout; unsigned long internal_clk = 0; struct clk *fclk; - struct platform_device *pdev; struct omap_i2c_bus_platform_data *pdata; - pdev = to_platform_device(dev->dev); - pdata = pdev->dev.platform_data; + pdata = dev->dev->platform_data; if (dev->rev >= OMAP_I2C_OMAP1_REV_2) { /* Disable I2C controller before soft reset */ @@ -821,11 +815,9 @@ omap_i2c_isr(int this_irq, void *dev_id) u16 bits; u16 stat, w; int err, count = 0; - struct platform_device *pdev; struct omap_i2c_bus_platform_data *pdata; - pdev = to_platform_device(dev->dev); - pdata = pdev->dev.platform_data; + pdata = dev->dev->platform_data; if (dev->idle) return IRQ_NONE; @@ -1047,7 +1039,7 @@ omap_i2c_probe(struct platform_device *pdev) else dev->regs = (u8 *)reg_map_ip_v1; - pm_runtime_enable(&pdev->dev); + pm_runtime_enable(dev->dev); omap_i2c_unidle(dev); dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff; -- cgit v1.2.3 From fab67afb543c734c23be0ebfc16f31814df2da79 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Tue, 17 May 2011 16:31:38 +0200 Subject: I2C: OMAP: remove dev->idle, use usage counting provided by runtime PM Current usage of runtime PM is not quite correct. The actual idle/unidle of the I2C hardware should not happen until the runtime PM callbacks are called. Therefore, change omap_i2c_[un]idle() functions to only be called from the runtime PM callbacks (when usage count transitions to/from zero.) Also, the runtime PM core does usage counting and replaces functionality currently managed by the dev->idle flag. Remove usage of dev->idle in favor of using runtime PM, and checking status using pm_runtime_suspended(). Signed-off-by: Kevin Hilman --- drivers/i2c/busses/i2c-omap.c | 59 ++++++++++++++++++++++++++++--------------- 1 file changed, 39 insertions(+), 20 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index cddb29c15314..a43d0023446a 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -194,7 +194,6 @@ struct omap_i2c_dev { */ u8 rev; unsigned b_hw:1; /* bad h/w fixes */ - unsigned idle:1; u16 iestate; /* Saved interrupt register */ u16 pscstate; u16 scllstate; @@ -269,12 +268,8 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev) { struct omap_i2c_bus_platform_data *pdata; - WARN_ON(!dev->idle); - pdata = dev->dev->platform_data; - pm_runtime_get_sync(dev->dev); - if (pdata->flags & OMAP_I2C_FLAG_RESET_REGS_POSTIDLE) { omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->pscstate); @@ -285,7 +280,6 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev) omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate); omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN); } - dev->idle = 0; /* * Don't write to this register if the IE state is 0 as it can @@ -300,8 +294,6 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev) struct omap_i2c_bus_platform_data *pdata; u16 iv; - WARN_ON(dev->idle); - pdata = dev->dev->platform_data; dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); @@ -315,12 +307,9 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev) } else { omap_i2c_write_reg(dev, OMAP_I2C_STAT_REG, dev->iestate); - /* Flush posted write before the dev->idle store occurs */ + /* Flush posted write */ omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG); } - dev->idle = 1; - - pm_runtime_put_sync(dev->dev); } static int omap_i2c_init(struct omap_i2c_dev *dev) @@ -644,7 +633,7 @@ omap_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) int i; int r; - omap_i2c_unidle(dev); + pm_runtime_get_sync(dev->dev); r = omap_i2c_wait_for_bb(dev); if (r < 0) @@ -667,7 +656,7 @@ omap_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) omap_i2c_wait_for_bb(dev); out: - omap_i2c_idle(dev); + pm_runtime_put(dev->dev); return r; } @@ -727,7 +716,7 @@ omap_i2c_omap1_isr(int this_irq, void *dev_id) struct omap_i2c_dev *dev = dev_id; u16 iv, w; - if (dev->idle) + if (pm_runtime_suspended(dev->dev)) return IRQ_NONE; iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); @@ -819,7 +808,7 @@ omap_i2c_isr(int this_irq, void *dev_id) pdata = dev->dev->platform_data; - if (dev->idle) + if (pm_runtime_suspended(dev->dev)) return IRQ_NONE; bits = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); @@ -1021,7 +1010,6 @@ omap_i2c_probe(struct platform_device *pdev) } dev->speed = speed; - dev->idle = 1; dev->dev = &pdev->dev; dev->irq = irq->start; dev->base = ioremap(mem->start, resource_size(mem)); @@ -1040,7 +1028,7 @@ omap_i2c_probe(struct platform_device *pdev) dev->regs = (u8 *)reg_map_ip_v1; pm_runtime_enable(dev->dev); - omap_i2c_unidle(dev); + pm_runtime_get_sync(dev->dev); dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG) & 0xff; @@ -1087,7 +1075,7 @@ omap_i2c_probe(struct platform_device *pdev) dev_info(dev->dev, "bus %d rev%d.%d.%d at %d kHz\n", pdev->id, pdata->rev, dev->rev >> 4, dev->rev & 0xf, dev->speed); - omap_i2c_idle(dev); + pm_runtime_put(dev->dev); adap = &dev->adapter; i2c_set_adapdata(adap, dev); @@ -1111,7 +1099,7 @@ err_free_irq: free_irq(dev->irq, dev); err_unuse_clocks: omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); - omap_i2c_idle(dev); + pm_runtime_put(dev->dev); iounmap(dev->base); err_free_mem: platform_set_drvdata(pdev, NULL); @@ -1140,12 +1128,43 @@ omap_i2c_remove(struct platform_device *pdev) return 0; } +#ifdef CONFIG_PM_RUNTIME +static int omap_i2c_runtime_suspend(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct omap_i2c_dev *_dev = platform_get_drvdata(pdev); + + omap_i2c_idle(_dev); + + return 0; +} + +static int omap_i2c_runtime_resume(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct omap_i2c_dev *_dev = platform_get_drvdata(pdev); + + omap_i2c_unidle(_dev); + + return 0; +} + +static struct dev_pm_ops omap_i2c_pm_ops = { + .runtime_suspend = omap_i2c_runtime_suspend, + .runtime_resume = omap_i2c_runtime_resume, +}; +#define OMAP_I2C_PM_OPS (&omap_i2c_pm_ops) +#else +#define OMAP_I2C_PM_OPS NULL +#endif + static struct platform_driver omap_i2c_driver = { .probe = omap_i2c_probe, .remove = omap_i2c_remove, .driver = { .name = "omap_i2c", .owner = THIS_MODULE, + .pm = OMAP_I2C_PM_OPS, }, }; -- cgit v1.2.3 From 4311051c358ad0e66b68934e7a33cf10ba533466 Mon Sep 17 00:00:00 2001 From: Yong Zhang Date: Wed, 21 Sep 2011 17:28:33 +0800 Subject: i2c: irq: Remove IRQF_DISABLED Since commit [c58543c8: genirq: Run irq handlers with interrupts disabled], We run all interrupt handlers with interrupts disabled and we even check and yell when an interrupt handler returns with interrupts enabled (see commit [b738a50a: genirq: Warn when handler enables interrupts]). So now this flag is a NOOP and can be removed. Signed-off-by: Yong Zhang Acked-by: Wolfram Sang Acked-by: Linus Walleij Acked-by: Barry Song <21cnbao@gmail.com> Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-bfin-twi.c | 4 ++-- drivers/i2c/busses/i2c-designware.c | 2 +- drivers/i2c/busses/i2c-highlander.c | 2 +- drivers/i2c/busses/i2c-nomadik.c | 2 +- drivers/i2c/busses/i2c-nuc900.c | 2 +- drivers/i2c/busses/i2c-pmcmsp.c | 2 +- drivers/i2c/busses/i2c-s3c2410.c | 2 +- drivers/i2c/busses/i2c-sh7760.c | 2 +- drivers/i2c/busses/i2c-sh_mobile.c | 2 +- drivers/i2c/busses/i2c-stu300.c | 2 +- 10 files changed, 11 insertions(+), 11 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-bfin-twi.c b/drivers/i2c/busses/i2c-bfin-twi.c index cbc98aea5b09..cdb59e5b23f7 100644 --- a/drivers/i2c/busses/i2c-bfin-twi.c +++ b/drivers/i2c/busses/i2c-bfin-twi.c @@ -631,7 +631,7 @@ static int i2c_bfin_twi_resume(struct platform_device *pdev) struct bfin_twi_iface *iface = platform_get_drvdata(pdev); int rc = request_irq(iface->irq, bfin_twi_interrupt_entry, - IRQF_DISABLED, pdev->name, iface); + 0, pdev->name, iface); if (rc) { dev_err(&pdev->dev, "Can't get IRQ %d !\n", iface->irq); return -ENODEV; @@ -702,7 +702,7 @@ static int i2c_bfin_twi_probe(struct platform_device *pdev) } rc = request_irq(iface->irq, bfin_twi_interrupt_entry, - IRQF_DISABLED, pdev->name, iface); + 0, pdev->name, iface); if (rc) { dev_err(&pdev->dev, "Can't get IRQ %d !\n", iface->irq); rc = -ENODEV; diff --git a/drivers/i2c/busses/i2c-designware.c b/drivers/i2c/busses/i2c-designware.c index 1b42b50b5992..2ac1903f167e 100644 --- a/drivers/i2c/busses/i2c-designware.c +++ b/drivers/i2c/busses/i2c-designware.c @@ -755,7 +755,7 @@ static int __devinit dw_i2c_probe(struct platform_device *pdev) i2c_dw_init(dev); writel(0, dev->base + DW_IC_INTR_MASK); /* disable IRQ */ - r = request_irq(dev->irq, i2c_dw_isr, IRQF_DISABLED, pdev->name, dev); + r = request_irq(dev->irq, i2c_dw_isr, 0, pdev->name, dev); if (r) { dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq); goto err_iounmap; diff --git a/drivers/i2c/busses/i2c-highlander.c b/drivers/i2c/busses/i2c-highlander.c index 3876a2478bd7..63bb1cc2a042 100644 --- a/drivers/i2c/busses/i2c-highlander.c +++ b/drivers/i2c/busses/i2c-highlander.c @@ -387,7 +387,7 @@ static int __devinit highlander_i2c_probe(struct platform_device *pdev) dev->irq = 0; if (dev->irq) { - ret = request_irq(dev->irq, highlander_i2c_irq, IRQF_DISABLED, + ret = request_irq(dev->irq, highlander_i2c_irq, 0, pdev->name, dev); if (unlikely(ret)) goto err_unmap; diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c index b228e09c5d05..40702e8e95c7 100644 --- a/drivers/i2c/busses/i2c-nomadik.c +++ b/drivers/i2c/busses/i2c-nomadik.c @@ -935,7 +935,7 @@ static int __devinit nmk_i2c_probe(struct platform_device *pdev) } dev->irq = platform_get_irq(pdev, 0); - ret = request_irq(dev->irq, i2c_irq_handler, IRQF_DISABLED, + ret = request_irq(dev->irq, i2c_irq_handler, 0, DRIVER_NAME, dev); if (ret) { dev_err(&pdev->dev, "cannot claim the irq %d\n", dev->irq); diff --git a/drivers/i2c/busses/i2c-nuc900.c b/drivers/i2c/busses/i2c-nuc900.c index 72434263787b..835e47b39bc2 100644 --- a/drivers/i2c/busses/i2c-nuc900.c +++ b/drivers/i2c/busses/i2c-nuc900.c @@ -610,7 +610,7 @@ static int __devinit nuc900_i2c_probe(struct platform_device *pdev) goto err_iomap; } - ret = request_irq(i2c->irq, nuc900_i2c_irq, IRQF_DISABLED | IRQF_SHARED, + ret = request_irq(i2c->irq, nuc900_i2c_irq, IRQF_SHARED, dev_name(&pdev->dev), i2c); if (ret != 0) { diff --git a/drivers/i2c/busses/i2c-pmcmsp.c b/drivers/i2c/busses/i2c-pmcmsp.c index dfa7ae9c1b8e..127051b06921 100644 --- a/drivers/i2c/busses/i2c-pmcmsp.c +++ b/drivers/i2c/busses/i2c-pmcmsp.c @@ -306,7 +306,7 @@ static int __devinit pmcmsptwi_probe(struct platform_device *pldev) pmcmsptwi_data.irq = platform_get_irq(pldev, 0); if (pmcmsptwi_data.irq) { rc = request_irq(pmcmsptwi_data.irq, &pmcmsptwi_interrupt, - IRQF_SHARED | IRQF_DISABLED | IRQF_SAMPLE_RANDOM, + IRQF_SHARED | IRQF_SAMPLE_RANDOM, pldev->name, &pmcmsptwi_data); if (rc == 0) { /* diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c index f84a63c6dd97..545ca88a9153 100644 --- a/drivers/i2c/busses/i2c-s3c2410.c +++ b/drivers/i2c/busses/i2c-s3c2410.c @@ -883,7 +883,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev) goto err_iomap; } - ret = request_irq(i2c->irq, s3c24xx_i2c_irq, IRQF_DISABLED, + ret = request_irq(i2c->irq, s3c24xx_i2c_irq, 0, dev_name(&pdev->dev), i2c); if (ret != 0) { diff --git a/drivers/i2c/busses/i2c-sh7760.c b/drivers/i2c/busses/i2c-sh7760.c index 3cad8fecc3d3..c418c41eff3d 100644 --- a/drivers/i2c/busses/i2c-sh7760.c +++ b/drivers/i2c/busses/i2c-sh7760.c @@ -502,7 +502,7 @@ static int __devinit sh7760_i2c_probe(struct platform_device *pdev) } OUT32(id, I2CCCR, ret); - if (request_irq(id->irq, sh7760_i2c_irq, IRQF_DISABLED, + if (request_irq(id->irq, sh7760_i2c_irq, 0, SH7760_I2C_DEVNAME, id)) { dev_err(&pdev->dev, "cannot get irq %d\n", id->irq); ret = -EBUSY; diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c index f633a53b6dbe..675c9692d148 100644 --- a/drivers/i2c/busses/i2c-sh_mobile.c +++ b/drivers/i2c/busses/i2c-sh_mobile.c @@ -543,7 +543,7 @@ static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook) while ((res = platform_get_resource(dev, IORESOURCE_IRQ, k))) { for (n = res->start; hook && n <= res->end; n++) { - if (request_irq(n, sh_mobile_i2c_isr, IRQF_DISABLED, + if (request_irq(n, sh_mobile_i2c_isr, 0, dev_name(&dev->dev), dev)) { for (n--; n >= res->start; n--) free_irq(n, dev); diff --git a/drivers/i2c/busses/i2c-stu300.c b/drivers/i2c/busses/i2c-stu300.c index 99879617e686..4d44af181f37 100644 --- a/drivers/i2c/busses/i2c-stu300.c +++ b/drivers/i2c/busses/i2c-stu300.c @@ -916,7 +916,7 @@ stu300_probe(struct platform_device *pdev) } dev->irq = platform_get_irq(pdev, 0); - if (request_irq(dev->irq, stu300_irh, IRQF_DISABLED, + if (request_irq(dev->irq, stu300_irh, 0, NAME, dev)) { ret = -EIO; goto err_no_irq; -- cgit v1.2.3 From 7f279601c59b814314083d572e7c0df11d09cad8 Mon Sep 17 00:00:00 2001 From: Jean-Hugues Deschenes Date: Thu, 6 Oct 2011 11:26:25 -0700 Subject: i2c-designware: Use local version of readl & writel Use local versions of readl & writel, so per-access manipulations may be performed Signed-off-by: Jean-Hugues Deschenes Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware.c | 88 +++++++++++++++++++++---------------- 1 file changed, 49 insertions(+), 39 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-designware.c b/drivers/i2c/busses/i2c-designware.c index 1b42b50b5992..28335c3717d9 100644 --- a/drivers/i2c/busses/i2c-designware.c +++ b/drivers/i2c/busses/i2c-designware.c @@ -220,6 +220,16 @@ struct dw_i2c_dev { unsigned int rx_fifo_depth; }; +static u32 dw_readl(struct dw_i2c_dev *dev, int offset) +{ + return readl(dev->base + offset); +} + +static void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset) +{ + writel(b, dev->base + offset); +} + static u32 i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset) { @@ -289,7 +299,7 @@ static void i2c_dw_init(struct dw_i2c_dev *dev) u32 ic_con, hcnt, lcnt; /* Disable the adapter */ - writel(0, dev->base + DW_IC_ENABLE); + dw_writel(dev, 0, DW_IC_ENABLE); /* set standard and fast speed deviders for high/low periods */ @@ -303,8 +313,8 @@ static void i2c_dw_init(struct dw_i2c_dev *dev) 47, /* tLOW = 4.7 us */ 3, /* tf = 0.3 us */ 0); /* No offset */ - writel(hcnt, dev->base + DW_IC_SS_SCL_HCNT); - writel(lcnt, dev->base + DW_IC_SS_SCL_LCNT); + dw_writel(dev, hcnt, DW_IC_SS_SCL_HCNT); + dw_writel(dev, lcnt, DW_IC_SS_SCL_LCNT); dev_dbg(dev->dev, "Standard-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt); /* Fast-mode */ @@ -317,18 +327,18 @@ static void i2c_dw_init(struct dw_i2c_dev *dev) 13, /* tLOW = 1.3 us */ 3, /* tf = 0.3 us */ 0); /* No offset */ - writel(hcnt, dev->base + DW_IC_FS_SCL_HCNT); - writel(lcnt, dev->base + DW_IC_FS_SCL_LCNT); + dw_writel(dev, hcnt, DW_IC_FS_SCL_HCNT); + dw_writel(dev, lcnt, DW_IC_FS_SCL_LCNT); dev_dbg(dev->dev, "Fast-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt); /* Configure Tx/Rx FIFO threshold levels */ - writel(dev->tx_fifo_depth - 1, dev->base + DW_IC_TX_TL); - writel(0, dev->base + DW_IC_RX_TL); + dw_writel(dev, dev->tx_fifo_depth - 1, DW_IC_TX_TL); + dw_writel(dev, 0, DW_IC_RX_TL); /* configure the i2c master */ ic_con = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_FAST; - writel(ic_con, dev->base + DW_IC_CON); + dw_writel(dev, ic_con, DW_IC_CON); } /* @@ -338,7 +348,7 @@ static int i2c_dw_wait_bus_not_busy(struct dw_i2c_dev *dev) { int timeout = TIMEOUT; - while (readl(dev->base + DW_IC_STATUS) & DW_IC_STATUS_ACTIVITY) { + while (dw_readl(dev, DW_IC_STATUS) & DW_IC_STATUS_ACTIVITY) { if (timeout <= 0) { dev_warn(dev->dev, "timeout waiting for bus ready\n"); return -ETIMEDOUT; @@ -356,24 +366,24 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev) u32 ic_con; /* Disable the adapter */ - writel(0, dev->base + DW_IC_ENABLE); + dw_writel(dev, 0, DW_IC_ENABLE); /* set the slave (target) address */ - writel(msgs[dev->msg_write_idx].addr, dev->base + DW_IC_TAR); + dw_writel(dev, msgs[dev->msg_write_idx].addr, DW_IC_TAR); /* if the slave address is ten bit address, enable 10BITADDR */ - ic_con = readl(dev->base + DW_IC_CON); + ic_con = dw_readl(dev, DW_IC_CON); if (msgs[dev->msg_write_idx].flags & I2C_M_TEN) ic_con |= DW_IC_CON_10BITADDR_MASTER; else ic_con &= ~DW_IC_CON_10BITADDR_MASTER; - writel(ic_con, dev->base + DW_IC_CON); + dw_writel(dev, ic_con, DW_IC_CON); /* Enable the adapter */ - writel(1, dev->base + DW_IC_ENABLE); + dw_writel(dev, 1, DW_IC_ENABLE); /* Enable interrupts */ - writel(DW_IC_INTR_DEFAULT_MASK, dev->base + DW_IC_INTR_MASK); + dw_writel(dev, DW_IC_INTR_DEFAULT_MASK, DW_IC_INTR_MASK); } /* @@ -420,15 +430,15 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev) buf_len = msgs[dev->msg_write_idx].len; } - tx_limit = dev->tx_fifo_depth - readl(dev->base + DW_IC_TXFLR); - rx_limit = dev->rx_fifo_depth - readl(dev->base + DW_IC_RXFLR); + tx_limit = dev->tx_fifo_depth - dw_readl(dev, DW_IC_TXFLR); + rx_limit = dev->rx_fifo_depth - dw_readl(dev, DW_IC_RXFLR); while (buf_len > 0 && tx_limit > 0 && rx_limit > 0) { if (msgs[dev->msg_write_idx].flags & I2C_M_RD) { - writel(0x100, dev->base + DW_IC_DATA_CMD); + dw_writel(dev, 0x100, DW_IC_DATA_CMD); rx_limit--; } else - writel(*buf++, dev->base + DW_IC_DATA_CMD); + dw_writel(dev, *buf++, DW_IC_DATA_CMD); tx_limit--; buf_len--; } @@ -453,7 +463,7 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev) if (dev->msg_err) intr_mask = 0; - writel(intr_mask, dev->base + DW_IC_INTR_MASK); + dw_writel(dev, intr_mask, DW_IC_INTR_MASK); } static void @@ -477,10 +487,10 @@ i2c_dw_read(struct dw_i2c_dev *dev) buf = dev->rx_buf; } - rx_valid = readl(dev->base + DW_IC_RXFLR); + rx_valid = dw_readl(dev, DW_IC_RXFLR); for (; len > 0 && rx_valid > 0; len--, rx_valid--) - *buf++ = readl(dev->base + DW_IC_DATA_CMD); + *buf++ = dw_readl(dev, DW_IC_DATA_CMD); if (len > 0) { dev->status |= STATUS_READ_IN_PROGRESS; @@ -563,7 +573,7 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) /* no error */ if (likely(!dev->cmd_err)) { /* Disable the adapter */ - writel(0, dev->base + DW_IC_ENABLE); + dw_writel(dev, 0, DW_IC_ENABLE); ret = num; goto done; } @@ -607,7 +617,7 @@ static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev) * * The raw version might be useful for debugging purposes. */ - stat = readl(dev->base + DW_IC_INTR_STAT); + stat = dw_readl(dev, DW_IC_INTR_STAT); /* * Do not use the IC_CLR_INTR register to clear interrupts, or @@ -617,31 +627,31 @@ static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev) * Instead, use the separately-prepared IC_CLR_* registers. */ if (stat & DW_IC_INTR_RX_UNDER) - readl(dev->base + DW_IC_CLR_RX_UNDER); + dw_readl(dev, DW_IC_CLR_RX_UNDER); if (stat & DW_IC_INTR_RX_OVER) - readl(dev->base + DW_IC_CLR_RX_OVER); + dw_readl(dev, DW_IC_CLR_RX_OVER); if (stat & DW_IC_INTR_TX_OVER) - readl(dev->base + DW_IC_CLR_TX_OVER); + dw_readl(dev, DW_IC_CLR_TX_OVER); if (stat & DW_IC_INTR_RD_REQ) - readl(dev->base + DW_IC_CLR_RD_REQ); + dw_readl(dev, DW_IC_CLR_RD_REQ); if (stat & DW_IC_INTR_TX_ABRT) { /* * The IC_TX_ABRT_SOURCE register is cleared whenever * the IC_CLR_TX_ABRT is read. Preserve it beforehand. */ - dev->abort_source = readl(dev->base + DW_IC_TX_ABRT_SOURCE); - readl(dev->base + DW_IC_CLR_TX_ABRT); + dev->abort_source = dw_readl(dev, DW_IC_TX_ABRT_SOURCE); + dw_readl(dev, DW_IC_CLR_TX_ABRT); } if (stat & DW_IC_INTR_RX_DONE) - readl(dev->base + DW_IC_CLR_RX_DONE); + dw_readl(dev, DW_IC_CLR_RX_DONE); if (stat & DW_IC_INTR_ACTIVITY) - readl(dev->base + DW_IC_CLR_ACTIVITY); + dw_readl(dev, DW_IC_CLR_ACTIVITY); if (stat & DW_IC_INTR_STOP_DET) - readl(dev->base + DW_IC_CLR_STOP_DET); + dw_readl(dev, DW_IC_CLR_STOP_DET); if (stat & DW_IC_INTR_START_DET) - readl(dev->base + DW_IC_CLR_START_DET); + dw_readl(dev, DW_IC_CLR_START_DET); if (stat & DW_IC_INTR_GEN_CALL) - readl(dev->base + DW_IC_CLR_GEN_CALL); + dw_readl(dev, DW_IC_CLR_GEN_CALL); return stat; } @@ -666,7 +676,7 @@ static irqreturn_t i2c_dw_isr(int this_irq, void *dev_id) * Anytime TX_ABRT is set, the contents of the tx/rx * buffers are flushed. Make sure to skip them. */ - writel(0, dev->base + DW_IC_INTR_MASK); + dw_writel(dev, 0, DW_IC_INTR_MASK); goto tx_aborted; } @@ -747,14 +757,14 @@ static int __devinit dw_i2c_probe(struct platform_device *pdev) goto err_unuse_clocks; } { - u32 param1 = readl(dev->base + DW_IC_COMP_PARAM_1); + u32 param1 = dw_readl(dev, DW_IC_COMP_PARAM_1); dev->tx_fifo_depth = ((param1 >> 16) & 0xff) + 1; dev->rx_fifo_depth = ((param1 >> 8) & 0xff) + 1; } i2c_dw_init(dev); - writel(0, dev->base + DW_IC_INTR_MASK); /* disable IRQ */ + dw_writel(dev, 0, DW_IC_INTR_MASK); /* disable IRQ */ r = request_irq(dev->irq, i2c_dw_isr, IRQF_DISABLED, pdev->name, dev); if (r) { dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq); @@ -810,7 +820,7 @@ static int __devexit dw_i2c_remove(struct platform_device *pdev) clk_put(dev->clk); dev->clk = NULL; - writel(0, dev->base + DW_IC_ENABLE); + dw_writel(dev, 0, DW_IC_ENABLE); free_irq(dev->irq, dev); kfree(dev); -- cgit v1.2.3 From 4ff895bc8b90e30ff8e89ca7bc6666b229c77e5d Mon Sep 17 00:00:00 2001 From: Jean-Hugues Deschenes Date: Thu, 6 Oct 2011 11:26:26 -0700 Subject: i2c-designware: Check component type register Designware component type register is checked before attaching to the device. Signed-off-by: Jean-Hugues Deschenes Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-designware.c b/drivers/i2c/busses/i2c-designware.c index 28335c3717d9..49386951f7fd 100644 --- a/drivers/i2c/busses/i2c-designware.c +++ b/drivers/i2c/busses/i2c-designware.c @@ -69,6 +69,7 @@ #define DW_IC_TXFLR 0x74 #define DW_IC_RXFLR 0x78 #define DW_IC_COMP_PARAM_1 0xf4 +#define DW_IC_COMP_TYPE 0xfc #define DW_IC_TX_ABRT_SOURCE 0x80 #define DW_IC_CON_MASTER 0x1 @@ -710,6 +711,7 @@ static int __devinit dw_i2c_probe(struct platform_device *pdev) struct i2c_adapter *adap; struct resource *mem, *ioarea; int irq, r; + u32 reg; /* NOTE: driver uses the static register mapping */ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -756,12 +758,19 @@ static int __devinit dw_i2c_probe(struct platform_device *pdev) r = -EBUSY; goto err_unuse_clocks; } - { - u32 param1 = dw_readl(dev, DW_IC_COMP_PARAM_1); - dev->tx_fifo_depth = ((param1 >> 16) & 0xff) + 1; - dev->rx_fifo_depth = ((param1 >> 8) & 0xff) + 1; + reg = dw_readl(dev, DW_IC_COMP_TYPE); + if (reg != 0x44570140) { + dev_err(&pdev->dev, "Unknown Synopsys component type: " + "0x%08x\n", reg); + r = -ENODEV; + goto err_iounmap; } + + reg = dw_readl(dev, DW_IC_COMP_PARAM_1); + dev->tx_fifo_depth = ((reg >> 16) & 0xff) + 1; + dev->rx_fifo_depth = ((reg >> 8) & 0xff) + 1; + i2c_dw_init(dev); dw_writel(dev, 0, DW_IC_INTR_MASK); /* disable IRQ */ -- cgit v1.2.3 From 18c4089e6cd6b3052895481628f478ba8351ac00 Mon Sep 17 00:00:00 2001 From: Jean-Hugues Deschenes Date: Thu, 6 Oct 2011 11:26:27 -0700 Subject: i2c-designware: Allow mixed endianness accesses Allows CPUs of a given endianness to access a dw controller of a different endianness. Endianncess difference is detected at run time through the dw component type register. Signed-off-by: Jean-Hugues Deschenes Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-designware.c b/drivers/i2c/busses/i2c-designware.c index 49386951f7fd..934dfe1e6ce9 100644 --- a/drivers/i2c/busses/i2c-designware.c +++ b/drivers/i2c/busses/i2c-designware.c @@ -37,6 +37,7 @@ #include #include #include +#include /* * Registers offset @@ -193,6 +194,7 @@ static char *abort_sources[] = { * @status: i2c master status, one of STATUS_* * @abort_source: copy of the TX_ABRT_SOURCE register * @irq: interrupt number for the i2c master + * @swab: true if the instantiated IP is of different endianess * @adapter: i2c subsystem adapter node * @tx_fifo_depth: depth of the hardware tx fifo * @rx_fifo_depth: depth of the hardware rx fifo @@ -216,6 +218,7 @@ struct dw_i2c_dev { unsigned int status; u32 abort_source; int irq; + int swab; struct i2c_adapter adapter; unsigned int tx_fifo_depth; unsigned int rx_fifo_depth; @@ -223,11 +226,19 @@ struct dw_i2c_dev { static u32 dw_readl(struct dw_i2c_dev *dev, int offset) { - return readl(dev->base + offset); + u32 value = readl(dev->base + offset); + + if (dev->swab) + return swab32(value); + else + return value; } static void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset) { + if (dev->swab) + b = swab32(b); + writel(b, dev->base + offset); } @@ -760,7 +771,9 @@ static int __devinit dw_i2c_probe(struct platform_device *pdev) } reg = dw_readl(dev, DW_IC_COMP_TYPE); - if (reg != 0x44570140) { + if (reg == ___constant_swab32(0x44570140)) + dev->swab = 1; + else if (reg != 0x44570140) { dev_err(&pdev->dev, "Unknown Synopsys component type: " "0x%08x\n", reg); r = -ENODEV; -- cgit v1.2.3 From 4a423a8c8107b983007199c76c8327cd1747f092 Mon Sep 17 00:00:00 2001 From: Dirk Brandewie Date: Thu, 6 Oct 2011 11:26:28 -0700 Subject: i2c-designware: Move checking of IP core version to i2c_dw_init() Move checking IP core version to i2c_dw_init() in preparation for splitting i2c-designware.c into core and bus specific portions. Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware.c | 30 +++++++++++++++++++----------- 1 file changed, 19 insertions(+), 11 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-designware.c b/drivers/i2c/busses/i2c-designware.c index 934dfe1e6ce9..a7abbcd3d805 100644 --- a/drivers/i2c/busses/i2c-designware.c +++ b/drivers/i2c/busses/i2c-designware.c @@ -305,10 +305,24 @@ static u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset) * This function is called during I2C init function, and in case of timeout at * run time. */ -static void i2c_dw_init(struct dw_i2c_dev *dev) +static int i2c_dw_init(struct dw_i2c_dev *dev) { u32 input_clock_khz = clk_get_rate(dev->clk) / 1000; u32 ic_con, hcnt, lcnt; + u32 reg; + + /* Configure register endianess access */ + reg = dw_readl(dev, DW_IC_COMP_TYPE); + if (reg == ___constant_swab32(DW_IC_COMP_TYPE_VALUE)) { + dev->swab = 1; + reg = DW_IC_COMP_TYPE_VALUE; + } + + if (reg != DW_IC_COMP_TYPE_VALUE) { + dev_err(dev->dev, "Unknown Synopsys component type: " + "0x%08x\n", reg); + return -ENODEV; + } /* Disable the adapter */ dw_writel(dev, 0, DW_IC_ENABLE); @@ -351,6 +365,7 @@ static void i2c_dw_init(struct dw_i2c_dev *dev) ic_con = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_FAST; dw_writel(dev, ic_con, DW_IC_CON); + return 0; } /* @@ -770,21 +785,14 @@ static int __devinit dw_i2c_probe(struct platform_device *pdev) goto err_unuse_clocks; } - reg = dw_readl(dev, DW_IC_COMP_TYPE); - if (reg == ___constant_swab32(0x44570140)) - dev->swab = 1; - else if (reg != 0x44570140) { - dev_err(&pdev->dev, "Unknown Synopsys component type: " - "0x%08x\n", reg); - r = -ENODEV; - goto err_iounmap; - } + r = i2c_dw_init(dev); + if (r) + goto err_unuse_clocks; reg = dw_readl(dev, DW_IC_COMP_PARAM_1); dev->tx_fifo_depth = ((reg >> 16) & 0xff) + 1; dev->rx_fifo_depth = ((reg >> 8) & 0xff) + 1; - i2c_dw_init(dev); dw_writel(dev, 0, DW_IC_INTR_MASK); /* disable IRQ */ r = request_irq(dev->irq, i2c_dw_isr, IRQF_DISABLED, pdev->name, dev); -- cgit v1.2.3 From 2373f6b9744d5373b886f3ce1a985193cca0a356 Mon Sep 17 00:00:00 2001 From: Dirk Brandewie Date: Sat, 29 Oct 2011 10:57:23 +0100 Subject: i2c-designware: split of i2c-designware.c into core and bus specific parts This patch splits i2c-designware.c into three pieces: i2c-designware-core.c, contains the code that interacts directly with the core. i2c-designware-platdrv.c, contains the code specific to the platform driver using the core. i2c-designware-core.h contains the definitions and declareations shared by i2c-designware-core.c and i2c-designware-platdrv.c. This patch is the first in a set to allow multiple instances of the designware I2C core in the system. Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/Kconfig | 6 +- drivers/i2c/busses/Makefile | 3 +- drivers/i2c/busses/i2c-designware-core.c | 562 ++++++++++++++++++ drivers/i2c/busses/i2c-designware-core.h | 194 ++++++ drivers/i2c/busses/i2c-designware-platdrv.c | 199 +++++++ drivers/i2c/busses/i2c-designware.c | 887 ---------------------------- 6 files changed, 960 insertions(+), 891 deletions(-) create mode 100644 drivers/i2c/busses/i2c-designware-core.c create mode 100644 drivers/i2c/busses/i2c-designware-core.h create mode 100644 drivers/i2c/busses/i2c-designware-platdrv.c delete mode 100644 drivers/i2c/busses/i2c-designware.c (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 646068e5100b..e6f6e88021e5 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -350,15 +350,15 @@ config I2C_DAVINCI devices such as DaVinci NIC. For details please see http://www.ti.com/davinci -config I2C_DESIGNWARE - tristate "Synopsys DesignWare" +config I2C_DESIGNWARE_PLATFORM + tristate "Synopsys DesignWare Platfrom" depends on HAVE_CLK help If you say yes to this option, support will be included for the Synopsys DesignWare I2C adapter. Only master mode is supported. This driver can also be built as a module. If so, the module - will be called i2c-designware. + will be called i2c-designware-platform. config I2C_GPIO tristate "GPIO-based bitbanging I2C" diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index e6cf294d3729..d7fe55fb0776 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile @@ -33,7 +33,8 @@ obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o obj-$(CONFIG_I2C_BLACKFIN_TWI) += i2c-bfin-twi.o obj-$(CONFIG_I2C_CPM) += i2c-cpm.o obj-$(CONFIG_I2C_DAVINCI) += i2c-davinci.o -obj-$(CONFIG_I2C_DESIGNWARE) += i2c-designware.o +obj-$(CONFIG_I2C_DESIGNWARE_PLATFORM) += i2c-designware-platform.o +i2c-designware-platform-objs := i2c-designware-platdrv.o i2c-designware-core.o obj-$(CONFIG_I2C_GPIO) += i2c-gpio.o obj-$(CONFIG_I2C_HIGHLANDER) += i2c-highlander.o obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c new file mode 100644 index 000000000000..38d5a6b22a84 --- /dev/null +++ b/drivers/i2c/busses/i2c-designware-core.c @@ -0,0 +1,562 @@ +/* + * Synopsys DesignWare I2C adapter driver (master only). + * + * Based on the TI DAVINCI I2C adapter driver. + * + * Copyright (C) 2006 Texas Instruments. + * Copyright (C) 2007 MontaVista Software Inc. + * Copyright (C) 2009 Provigent Ltd. + * + * ---------------------------------------------------------------------------- + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + * + */ +#include +#include +#include +#include +#include +#include +#include +#include "i2c-designware-core.h" + +static char *abort_sources[] = { + [ABRT_7B_ADDR_NOACK] = + "slave address not acknowledged (7bit mode)", + [ABRT_10ADDR1_NOACK] = + "first address byte not acknowledged (10bit mode)", + [ABRT_10ADDR2_NOACK] = + "second address byte not acknowledged (10bit mode)", + [ABRT_TXDATA_NOACK] = + "data not acknowledged", + [ABRT_GCALL_NOACK] = + "no acknowledgement for a general call", + [ABRT_GCALL_READ] = + "read after general call", + [ABRT_SBYTE_ACKDET] = + "start byte acknowledged", + [ABRT_SBYTE_NORSTRT] = + "trying to send start byte when restart is disabled", + [ABRT_10B_RD_NORSTRT] = + "trying to read when restart is disabled (10bit mode)", + [ABRT_MASTER_DIS] = + "trying to use disabled adapter", + [ARB_LOST] = + "lost arbitration", +}; + +u32 dw_readl(struct dw_i2c_dev *dev, int offset) +{ + u32 value = readl(dev->base + offset); + + if (dev->swab) + return swab32(value); + else + return value; +} + +void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset) +{ + if (dev->swab) + b = swab32(b); + + writel(b, dev->base + offset); +} + +static u32 +i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset) +{ + /* + * DesignWare I2C core doesn't seem to have solid strategy to meet + * the tHD;STA timing spec. Configuring _HCNT based on tHIGH spec + * will result in violation of the tHD;STA spec. + */ + if (cond) + /* + * Conditional expression: + * + * IC_[FS]S_SCL_HCNT + (1+4+3) >= IC_CLK * tHIGH + * + * This is based on the DW manuals, and represents an ideal + * configuration. The resulting I2C bus speed will be + * faster than any of the others. + * + * If your hardware is free from tHD;STA issue, try this one. + */ + return (ic_clk * tSYMBOL + 5000) / 10000 - 8 + offset; + else + /* + * Conditional expression: + * + * IC_[FS]S_SCL_HCNT + 3 >= IC_CLK * (tHD;STA + tf) + * + * This is just experimental rule; the tHD;STA period turned + * out to be proportinal to (_HCNT + 3). With this setting, + * we could meet both tHIGH and tHD;STA timing specs. + * + * If unsure, you'd better to take this alternative. + * + * The reason why we need to take into account "tf" here, + * is the same as described in i2c_dw_scl_lcnt(). + */ + return (ic_clk * (tSYMBOL + tf) + 5000) / 10000 - 3 + offset; +} + +static u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset) +{ + /* + * Conditional expression: + * + * IC_[FS]S_SCL_LCNT + 1 >= IC_CLK * (tLOW + tf) + * + * DW I2C core starts counting the SCL CNTs for the LOW period + * of the SCL clock (tLOW) as soon as it pulls the SCL line. + * In order to meet the tLOW timing spec, we need to take into + * account the fall time of SCL signal (tf). Default tf value + * should be 0.3 us, for safety. + */ + return ((ic_clk * (tLOW + tf) + 5000) / 10000) - 1 + offset; +} + +/** + * i2c_dw_init() - initialize the designware i2c master hardware + * @dev: device private data + * + * This functions configures and enables the I2C master. + * This function is called during I2C init function, and in case of timeout at + * run time. + */ +int i2c_dw_init(struct dw_i2c_dev *dev) +{ + u32 input_clock_khz = clk_get_rate(dev->clk) / 1000; + u32 ic_con, hcnt, lcnt; + u32 reg; + + /* Configure register endianess access */ + reg = dw_readl(dev, DW_IC_COMP_TYPE); + if (reg == ___constant_swab32(DW_IC_COMP_TYPE_VALUE)) { + dev->swab = 1; + reg = DW_IC_COMP_TYPE_VALUE; + } + + if (reg != DW_IC_COMP_TYPE_VALUE) { + dev_err(dev->dev, "Unknown Synopsys component type: " + "0x%08x\n", reg); + return -ENODEV; + } + + /* Disable the adapter */ + dw_writel(dev, 0, DW_IC_ENABLE); + + /* set standard and fast speed deviders for high/low periods */ + + /* Standard-mode */ + hcnt = i2c_dw_scl_hcnt(input_clock_khz, + 40, /* tHD;STA = tHIGH = 4.0 us */ + 3, /* tf = 0.3 us */ + 0, /* 0: DW default, 1: Ideal */ + 0); /* No offset */ + lcnt = i2c_dw_scl_lcnt(input_clock_khz, + 47, /* tLOW = 4.7 us */ + 3, /* tf = 0.3 us */ + 0); /* No offset */ + dw_writel(dev, hcnt, DW_IC_SS_SCL_HCNT); + dw_writel(dev, lcnt, DW_IC_SS_SCL_LCNT); + dev_dbg(dev->dev, "Standard-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt); + + /* Fast-mode */ + hcnt = i2c_dw_scl_hcnt(input_clock_khz, + 6, /* tHD;STA = tHIGH = 0.6 us */ + 3, /* tf = 0.3 us */ + 0, /* 0: DW default, 1: Ideal */ + 0); /* No offset */ + lcnt = i2c_dw_scl_lcnt(input_clock_khz, + 13, /* tLOW = 1.3 us */ + 3, /* tf = 0.3 us */ + 0); /* No offset */ + dw_writel(dev, hcnt, DW_IC_FS_SCL_HCNT); + dw_writel(dev, lcnt, DW_IC_FS_SCL_LCNT); + dev_dbg(dev->dev, "Fast-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt); + + /* Configure Tx/Rx FIFO threshold levels */ + dw_writel(dev, dev->tx_fifo_depth - 1, DW_IC_TX_TL); + dw_writel(dev, 0, DW_IC_RX_TL); + + /* configure the i2c master */ + ic_con = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | + DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_FAST; + dw_writel(dev, ic_con, DW_IC_CON); + return 0; +} + +/* + * Waiting for bus not busy + */ +static int i2c_dw_wait_bus_not_busy(struct dw_i2c_dev *dev) +{ + int timeout = TIMEOUT; + + while (dw_readl(dev, DW_IC_STATUS) & DW_IC_STATUS_ACTIVITY) { + if (timeout <= 0) { + dev_warn(dev->dev, "timeout waiting for bus ready\n"); + return -ETIMEDOUT; + } + timeout--; + mdelay(1); + } + + return 0; +} + +static void i2c_dw_xfer_init(struct dw_i2c_dev *dev) +{ + struct i2c_msg *msgs = dev->msgs; + u32 ic_con; + + /* Disable the adapter */ + dw_writel(dev, 0, DW_IC_ENABLE); + + /* set the slave (target) address */ + dw_writel(dev, msgs[dev->msg_write_idx].addr, DW_IC_TAR); + + /* if the slave address is ten bit address, enable 10BITADDR */ + ic_con = dw_readl(dev, DW_IC_CON); + if (msgs[dev->msg_write_idx].flags & I2C_M_TEN) + ic_con |= DW_IC_CON_10BITADDR_MASTER; + else + ic_con &= ~DW_IC_CON_10BITADDR_MASTER; + dw_writel(dev, ic_con, DW_IC_CON); + + /* Enable the adapter */ + dw_writel(dev, 1, DW_IC_ENABLE); + + /* Enable interrupts */ + dw_writel(dev, DW_IC_INTR_DEFAULT_MASK, DW_IC_INTR_MASK); +} + +/* + * Initiate (and continue) low level master read/write transaction. + * This function is only called from i2c_dw_isr, and pumping i2c_msg + * messages into the tx buffer. Even if the size of i2c_msg data is + * longer than the size of the tx buffer, it handles everything. + */ +void +i2c_dw_xfer_msg(struct dw_i2c_dev *dev) +{ + struct i2c_msg *msgs = dev->msgs; + u32 intr_mask; + int tx_limit, rx_limit; + u32 addr = msgs[dev->msg_write_idx].addr; + u32 buf_len = dev->tx_buf_len; + u8 *buf = dev->tx_buf; + + intr_mask = DW_IC_INTR_DEFAULT_MASK; + + for (; dev->msg_write_idx < dev->msgs_num; dev->msg_write_idx++) { + /* + * if target address has changed, we need to + * reprogram the target address in the i2c + * adapter when we are done with this transfer + */ + if (msgs[dev->msg_write_idx].addr != addr) { + dev_err(dev->dev, + "%s: invalid target address\n", __func__); + dev->msg_err = -EINVAL; + break; + } + + if (msgs[dev->msg_write_idx].len == 0) { + dev_err(dev->dev, + "%s: invalid message length\n", __func__); + dev->msg_err = -EINVAL; + break; + } + + if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) { + /* new i2c_msg */ + buf = msgs[dev->msg_write_idx].buf; + buf_len = msgs[dev->msg_write_idx].len; + } + + tx_limit = dev->tx_fifo_depth - dw_readl(dev, DW_IC_TXFLR); + rx_limit = dev->rx_fifo_depth - dw_readl(dev, DW_IC_RXFLR); + + while (buf_len > 0 && tx_limit > 0 && rx_limit > 0) { + if (msgs[dev->msg_write_idx].flags & I2C_M_RD) { + dw_writel(dev, 0x100, DW_IC_DATA_CMD); + rx_limit--; + } else + dw_writel(dev, *buf++, DW_IC_DATA_CMD); + tx_limit--; buf_len--; + } + + dev->tx_buf = buf; + dev->tx_buf_len = buf_len; + + if (buf_len > 0) { + /* more bytes to be written */ + dev->status |= STATUS_WRITE_IN_PROGRESS; + break; + } else + dev->status &= ~STATUS_WRITE_IN_PROGRESS; + } + + /* + * If i2c_msg index search is completed, we don't need TX_EMPTY + * interrupt any more. + */ + if (dev->msg_write_idx == dev->msgs_num) + intr_mask &= ~DW_IC_INTR_TX_EMPTY; + + if (dev->msg_err) + intr_mask = 0; + + dw_writel(dev, intr_mask, DW_IC_INTR_MASK); +} + +static void +i2c_dw_read(struct dw_i2c_dev *dev) +{ + struct i2c_msg *msgs = dev->msgs; + int rx_valid; + + for (; dev->msg_read_idx < dev->msgs_num; dev->msg_read_idx++) { + u32 len; + u8 *buf; + + if (!(msgs[dev->msg_read_idx].flags & I2C_M_RD)) + continue; + + if (!(dev->status & STATUS_READ_IN_PROGRESS)) { + len = msgs[dev->msg_read_idx].len; + buf = msgs[dev->msg_read_idx].buf; + } else { + len = dev->rx_buf_len; + buf = dev->rx_buf; + } + + rx_valid = dw_readl(dev, DW_IC_RXFLR); + + for (; len > 0 && rx_valid > 0; len--, rx_valid--) + *buf++ = dw_readl(dev, DW_IC_DATA_CMD); + + if (len > 0) { + dev->status |= STATUS_READ_IN_PROGRESS; + dev->rx_buf_len = len; + dev->rx_buf = buf; + return; + } else + dev->status &= ~STATUS_READ_IN_PROGRESS; + } +} + +static int i2c_dw_handle_tx_abort(struct dw_i2c_dev *dev) +{ + unsigned long abort_source = dev->abort_source; + int i; + + if (abort_source & DW_IC_TX_ABRT_NOACK) { + for_each_set_bit(i, &abort_source, ARRAY_SIZE(abort_sources)) + dev_dbg(dev->dev, + "%s: %s\n", __func__, abort_sources[i]); + return -EREMOTEIO; + } + + for_each_set_bit(i, &abort_source, ARRAY_SIZE(abort_sources)) + dev_err(dev->dev, "%s: %s\n", __func__, abort_sources[i]); + + if (abort_source & DW_IC_TX_ARB_LOST) + return -EAGAIN; + else if (abort_source & DW_IC_TX_ABRT_GCALL_READ) + return -EINVAL; /* wrong msgs[] data */ + else + return -EIO; +} + +/* + * Prepare controller for a transaction and call i2c_dw_xfer_msg + */ +int +i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) +{ + struct dw_i2c_dev *dev = i2c_get_adapdata(adap); + int ret; + + dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num); + + mutex_lock(&dev->lock); + + INIT_COMPLETION(dev->cmd_complete); + dev->msgs = msgs; + dev->msgs_num = num; + dev->cmd_err = 0; + dev->msg_write_idx = 0; + dev->msg_read_idx = 0; + dev->msg_err = 0; + dev->status = STATUS_IDLE; + dev->abort_source = 0; + + ret = i2c_dw_wait_bus_not_busy(dev); + if (ret < 0) + goto done; + + /* start the transfers */ + i2c_dw_xfer_init(dev); + + /* wait for tx to complete */ + ret = wait_for_completion_interruptible_timeout(&dev->cmd_complete, HZ); + if (ret == 0) { + dev_err(dev->dev, "controller timed out\n"); + i2c_dw_init(dev); + ret = -ETIMEDOUT; + goto done; + } else if (ret < 0) + goto done; + + if (dev->msg_err) { + ret = dev->msg_err; + goto done; + } + + /* no error */ + if (likely(!dev->cmd_err)) { + /* Disable the adapter */ + dw_writel(dev, 0, DW_IC_ENABLE); + ret = num; + goto done; + } + + /* We have an error */ + if (dev->cmd_err == DW_IC_ERR_TX_ABRT) { + ret = i2c_dw_handle_tx_abort(dev); + goto done; + } + ret = -EIO; + +done: + mutex_unlock(&dev->lock); + + return ret; +} + +u32 i2c_dw_func(struct i2c_adapter *adap) +{ + return I2C_FUNC_I2C | + I2C_FUNC_10BIT_ADDR | + I2C_FUNC_SMBUS_BYTE | + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA | + I2C_FUNC_SMBUS_I2C_BLOCK; +} + +static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev) +{ + u32 stat; + + /* + * The IC_INTR_STAT register just indicates "enabled" interrupts. + * Ths unmasked raw version of interrupt status bits are available + * in the IC_RAW_INTR_STAT register. + * + * That is, + * stat = dw_readl(IC_INTR_STAT); + * equals to, + * stat = dw_readl(IC_RAW_INTR_STAT) & dw_readl(IC_INTR_MASK); + * + * The raw version might be useful for debugging purposes. + */ + stat = dw_readl(dev, DW_IC_INTR_STAT); + + /* + * Do not use the IC_CLR_INTR register to clear interrupts, or + * you'll miss some interrupts, triggered during the period from + * dw_readl(IC_INTR_STAT) to dw_readl(IC_CLR_INTR). + * + * Instead, use the separately-prepared IC_CLR_* registers. + */ + if (stat & DW_IC_INTR_RX_UNDER) + dw_readl(dev, DW_IC_CLR_RX_UNDER); + if (stat & DW_IC_INTR_RX_OVER) + dw_readl(dev, DW_IC_CLR_RX_OVER); + if (stat & DW_IC_INTR_TX_OVER) + dw_readl(dev, DW_IC_CLR_TX_OVER); + if (stat & DW_IC_INTR_RD_REQ) + dw_readl(dev, DW_IC_CLR_RD_REQ); + if (stat & DW_IC_INTR_TX_ABRT) { + /* + * The IC_TX_ABRT_SOURCE register is cleared whenever + * the IC_CLR_TX_ABRT is read. Preserve it beforehand. + */ + dev->abort_source = dw_readl(dev, DW_IC_TX_ABRT_SOURCE); + dw_readl(dev, DW_IC_CLR_TX_ABRT); + } + if (stat & DW_IC_INTR_RX_DONE) + dw_readl(dev, DW_IC_CLR_RX_DONE); + if (stat & DW_IC_INTR_ACTIVITY) + dw_readl(dev, DW_IC_CLR_ACTIVITY); + if (stat & DW_IC_INTR_STOP_DET) + dw_readl(dev, DW_IC_CLR_STOP_DET); + if (stat & DW_IC_INTR_START_DET) + dw_readl(dev, DW_IC_CLR_START_DET); + if (stat & DW_IC_INTR_GEN_CALL) + dw_readl(dev, DW_IC_CLR_GEN_CALL); + + return stat; +} + +/* + * Interrupt service routine. This gets called whenever an I2C interrupt + * occurs. + */ +irqreturn_t i2c_dw_isr(int this_irq, void *dev_id) +{ + struct dw_i2c_dev *dev = dev_id; + u32 stat; + + stat = i2c_dw_read_clear_intrbits(dev); + dev_dbg(dev->dev, "%s: stat=0x%x\n", __func__, stat); + + if (stat & DW_IC_INTR_TX_ABRT) { + dev->cmd_err |= DW_IC_ERR_TX_ABRT; + dev->status = STATUS_IDLE; + + /* + * Anytime TX_ABRT is set, the contents of the tx/rx + * buffers are flushed. Make sure to skip them. + */ + dw_writel(dev, 0, DW_IC_INTR_MASK); + goto tx_aborted; + } + + if (stat & DW_IC_INTR_RX_FULL) + i2c_dw_read(dev); + + if (stat & DW_IC_INTR_TX_EMPTY) + i2c_dw_xfer_msg(dev); + + /* + * No need to modify or disable the interrupt mask here. + * i2c_dw_xfer_msg() will take care of it according to + * the current transmit status. + */ + +tx_aborted: + if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err) + complete(&dev->cmd_complete); + + return IRQ_HANDLED; +} diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h new file mode 100644 index 000000000000..4e37031c6b68 --- /dev/null +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -0,0 +1,194 @@ +/* + * Synopsys DesignWare I2C adapter driver (master only). + * + * Based on the TI DAVINCI I2C adapter driver. + * + * Copyright (C) 2006 Texas Instruments. + * Copyright (C) 2007 MontaVista Software Inc. + * Copyright (C) 2009 Provigent Ltd. + * + * ---------------------------------------------------------------------------- + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + * + */ + +/* + * Registers offset + */ +#define DW_IC_CON 0x0 +#define DW_IC_TAR 0x4 +#define DW_IC_DATA_CMD 0x10 +#define DW_IC_SS_SCL_HCNT 0x14 +#define DW_IC_SS_SCL_LCNT 0x18 +#define DW_IC_FS_SCL_HCNT 0x1c +#define DW_IC_FS_SCL_LCNT 0x20 +#define DW_IC_INTR_STAT 0x2c +#define DW_IC_INTR_MASK 0x30 +#define DW_IC_RAW_INTR_STAT 0x34 +#define DW_IC_RX_TL 0x38 +#define DW_IC_TX_TL 0x3c +#define DW_IC_CLR_INTR 0x40 +#define DW_IC_CLR_RX_UNDER 0x44 +#define DW_IC_CLR_RX_OVER 0x48 +#define DW_IC_CLR_TX_OVER 0x4c +#define DW_IC_CLR_RD_REQ 0x50 +#define DW_IC_CLR_TX_ABRT 0x54 +#define DW_IC_CLR_RX_DONE 0x58 +#define DW_IC_CLR_ACTIVITY 0x5c +#define DW_IC_CLR_STOP_DET 0x60 +#define DW_IC_CLR_START_DET 0x64 +#define DW_IC_CLR_GEN_CALL 0x68 +#define DW_IC_ENABLE 0x6c +#define DW_IC_STATUS 0x70 +#define DW_IC_TXFLR 0x74 +#define DW_IC_RXFLR 0x78 +#define DW_IC_TX_ABRT_SOURCE 0x80 +#define DW_IC_COMP_PARAM_1 0xf4 +#define DW_IC_COMP_TYPE 0xfc +#define DW_IC_COMP_TYPE_VALUE 0x44570140 + +#define DW_IC_CON_MASTER 0x1 +#define DW_IC_CON_SPEED_STD 0x2 +#define DW_IC_CON_SPEED_FAST 0x4 +#define DW_IC_CON_10BITADDR_MASTER 0x10 +#define DW_IC_CON_RESTART_EN 0x20 +#define DW_IC_CON_SLAVE_DISABLE 0x40 + +#define DW_IC_INTR_RX_UNDER 0x001 +#define DW_IC_INTR_RX_OVER 0x002 +#define DW_IC_INTR_RX_FULL 0x004 +#define DW_IC_INTR_TX_OVER 0x008 +#define DW_IC_INTR_TX_EMPTY 0x010 +#define DW_IC_INTR_RD_REQ 0x020 +#define DW_IC_INTR_TX_ABRT 0x040 +#define DW_IC_INTR_RX_DONE 0x080 +#define DW_IC_INTR_ACTIVITY 0x100 +#define DW_IC_INTR_STOP_DET 0x200 +#define DW_IC_INTR_START_DET 0x400 +#define DW_IC_INTR_GEN_CALL 0x800 + +#define DW_IC_INTR_DEFAULT_MASK (DW_IC_INTR_RX_FULL | \ + DW_IC_INTR_TX_EMPTY | \ + DW_IC_INTR_TX_ABRT | \ + DW_IC_INTR_STOP_DET) + +#define DW_IC_STATUS_ACTIVITY 0x1 + +#define DW_IC_ERR_TX_ABRT 0x1 + +/* + * status codes + */ +#define STATUS_IDLE 0x0 +#define STATUS_WRITE_IN_PROGRESS 0x1 +#define STATUS_READ_IN_PROGRESS 0x2 + +#define TIMEOUT 20 /* ms */ + +/* + * hardware abort codes from the DW_IC_TX_ABRT_SOURCE register + * + * only expected abort codes are listed here + * refer to the datasheet for the full list + */ +#define ABRT_7B_ADDR_NOACK 0 +#define ABRT_10ADDR1_NOACK 1 +#define ABRT_10ADDR2_NOACK 2 +#define ABRT_TXDATA_NOACK 3 +#define ABRT_GCALL_NOACK 4 +#define ABRT_GCALL_READ 5 +#define ABRT_SBYTE_ACKDET 7 +#define ABRT_SBYTE_NORSTRT 9 +#define ABRT_10B_RD_NORSTRT 10 +#define ABRT_MASTER_DIS 11 +#define ARB_LOST 12 + +#define DW_IC_TX_ABRT_7B_ADDR_NOACK (1UL << ABRT_7B_ADDR_NOACK) +#define DW_IC_TX_ABRT_10ADDR1_NOACK (1UL << ABRT_10ADDR1_NOACK) +#define DW_IC_TX_ABRT_10ADDR2_NOACK (1UL << ABRT_10ADDR2_NOACK) +#define DW_IC_TX_ABRT_TXDATA_NOACK (1UL << ABRT_TXDATA_NOACK) +#define DW_IC_TX_ABRT_GCALL_NOACK (1UL << ABRT_GCALL_NOACK) +#define DW_IC_TX_ABRT_GCALL_READ (1UL << ABRT_GCALL_READ) +#define DW_IC_TX_ABRT_SBYTE_ACKDET (1UL << ABRT_SBYTE_ACKDET) +#define DW_IC_TX_ABRT_SBYTE_NORSTRT (1UL << ABRT_SBYTE_NORSTRT) +#define DW_IC_TX_ABRT_10B_RD_NORSTRT (1UL << ABRT_10B_RD_NORSTRT) +#define DW_IC_TX_ABRT_MASTER_DIS (1UL << ABRT_MASTER_DIS) +#define DW_IC_TX_ARB_LOST (1UL << ARB_LOST) + +#define DW_IC_TX_ABRT_NOACK (DW_IC_TX_ABRT_7B_ADDR_NOACK | \ + DW_IC_TX_ABRT_10ADDR1_NOACK | \ + DW_IC_TX_ABRT_10ADDR2_NOACK | \ + DW_IC_TX_ABRT_TXDATA_NOACK | \ + DW_IC_TX_ABRT_GCALL_NOACK) +/** + * struct dw_i2c_dev - private i2c-designware data + * @dev: driver model device node + * @base: IO registers pointer + * @cmd_complete: tx completion indicator + * @lock: protect this struct and IO registers + * @clk: input reference clock + * @cmd_err: run time hadware error code + * @msgs: points to an array of messages currently being transfered + * @msgs_num: the number of elements in msgs + * @msg_write_idx: the element index of the current tx message in the msgs + * array + * @tx_buf_len: the length of the current tx buffer + * @tx_buf: the current tx buffer + * @msg_read_idx: the element index of the current rx message in the msgs + * array + * @rx_buf_len: the length of the current rx buffer + * @rx_buf: the current rx buffer + * @msg_err: error status of the current transfer + * @status: i2c master status, one of STATUS_* + * @abort_source: copy of the TX_ABRT_SOURCE register + * @irq: interrupt number for the i2c master + * @adapter: i2c subsystem adapter node + * @tx_fifo_depth: depth of the hardware tx fifo + * @rx_fifo_depth: depth of the hardware rx fifo + */ +struct dw_i2c_dev { + struct device *dev; + void __iomem *base; + struct completion cmd_complete; + struct mutex lock; + struct clk *clk; + int cmd_err; + struct i2c_msg *msgs; + int msgs_num; + int msg_write_idx; + u32 tx_buf_len; + u8 *tx_buf; + int msg_read_idx; + u32 rx_buf_len; + u8 *rx_buf; + int msg_err; + unsigned int status; + u32 abort_source; + int irq; + int swab; + struct i2c_adapter adapter; + unsigned int tx_fifo_depth; + unsigned int rx_fifo_depth; +}; + +extern u32 dw_readl(struct dw_i2c_dev *dev, int offset); +extern void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset); +extern int i2c_dw_init(struct dw_i2c_dev *dev); +extern int i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], + int num); +extern u32 i2c_dw_func(struct i2c_adapter *adap); +extern irqreturn_t i2c_dw_isr(int this_irq, void *dev_id); diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c new file mode 100644 index 000000000000..9d10ae8c6957 --- /dev/null +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -0,0 +1,199 @@ +/* + * Synopsys DesignWare I2C adapter driver (master only). + * + * Based on the TI DAVINCI I2C adapter driver. + * + * Copyright (C) 2006 Texas Instruments. + * Copyright (C) 2007 MontaVista Software Inc. + * Copyright (C) 2009 Provigent Ltd. + * + * ---------------------------------------------------------------------------- + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "i2c-designware-core.h" + +static struct i2c_algorithm i2c_dw_algo = { + .master_xfer = i2c_dw_xfer, + .functionality = i2c_dw_func, +}; + +static int __devinit dw_i2c_probe(struct platform_device *pdev) +{ + struct dw_i2c_dev *dev; + struct i2c_adapter *adap; + struct resource *mem, *ioarea; + int irq, r; + + /* NOTE: driver uses the static register mapping */ + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!mem) { + dev_err(&pdev->dev, "no mem resource?\n"); + return -EINVAL; + } + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + dev_err(&pdev->dev, "no irq resource?\n"); + return irq; /* -ENXIO */ + } + + ioarea = request_mem_region(mem->start, resource_size(mem), + pdev->name); + if (!ioarea) { + dev_err(&pdev->dev, "I2C region already claimed\n"); + return -EBUSY; + } + + dev = kzalloc(sizeof(struct dw_i2c_dev), GFP_KERNEL); + if (!dev) { + r = -ENOMEM; + goto err_release_region; + } + + init_completion(&dev->cmd_complete); + mutex_init(&dev->lock); + dev->dev = get_device(&pdev->dev); + dev->irq = irq; + platform_set_drvdata(pdev, dev); + + dev->clk = clk_get(&pdev->dev, NULL); + if (IS_ERR(dev->clk)) { + r = -ENODEV; + goto err_free_mem; + } + clk_enable(dev->clk); + + dev->base = ioremap(mem->start, resource_size(mem)); + if (dev->base == NULL) { + dev_err(&pdev->dev, "failure mapping io resources\n"); + r = -EBUSY; + goto err_unuse_clocks; + } + { + u32 param1 = dw_readl(dev, DW_IC_COMP_PARAM_1); + + dev->tx_fifo_depth = ((param1 >> 16) & 0xff) + 1; + dev->rx_fifo_depth = ((param1 >> 8) & 0xff) + 1; + } + r = i2c_dw_init(dev); + if (r) + goto err_iounmap; + + dw_writel(dev, 0, DW_IC_INTR_MASK); /* disable IRQ */ + r = request_irq(dev->irq, i2c_dw_isr, IRQF_DISABLED, pdev->name, dev); + if (r) { + dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq); + goto err_iounmap; + } + + adap = &dev->adapter; + i2c_set_adapdata(adap, dev); + adap->owner = THIS_MODULE; + adap->class = I2C_CLASS_HWMON; + strlcpy(adap->name, "Synopsys DesignWare I2C adapter", + sizeof(adap->name)); + adap->algo = &i2c_dw_algo; + adap->dev.parent = &pdev->dev; + + adap->nr = pdev->id; + r = i2c_add_numbered_adapter(adap); + if (r) { + dev_err(&pdev->dev, "failure adding adapter\n"); + goto err_free_irq; + } + + return 0; + +err_free_irq: + free_irq(dev->irq, dev); +err_iounmap: + iounmap(dev->base); +err_unuse_clocks: + clk_disable(dev->clk); + clk_put(dev->clk); + dev->clk = NULL; +err_free_mem: + platform_set_drvdata(pdev, NULL); + put_device(&pdev->dev); + kfree(dev); +err_release_region: + release_mem_region(mem->start, resource_size(mem)); + + return r; +} + +static int __devexit dw_i2c_remove(struct platform_device *pdev) +{ + struct dw_i2c_dev *dev = platform_get_drvdata(pdev); + struct resource *mem; + + platform_set_drvdata(pdev, NULL); + i2c_del_adapter(&dev->adapter); + put_device(&pdev->dev); + + clk_disable(dev->clk); + clk_put(dev->clk); + dev->clk = NULL; + + dw_writel(dev, 0, DW_IC_ENABLE); + free_irq(dev->irq, dev); + kfree(dev); + + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + release_mem_region(mem->start, resource_size(mem)); + return 0; +} + +/* work with hotplug and coldplug */ +MODULE_ALIAS("platform:i2c_designware"); + +static struct platform_driver dw_i2c_driver = { + .remove = __devexit_p(dw_i2c_remove), + .driver = { + .name = "i2c_designware", + .owner = THIS_MODULE, + }, +}; + +static int __init dw_i2c_init_driver(void) +{ + return platform_driver_probe(&dw_i2c_driver, dw_i2c_probe); +} +module_init(dw_i2c_init_driver); + +static void __exit dw_i2c_exit_driver(void) +{ + platform_driver_unregister(&dw_i2c_driver); +} +module_exit(dw_i2c_exit_driver); + +MODULE_AUTHOR("Baruch Siach "); +MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter"); +MODULE_LICENSE("GPL"); diff --git a/drivers/i2c/busses/i2c-designware.c b/drivers/i2c/busses/i2c-designware.c deleted file mode 100644 index a7abbcd3d805..000000000000 --- a/drivers/i2c/busses/i2c-designware.c +++ /dev/null @@ -1,887 +0,0 @@ -/* - * Synopsys DesignWare I2C adapter driver (master only). - * - * Based on the TI DAVINCI I2C adapter driver. - * - * Copyright (C) 2006 Texas Instruments. - * Copyright (C) 2007 MontaVista Software Inc. - * Copyright (C) 2009 Provigent Ltd. - * - * ---------------------------------------------------------------------------- - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * ---------------------------------------------------------------------------- - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* - * Registers offset - */ -#define DW_IC_CON 0x0 -#define DW_IC_TAR 0x4 -#define DW_IC_DATA_CMD 0x10 -#define DW_IC_SS_SCL_HCNT 0x14 -#define DW_IC_SS_SCL_LCNT 0x18 -#define DW_IC_FS_SCL_HCNT 0x1c -#define DW_IC_FS_SCL_LCNT 0x20 -#define DW_IC_INTR_STAT 0x2c -#define DW_IC_INTR_MASK 0x30 -#define DW_IC_RAW_INTR_STAT 0x34 -#define DW_IC_RX_TL 0x38 -#define DW_IC_TX_TL 0x3c -#define DW_IC_CLR_INTR 0x40 -#define DW_IC_CLR_RX_UNDER 0x44 -#define DW_IC_CLR_RX_OVER 0x48 -#define DW_IC_CLR_TX_OVER 0x4c -#define DW_IC_CLR_RD_REQ 0x50 -#define DW_IC_CLR_TX_ABRT 0x54 -#define DW_IC_CLR_RX_DONE 0x58 -#define DW_IC_CLR_ACTIVITY 0x5c -#define DW_IC_CLR_STOP_DET 0x60 -#define DW_IC_CLR_START_DET 0x64 -#define DW_IC_CLR_GEN_CALL 0x68 -#define DW_IC_ENABLE 0x6c -#define DW_IC_STATUS 0x70 -#define DW_IC_TXFLR 0x74 -#define DW_IC_RXFLR 0x78 -#define DW_IC_COMP_PARAM_1 0xf4 -#define DW_IC_COMP_TYPE 0xfc -#define DW_IC_TX_ABRT_SOURCE 0x80 - -#define DW_IC_CON_MASTER 0x1 -#define DW_IC_CON_SPEED_STD 0x2 -#define DW_IC_CON_SPEED_FAST 0x4 -#define DW_IC_CON_10BITADDR_MASTER 0x10 -#define DW_IC_CON_RESTART_EN 0x20 -#define DW_IC_CON_SLAVE_DISABLE 0x40 - -#define DW_IC_INTR_RX_UNDER 0x001 -#define DW_IC_INTR_RX_OVER 0x002 -#define DW_IC_INTR_RX_FULL 0x004 -#define DW_IC_INTR_TX_OVER 0x008 -#define DW_IC_INTR_TX_EMPTY 0x010 -#define DW_IC_INTR_RD_REQ 0x020 -#define DW_IC_INTR_TX_ABRT 0x040 -#define DW_IC_INTR_RX_DONE 0x080 -#define DW_IC_INTR_ACTIVITY 0x100 -#define DW_IC_INTR_STOP_DET 0x200 -#define DW_IC_INTR_START_DET 0x400 -#define DW_IC_INTR_GEN_CALL 0x800 - -#define DW_IC_INTR_DEFAULT_MASK (DW_IC_INTR_RX_FULL | \ - DW_IC_INTR_TX_EMPTY | \ - DW_IC_INTR_TX_ABRT | \ - DW_IC_INTR_STOP_DET) - -#define DW_IC_STATUS_ACTIVITY 0x1 - -#define DW_IC_ERR_TX_ABRT 0x1 - -/* - * status codes - */ -#define STATUS_IDLE 0x0 -#define STATUS_WRITE_IN_PROGRESS 0x1 -#define STATUS_READ_IN_PROGRESS 0x2 - -#define TIMEOUT 20 /* ms */ - -/* - * hardware abort codes from the DW_IC_TX_ABRT_SOURCE register - * - * only expected abort codes are listed here - * refer to the datasheet for the full list - */ -#define ABRT_7B_ADDR_NOACK 0 -#define ABRT_10ADDR1_NOACK 1 -#define ABRT_10ADDR2_NOACK 2 -#define ABRT_TXDATA_NOACK 3 -#define ABRT_GCALL_NOACK 4 -#define ABRT_GCALL_READ 5 -#define ABRT_SBYTE_ACKDET 7 -#define ABRT_SBYTE_NORSTRT 9 -#define ABRT_10B_RD_NORSTRT 10 -#define ABRT_MASTER_DIS 11 -#define ARB_LOST 12 - -#define DW_IC_TX_ABRT_7B_ADDR_NOACK (1UL << ABRT_7B_ADDR_NOACK) -#define DW_IC_TX_ABRT_10ADDR1_NOACK (1UL << ABRT_10ADDR1_NOACK) -#define DW_IC_TX_ABRT_10ADDR2_NOACK (1UL << ABRT_10ADDR2_NOACK) -#define DW_IC_TX_ABRT_TXDATA_NOACK (1UL << ABRT_TXDATA_NOACK) -#define DW_IC_TX_ABRT_GCALL_NOACK (1UL << ABRT_GCALL_NOACK) -#define DW_IC_TX_ABRT_GCALL_READ (1UL << ABRT_GCALL_READ) -#define DW_IC_TX_ABRT_SBYTE_ACKDET (1UL << ABRT_SBYTE_ACKDET) -#define DW_IC_TX_ABRT_SBYTE_NORSTRT (1UL << ABRT_SBYTE_NORSTRT) -#define DW_IC_TX_ABRT_10B_RD_NORSTRT (1UL << ABRT_10B_RD_NORSTRT) -#define DW_IC_TX_ABRT_MASTER_DIS (1UL << ABRT_MASTER_DIS) -#define DW_IC_TX_ARB_LOST (1UL << ARB_LOST) - -#define DW_IC_TX_ABRT_NOACK (DW_IC_TX_ABRT_7B_ADDR_NOACK | \ - DW_IC_TX_ABRT_10ADDR1_NOACK | \ - DW_IC_TX_ABRT_10ADDR2_NOACK | \ - DW_IC_TX_ABRT_TXDATA_NOACK | \ - DW_IC_TX_ABRT_GCALL_NOACK) - -static char *abort_sources[] = { - [ABRT_7B_ADDR_NOACK] = - "slave address not acknowledged (7bit mode)", - [ABRT_10ADDR1_NOACK] = - "first address byte not acknowledged (10bit mode)", - [ABRT_10ADDR2_NOACK] = - "second address byte not acknowledged (10bit mode)", - [ABRT_TXDATA_NOACK] = - "data not acknowledged", - [ABRT_GCALL_NOACK] = - "no acknowledgement for a general call", - [ABRT_GCALL_READ] = - "read after general call", - [ABRT_SBYTE_ACKDET] = - "start byte acknowledged", - [ABRT_SBYTE_NORSTRT] = - "trying to send start byte when restart is disabled", - [ABRT_10B_RD_NORSTRT] = - "trying to read when restart is disabled (10bit mode)", - [ABRT_MASTER_DIS] = - "trying to use disabled adapter", - [ARB_LOST] = - "lost arbitration", -}; - -/** - * struct dw_i2c_dev - private i2c-designware data - * @dev: driver model device node - * @base: IO registers pointer - * @cmd_complete: tx completion indicator - * @lock: protect this struct and IO registers - * @clk: input reference clock - * @cmd_err: run time hadware error code - * @msgs: points to an array of messages currently being transferred - * @msgs_num: the number of elements in msgs - * @msg_write_idx: the element index of the current tx message in the msgs - * array - * @tx_buf_len: the length of the current tx buffer - * @tx_buf: the current tx buffer - * @msg_read_idx: the element index of the current rx message in the msgs - * array - * @rx_buf_len: the length of the current rx buffer - * @rx_buf: the current rx buffer - * @msg_err: error status of the current transfer - * @status: i2c master status, one of STATUS_* - * @abort_source: copy of the TX_ABRT_SOURCE register - * @irq: interrupt number for the i2c master - * @swab: true if the instantiated IP is of different endianess - * @adapter: i2c subsystem adapter node - * @tx_fifo_depth: depth of the hardware tx fifo - * @rx_fifo_depth: depth of the hardware rx fifo - */ -struct dw_i2c_dev { - struct device *dev; - void __iomem *base; - struct completion cmd_complete; - struct mutex lock; - struct clk *clk; - int cmd_err; - struct i2c_msg *msgs; - int msgs_num; - int msg_write_idx; - u32 tx_buf_len; - u8 *tx_buf; - int msg_read_idx; - u32 rx_buf_len; - u8 *rx_buf; - int msg_err; - unsigned int status; - u32 abort_source; - int irq; - int swab; - struct i2c_adapter adapter; - unsigned int tx_fifo_depth; - unsigned int rx_fifo_depth; -}; - -static u32 dw_readl(struct dw_i2c_dev *dev, int offset) -{ - u32 value = readl(dev->base + offset); - - if (dev->swab) - return swab32(value); - else - return value; -} - -static void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset) -{ - if (dev->swab) - b = swab32(b); - - writel(b, dev->base + offset); -} - -static u32 -i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset) -{ - /* - * DesignWare I2C core doesn't seem to have solid strategy to meet - * the tHD;STA timing spec. Configuring _HCNT based on tHIGH spec - * will result in violation of the tHD;STA spec. - */ - if (cond) - /* - * Conditional expression: - * - * IC_[FS]S_SCL_HCNT + (1+4+3) >= IC_CLK * tHIGH - * - * This is based on the DW manuals, and represents an ideal - * configuration. The resulting I2C bus speed will be - * faster than any of the others. - * - * If your hardware is free from tHD;STA issue, try this one. - */ - return (ic_clk * tSYMBOL + 5000) / 10000 - 8 + offset; - else - /* - * Conditional expression: - * - * IC_[FS]S_SCL_HCNT + 3 >= IC_CLK * (tHD;STA + tf) - * - * This is just experimental rule; the tHD;STA period turned - * out to be proportinal to (_HCNT + 3). With this setting, - * we could meet both tHIGH and tHD;STA timing specs. - * - * If unsure, you'd better to take this alternative. - * - * The reason why we need to take into account "tf" here, - * is the same as described in i2c_dw_scl_lcnt(). - */ - return (ic_clk * (tSYMBOL + tf) + 5000) / 10000 - 3 + offset; -} - -static u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset) -{ - /* - * Conditional expression: - * - * IC_[FS]S_SCL_LCNT + 1 >= IC_CLK * (tLOW + tf) - * - * DW I2C core starts counting the SCL CNTs for the LOW period - * of the SCL clock (tLOW) as soon as it pulls the SCL line. - * In order to meet the tLOW timing spec, we need to take into - * account the fall time of SCL signal (tf). Default tf value - * should be 0.3 us, for safety. - */ - return ((ic_clk * (tLOW + tf) + 5000) / 10000) - 1 + offset; -} - -/** - * i2c_dw_init() - initialize the designware i2c master hardware - * @dev: device private data - * - * This functions configures and enables the I2C master. - * This function is called during I2C init function, and in case of timeout at - * run time. - */ -static int i2c_dw_init(struct dw_i2c_dev *dev) -{ - u32 input_clock_khz = clk_get_rate(dev->clk) / 1000; - u32 ic_con, hcnt, lcnt; - u32 reg; - - /* Configure register endianess access */ - reg = dw_readl(dev, DW_IC_COMP_TYPE); - if (reg == ___constant_swab32(DW_IC_COMP_TYPE_VALUE)) { - dev->swab = 1; - reg = DW_IC_COMP_TYPE_VALUE; - } - - if (reg != DW_IC_COMP_TYPE_VALUE) { - dev_err(dev->dev, "Unknown Synopsys component type: " - "0x%08x\n", reg); - return -ENODEV; - } - - /* Disable the adapter */ - dw_writel(dev, 0, DW_IC_ENABLE); - - /* set standard and fast speed deviders for high/low periods */ - - /* Standard-mode */ - hcnt = i2c_dw_scl_hcnt(input_clock_khz, - 40, /* tHD;STA = tHIGH = 4.0 us */ - 3, /* tf = 0.3 us */ - 0, /* 0: DW default, 1: Ideal */ - 0); /* No offset */ - lcnt = i2c_dw_scl_lcnt(input_clock_khz, - 47, /* tLOW = 4.7 us */ - 3, /* tf = 0.3 us */ - 0); /* No offset */ - dw_writel(dev, hcnt, DW_IC_SS_SCL_HCNT); - dw_writel(dev, lcnt, DW_IC_SS_SCL_LCNT); - dev_dbg(dev->dev, "Standard-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt); - - /* Fast-mode */ - hcnt = i2c_dw_scl_hcnt(input_clock_khz, - 6, /* tHD;STA = tHIGH = 0.6 us */ - 3, /* tf = 0.3 us */ - 0, /* 0: DW default, 1: Ideal */ - 0); /* No offset */ - lcnt = i2c_dw_scl_lcnt(input_clock_khz, - 13, /* tLOW = 1.3 us */ - 3, /* tf = 0.3 us */ - 0); /* No offset */ - dw_writel(dev, hcnt, DW_IC_FS_SCL_HCNT); - dw_writel(dev, lcnt, DW_IC_FS_SCL_LCNT); - dev_dbg(dev->dev, "Fast-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt); - - /* Configure Tx/Rx FIFO threshold levels */ - dw_writel(dev, dev->tx_fifo_depth - 1, DW_IC_TX_TL); - dw_writel(dev, 0, DW_IC_RX_TL); - - /* configure the i2c master */ - ic_con = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | - DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_FAST; - dw_writel(dev, ic_con, DW_IC_CON); - return 0; -} - -/* - * Waiting for bus not busy - */ -static int i2c_dw_wait_bus_not_busy(struct dw_i2c_dev *dev) -{ - int timeout = TIMEOUT; - - while (dw_readl(dev, DW_IC_STATUS) & DW_IC_STATUS_ACTIVITY) { - if (timeout <= 0) { - dev_warn(dev->dev, "timeout waiting for bus ready\n"); - return -ETIMEDOUT; - } - timeout--; - mdelay(1); - } - - return 0; -} - -static void i2c_dw_xfer_init(struct dw_i2c_dev *dev) -{ - struct i2c_msg *msgs = dev->msgs; - u32 ic_con; - - /* Disable the adapter */ - dw_writel(dev, 0, DW_IC_ENABLE); - - /* set the slave (target) address */ - dw_writel(dev, msgs[dev->msg_write_idx].addr, DW_IC_TAR); - - /* if the slave address is ten bit address, enable 10BITADDR */ - ic_con = dw_readl(dev, DW_IC_CON); - if (msgs[dev->msg_write_idx].flags & I2C_M_TEN) - ic_con |= DW_IC_CON_10BITADDR_MASTER; - else - ic_con &= ~DW_IC_CON_10BITADDR_MASTER; - dw_writel(dev, ic_con, DW_IC_CON); - - /* Enable the adapter */ - dw_writel(dev, 1, DW_IC_ENABLE); - - /* Enable interrupts */ - dw_writel(dev, DW_IC_INTR_DEFAULT_MASK, DW_IC_INTR_MASK); -} - -/* - * Initiate (and continue) low level master read/write transaction. - * This function is only called from i2c_dw_isr, and pumping i2c_msg - * messages into the tx buffer. Even if the size of i2c_msg data is - * longer than the size of the tx buffer, it handles everything. - */ -static void -i2c_dw_xfer_msg(struct dw_i2c_dev *dev) -{ - struct i2c_msg *msgs = dev->msgs; - u32 intr_mask; - int tx_limit, rx_limit; - u32 addr = msgs[dev->msg_write_idx].addr; - u32 buf_len = dev->tx_buf_len; - u8 *buf = dev->tx_buf; - - intr_mask = DW_IC_INTR_DEFAULT_MASK; - - for (; dev->msg_write_idx < dev->msgs_num; dev->msg_write_idx++) { - /* - * if target address has changed, we need to - * reprogram the target address in the i2c - * adapter when we are done with this transfer - */ - if (msgs[dev->msg_write_idx].addr != addr) { - dev_err(dev->dev, - "%s: invalid target address\n", __func__); - dev->msg_err = -EINVAL; - break; - } - - if (msgs[dev->msg_write_idx].len == 0) { - dev_err(dev->dev, - "%s: invalid message length\n", __func__); - dev->msg_err = -EINVAL; - break; - } - - if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) { - /* new i2c_msg */ - buf = msgs[dev->msg_write_idx].buf; - buf_len = msgs[dev->msg_write_idx].len; - } - - tx_limit = dev->tx_fifo_depth - dw_readl(dev, DW_IC_TXFLR); - rx_limit = dev->rx_fifo_depth - dw_readl(dev, DW_IC_RXFLR); - - while (buf_len > 0 && tx_limit > 0 && rx_limit > 0) { - if (msgs[dev->msg_write_idx].flags & I2C_M_RD) { - dw_writel(dev, 0x100, DW_IC_DATA_CMD); - rx_limit--; - } else - dw_writel(dev, *buf++, DW_IC_DATA_CMD); - tx_limit--; buf_len--; - } - - dev->tx_buf = buf; - dev->tx_buf_len = buf_len; - - if (buf_len > 0) { - /* more bytes to be written */ - dev->status |= STATUS_WRITE_IN_PROGRESS; - break; - } else - dev->status &= ~STATUS_WRITE_IN_PROGRESS; - } - - /* - * If i2c_msg index search is completed, we don't need TX_EMPTY - * interrupt any more. - */ - if (dev->msg_write_idx == dev->msgs_num) - intr_mask &= ~DW_IC_INTR_TX_EMPTY; - - if (dev->msg_err) - intr_mask = 0; - - dw_writel(dev, intr_mask, DW_IC_INTR_MASK); -} - -static void -i2c_dw_read(struct dw_i2c_dev *dev) -{ - struct i2c_msg *msgs = dev->msgs; - int rx_valid; - - for (; dev->msg_read_idx < dev->msgs_num; dev->msg_read_idx++) { - u32 len; - u8 *buf; - - if (!(msgs[dev->msg_read_idx].flags & I2C_M_RD)) - continue; - - if (!(dev->status & STATUS_READ_IN_PROGRESS)) { - len = msgs[dev->msg_read_idx].len; - buf = msgs[dev->msg_read_idx].buf; - } else { - len = dev->rx_buf_len; - buf = dev->rx_buf; - } - - rx_valid = dw_readl(dev, DW_IC_RXFLR); - - for (; len > 0 && rx_valid > 0; len--, rx_valid--) - *buf++ = dw_readl(dev, DW_IC_DATA_CMD); - - if (len > 0) { - dev->status |= STATUS_READ_IN_PROGRESS; - dev->rx_buf_len = len; - dev->rx_buf = buf; - return; - } else - dev->status &= ~STATUS_READ_IN_PROGRESS; - } -} - -static int i2c_dw_handle_tx_abort(struct dw_i2c_dev *dev) -{ - unsigned long abort_source = dev->abort_source; - int i; - - if (abort_source & DW_IC_TX_ABRT_NOACK) { - for_each_set_bit(i, &abort_source, ARRAY_SIZE(abort_sources)) - dev_dbg(dev->dev, - "%s: %s\n", __func__, abort_sources[i]); - return -EREMOTEIO; - } - - for_each_set_bit(i, &abort_source, ARRAY_SIZE(abort_sources)) - dev_err(dev->dev, "%s: %s\n", __func__, abort_sources[i]); - - if (abort_source & DW_IC_TX_ARB_LOST) - return -EAGAIN; - else if (abort_source & DW_IC_TX_ABRT_GCALL_READ) - return -EINVAL; /* wrong msgs[] data */ - else - return -EIO; -} - -/* - * Prepare controller for a transaction and call i2c_dw_xfer_msg - */ -static int -i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) -{ - struct dw_i2c_dev *dev = i2c_get_adapdata(adap); - int ret; - - dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num); - - mutex_lock(&dev->lock); - - INIT_COMPLETION(dev->cmd_complete); - dev->msgs = msgs; - dev->msgs_num = num; - dev->cmd_err = 0; - dev->msg_write_idx = 0; - dev->msg_read_idx = 0; - dev->msg_err = 0; - dev->status = STATUS_IDLE; - dev->abort_source = 0; - - ret = i2c_dw_wait_bus_not_busy(dev); - if (ret < 0) - goto done; - - /* start the transfers */ - i2c_dw_xfer_init(dev); - - /* wait for tx to complete */ - ret = wait_for_completion_interruptible_timeout(&dev->cmd_complete, HZ); - if (ret == 0) { - dev_err(dev->dev, "controller timed out\n"); - i2c_dw_init(dev); - ret = -ETIMEDOUT; - goto done; - } else if (ret < 0) - goto done; - - if (dev->msg_err) { - ret = dev->msg_err; - goto done; - } - - /* no error */ - if (likely(!dev->cmd_err)) { - /* Disable the adapter */ - dw_writel(dev, 0, DW_IC_ENABLE); - ret = num; - goto done; - } - - /* We have an error */ - if (dev->cmd_err == DW_IC_ERR_TX_ABRT) { - ret = i2c_dw_handle_tx_abort(dev); - goto done; - } - ret = -EIO; - -done: - mutex_unlock(&dev->lock); - - return ret; -} - -static u32 i2c_dw_func(struct i2c_adapter *adap) -{ - return I2C_FUNC_I2C | - I2C_FUNC_10BIT_ADDR | - I2C_FUNC_SMBUS_BYTE | - I2C_FUNC_SMBUS_BYTE_DATA | - I2C_FUNC_SMBUS_WORD_DATA | - I2C_FUNC_SMBUS_I2C_BLOCK; -} - -static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev) -{ - u32 stat; - - /* - * The IC_INTR_STAT register just indicates "enabled" interrupts. - * Ths unmasked raw version of interrupt status bits are available - * in the IC_RAW_INTR_STAT register. - * - * That is, - * stat = readl(IC_INTR_STAT); - * equals to, - * stat = readl(IC_RAW_INTR_STAT) & readl(IC_INTR_MASK); - * - * The raw version might be useful for debugging purposes. - */ - stat = dw_readl(dev, DW_IC_INTR_STAT); - - /* - * Do not use the IC_CLR_INTR register to clear interrupts, or - * you'll miss some interrupts, triggered during the period from - * readl(IC_INTR_STAT) to readl(IC_CLR_INTR). - * - * Instead, use the separately-prepared IC_CLR_* registers. - */ - if (stat & DW_IC_INTR_RX_UNDER) - dw_readl(dev, DW_IC_CLR_RX_UNDER); - if (stat & DW_IC_INTR_RX_OVER) - dw_readl(dev, DW_IC_CLR_RX_OVER); - if (stat & DW_IC_INTR_TX_OVER) - dw_readl(dev, DW_IC_CLR_TX_OVER); - if (stat & DW_IC_INTR_RD_REQ) - dw_readl(dev, DW_IC_CLR_RD_REQ); - if (stat & DW_IC_INTR_TX_ABRT) { - /* - * The IC_TX_ABRT_SOURCE register is cleared whenever - * the IC_CLR_TX_ABRT is read. Preserve it beforehand. - */ - dev->abort_source = dw_readl(dev, DW_IC_TX_ABRT_SOURCE); - dw_readl(dev, DW_IC_CLR_TX_ABRT); - } - if (stat & DW_IC_INTR_RX_DONE) - dw_readl(dev, DW_IC_CLR_RX_DONE); - if (stat & DW_IC_INTR_ACTIVITY) - dw_readl(dev, DW_IC_CLR_ACTIVITY); - if (stat & DW_IC_INTR_STOP_DET) - dw_readl(dev, DW_IC_CLR_STOP_DET); - if (stat & DW_IC_INTR_START_DET) - dw_readl(dev, DW_IC_CLR_START_DET); - if (stat & DW_IC_INTR_GEN_CALL) - dw_readl(dev, DW_IC_CLR_GEN_CALL); - - return stat; -} - -/* - * Interrupt service routine. This gets called whenever an I2C interrupt - * occurs. - */ -static irqreturn_t i2c_dw_isr(int this_irq, void *dev_id) -{ - struct dw_i2c_dev *dev = dev_id; - u32 stat; - - stat = i2c_dw_read_clear_intrbits(dev); - dev_dbg(dev->dev, "%s: stat=0x%x\n", __func__, stat); - - if (stat & DW_IC_INTR_TX_ABRT) { - dev->cmd_err |= DW_IC_ERR_TX_ABRT; - dev->status = STATUS_IDLE; - - /* - * Anytime TX_ABRT is set, the contents of the tx/rx - * buffers are flushed. Make sure to skip them. - */ - dw_writel(dev, 0, DW_IC_INTR_MASK); - goto tx_aborted; - } - - if (stat & DW_IC_INTR_RX_FULL) - i2c_dw_read(dev); - - if (stat & DW_IC_INTR_TX_EMPTY) - i2c_dw_xfer_msg(dev); - - /* - * No need to modify or disable the interrupt mask here. - * i2c_dw_xfer_msg() will take care of it according to - * the current transmit status. - */ - -tx_aborted: - if ((stat & (DW_IC_INTR_TX_ABRT | DW_IC_INTR_STOP_DET)) || dev->msg_err) - complete(&dev->cmd_complete); - - return IRQ_HANDLED; -} - -static struct i2c_algorithm i2c_dw_algo = { - .master_xfer = i2c_dw_xfer, - .functionality = i2c_dw_func, -}; - -static int __devinit dw_i2c_probe(struct platform_device *pdev) -{ - struct dw_i2c_dev *dev; - struct i2c_adapter *adap; - struct resource *mem, *ioarea; - int irq, r; - u32 reg; - - /* NOTE: driver uses the static register mapping */ - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!mem) { - dev_err(&pdev->dev, "no mem resource?\n"); - return -EINVAL; - } - - irq = platform_get_irq(pdev, 0); - if (irq < 0) { - dev_err(&pdev->dev, "no irq resource?\n"); - return irq; /* -ENXIO */ - } - - ioarea = request_mem_region(mem->start, resource_size(mem), - pdev->name); - if (!ioarea) { - dev_err(&pdev->dev, "I2C region already claimed\n"); - return -EBUSY; - } - - dev = kzalloc(sizeof(struct dw_i2c_dev), GFP_KERNEL); - if (!dev) { - r = -ENOMEM; - goto err_release_region; - } - - init_completion(&dev->cmd_complete); - mutex_init(&dev->lock); - dev->dev = get_device(&pdev->dev); - dev->irq = irq; - platform_set_drvdata(pdev, dev); - - dev->clk = clk_get(&pdev->dev, NULL); - if (IS_ERR(dev->clk)) { - r = -ENODEV; - goto err_free_mem; - } - clk_enable(dev->clk); - - dev->base = ioremap(mem->start, resource_size(mem)); - if (dev->base == NULL) { - dev_err(&pdev->dev, "failure mapping io resources\n"); - r = -EBUSY; - goto err_unuse_clocks; - } - - r = i2c_dw_init(dev); - if (r) - goto err_unuse_clocks; - - reg = dw_readl(dev, DW_IC_COMP_PARAM_1); - dev->tx_fifo_depth = ((reg >> 16) & 0xff) + 1; - dev->rx_fifo_depth = ((reg >> 8) & 0xff) + 1; - - - dw_writel(dev, 0, DW_IC_INTR_MASK); /* disable IRQ */ - r = request_irq(dev->irq, i2c_dw_isr, IRQF_DISABLED, pdev->name, dev); - if (r) { - dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq); - goto err_iounmap; - } - - adap = &dev->adapter; - i2c_set_adapdata(adap, dev); - adap->owner = THIS_MODULE; - adap->class = I2C_CLASS_HWMON; - strlcpy(adap->name, "Synopsys DesignWare I2C adapter", - sizeof(adap->name)); - adap->algo = &i2c_dw_algo; - adap->dev.parent = &pdev->dev; - - adap->nr = pdev->id; - r = i2c_add_numbered_adapter(adap); - if (r) { - dev_err(&pdev->dev, "failure adding adapter\n"); - goto err_free_irq; - } - - return 0; - -err_free_irq: - free_irq(dev->irq, dev); -err_iounmap: - iounmap(dev->base); -err_unuse_clocks: - clk_disable(dev->clk); - clk_put(dev->clk); - dev->clk = NULL; -err_free_mem: - platform_set_drvdata(pdev, NULL); - put_device(&pdev->dev); - kfree(dev); -err_release_region: - release_mem_region(mem->start, resource_size(mem)); - - return r; -} - -static int __devexit dw_i2c_remove(struct platform_device *pdev) -{ - struct dw_i2c_dev *dev = platform_get_drvdata(pdev); - struct resource *mem; - - platform_set_drvdata(pdev, NULL); - i2c_del_adapter(&dev->adapter); - put_device(&pdev->dev); - - clk_disable(dev->clk); - clk_put(dev->clk); - dev->clk = NULL; - - dw_writel(dev, 0, DW_IC_ENABLE); - free_irq(dev->irq, dev); - kfree(dev); - - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - release_mem_region(mem->start, resource_size(mem)); - return 0; -} - -/* work with hotplug and coldplug */ -MODULE_ALIAS("platform:i2c_designware"); - -static struct platform_driver dw_i2c_driver = { - .remove = __devexit_p(dw_i2c_remove), - .driver = { - .name = "i2c_designware", - .owner = THIS_MODULE, - }, -}; - -static int __init dw_i2c_init_driver(void) -{ - return platform_driver_probe(&dw_i2c_driver, dw_i2c_probe); -} -module_init(dw_i2c_init_driver); - -static void __exit dw_i2c_exit_driver(void) -{ - platform_driver_unregister(&dw_i2c_driver); -} -module_exit(dw_i2c_exit_driver); - -MODULE_AUTHOR("Baruch Siach "); -MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter"); -MODULE_LICENSE("GPL"); -- cgit v1.2.3 From 1d31b58f648c4f754b23fed4d57acc941080e5ee Mon Sep 17 00:00:00 2001 From: Dirk Brandewie Date: Thu, 6 Oct 2011 11:26:30 -0700 Subject: i2c-designware: Move retriveving the clock speed out of core code. The clock frequecy supplied to the IP core is specific to a single instance of the driver. This patch makes it possible to have multiple Designware I2C cores in the system possibly running at different core frequencies. Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware-core.c | 4 +++- drivers/i2c/busses/i2c-designware-core.h | 1 + drivers/i2c/busses/i2c-designware-platdrv.c | 6 ++++++ 3 files changed, 10 insertions(+), 1 deletion(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c index 38d5a6b22a84..cd52f17028cd 100644 --- a/drivers/i2c/busses/i2c-designware-core.c +++ b/drivers/i2c/busses/i2c-designware-core.c @@ -142,10 +142,12 @@ static u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset) */ int i2c_dw_init(struct dw_i2c_dev *dev) { - u32 input_clock_khz = clk_get_rate(dev->clk) / 1000; + u32 input_clock_khz; u32 ic_con, hcnt, lcnt; u32 reg; + input_clock_khz = dev->get_clk_rate_khz(dev); + /* Configure register endianess access */ reg = dw_readl(dev, DW_IC_COMP_TYPE); if (reg == ___constant_swab32(DW_IC_COMP_TYPE_VALUE)) { diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 4e37031c6b68..43de340af57f 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -166,6 +166,7 @@ struct dw_i2c_dev { struct completion cmd_complete; struct mutex lock; struct clk *clk; + u32 (*get_clk_rate_khz) (struct dw_i2c_dev *dev); int cmd_err; struct i2c_msg *msgs; int msgs_num; diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index 9d10ae8c6957..08783a6ff1a2 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -43,6 +43,10 @@ static struct i2c_algorithm i2c_dw_algo = { .master_xfer = i2c_dw_xfer, .functionality = i2c_dw_func, }; +static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev) +{ + return clk_get_rate(dev->clk)/1000; +} static int __devinit dw_i2c_probe(struct platform_device *pdev) { @@ -84,6 +88,8 @@ static int __devinit dw_i2c_probe(struct platform_device *pdev) platform_set_drvdata(pdev, dev); dev->clk = clk_get(&pdev->dev, NULL); + dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz; + if (IS_ERR(dev->clk)) { r = -ENODEV; goto err_free_mem; -- cgit v1.2.3 From 2fa8326b4b1e5fdc889b57b03b1313f3229cb438 Mon Sep 17 00:00:00 2001 From: Dirk Brandewie Date: Thu, 6 Oct 2011 11:26:31 -0700 Subject: i2c-designware: move i2c functionality bit field to be adapter specific The functionality of the adapter depends on the configuration of the IP block at silicon compile time and is adapter specific. Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware-core.c | 8 ++------ drivers/i2c/busses/i2c-designware-core.h | 1 + drivers/i2c/busses/i2c-designware-platdrv.c | 8 ++++++++ 3 files changed, 11 insertions(+), 6 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c index cd52f17028cd..71055114bd80 100644 --- a/drivers/i2c/busses/i2c-designware-core.c +++ b/drivers/i2c/busses/i2c-designware-core.c @@ -457,12 +457,8 @@ done: u32 i2c_dw_func(struct i2c_adapter *adap) { - return I2C_FUNC_I2C | - I2C_FUNC_10BIT_ADDR | - I2C_FUNC_SMBUS_BYTE | - I2C_FUNC_SMBUS_BYTE_DATA | - I2C_FUNC_SMBUS_WORD_DATA | - I2C_FUNC_SMBUS_I2C_BLOCK; + struct dw_i2c_dev *dev = i2c_get_adapdata(adap); + return dev->functionality; } static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev) diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 43de340af57f..ab4e655a6c61 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -182,6 +182,7 @@ struct dw_i2c_dev { int irq; int swab; struct i2c_adapter adapter; + u32 functionality; unsigned int tx_fifo_depth; unsigned int rx_fifo_depth; }; diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index 08783a6ff1a2..36db7a80cbb2 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -96,6 +96,14 @@ static int __devinit dw_i2c_probe(struct platform_device *pdev) } clk_enable(dev->clk); + dev->functionality = + I2C_FUNC_I2C | + I2C_FUNC_10BIT_ADDR | + I2C_FUNC_SMBUS_BYTE | + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA | + I2C_FUNC_SMBUS_I2C_BLOCK; + dev->base = ioremap(mem->start, resource_size(mem)); if (dev->base == NULL) { dev_err(&pdev->dev, "failure mapping io resources\n"); -- cgit v1.2.3 From e18563fc560aba0d95a5a73145812a081fb38fac Mon Sep 17 00:00:00 2001 From: Dirk Brandewie Date: Thu, 6 Oct 2011 11:26:32 -0700 Subject: i2c-designware: move controller config to bus specific portion of driver With multiple I2C adapters possible in the system each running at (possibly) different speeds we need to move the controller configuration bit field to the adapter. Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware-core.c | 6 ++---- drivers/i2c/busses/i2c-designware-core.h | 1 + drivers/i2c/busses/i2c-designware-platdrv.c | 2 ++ 3 files changed, 5 insertions(+), 4 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c index 71055114bd80..6195df3c1c29 100644 --- a/drivers/i2c/busses/i2c-designware-core.c +++ b/drivers/i2c/busses/i2c-designware-core.c @@ -143,7 +143,7 @@ static u32 i2c_dw_scl_lcnt(u32 ic_clk, u32 tLOW, u32 tf, int offset) int i2c_dw_init(struct dw_i2c_dev *dev) { u32 input_clock_khz; - u32 ic_con, hcnt, lcnt; + u32 hcnt, lcnt; u32 reg; input_clock_khz = dev->get_clk_rate_khz(dev); @@ -199,9 +199,7 @@ int i2c_dw_init(struct dw_i2c_dev *dev) dw_writel(dev, 0, DW_IC_RX_TL); /* configure the i2c master */ - ic_con = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | - DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_FAST; - dw_writel(dev, ic_con, DW_IC_CON); + dw_writel(dev, dev->master_cfg , DW_IC_CON); return 0; } diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index ab4e655a6c61..29386215fe3c 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -183,6 +183,7 @@ struct dw_i2c_dev { int swab; struct i2c_adapter adapter; u32 functionality; + u32 master_cfg; unsigned int tx_fifo_depth; unsigned int rx_fifo_depth; }; diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index 36db7a80cbb2..1258cae3555d 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -103,6 +103,8 @@ static int __devinit dw_i2c_probe(struct platform_device *pdev) I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_I2C_BLOCK; + dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | + DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_FAST; dev->base = ioremap(mem->start, resource_size(mem)); if (dev->base == NULL) { -- cgit v1.2.3 From af06cf6c8cb600803951ddabe6fb034126752488 Mon Sep 17 00:00:00 2001 From: Dirk Brandewie Date: Thu, 6 Oct 2011 11:26:33 -0700 Subject: i2c-designware: Support multiple cores using same ISR Add check to make sure that the core is enabled and has outstanding interrupts. The activity bit is masked due to the fact that it will stay active even after the controller has been disabled until the contoller internal state machines have settled. Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware-core.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c index 6195df3c1c29..e8b83d9029e1 100644 --- a/drivers/i2c/busses/i2c-designware-core.c +++ b/drivers/i2c/busses/i2c-designware-core.c @@ -521,10 +521,16 @@ static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev *dev) irqreturn_t i2c_dw_isr(int this_irq, void *dev_id) { struct dw_i2c_dev *dev = dev_id; - u32 stat; + u32 stat, enabled; + + enabled = dw_readl(dev, DW_IC_ENABLE); + stat = dw_readl(dev, DW_IC_RAW_INTR_STAT); + dev_dbg(dev->dev, "%s: %s enabled= 0x%x stat=0x%x\n", __func__, + dev->adapter.name, enabled, stat); + if (!enabled || !(stat & ~DW_IC_INTR_ACTIVITY)) + return IRQ_NONE; stat = i2c_dw_read_clear_intrbits(dev); - dev_dbg(dev->dev, "%s: stat=0x%x\n", __func__, stat); if (stat & DW_IC_INTR_TX_ABRT) { dev->cmd_err |= DW_IC_ERR_TX_ABRT; -- cgit v1.2.3 From f3fa9f3da5621154323775ff0efdba99dcebcee4 Mon Sep 17 00:00:00 2001 From: Dirk Brandewie Date: Thu, 6 Oct 2011 11:26:34 -0700 Subject: i2c-designware: Push all register reads/writes into the core code. Move all register manipulation code into the core, also move register offset definitions to i2c-designware-core.c since the bus specific portions of the driver no longer need/use them. Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware-core.c | 135 ++++++++++++++++++++++++++++ drivers/i2c/busses/i2c-designware-core.h | 104 ++------------------- drivers/i2c/busses/i2c-designware-platdrv.c | 6 +- 3 files changed, 143 insertions(+), 102 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c index e8b83d9029e1..b9f18ddaaa76 100644 --- a/drivers/i2c/busses/i2c-designware-core.c +++ b/drivers/i2c/busses/i2c-designware-core.c @@ -34,6 +34,108 @@ #include #include "i2c-designware-core.h" +/* + * Registers offset + */ +#define DW_IC_CON 0x0 +#define DW_IC_TAR 0x4 +#define DW_IC_DATA_CMD 0x10 +#define DW_IC_SS_SCL_HCNT 0x14 +#define DW_IC_SS_SCL_LCNT 0x18 +#define DW_IC_FS_SCL_HCNT 0x1c +#define DW_IC_FS_SCL_LCNT 0x20 +#define DW_IC_INTR_STAT 0x2c +#define DW_IC_INTR_MASK 0x30 +#define DW_IC_RAW_INTR_STAT 0x34 +#define DW_IC_RX_TL 0x38 +#define DW_IC_TX_TL 0x3c +#define DW_IC_CLR_INTR 0x40 +#define DW_IC_CLR_RX_UNDER 0x44 +#define DW_IC_CLR_RX_OVER 0x48 +#define DW_IC_CLR_TX_OVER 0x4c +#define DW_IC_CLR_RD_REQ 0x50 +#define DW_IC_CLR_TX_ABRT 0x54 +#define DW_IC_CLR_RX_DONE 0x58 +#define DW_IC_CLR_ACTIVITY 0x5c +#define DW_IC_CLR_STOP_DET 0x60 +#define DW_IC_CLR_START_DET 0x64 +#define DW_IC_CLR_GEN_CALL 0x68 +#define DW_IC_ENABLE 0x6c +#define DW_IC_STATUS 0x70 +#define DW_IC_TXFLR 0x74 +#define DW_IC_RXFLR 0x78 +#define DW_IC_TX_ABRT_SOURCE 0x80 +#define DW_IC_COMP_PARAM_1 0xf4 +#define DW_IC_COMP_TYPE 0xfc +#define DW_IC_COMP_TYPE_VALUE 0x44570140 + +#define DW_IC_INTR_RX_UNDER 0x001 +#define DW_IC_INTR_RX_OVER 0x002 +#define DW_IC_INTR_RX_FULL 0x004 +#define DW_IC_INTR_TX_OVER 0x008 +#define DW_IC_INTR_TX_EMPTY 0x010 +#define DW_IC_INTR_RD_REQ 0x020 +#define DW_IC_INTR_TX_ABRT 0x040 +#define DW_IC_INTR_RX_DONE 0x080 +#define DW_IC_INTR_ACTIVITY 0x100 +#define DW_IC_INTR_STOP_DET 0x200 +#define DW_IC_INTR_START_DET 0x400 +#define DW_IC_INTR_GEN_CALL 0x800 + +#define DW_IC_INTR_DEFAULT_MASK (DW_IC_INTR_RX_FULL | \ + DW_IC_INTR_TX_EMPTY | \ + DW_IC_INTR_TX_ABRT | \ + DW_IC_INTR_STOP_DET) + +#define DW_IC_STATUS_ACTIVITY 0x1 + +#define DW_IC_ERR_TX_ABRT 0x1 + +/* + * status codes + */ +#define STATUS_IDLE 0x0 +#define STATUS_WRITE_IN_PROGRESS 0x1 +#define STATUS_READ_IN_PROGRESS 0x2 + +#define TIMEOUT 20 /* ms */ + +/* + * hardware abort codes from the DW_IC_TX_ABRT_SOURCE register + * + * only expected abort codes are listed here + * refer to the datasheet for the full list + */ +#define ABRT_7B_ADDR_NOACK 0 +#define ABRT_10ADDR1_NOACK 1 +#define ABRT_10ADDR2_NOACK 2 +#define ABRT_TXDATA_NOACK 3 +#define ABRT_GCALL_NOACK 4 +#define ABRT_GCALL_READ 5 +#define ABRT_SBYTE_ACKDET 7 +#define ABRT_SBYTE_NORSTRT 9 +#define ABRT_10B_RD_NORSTRT 10 +#define ABRT_MASTER_DIS 11 +#define ARB_LOST 12 + +#define DW_IC_TX_ABRT_7B_ADDR_NOACK (1UL << ABRT_7B_ADDR_NOACK) +#define DW_IC_TX_ABRT_10ADDR1_NOACK (1UL << ABRT_10ADDR1_NOACK) +#define DW_IC_TX_ABRT_10ADDR2_NOACK (1UL << ABRT_10ADDR2_NOACK) +#define DW_IC_TX_ABRT_TXDATA_NOACK (1UL << ABRT_TXDATA_NOACK) +#define DW_IC_TX_ABRT_GCALL_NOACK (1UL << ABRT_GCALL_NOACK) +#define DW_IC_TX_ABRT_GCALL_READ (1UL << ABRT_GCALL_READ) +#define DW_IC_TX_ABRT_SBYTE_ACKDET (1UL << ABRT_SBYTE_ACKDET) +#define DW_IC_TX_ABRT_SBYTE_NORSTRT (1UL << ABRT_SBYTE_NORSTRT) +#define DW_IC_TX_ABRT_10B_RD_NORSTRT (1UL << ABRT_10B_RD_NORSTRT) +#define DW_IC_TX_ABRT_MASTER_DIS (1UL << ABRT_MASTER_DIS) +#define DW_IC_TX_ARB_LOST (1UL << ARB_LOST) + +#define DW_IC_TX_ABRT_NOACK (DW_IC_TX_ABRT_7B_ADDR_NOACK | \ + DW_IC_TX_ABRT_10ADDR1_NOACK | \ + DW_IC_TX_ABRT_10ADDR2_NOACK | \ + DW_IC_TX_ABRT_TXDATA_NOACK | \ + DW_IC_TX_ABRT_GCALL_NOACK) + static char *abort_sources[] = { [ABRT_7B_ADDR_NOACK] = "slave address not acknowledged (7bit mode)", @@ -562,3 +664,36 @@ tx_aborted: return IRQ_HANDLED; } + +void i2c_dw_enable(struct dw_i2c_dev *dev) +{ + /* Enable the adapter */ + dw_writel(dev, 1, DW_IC_ENABLE); +} + +void i2c_dw_disable(struct dw_i2c_dev *dev) +{ + int ret; + + /* Disable controller */ + dw_writel(dev, 0, DW_IC_ENABLE); + + /* Disable all interupts */ + dw_writel(dev, 0, DW_IC_INTR_MASK); + dw_readl(dev, DW_IC_CLR_INTR); +} + +void i2c_dw_clear_int(struct dw_i2c_dev *dev) +{ + dw_readl(dev, DW_IC_CLR_INTR); +} + +void i2c_dw_disable_int(struct dw_i2c_dev *dev) +{ + dw_writel(dev, 0, DW_IC_INTR_MASK); +} + +u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev) +{ + return dw_readl(dev, DW_IC_COMP_PARAM_1); +} diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 29386215fe3c..dc016e2afe9c 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -26,40 +26,6 @@ * */ -/* - * Registers offset - */ -#define DW_IC_CON 0x0 -#define DW_IC_TAR 0x4 -#define DW_IC_DATA_CMD 0x10 -#define DW_IC_SS_SCL_HCNT 0x14 -#define DW_IC_SS_SCL_LCNT 0x18 -#define DW_IC_FS_SCL_HCNT 0x1c -#define DW_IC_FS_SCL_LCNT 0x20 -#define DW_IC_INTR_STAT 0x2c -#define DW_IC_INTR_MASK 0x30 -#define DW_IC_RAW_INTR_STAT 0x34 -#define DW_IC_RX_TL 0x38 -#define DW_IC_TX_TL 0x3c -#define DW_IC_CLR_INTR 0x40 -#define DW_IC_CLR_RX_UNDER 0x44 -#define DW_IC_CLR_RX_OVER 0x48 -#define DW_IC_CLR_TX_OVER 0x4c -#define DW_IC_CLR_RD_REQ 0x50 -#define DW_IC_CLR_TX_ABRT 0x54 -#define DW_IC_CLR_RX_DONE 0x58 -#define DW_IC_CLR_ACTIVITY 0x5c -#define DW_IC_CLR_STOP_DET 0x60 -#define DW_IC_CLR_START_DET 0x64 -#define DW_IC_CLR_GEN_CALL 0x68 -#define DW_IC_ENABLE 0x6c -#define DW_IC_STATUS 0x70 -#define DW_IC_TXFLR 0x74 -#define DW_IC_RXFLR 0x78 -#define DW_IC_TX_ABRT_SOURCE 0x80 -#define DW_IC_COMP_PARAM_1 0xf4 -#define DW_IC_COMP_TYPE 0xfc -#define DW_IC_COMP_TYPE_VALUE 0x44570140 #define DW_IC_CON_MASTER 0x1 #define DW_IC_CON_SPEED_STD 0x2 @@ -68,72 +34,7 @@ #define DW_IC_CON_RESTART_EN 0x20 #define DW_IC_CON_SLAVE_DISABLE 0x40 -#define DW_IC_INTR_RX_UNDER 0x001 -#define DW_IC_INTR_RX_OVER 0x002 -#define DW_IC_INTR_RX_FULL 0x004 -#define DW_IC_INTR_TX_OVER 0x008 -#define DW_IC_INTR_TX_EMPTY 0x010 -#define DW_IC_INTR_RD_REQ 0x020 -#define DW_IC_INTR_TX_ABRT 0x040 -#define DW_IC_INTR_RX_DONE 0x080 -#define DW_IC_INTR_ACTIVITY 0x100 -#define DW_IC_INTR_STOP_DET 0x200 -#define DW_IC_INTR_START_DET 0x400 -#define DW_IC_INTR_GEN_CALL 0x800 - -#define DW_IC_INTR_DEFAULT_MASK (DW_IC_INTR_RX_FULL | \ - DW_IC_INTR_TX_EMPTY | \ - DW_IC_INTR_TX_ABRT | \ - DW_IC_INTR_STOP_DET) - -#define DW_IC_STATUS_ACTIVITY 0x1 - -#define DW_IC_ERR_TX_ABRT 0x1 - -/* - * status codes - */ -#define STATUS_IDLE 0x0 -#define STATUS_WRITE_IN_PROGRESS 0x1 -#define STATUS_READ_IN_PROGRESS 0x2 - -#define TIMEOUT 20 /* ms */ - -/* - * hardware abort codes from the DW_IC_TX_ABRT_SOURCE register - * - * only expected abort codes are listed here - * refer to the datasheet for the full list - */ -#define ABRT_7B_ADDR_NOACK 0 -#define ABRT_10ADDR1_NOACK 1 -#define ABRT_10ADDR2_NOACK 2 -#define ABRT_TXDATA_NOACK 3 -#define ABRT_GCALL_NOACK 4 -#define ABRT_GCALL_READ 5 -#define ABRT_SBYTE_ACKDET 7 -#define ABRT_SBYTE_NORSTRT 9 -#define ABRT_10B_RD_NORSTRT 10 -#define ABRT_MASTER_DIS 11 -#define ARB_LOST 12 - -#define DW_IC_TX_ABRT_7B_ADDR_NOACK (1UL << ABRT_7B_ADDR_NOACK) -#define DW_IC_TX_ABRT_10ADDR1_NOACK (1UL << ABRT_10ADDR1_NOACK) -#define DW_IC_TX_ABRT_10ADDR2_NOACK (1UL << ABRT_10ADDR2_NOACK) -#define DW_IC_TX_ABRT_TXDATA_NOACK (1UL << ABRT_TXDATA_NOACK) -#define DW_IC_TX_ABRT_GCALL_NOACK (1UL << ABRT_GCALL_NOACK) -#define DW_IC_TX_ABRT_GCALL_READ (1UL << ABRT_GCALL_READ) -#define DW_IC_TX_ABRT_SBYTE_ACKDET (1UL << ABRT_SBYTE_ACKDET) -#define DW_IC_TX_ABRT_SBYTE_NORSTRT (1UL << ABRT_SBYTE_NORSTRT) -#define DW_IC_TX_ABRT_10B_RD_NORSTRT (1UL << ABRT_10B_RD_NORSTRT) -#define DW_IC_TX_ABRT_MASTER_DIS (1UL << ABRT_MASTER_DIS) -#define DW_IC_TX_ARB_LOST (1UL << ARB_LOST) -#define DW_IC_TX_ABRT_NOACK (DW_IC_TX_ABRT_7B_ADDR_NOACK | \ - DW_IC_TX_ABRT_10ADDR1_NOACK | \ - DW_IC_TX_ABRT_10ADDR2_NOACK | \ - DW_IC_TX_ABRT_TXDATA_NOACK | \ - DW_IC_TX_ABRT_GCALL_NOACK) /** * struct dw_i2c_dev - private i2c-designware data * @dev: driver model device node @@ -195,3 +96,8 @@ extern int i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num); extern u32 i2c_dw_func(struct i2c_adapter *adap); extern irqreturn_t i2c_dw_isr(int this_irq, void *dev_id); +extern void i2c_dw_enable(struct dw_i2c_dev *dev); +extern void i2c_dw_disable(struct dw_i2c_dev *dev); +extern void i2c_dw_clear_int(struct dw_i2c_dev *dev); +extern void i2c_dw_disable_int(struct dw_i2c_dev *dev); +extern u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev); diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index 1258cae3555d..2d3657ab1258 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -113,7 +113,7 @@ static int __devinit dw_i2c_probe(struct platform_device *pdev) goto err_unuse_clocks; } { - u32 param1 = dw_readl(dev, DW_IC_COMP_PARAM_1); + u32 param1 = i2c_dw_read_comp_param(dev); dev->tx_fifo_depth = ((param1 >> 16) & 0xff) + 1; dev->rx_fifo_depth = ((param1 >> 8) & 0xff) + 1; @@ -122,7 +122,7 @@ static int __devinit dw_i2c_probe(struct platform_device *pdev) if (r) goto err_iounmap; - dw_writel(dev, 0, DW_IC_INTR_MASK); /* disable IRQ */ + i2c_dw_disable_int(dev); r = request_irq(dev->irq, i2c_dw_isr, IRQF_DISABLED, pdev->name, dev); if (r) { dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq); @@ -178,7 +178,7 @@ static int __devexit dw_i2c_remove(struct platform_device *pdev) clk_put(dev->clk); dev->clk = NULL; - dw_writel(dev, 0, DW_IC_ENABLE); + i2c_dw_disable(dev); free_irq(dev->irq, dev); kfree(dev); -- cgit v1.2.3 From fe20ff5c7e9ca7f5369aacc7d7ca3efeda3b90fe Mon Sep 17 00:00:00 2001 From: Dirk Brandewie Date: Thu, 6 Oct 2011 11:26:35 -0700 Subject: i2c-designware: Add support for Designware core behind PCI devices. Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/Kconfig | 10 + drivers/i2c/busses/Makefile | 2 + drivers/i2c/busses/i2c-designware-core.h | 1 + drivers/i2c/busses/i2c-designware-pcidrv.c | 316 +++++++++++++++++++++++++++++ 4 files changed, 329 insertions(+) create mode 100644 drivers/i2c/busses/i2c-designware-pcidrv.c (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index e6f6e88021e5..1d7ce9c18bff 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -360,6 +360,16 @@ config I2C_DESIGNWARE_PLATFORM This driver can also be built as a module. If so, the module will be called i2c-designware-platform. +config I2C_DESIGNWARE_PCI + tristate "Synopsys DesignWare PCI" + depends on PCI + help + If you say yes to this option, support will be included for the + Synopsys DesignWare I2C adapter. Only master mode is supported. + + This driver can also be built as a module. If so, the module + will be called i2c-designware-pci. + config I2C_GPIO tristate "GPIO-based bitbanging I2C" depends on GENERIC_GPIO diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index d7fe55fb0776..fba6da60aa0e 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile @@ -35,6 +35,8 @@ obj-$(CONFIG_I2C_CPM) += i2c-cpm.o obj-$(CONFIG_I2C_DAVINCI) += i2c-davinci.o obj-$(CONFIG_I2C_DESIGNWARE_PLATFORM) += i2c-designware-platform.o i2c-designware-platform-objs := i2c-designware-platdrv.o i2c-designware-core.o +obj-$(CONFIG_I2C_DESIGNWARE_PCI) += i2c-designware-pci.o +i2c-designware-pci-objs := i2c-designware-pcidrv.o i2c-designware-core.o obj-$(CONFIG_I2C_GPIO) += i2c-gpio.o obj-$(CONFIG_I2C_HIGHLANDER) += i2c-highlander.o obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index dc016e2afe9c..601dd67a6c27 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -68,6 +68,7 @@ struct dw_i2c_dev { struct mutex lock; struct clk *clk; u32 (*get_clk_rate_khz) (struct dw_i2c_dev *dev); + struct dw_pci_controller *controller; int cmd_err; struct i2c_msg *msgs; int msgs_num; diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c new file mode 100644 index 000000000000..83307ef3b41f --- /dev/null +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c @@ -0,0 +1,316 @@ +/* + * Synopsys DesignWare I2C adapter driver (master only). + * + * Based on the TI DAVINCI I2C adapter driver. + * + * Copyright (C) 2006 Texas Instruments. + * Copyright (C) 2007 MontaVista Software Inc. + * Copyright (C) 2009 Provigent Ltd. + * Copyright (C) 2011 Intel corporation. + * + * ---------------------------------------------------------------------------- + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * ---------------------------------------------------------------------------- + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "i2c-designware-core.h" + +#define DRIVER_NAME "i2c-designware-pci" + +enum dw_pci_ctl_id_t { + moorestown_0, + moorestown_1, + moorestown_2, + + medfield_0, + medfield_1, + medfield_2, + medfield_3, + medfield_4, + medfield_5, +}; + +struct dw_pci_controller { + u32 bus_num; + u32 bus_cfg; + u32 tx_fifo_depth; + u32 rx_fifo_depth; + u32 clk_khz; +}; + +#define INTEL_MID_STD_CFG (DW_IC_CON_MASTER | \ + DW_IC_CON_SLAVE_DISABLE | \ + DW_IC_CON_RESTART_EN) + +static struct dw_pci_controller dw_pci_controllers[] = { + [moorestown_0] = { + .bus_num = 0, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, + }, + [moorestown_1] = { + .bus_num = 1, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, + }, + [moorestown_2] = { + .bus_num = 2, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, + }, + [medfield_0] = { + .bus_num = 0, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, + }, + [medfield_1] = { + .bus_num = 1, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, + }, + [medfield_2] = { + .bus_num = 2, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, + }, + [medfield_3] = { + .bus_num = 3, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, + }, + [medfield_4] = { + .bus_num = 4, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, + }, + [medfield_5] = { + .bus_num = 5, + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, + .tx_fifo_depth = 32, + .rx_fifo_depth = 32, + .clk_khz = 25000, + }, +}; +static struct i2c_algorithm i2c_dw_algo = { + .master_xfer = i2c_dw_xfer, + .functionality = i2c_dw_func, +}; + +static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev) +{ + return dev->controller->clk_khz; +} + +static int __devinit i2c_dw_pci_probe(struct pci_dev *pdev, +const struct pci_device_id *id) +{ + struct dw_i2c_dev *dev; + struct i2c_adapter *adap; + unsigned long start, len; + void __iomem *base; + int r; + struct dw_pci_controller *controller; + + if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) { + printk(KERN_ERR "dw_i2c_pci_probe: invalid driver data %ld\n", + id->driver_data); + return -EINVAL; + } + + controller = &dw_pci_controllers[id->driver_data]; + + r = pci_enable_device(pdev); + if (r) { + dev_err(&pdev->dev, "Failed to enable I2C PCI device (%d)\n", + r); + goto exit; + } + + /* Determine the address of the I2C area */ + start = pci_resource_start(pdev, 0); + len = pci_resource_len(pdev, 0); + if (!start || len == 0) { + dev_err(&pdev->dev, "base address not set\n"); + r = -ENODEV; + goto exit; + } + + r = pci_request_region(pdev, 0, DRIVER_NAME); + if (r) { + dev_err(&pdev->dev, "failed to request I2C region " + "0x%lx-0x%lx\n", start, + (unsigned long)pci_resource_end(pdev, 0)); + goto exit; + } + + base = ioremap_nocache(start, len); + if (!base) { + dev_err(&pdev->dev, "I/O memory remapping failed\n"); + r = -ENOMEM; + goto err_release_region; + } + + + dev = kzalloc(sizeof(struct dw_i2c_dev), GFP_KERNEL); + if (!dev) { + r = -ENOMEM; + goto err_release_region; + } + + init_completion(&dev->cmd_complete); + mutex_init(&dev->lock); + dev->clk = NULL; + dev->controller = controller; + dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz; + dev->base = base; + dev->dev = get_device(&pdev->dev); + dev->functionality = + I2C_FUNC_I2C | + I2C_FUNC_SMBUS_BYTE | + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_WORD_DATA | + I2C_FUNC_SMBUS_I2C_BLOCK; + dev->master_cfg = controller->bus_cfg; + + pci_set_drvdata(pdev, dev); + + dev->tx_fifo_depth = controller->tx_fifo_depth; + dev->rx_fifo_depth = controller->rx_fifo_depth; + r = i2c_dw_init(dev); + if (r) + goto err_iounmap; + + adap = &dev->adapter; + i2c_set_adapdata(adap, dev); + adap->owner = THIS_MODULE; + adap->class = 0; + adap->algo = &i2c_dw_algo; + adap->dev.parent = &pdev->dev; + adap->nr = controller->bus_num; + snprintf(adap->name, sizeof(adap->name), "i2c-designware-pci-%d", + adap->nr); + + r = request_irq(pdev->irq, i2c_dw_isr, IRQF_SHARED, adap->name, dev); + if (r) { + dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq); + goto err_iounmap; + } + + i2c_dw_disable_int(dev); + i2c_dw_clear_int(dev); + r = i2c_add_numbered_adapter(adap); + if (r) { + dev_err(&pdev->dev, "failure adding adapter\n"); + goto err_free_irq; + } + + return 0; + +err_free_irq: + free_irq(pdev->irq, dev); +err_iounmap: + iounmap(dev->base); + pci_set_drvdata(pdev, NULL); + put_device(&pdev->dev); + kfree(dev); +err_release_region: + pci_release_region(pdev, 0); +exit: + return r; +} + +static void __devexit i2c_dw_pci_remove(struct pci_dev *pdev) +{ + struct dw_i2c_dev *dev = pci_get_drvdata(pdev); + + pci_set_drvdata(pdev, NULL); + i2c_del_adapter(&dev->adapter); + put_device(&pdev->dev); + + free_irq(dev->irq, dev); + kfree(dev); + pci_release_region(pdev, 0); +} + +/* work with hotplug and coldplug */ +MODULE_ALIAS("i2c_designware-pci"); + +DEFINE_PCI_DEVICE_TABLE(i2_designware_pci_ids) = { + /* Moorestown */ + { PCI_VDEVICE(INTEL, 0x0802), moorestown_0 }, + { PCI_VDEVICE(INTEL, 0x0803), moorestown_1 }, + { PCI_VDEVICE(INTEL, 0x0804), moorestown_2 }, + /* Medfield */ + { PCI_VDEVICE(INTEL, 0x0817), medfield_3,}, + { PCI_VDEVICE(INTEL, 0x0818), medfield_4 }, + { PCI_VDEVICE(INTEL, 0x0819), medfield_5 }, + { PCI_VDEVICE(INTEL, 0x082C), medfield_0 }, + { PCI_VDEVICE(INTEL, 0x082D), medfield_1 }, + { PCI_VDEVICE(INTEL, 0x082E), medfield_2 }, + { 0,} +}; +MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids); + +static struct pci_driver dw_i2c_driver = { + .name = DRIVER_NAME, + .id_table = i2_designware_pci_ids, + .probe = i2c_dw_pci_probe, + .remove = __devexit_p(i2c_dw_pci_remove), +}; + +static int __init dw_i2c_init_driver(void) +{ + return pci_register_driver(&dw_i2c_driver); +} +module_init(dw_i2c_init_driver); + +static void __exit dw_i2c_exit_driver(void) +{ + pci_unregister_driver(&dw_i2c_driver); +} +module_exit(dw_i2c_exit_driver); + +MODULE_AUTHOR("Baruch Siach "); +MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter"); +MODULE_LICENSE("GPL"); -- cgit v1.2.3 From 18dbdda89f5cf0540e577280395f16079308e87d Mon Sep 17 00:00:00 2001 From: Dirk Brandewie Date: Thu, 6 Oct 2011 11:26:36 -0700 Subject: i2c-designware: Add runtime power management support Add runtime power management to the PCI driver. Signed-off-by: Dirk Brandewie Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware-core.c | 10 +++- drivers/i2c/busses/i2c-designware-core.h | 1 + drivers/i2c/busses/i2c-designware-pcidrv.c | 89 ++++++++++++++++++++++++++++++ 3 files changed, 98 insertions(+), 2 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c index b9f18ddaaa76..df8799241009 100644 --- a/drivers/i2c/busses/i2c-designware-core.c +++ b/drivers/i2c/busses/i2c-designware-core.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include "i2c-designware-core.h" @@ -501,6 +502,7 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num); mutex_lock(&dev->lock); + pm_runtime_get_sync(dev->dev); INIT_COMPLETION(dev->cmd_complete); dev->msgs = msgs; @@ -550,6 +552,7 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) ret = -EIO; done: + pm_runtime_put(dev->dev); mutex_unlock(&dev->lock); return ret; @@ -671,10 +674,13 @@ void i2c_dw_enable(struct dw_i2c_dev *dev) dw_writel(dev, 1, DW_IC_ENABLE); } -void i2c_dw_disable(struct dw_i2c_dev *dev) +u32 i2c_dw_is_enabled(struct dw_i2c_dev *dev) { - int ret; + return dw_readl(dev, DW_IC_ENABLE); +} +void i2c_dw_disable(struct dw_i2c_dev *dev) +{ /* Disable controller */ dw_writel(dev, 0, DW_IC_ENABLE); diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index 601dd67a6c27..02d1a2ddd853 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -98,6 +98,7 @@ extern int i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], extern u32 i2c_dw_func(struct i2c_adapter *adap); extern irqreturn_t i2c_dw_isr(int this_irq, void *dev_id); extern void i2c_dw_enable(struct dw_i2c_dev *dev); +extern u32 i2c_dw_is_enabled(struct dw_i2c_dev *dev); extern void i2c_dw_disable(struct dw_i2c_dev *dev); extern void i2c_dw_clear_int(struct dw_i2c_dev *dev); extern void i2c_dw_disable_int(struct dw_i2c_dev *dev); diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c index 83307ef3b41f..d2223b5f922b 100644 --- a/drivers/i2c/busses/i2c-designware-pcidrv.c +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c @@ -38,6 +38,7 @@ #include #include #include +#include #include "i2c-designware-core.h" #define DRIVER_NAME "i2c-designware-pci" @@ -137,6 +138,82 @@ static struct i2c_algorithm i2c_dw_algo = { .functionality = i2c_dw_func, }; +static int i2c_dw_pci_suspend(struct pci_dev *pdev, pm_message_t mesg) +{ + struct dw_i2c_dev *i2c = pci_get_drvdata(pdev); + int err; + + + i2c_dw_disable(i2c); + + err = pci_save_state(pdev); + if (err) { + dev_err(&pdev->dev, "pci_save_state failed\n"); + return err; + } + + err = pci_set_power_state(pdev, PCI_D3hot); + if (err) { + dev_err(&pdev->dev, "pci_set_power_state failed\n"); + return err; + } + + return 0; +} + +static int i2c_dw_pci_runtime_suspend(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + dev_dbg(dev, "PCI suspend called\n"); + return i2c_dw_pci_suspend(pdev, PMSG_SUSPEND); +} + +static int i2c_dw_pci_resume(struct pci_dev *pdev) +{ + struct dw_i2c_dev *i2c = pci_get_drvdata(pdev); + int err; + u32 enabled; + + enabled = i2c_dw_is_enabled(i2c); + if (enabled) + return 0; + + err = pci_set_power_state(pdev, PCI_D0); + if (err) { + dev_err(&pdev->dev, "pci_set_power_state() failed\n"); + return err; + } + + pci_restore_state(pdev); + + i2c_dw_init(i2c); + i2c_dw_enable(i2c); + return 0; +} + +static int i2c_dw_pci_runtime_resume(struct device *dev) +{ + struct pci_dev *pdev = to_pci_dev(dev); + dev_dbg(dev, "runtime_resume called\n"); + return i2c_dw_pci_resume(pdev); +} + +static int i2c_dw_pci_runtime_idle(struct device *dev) +{ + int err = pm_schedule_suspend(dev, 500); + dev_dbg(dev, "runtime_idle called\n"); + + if (err != 0) + return 0; + return -EBUSY; +} + +static const struct dev_pm_ops i2c_dw_pm_ops = { + .runtime_suspend = i2c_dw_pci_runtime_suspend, + .runtime_resume = i2c_dw_pci_runtime_resume, + .runtime_idle = i2c_dw_pci_runtime_idle, +}; + static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev) { return dev->controller->clk_khz; @@ -245,6 +322,9 @@ const struct pci_device_id *id) goto err_free_irq; } + pm_runtime_put_noidle(&pdev->dev); + pm_runtime_allow(&pdev->dev); + return 0; err_free_irq: @@ -264,6 +344,10 @@ static void __devexit i2c_dw_pci_remove(struct pci_dev *pdev) { struct dw_i2c_dev *dev = pci_get_drvdata(pdev); + i2c_dw_disable(dev); + pm_runtime_forbid(&pdev->dev); + pm_runtime_get_noresume(&pdev->dev); + pci_set_drvdata(pdev, NULL); i2c_del_adapter(&dev->adapter); put_device(&pdev->dev); @@ -297,6 +381,11 @@ static struct pci_driver dw_i2c_driver = { .id_table = i2_designware_pci_ids, .probe = i2c_dw_pci_probe, .remove = __devexit_p(i2c_dw_pci_remove), + .resume = i2c_dw_pci_resume, + .suspend = i2c_dw_pci_suspend, + .driver = { + .pm = &i2c_dw_pm_ops, + }, }; static int __init dw_i2c_init_driver(void) -- cgit v1.2.3 From 52c2843322362bfd847bdda1d3cebc751de68e5b Mon Sep 17 00:00:00 2001 From: Octavian Purdila Date: Thu, 6 Oct 2011 11:26:37 -0700 Subject: i2c-designware: Fix PCI core warning on suspend/resume PCI core warns if the legacy PM and new PM functions are present. Update the driver to only use the new power management framework. This patch fixes the following warning seen during suspend/resume: <7>[ 24.193850] i2c-designware-pci 0000:08:13.0: suspend <4>[ 24.193866] ------------[ cut here ]------------ <4>[ 24.193892] WARNING: at drivers/pci/pci-driver.c:605 pci_has_legacy_pm_support+0x48/0x4d() <4>[ 24.193925] Hardware name: OakTrail <4>[ 24.193936] Modules linked in: <4>[ 24.193958] Pid: 2834, comm: kworker/u:22 Tainted: G W 2.6.36greenridge-01402-gc8047e6 #171 <4>[ 24.193974] Call Trace: <4>[ 24.193999] [] warn_slowpath_common+0x66/0xc2 <4>[ 24.194025] [] ? pci_has_legacy_pm_support+0x48/0x4d <4>[ 24.194052] [] warn_slowpath_null+0xf/0x13 <4>[ 24.194079] [] pci_has_legacy_pm_support+0x48/0x4d <4>[ 24.194106] [] pci_pm_suspend+0x22/0x154 <4>[ 24.194131] [] ? pci_pm_suspend+0x0/0x154 <4>[ 24.194156] [] pm_op+0x3e/0x95 <4>[ 24.194182] [] __device_suspend+0x12e/0x194 <4>[ 24.194208] [] ? dpm_drv_timeout+0x0/0x47 <4>[ 24.194237] [] async_suspend+0x16/0x3a <4>[ 24.194265] [] async_run_entry_fn+0x97/0x135 <4>[ 24.194291] [] process_one_work+0x1c9/0x2db Signed-off-by: Octavian Purdila Signed-off-by: Dirk Brandewie Signed-off-by: Alan Cox Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-designware-pcidrv.c | 29 ++++++++--------------------- 1 file changed, 8 insertions(+), 21 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c index d2223b5f922b..9e89e7313d62 100644 --- a/drivers/i2c/busses/i2c-designware-pcidrv.c +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c @@ -138,8 +138,9 @@ static struct i2c_algorithm i2c_dw_algo = { .functionality = i2c_dw_func, }; -static int i2c_dw_pci_suspend(struct pci_dev *pdev, pm_message_t mesg) +static int i2c_dw_pci_suspend(struct device *dev) { + struct pci_dev *pdev = container_of(dev, struct pci_dev, dev); struct dw_i2c_dev *i2c = pci_get_drvdata(pdev); int err; @@ -161,15 +162,9 @@ static int i2c_dw_pci_suspend(struct pci_dev *pdev, pm_message_t mesg) return 0; } -static int i2c_dw_pci_runtime_suspend(struct device *dev) -{ - struct pci_dev *pdev = to_pci_dev(dev); - dev_dbg(dev, "PCI suspend called\n"); - return i2c_dw_pci_suspend(pdev, PMSG_SUSPEND); -} - -static int i2c_dw_pci_resume(struct pci_dev *pdev) +static int i2c_dw_pci_resume(struct device *dev) { + struct pci_dev *pdev = container_of(dev, struct pci_dev, dev); struct dw_i2c_dev *i2c = pci_get_drvdata(pdev); int err; u32 enabled; @@ -191,13 +186,6 @@ static int i2c_dw_pci_resume(struct pci_dev *pdev) return 0; } -static int i2c_dw_pci_runtime_resume(struct device *dev) -{ - struct pci_dev *pdev = to_pci_dev(dev); - dev_dbg(dev, "runtime_resume called\n"); - return i2c_dw_pci_resume(pdev); -} - static int i2c_dw_pci_runtime_idle(struct device *dev) { int err = pm_schedule_suspend(dev, 500); @@ -209,9 +197,10 @@ static int i2c_dw_pci_runtime_idle(struct device *dev) } static const struct dev_pm_ops i2c_dw_pm_ops = { - .runtime_suspend = i2c_dw_pci_runtime_suspend, - .runtime_resume = i2c_dw_pci_runtime_resume, - .runtime_idle = i2c_dw_pci_runtime_idle, + .resume = i2c_dw_pci_resume, + .suspend = i2c_dw_pci_suspend, + SET_RUNTIME_PM_OPS(i2c_dw_pci_suspend, i2c_dw_pci_resume, + i2c_dw_pci_runtime_idle) }; static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev) @@ -381,8 +370,6 @@ static struct pci_driver dw_i2c_driver = { .id_table = i2_designware_pci_ids, .probe = i2c_dw_pci_probe, .remove = __devexit_p(i2c_dw_pci_remove), - .resume = i2c_dw_pci_resume, - .suspend = i2c_dw_pci_suspend, .driver = { .pm = &i2c_dw_pm_ops, }, -- cgit v1.2.3 From 93e4ad74da14c8d5564cfc0b57c40ca311e53d47 Mon Sep 17 00:00:00 2001 From: Tomoya MORINAGA Date: Wed, 12 Oct 2011 13:13:00 +0900 Subject: i2c-eg20t: Fix bus-idle waiting issue Currently, when checking whether bus is idle or not, if timeout occurs, this function always returns success(zero). This patch fixes the issue. Signed-off-by: Tomoya MORINAGA Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-eg20t.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c index ce1a32b71e47..a4f76cb76c46 100644 --- a/drivers/i2c/busses/i2c-eg20t.c +++ b/drivers/i2c/busses/i2c-eg20t.c @@ -273,23 +273,23 @@ static s32 pch_i2c_wait_for_bus_idle(struct i2c_algo_pch_data *adap, s32 timeout) { void __iomem *p = adap->pch_base_address; + ktime_t ns_val; + + if ((ioread32(p + PCH_I2CSR) & I2CMBB_BIT) == 0) + return 0; /* MAX timeout value is timeout*1000*1000nsec */ - ktime_t ns_val = ktime_add_ns(ktime_get(), timeout*1000*1000); + ns_val = ktime_add_ns(ktime_get(), timeout*1000*1000); do { - if ((ioread32(p + PCH_I2CSR) & I2CMBB_BIT) == 0) - break; msleep(20); + if ((ioread32(p + PCH_I2CSR) & I2CMBB_BIT) == 0) + return 0; } while (ktime_lt(ktime_get(), ns_val)); pch_dbg(adap, "I2CSR = %x\n", ioread32(p + PCH_I2CSR)); + pch_err(adap, "%s: Timeout Error.return%d\n", __func__, -ETIME); - if (timeout == 0) { - pch_err(adap, "%s: Timeout Error.return%d\n", __func__, -ETIME); - return -ETIME; - } - - return 0; + return -ETIME; } /** -- cgit v1.2.3 From c7b41f3affc63644f398b5faa170b1f531b406a8 Mon Sep 17 00:00:00 2001 From: Tomoya MORINAGA Date: Wed, 12 Oct 2011 13:13:01 +0900 Subject: i2c-eg20t: Modify returned value s32 to long Type of wait_event_timeout is long not s32. This patch replaces s32 with long. Additionally, delete negative processing(ret < 0). Signed-off-by: Tomoya MORINAGA Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-eg20t.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c index a4f76cb76c46..543d39c73c37 100644 --- a/drivers/i2c/busses/i2c-eg20t.c +++ b/drivers/i2c/busses/i2c-eg20t.c @@ -311,13 +311,9 @@ static void pch_i2c_start(struct i2c_algo_pch_data *adap) */ static s32 pch_i2c_wait_for_xfer_complete(struct i2c_algo_pch_data *adap) { - s32 ret; + long ret; ret = wait_event_timeout(pch_event, (adap->pch_event_flag != 0), msecs_to_jiffies(50)); - if (ret < 0) { - pch_err(adap, "timeout: %x\n", adap->pch_event_flag); - return ret; - } if (ret == 0) { pch_err(adap, "timeout: %x\n", adap->pch_event_flag); -- cgit v1.2.3 From c249ac207f2cedb49f2c9442afbaac35bfcfcd25 Mon Sep 17 00:00:00 2001 From: Tomoya MORINAGA Date: Wed, 12 Oct 2011 13:13:02 +0900 Subject: i2c-eg20t: Fix 10bit access issue Reported-by: Jeffrey (Sheng-Hui) Chu Signed-off-by: Tomoya MORINAGA Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-eg20t.c | 65 ++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 63 insertions(+), 2 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c index 543d39c73c37..38e44d959f00 100644 --- a/drivers/i2c/busses/i2c-eg20t.c +++ b/drivers/i2c/busses/i2c-eg20t.c @@ -64,6 +64,7 @@ #define TEN_BIT_ADDR_DEFAULT 0xF000 #define TEN_BIT_ADDR_MASK 0xF0 #define PCH_START 0x0020 +#define PCH_RESTART 0x0004 #define PCH_ESR_START 0x0001 #define PCH_BUFF_START 0x1 #define PCH_REPSTART 0x0004 @@ -408,7 +409,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap, } if (msgs->flags & I2C_M_TEN) { - addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7); + addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7) & 0x06; iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR); if (first) pch_i2c_start(adap); @@ -479,6 +480,19 @@ static void pch_i2c_sendnack(struct i2c_algo_pch_data *adap) pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_ACK); } +/** + * pch_i2c_restart() - Generate I2C restart condition in normal mode. + * @adap: Pointer to struct i2c_algo_pch_data. + * + * Generate I2C restart condition in normal mode by setting I2CCTL.I2CRSTA. + */ +static void pch_i2c_restart(struct i2c_algo_pch_data *adap) +{ + void __iomem *p = adap->pch_base_address; + pch_dbg(adap, "I2CCTL = %x\n", ioread32(p + PCH_I2CCTL)); + pch_setbit(adap->pch_base_address, PCH_I2CCTL, PCH_RESTART); +} + /** * pch_i2c_readbytes() - read data from I2C bus in normal mode. * @i2c_adap: Pointer to the struct i2c_adapter. @@ -496,6 +510,7 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, u32 length; u32 addr; u32 addr_2_msb; + u32 addr_8_lsb; void __iomem *p = adap->pch_base_address; length = msgs->len; @@ -511,9 +526,55 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, } if (msgs->flags & I2C_M_TEN) { - addr_2_msb = (((addr & I2C_MSB_2B_MSK) >> 7) | (I2C_RD)); + addr_2_msb = ((addr & I2C_MSB_2B_MSK) >> 7); iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR); + if (first) + pch_i2c_start(adap); + rtn = pch_i2c_wait_for_xfer_complete(adap); + if (rtn == 0) { + if (pch_i2c_getack(adap)) { + pch_dbg(adap, "Receive NACK for slave address" + "setting\n"); + return -EIO; + } + addr_8_lsb = (addr & I2C_ADDR_MSK); + iowrite32(addr_8_lsb, p + PCH_I2CDR); + } else if (rtn == -EIO) { /* Arbitration Lost */ + pch_err(adap, "Lost Arbitration\n"); + pch_clrbit(adap->pch_base_address, PCH_I2CSR, + I2CMAL_BIT); + pch_clrbit(adap->pch_base_address, PCH_I2CSR, + I2CMIF_BIT); + pch_i2c_init(adap); + return -EAGAIN; + } else { /* wait-event timeout */ + pch_i2c_stop(adap); + return -ETIME; + } + pch_i2c_restart(adap); + rtn = pch_i2c_wait_for_xfer_complete(adap); + if (rtn == 0) { + if (pch_i2c_getack(adap)) { + pch_dbg(adap, "Receive NACK for slave address" + "setting\n"); + return -EIO; + } + addr_2_msb |= I2C_RD; + iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, + p + PCH_I2CDR); + } else if (rtn == -EIO) { /* Arbitration Lost */ + pch_err(adap, "Lost Arbitration\n"); + pch_clrbit(adap->pch_base_address, PCH_I2CSR, + I2CMAL_BIT); + pch_clrbit(adap->pch_base_address, PCH_I2CSR, + I2CMIF_BIT); + pch_i2c_init(adap); + return -EAGAIN; + } else { /* wait-event timeout */ + pch_i2c_stop(adap); + return -ETIME; + } } else { /* 7 address bits + R/W bit */ addr = (((addr) << 1) | (I2C_RD)); -- cgit v1.2.3 From 12bd3146518ab984c1eb234a0f81756ddc5e3683 Mon Sep 17 00:00:00 2001 From: Tomoya MORINAGA Date: Wed, 12 Oct 2011 13:13:03 +0900 Subject: i2c-eg20t: Separate error processing Error processing for NACK or wait-event must be precessed separately. So divide wait-event error processing into NACK-receiving and timeout. Add arbitration lost processing. Signed-off-by: Tomoya MORINAGA Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-eg20t.c | 173 +++++++++++++++++++++++++++-------------- 1 file changed, 115 insertions(+), 58 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c index 38e44d959f00..cb296862ae0a 100644 --- a/drivers/i2c/busses/i2c-eg20t.c +++ b/drivers/i2c/busses/i2c-eg20t.c @@ -391,6 +391,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap, u32 addr_2_msb; u32 addr_8_lsb; s32 wrcount; + s32 rtn; void __iomem *p = adap->pch_base_address; length = msgs->len; @@ -413,11 +414,25 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap, iowrite32(addr_2_msb | TEN_BIT_ADDR_MASK, p + PCH_I2CDR); if (first) pch_i2c_start(adap); - if (pch_i2c_wait_for_xfer_complete(adap) == 0 && - pch_i2c_getack(adap) == 0) { + + rtn = pch_i2c_wait_for_xfer_complete(adap); + if (rtn == 0) { + if (pch_i2c_getack(adap)) { + pch_dbg(adap, "Receive NACK for slave address" + "setting\n"); + return -EIO; + } addr_8_lsb = (addr & I2C_ADDR_MSK); iowrite32(addr_8_lsb, p + PCH_I2CDR); - } else { + } else if (rtn == -EIO) { /* Arbitration Lost */ + pch_err(adap, "Lost Arbitration\n"); + pch_clrbit(adap->pch_base_address, PCH_I2CSR, + I2CMAL_BIT); + pch_clrbit(adap->pch_base_address, PCH_I2CSR, + I2CMIF_BIT); + pch_i2c_init(adap); + return -EAGAIN; + } else { /* wait-event timeout */ pch_i2c_stop(adap); return -ETIME; } @@ -428,30 +443,48 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap, pch_i2c_start(adap); } - if ((pch_i2c_wait_for_xfer_complete(adap) == 0) && - (pch_i2c_getack(adap) == 0)) { - for (wrcount = 0; wrcount < length; ++wrcount) { - /* write buffer value to I2C data register */ - iowrite32(buf[wrcount], p + PCH_I2CDR); - pch_dbg(adap, "writing %x to Data register\n", - buf[wrcount]); + rtn = pch_i2c_wait_for_xfer_complete(adap); + if (rtn == 0) { + if (pch_i2c_getack(adap)) { + pch_dbg(adap, "Receive NACK for slave address" + "setting\n"); + return -EIO; + } + } else if (rtn == -EIO) { /* Arbitration Lost */ + pch_err(adap, "Lost Arbitration\n"); + pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMAL_BIT); + pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT); + return -EAGAIN; + } else { /* wait-event timeout */ + return -ETIME; + } - if (pch_i2c_wait_for_xfer_complete(adap) != 0) - return -ETIME; + for (wrcount = 0; wrcount < length; ++wrcount) { + /* write buffer value to I2C data register */ + iowrite32(buf[wrcount], p + PCH_I2CDR); + pch_dbg(adap, "writing %x to Data register\n", buf[wrcount]); - if (pch_i2c_getack(adap)) + rtn = pch_i2c_wait_for_xfer_complete(adap); + if (rtn == 0) { + if (pch_i2c_getack(adap)) { + pch_dbg(adap, "Receive NACK for slave address" + "setting\n"); return -EIO; + } + pch_clrbit(adap->pch_base_address, PCH_I2CSR, + I2CMCF_BIT); + pch_clrbit(adap->pch_base_address, PCH_I2CSR, + I2CMIF_BIT); + } else { /* wait-event timeout */ + return -ETIME; } + } - /* check if this is the last message */ - if (last) - pch_i2c_stop(adap); - else - pch_i2c_repstart(adap); - } else { + /* check if this is the last message */ + if (last) pch_i2c_stop(adap); - return -EIO; - } + else + pch_i2c_repstart(adap); pch_dbg(adap, "return=%d\n", wrcount); @@ -512,6 +545,7 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, u32 addr_2_msb; u32 addr_8_lsb; void __iomem *p = adap->pch_base_address; + s32 rtn; length = msgs->len; buf = msgs->buf; @@ -585,56 +619,79 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, if (first) pch_i2c_start(adap); - if ((pch_i2c_wait_for_xfer_complete(adap) == 0) && - (pch_i2c_getack(adap) == 0)) { - pch_dbg(adap, "return %d\n", 0); + rtn = pch_i2c_wait_for_xfer_complete(adap); + if (rtn == 0) { + if (pch_i2c_getack(adap)) { + pch_dbg(adap, "Receive NACK for slave address" + "setting\n"); + return -EIO; + } + } else if (rtn == -EIO) { /* Arbitration Lost */ + pch_err(adap, "Lost Arbitration\n"); + pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMAL_BIT); + pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT); + return -EAGAIN; + } else { /* wait-event timeout */ + return -ETIME; + } - if (length == 0) { - pch_i2c_stop(adap); - ioread32(p + PCH_I2CDR); /* Dummy read needs */ + if (length == 0) { + pch_i2c_stop(adap); + ioread32(p + PCH_I2CDR); /* Dummy read needs */ - count = length; - } else { - int read_index; - int loop; - pch_i2c_sendack(adap); + count = length; + } else { + int read_index; + int loop; + pch_i2c_sendack(adap); - /* Dummy read */ - for (loop = 1, read_index = 0; loop < length; loop++) { - buf[read_index] = ioread32(p + PCH_I2CDR); + /* Dummy read */ + for (loop = 1, read_index = 0; loop < length; loop++) { + buf[read_index] = ioread32(p + PCH_I2CDR); - if (loop != 1) - read_index++; + if (loop != 1) + read_index++; - if (pch_i2c_wait_for_xfer_complete(adap) != 0) { - pch_i2c_stop(adap); - return -ETIME; + rtn = pch_i2c_wait_for_xfer_complete(adap); + if (rtn == 0) { + if (pch_i2c_getack(adap)) { + pch_dbg(adap, "Receive NACK for slave" + "address setting\n"); + return -EIO; } - } /* end for */ + } else { /* wait-event timeout */ + pch_i2c_stop(adap); + return -ETIME; + } - pch_i2c_sendnack(adap); + } /* end for */ - buf[read_index] = ioread32(p + PCH_I2CDR); + pch_i2c_sendnack(adap); - if (length != 1) - read_index++; + buf[read_index] = ioread32(p + PCH_I2CDR); /* Read final - 1 */ - if (pch_i2c_wait_for_xfer_complete(adap) == 0) { - if (last) - pch_i2c_stop(adap); - else - pch_i2c_repstart(adap); + if (length != 1) + read_index++; - buf[read_index++] = ioread32(p + PCH_I2CDR); - count = read_index; - } else { - count = -ETIME; + rtn = pch_i2c_wait_for_xfer_complete(adap); + if (rtn == 0) { + if (pch_i2c_getack(adap)) { + pch_dbg(adap, "Receive NACK for slave" + "address setting\n"); + return -EIO; } - + } else { /* wait-event timeout */ + pch_i2c_stop(adap); + return -ETIME; } - } else { - count = -ETIME; - pch_i2c_stop(adap); + + if (last) + pch_i2c_stop(adap); + else + pch_i2c_repstart(adap); + + buf[read_index++] = ioread32(p + PCH_I2CDR); /* Read Final */ + count = read_index; } return count; -- cgit v1.2.3 From 3cf21a7c48389c167065bffd61db39a9bd201f07 Mon Sep 17 00:00:00 2001 From: Tomoya MORINAGA Date: Wed, 12 Oct 2011 13:13:04 +0900 Subject: i2c-eg20t: add stop sequence in case wait-event timeout occurs add stop sequence in case wait-event timeout in write processing. (read processing already had it) Signed-off-by: Tomoya MORINAGA Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-eg20t.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c index cb296862ae0a..318e6a5a710f 100644 --- a/drivers/i2c/busses/i2c-eg20t.c +++ b/drivers/i2c/busses/i2c-eg20t.c @@ -456,6 +456,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap, pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT); return -EAGAIN; } else { /* wait-event timeout */ + pch_i2c_stop(adap); return -ETIME; } @@ -476,6 +477,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap, pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT); } else { /* wait-event timeout */ + pch_i2c_stop(adap); return -ETIME; } } @@ -632,6 +634,7 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT); return -EAGAIN; } else { /* wait-event timeout */ + pch_i2c_stop(adap); return -ETIME; } -- cgit v1.2.3 From cb59f5253a5313d62e8e345fcd5dd5a44a73e0d6 Mon Sep 17 00:00:00 2001 From: Tomoya MORINAGA Date: Wed, 12 Oct 2011 13:13:05 +0900 Subject: i2c-eg20t: Fix flag setting issue Currently, in case occurring abnormal event, internal flag variable(=pch_event_flag) is not reset. This patch fixes the issue. Signed-off-by: Tomoya MORINAGA Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-eg20t.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c index 318e6a5a710f..a1bf62dbd27b 100644 --- a/drivers/i2c/busses/i2c-eg20t.c +++ b/drivers/i2c/busses/i2c-eg20t.c @@ -318,11 +318,13 @@ static s32 pch_i2c_wait_for_xfer_complete(struct i2c_algo_pch_data *adap) if (ret == 0) { pch_err(adap, "timeout: %x\n", adap->pch_event_flag); + adap->pch_event_flag = 0; return -ETIMEDOUT; } if (adap->pch_event_flag & I2C_ERROR_MASK) { pch_err(adap, "error bits set: %x\n", adap->pch_event_flag); + adap->pch_event_flag = 0; return -EIO; } -- cgit v1.2.3 From 24597bf8012cf3fa5703c38e1bb13df3118d7588 Mon Sep 17 00:00:00 2001 From: Tomoya MORINAGA Date: Wed, 12 Oct 2011 13:13:06 +0900 Subject: i2c-eg20t: Add initialize processing in case i2c-error occurs In case disconnecting physical connection, need to initialize i2c device for retry access. This patch adds initialize process in case bus-idle fails and Lost arbitration. Signed-off-by: Tomoya MORINAGA Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-eg20t.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c index a1bf62dbd27b..8cebef49aeac 100644 --- a/drivers/i2c/busses/i2c-eg20t.c +++ b/drivers/i2c/busses/i2c-eg20t.c @@ -289,6 +289,7 @@ static s32 pch_i2c_wait_for_bus_idle(struct i2c_algo_pch_data *adap, pch_dbg(adap, "I2CSR = %x\n", ioread32(p + PCH_I2CSR)); pch_err(adap, "%s: Timeout Error.return%d\n", __func__, -ETIME); + pch_i2c_init(adap); return -ETIME; } @@ -456,6 +457,7 @@ static s32 pch_i2c_writebytes(struct i2c_adapter *i2c_adap, pch_err(adap, "Lost Arbitration\n"); pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMAL_BIT); pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT); + pch_i2c_init(adap); return -EAGAIN; } else { /* wait-event timeout */ pch_i2c_stop(adap); @@ -634,6 +636,7 @@ static s32 pch_i2c_readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, pch_err(adap, "Lost Arbitration\n"); pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMAL_BIT); pch_clrbit(adap->pch_base_address, PCH_I2CSR, I2CMIF_BIT); + pch_i2c_init(adap); return -EAGAIN; } else { /* wait-event timeout */ pch_i2c_stop(adap); -- cgit v1.2.3 From f533c61e1921b93aa247d72d39c3fbe045340a9a Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Wed, 12 Oct 2011 17:33:00 -0700 Subject: i2c-tegra: __iomem annotation fix drivers/i2c/busses/i2c-tegra.c:585:7: warning: incorrect type in assignment (different address spaces) drivers/i2c/busses/i2c-tegra.c:585:7: expected void *base drivers/i2c/busses/i2c-tegra.c:585:7: got void [noderef] * drivers/i2c/busses/i2c-tegra.c:619:16: warning: incorrect type in assignment (different address spaces) drivers/i2c/busses/i2c-tegra.c:619:16: expected void [noderef] *base drivers/i2c/busses/i2c-tegra.c:619:16: got void *base drivers/i2c/busses/i2c-tegra.c:689:10: warning: incorrect type in argument 1 (different address spaces) drivers/i2c/busses/i2c-tegra.c:689:10: expected void volatile [noderef] *addr drivers/i2c/busses/i2c-tegra.c:689:10: got void *base Signed-off-by: Olof Johansson Acked-by; Stephen Warren Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-tegra.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 3c94c4a81a55..b0505309faa7 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -566,7 +566,7 @@ static int tegra_i2c_probe(struct platform_device *pdev) struct clk *clk; struct clk *i2c_clk; const unsigned int *prop; - void *base; + void __iomem *base; int irq; int ret = 0; -- cgit v1.2.3 From c5de6467d2a54eb81b139f29b217d0394e8a790c Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Sat, 22 Oct 2011 13:34:36 +0200 Subject: i2c-au1550: remove usage of volatile keyword Replace the usage of "volatile"s with register accessor functions. Signed-off-by: Manuel Lauss Signed-off-by: Ben Dooks --- arch/mips/include/asm/mach-au1x00/au1xxx_psc.h | 13 -- drivers/i2c/busses/i2c-au1550.c | 252 ++++++++++--------------- 2 files changed, 99 insertions(+), 166 deletions(-) (limited to 'drivers/i2c') diff --git a/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h b/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h index 892b7f168eb4..5a5cb7386427 100644 --- a/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h +++ b/arch/mips/include/asm/mach-au1x00/au1xxx_psc.h @@ -394,19 +394,6 @@ typedef struct psc_spi { #define PSC_SPITXRX_LC (1 << 29) #define PSC_SPITXRX_SR (1 << 28) -/* PSC in SMBus (I2C) Mode. */ -typedef struct psc_smb { - u32 psc_sel; - u32 psc_ctrl; - u32 psc_smbcfg; - u32 psc_smbmsk; - u32 psc_smbpcr; - u32 psc_smbstat; - u32 psc_smbevnt; - u32 psc_smbtxrx; - u32 psc_smbtmr; -} psc_smb_t; - /* SMBus Config Register. */ #define PSC_SMBCFG_RT_MASK (3 << 30) #define PSC_SMBCFG_RT_FIFO1 (0 << 30) diff --git a/drivers/i2c/busses/i2c-au1550.c b/drivers/i2c/busses/i2c-au1550.c index 532828bc50e6..70b027c9037d 100644 --- a/drivers/i2c/busses/i2c-au1550.c +++ b/drivers/i2c/busses/i2c-au1550.c @@ -39,29 +39,42 @@ #include #include +#define PSC_SEL 0x00 +#define PSC_CTRL 0x04 +#define PSC_SMBCFG 0x08 +#define PSC_SMBMSK 0x0C +#define PSC_SMBPCR 0x10 +#define PSC_SMBSTAT 0x14 +#define PSC_SMBEVNT 0x18 +#define PSC_SMBTXRX 0x1C +#define PSC_SMBTMR 0x20 + struct i2c_au1550_data { - u32 psc_base; + void __iomem *psc_base; int xfer_timeout; int ack_timeout; struct i2c_adapter adap; struct resource *ioarea; }; -static int -wait_xfer_done(struct i2c_au1550_data *adap) +static inline void WR(struct i2c_au1550_data *a, int r, unsigned long v) { - u32 stat; - int i; - volatile psc_smb_t *sp; + __raw_writel(v, a->psc_base + r); + wmb(); +} - sp = (volatile psc_smb_t *)(adap->psc_base); +static inline unsigned long RD(struct i2c_au1550_data *a, int r) +{ + return __raw_readl(a->psc_base + r); +} - /* Wait for Tx Buffer Empty - */ +static int wait_xfer_done(struct i2c_au1550_data *adap) +{ + int i; + + /* Wait for Tx Buffer Empty */ for (i = 0; i < adap->xfer_timeout; i++) { - stat = sp->psc_smbstat; - au_sync(); - if ((stat & PSC_SMBSTAT_TE) != 0) + if (RD(adap, PSC_SMBSTAT) & PSC_SMBSTAT_TE) return 0; udelay(1); @@ -70,41 +83,27 @@ wait_xfer_done(struct i2c_au1550_data *adap) return -ETIMEDOUT; } -static int -wait_ack(struct i2c_au1550_data *adap) +static int wait_ack(struct i2c_au1550_data *adap) { - u32 stat; - volatile psc_smb_t *sp; + unsigned long stat; if (wait_xfer_done(adap)) return -ETIMEDOUT; - sp = (volatile psc_smb_t *)(adap->psc_base); - - stat = sp->psc_smbevnt; - au_sync(); - + stat = RD(adap, PSC_SMBEVNT); if ((stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) != 0) return -ETIMEDOUT; return 0; } -static int -wait_master_done(struct i2c_au1550_data *adap) +static int wait_master_done(struct i2c_au1550_data *adap) { - u32 stat; - int i; - volatile psc_smb_t *sp; + int i; - sp = (volatile psc_smb_t *)(adap->psc_base); - - /* Wait for Master Done. - */ + /* Wait for Master Done. */ for (i = 0; i < adap->xfer_timeout; i++) { - stat = sp->psc_smbevnt; - au_sync(); - if ((stat & PSC_SMBEVNT_MD) != 0) + if ((RD(adap, PSC_SMBEVNT) & PSC_SMBEVNT_MD) != 0) return 0; udelay(1); } @@ -115,29 +114,20 @@ wait_master_done(struct i2c_au1550_data *adap) static int do_address(struct i2c_au1550_data *adap, unsigned int addr, int rd, int q) { - volatile psc_smb_t *sp; - u32 stat; + unsigned long stat; - sp = (volatile psc_smb_t *)(adap->psc_base); - - /* Reset the FIFOs, clear events. - */ - stat = sp->psc_smbstat; - sp->psc_smbevnt = PSC_SMBEVNT_ALLCLR; - au_sync(); + /* Reset the FIFOs, clear events. */ + stat = RD(adap, PSC_SMBSTAT); + WR(adap, PSC_SMBEVNT, PSC_SMBEVNT_ALLCLR); if (!(stat & PSC_SMBSTAT_TE) || !(stat & PSC_SMBSTAT_RE)) { - sp->psc_smbpcr = PSC_SMBPCR_DC; - au_sync(); - do { - stat = sp->psc_smbpcr; - au_sync(); - } while ((stat & PSC_SMBPCR_DC) != 0); + WR(adap, PSC_SMBPCR, PSC_SMBPCR_DC); + while ((RD(adap, PSC_SMBPCR) & PSC_SMBPCR_DC) != 0) + cpu_relax(); udelay(50); } - /* Write out the i2c chip address and specify operation - */ + /* Write out the i2c chip address and specify operation */ addr <<= 1; if (rd) addr |= 1; @@ -146,56 +136,42 @@ do_address(struct i2c_au1550_data *adap, unsigned int addr, int rd, int q) if (q) addr |= PSC_SMBTXRX_STP; - /* Put byte into fifo, start up master. - */ - sp->psc_smbtxrx = addr; - au_sync(); - sp->psc_smbpcr = PSC_SMBPCR_MS; - au_sync(); + /* Put byte into fifo, start up master. */ + WR(adap, PSC_SMBTXRX, addr); + WR(adap, PSC_SMBPCR, PSC_SMBPCR_MS); if (wait_ack(adap)) return -EIO; return (q) ? wait_master_done(adap) : 0; } -static u32 -wait_for_rx_byte(struct i2c_au1550_data *adap, u32 *ret_data) +static int wait_for_rx_byte(struct i2c_au1550_data *adap, unsigned char *out) { - int j; - u32 data, stat; - volatile psc_smb_t *sp; + int j; if (wait_xfer_done(adap)) return -EIO; - sp = (volatile psc_smb_t *)(adap->psc_base); - j = adap->xfer_timeout * 100; do { j--; if (j <= 0) return -EIO; - stat = sp->psc_smbstat; - au_sync(); - if ((stat & PSC_SMBSTAT_RE) == 0) + if ((RD(adap, PSC_SMBSTAT) & PSC_SMBSTAT_RE) == 0) j = 0; else udelay(1); } while (j > 0); - data = sp->psc_smbtxrx; - au_sync(); - *ret_data = data; + + *out = RD(adap, PSC_SMBTXRX); return 0; } -static int -i2c_read(struct i2c_au1550_data *adap, unsigned char *buf, +static int i2c_read(struct i2c_au1550_data *adap, unsigned char *buf, unsigned int len) { - int i; - u32 data; - volatile psc_smb_t *sp; + int i; if (len == 0) return 0; @@ -204,62 +180,46 @@ i2c_read(struct i2c_au1550_data *adap, unsigned char *buf, * zero bytes for timing, waiting for bytes to appear in the * receive fifo, then reading the bytes. */ - - sp = (volatile psc_smb_t *)(adap->psc_base); - i = 0; - while (i < (len-1)) { - sp->psc_smbtxrx = 0; - au_sync(); - if (wait_for_rx_byte(adap, &data)) + while (i < (len - 1)) { + WR(adap, PSC_SMBTXRX, 0); + if (wait_for_rx_byte(adap, &buf[i])) return -EIO; - buf[i] = data; i++; } - /* The last byte has to indicate transfer done. - */ - sp->psc_smbtxrx = PSC_SMBTXRX_STP; - au_sync(); + /* The last byte has to indicate transfer done. */ + WR(adap, PSC_SMBTXRX, PSC_SMBTXRX_STP); if (wait_master_done(adap)) return -EIO; - data = sp->psc_smbtxrx; - au_sync(); - buf[i] = data; + buf[i] = (unsigned char)(RD(adap, PSC_SMBTXRX) & 0xff); return 0; } -static int -i2c_write(struct i2c_au1550_data *adap, unsigned char *buf, +static int i2c_write(struct i2c_au1550_data *adap, unsigned char *buf, unsigned int len) { - int i; - u32 data; - volatile psc_smb_t *sp; + int i; + unsigned long data; if (len == 0) return 0; - sp = (volatile psc_smb_t *)(adap->psc_base); - i = 0; while (i < (len-1)) { data = buf[i]; - sp->psc_smbtxrx = data; - au_sync(); + WR(adap, PSC_SMBTXRX, data); if (wait_ack(adap)) return -EIO; i++; } - /* The last byte has to indicate transfer done. - */ + /* The last byte has to indicate transfer done. */ data = buf[i]; data |= PSC_SMBTXRX_STP; - sp->psc_smbtxrx = data; - au_sync(); + WR(adap, PSC_SMBTXRX, data); if (wait_master_done(adap)) return -EIO; return 0; @@ -269,12 +229,10 @@ static int au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num) { struct i2c_au1550_data *adap = i2c_adap->algo_data; - volatile psc_smb_t *sp = (volatile psc_smb_t *)adap->psc_base; struct i2c_msg *p; int i, err = 0; - sp->psc_ctrl = PSC_CTRL_ENABLE; - au_sync(); + WR(adap, PSC_CTRL, PSC_CTRL_ENABLE); for (i = 0; !err && i < num; i++) { p = &msgs[i]; @@ -293,14 +251,12 @@ au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num) if (err == 0) err = num; - sp->psc_ctrl = PSC_CTRL_SUSPEND; - au_sync(); + WR(adap, PSC_CTRL, PSC_CTRL_SUSPEND); return err; } -static u32 -au1550_func(struct i2c_adapter *adap) +static u32 au1550_func(struct i2c_adapter *adap) { return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; } @@ -312,57 +268,45 @@ static const struct i2c_algorithm au1550_algo = { static void i2c_au1550_setup(struct i2c_au1550_data *priv) { - volatile psc_smb_t *sp = (volatile psc_smb_t *)priv->psc_base; - u32 stat; - - sp->psc_ctrl = PSC_CTRL_DISABLE; - au_sync(); - sp->psc_sel = PSC_SEL_PS_SMBUSMODE; - sp->psc_smbcfg = 0; - au_sync(); - sp->psc_ctrl = PSC_CTRL_ENABLE; - au_sync(); - do { - stat = sp->psc_smbstat; - au_sync(); - } while ((stat & PSC_SMBSTAT_SR) == 0); + unsigned long cfg; - sp->psc_smbcfg = (PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 | - PSC_SMBCFG_DD_DISABLE); + WR(priv, PSC_CTRL, PSC_CTRL_DISABLE); + WR(priv, PSC_SEL, PSC_SEL_PS_SMBUSMODE); + WR(priv, PSC_SMBCFG, 0); + WR(priv, PSC_CTRL, PSC_CTRL_ENABLE); + while ((RD(priv, PSC_SMBSTAT) & PSC_SMBSTAT_SR) == 0) + cpu_relax(); + + cfg = PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 | PSC_SMBCFG_DD_DISABLE; + WR(priv, PSC_SMBCFG, cfg); /* Divide by 8 to get a 6.25 MHz clock. The later protocol * timings are based on this clock. */ - sp->psc_smbcfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV8); - sp->psc_smbmsk = PSC_SMBMSK_ALLMASK; - au_sync(); + cfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV8); + WR(priv, PSC_SMBCFG, cfg); + WR(priv, PSC_SMBMSK, PSC_SMBMSK_ALLMASK); /* Set the protocol timer values. See Table 71 in the * Au1550 Data Book for standard timing values. */ - sp->psc_smbtmr = PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \ + WR(priv, PSC_SMBTMR, PSC_SMBTMR_SET_TH(0) | PSC_SMBTMR_SET_PS(15) | \ PSC_SMBTMR_SET_PU(15) | PSC_SMBTMR_SET_SH(15) | \ PSC_SMBTMR_SET_SU(15) | PSC_SMBTMR_SET_CL(15) | \ - PSC_SMBTMR_SET_CH(15); - au_sync(); + PSC_SMBTMR_SET_CH(15)); - sp->psc_smbcfg |= PSC_SMBCFG_DE_ENABLE; - do { - stat = sp->psc_smbstat; - au_sync(); - } while ((stat & PSC_SMBSTAT_SR) == 0); + cfg |= PSC_SMBCFG_DE_ENABLE; + WR(priv, PSC_SMBCFG, cfg); + while ((RD(priv, PSC_SMBSTAT) & PSC_SMBSTAT_SR) == 0) + cpu_relax(); - sp->psc_ctrl = PSC_CTRL_SUSPEND; - au_sync(); + WR(priv, PSC_CTRL, PSC_CTRL_SUSPEND); } static void i2c_au1550_disable(struct i2c_au1550_data *priv) { - volatile psc_smb_t *sp = (volatile psc_smb_t *)priv->psc_base; - - sp->psc_smbcfg = 0; - sp->psc_ctrl = PSC_CTRL_DISABLE; - au_sync(); + WR(priv, PSC_SMBCFG, 0); + WR(priv, PSC_CTRL, PSC_CTRL_DISABLE); } /* @@ -396,7 +340,11 @@ i2c_au1550_probe(struct platform_device *pdev) goto out_mem; } - priv->psc_base = CKSEG1ADDR(r->start); + priv->psc_base = ioremap(r->start, resource_size(r)); + if (!priv->psc_base) { + ret = -EIO; + goto out_map; + } priv->xfer_timeout = 200; priv->ack_timeout = 200; @@ -406,8 +354,7 @@ i2c_au1550_probe(struct platform_device *pdev) priv->adap.dev.parent = &pdev->dev; strlcpy(priv->adap.name, "Au1xxx PSC I2C", sizeof(priv->adap.name)); - /* Now, set up the PSC for SMBus PIO mode. - */ + /* Now, set up the PSC for SMBus PIO mode. */ i2c_au1550_setup(priv); ret = i2c_add_numbered_adapter(&priv->adap); @@ -417,7 +364,8 @@ i2c_au1550_probe(struct platform_device *pdev) } i2c_au1550_disable(priv); - + iounmap(priv->psc_base); +out_map: release_resource(priv->ioarea); kfree(priv->ioarea); out_mem: @@ -426,14 +374,14 @@ out: return ret; } -static int __devexit -i2c_au1550_remove(struct platform_device *pdev) +static int __devexit i2c_au1550_remove(struct platform_device *pdev) { struct i2c_au1550_data *priv = platform_get_drvdata(pdev); platform_set_drvdata(pdev, NULL); i2c_del_adapter(&priv->adap); i2c_au1550_disable(priv); + iounmap(priv->psc_base); release_resource(priv->ioarea); kfree(priv->ioarea); kfree(priv); @@ -476,14 +424,12 @@ static struct platform_driver au1xpsc_smbus_driver = { .resume = i2c_au1550_resume, }; -static int __init -i2c_au1550_init(void) +static int __init i2c_au1550_init(void) { return platform_driver_register(&au1xpsc_smbus_driver); } -static void __exit -i2c_au1550_exit(void) +static void __exit i2c_au1550_exit(void) { platform_driver_unregister(&au1xpsc_smbus_driver); } -- cgit v1.2.3 From 85ea25698843d37b6f79927b2995644623fe1e06 Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Sat, 22 Oct 2011 13:34:37 +0200 Subject: i2c-au1550: remove unused ack_timeout The ack_timeout context member is unused, get rid of it. Signed-off-by: Manuel Lauss Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-au1550.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-au1550.c b/drivers/i2c/busses/i2c-au1550.c index 70b027c9037d..98ee11aa9e2c 100644 --- a/drivers/i2c/busses/i2c-au1550.c +++ b/drivers/i2c/busses/i2c-au1550.c @@ -52,7 +52,6 @@ struct i2c_au1550_data { void __iomem *psc_base; int xfer_timeout; - int ack_timeout; struct i2c_adapter adap; struct resource *ioarea; }; @@ -346,7 +345,6 @@ i2c_au1550_probe(struct platform_device *pdev) goto out_map; } priv->xfer_timeout = 200; - priv->ack_timeout = 200; priv->adap.nr = pdev->id; priv->adap.algo = &au1550_algo; -- cgit v1.2.3 From 84785f120f4d64c5fa8cf4bab1cf07c2507d434f Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Sat, 22 Oct 2011 13:34:38 +0200 Subject: i2c-au1550: increase timeout waiting for master done Double the timeout in the loop which busy-waits for the "master-done" bit to be set. This bit indicates whether an i2c transaction has completed; on the DB1300 and DB1550 boards this timeout is slightly too short and causes transactions to the WM8731 codec to be falsely flagged as failed. The timeout itself is necessary since transactions to non-existant slaves never set this bit in the first place (and cause i2cdetect to hang). With this change the WM8731 codec on the DB1300/DB1550 boards is correctly detected and initialized. Signed-off-by: Manuel Lauss Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-au1550.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-au1550.c b/drivers/i2c/busses/i2c-au1550.c index 98ee11aa9e2c..4f5150c417a2 100644 --- a/drivers/i2c/busses/i2c-au1550.c +++ b/drivers/i2c/busses/i2c-au1550.c @@ -101,7 +101,7 @@ static int wait_master_done(struct i2c_au1550_data *adap) int i; /* Wait for Master Done. */ - for (i = 0; i < adap->xfer_timeout; i++) { + for (i = 0; i < 2 * adap->xfer_timeout; i++) { if ((RD(adap, PSC_SMBEVNT) & PSC_SMBEVNT_MD) != 0) return 0; udelay(1); -- cgit v1.2.3 From 46f344e2a0844d9b068bffa38cb48b52f4bd2d4a Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Sat, 22 Oct 2011 13:34:39 +0200 Subject: i2c-au1550: dev_pm_ops conversion use newer dev_pm_ops for PM Signed-off-by: Manuel Lauss Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-au1550.c | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-au1550.c b/drivers/i2c/busses/i2c-au1550.c index 4f5150c417a2..4f757a2da8cc 100644 --- a/drivers/i2c/busses/i2c-au1550.c +++ b/drivers/i2c/busses/i2c-au1550.c @@ -387,39 +387,43 @@ static int __devexit i2c_au1550_remove(struct platform_device *pdev) } #ifdef CONFIG_PM -static int -i2c_au1550_suspend(struct platform_device *pdev, pm_message_t state) +static int i2c_au1550_suspend(struct device *dev) { - struct i2c_au1550_data *priv = platform_get_drvdata(pdev); + struct i2c_au1550_data *priv = dev_get_drvdata(dev); i2c_au1550_disable(priv); return 0; } -static int -i2c_au1550_resume(struct platform_device *pdev) +static int i2c_au1550_resume(struct device *dev) { - struct i2c_au1550_data *priv = platform_get_drvdata(pdev); + struct i2c_au1550_data *priv = dev_get_drvdata(dev); i2c_au1550_setup(priv); return 0; } + +static const struct dev_pm_ops i2c_au1550_pmops = { + .suspend = i2c_au1550_suspend, + .resume = i2c_au1550_resume, +}; + +#define AU1XPSC_SMBUS_PMOPS (&i2c_au1550_pmops) + #else -#define i2c_au1550_suspend NULL -#define i2c_au1550_resume NULL +#define AU1XPSC_SMBUS_PMOPS NULL #endif static struct platform_driver au1xpsc_smbus_driver = { .driver = { .name = "au1xpsc_smbus", .owner = THIS_MODULE, + .pm = AU1XPSC_SMBUS_PMOPS, }, .probe = i2c_au1550_probe, .remove = __devexit_p(i2c_au1550_remove), - .suspend = i2c_au1550_suspend, - .resume = i2c_au1550_resume, }; static int __init i2c_au1550_init(void) -- cgit v1.2.3 From 8abf6fbbd22bc777fd4027cbc55e99cdfb7a8324 Mon Sep 17 00:00:00 2001 From: Jonas Aaberg Date: Thu, 20 Oct 2011 18:23:01 +0200 Subject: i2c-nomadik: cosmetic coding style corrections This fixes a number of whitespace and punctuation problems around the Nomadik I2C driver. Signed-off-by: Jonas Aaberg Signed-off-by: Linus Walleij Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-nomadik.c | 89 +++++++++++++++++++++------------------- 1 file changed, 46 insertions(+), 43 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c index b228e09c5d05..ce4fd801a8c2 100644 --- a/drivers/i2c/busses/i2c-nomadik.c +++ b/drivers/i2c/busses/i2c-nomadik.c @@ -63,11 +63,11 @@ /* Master controller (MCR) register */ #define I2C_MCR_OP (0x1 << 0) /* Operation */ #define I2C_MCR_A7 (0x7f << 1) /* 7-bit address */ -#define I2C_MCR_EA10 (0x7 << 8) /* 10-bit Extended address */ +#define I2C_MCR_EA10 (0x7 << 8) /* 10-bit Extended address */ #define I2C_MCR_SB (0x1 << 11) /* Extended address */ #define I2C_MCR_AM (0x3 << 12) /* Address type */ -#define I2C_MCR_STOP (0x1 << 14) /* Stop condition */ -#define I2C_MCR_LENGTH (0x7ff << 15) /* Transaction length */ +#define I2C_MCR_STOP (0x1 << 14) /* Stop condition */ +#define I2C_MCR_LENGTH (0x7ff << 15) /* Transaction length */ /* Status register (SR) */ #define I2C_SR_OP (0x3 << 0) /* Operation */ @@ -77,7 +77,7 @@ #define I2C_SR_LENGTH (0x7ff << 9) /* Transfer length */ /* Interrupt mask set/clear (IMSCR) bits */ -#define I2C_IT_TXFE (0x1 << 0) +#define I2C_IT_TXFE (0x1 << 0) #define I2C_IT_TXFNE (0x1 << 1) #define I2C_IT_TXFF (0x1 << 2) #define I2C_IT_TXFOVR (0x1 << 3) @@ -135,31 +135,31 @@ struct i2c_nmk_client { }; /** - * struct nmk_i2c_dev - private data structure of the controller - * @pdev: parent platform device - * @adap: corresponding I2C adapter - * @irq: interrupt line for the controller - * @virtbase: virtual io memory area - * @clk: hardware i2c block clock - * @cfg: machine provided controller configuration - * @cli: holder of client specific data - * @stop: stop condition - * @xfer_complete: acknowledge completion for a I2C message - * @result: controller propogated result - * @regulator: pointer to i2c regulator - * @busy: Busy doing transfer + * struct nmk_i2c_dev - private data structure of the controller. + * @pdev: parent platform device. + * @adap: corresponding I2C adapter. + * @irq: interrupt line for the controller. + * @virtbase: virtual io memory area. + * @clk: hardware i2c block clock. + * @cfg: machine provided controller configuration. + * @cli: holder of client specific data. + * @stop: stop condition. + * @xfer_complete: acknowledge completion for a I2C message. + * @result: controller propogated result. + * @regulator: pointer to i2c regulator. + * @busy: Busy doing transfer. */ struct nmk_i2c_dev { struct platform_device *pdev; - struct i2c_adapter adap; - int irq; + struct i2c_adapter adap; + int irq; void __iomem *virtbase; struct clk *clk; struct nmk_i2c_controller cfg; struct i2c_nmk_client cli; - int stop; + int stop; struct completion xfer_complete; - int result; + int result; struct regulator *regulator; bool busy; }; @@ -217,8 +217,9 @@ static int flush_i2c_fifo(struct nmk_i2c_dev *dev) } } - dev_err(&dev->pdev->dev, "flushing operation timed out " - "giving up after %d attempts", LOOP_ATTEMPTS); + dev_err(&dev->pdev->dev, + "flushing operation timed out giving up after %d attempts", + LOOP_ATTEMPTS); return -ETIMEDOUT; } @@ -270,7 +271,7 @@ exit: } /* enable peripheral, master mode operation */ -#define DEFAULT_I2C_REG_CR ((1 << 1) | I2C_CR_PE) +#define DEFAULT_I2C_REG_CR ((1 << 1) | I2C_CR_PE) /** * load_i2c_mcr_reg() - load the MCR register @@ -363,8 +364,8 @@ static void setup_i2c_controller(struct nmk_i2c_dev *dev) * and high speed (up to 3.4 Mb/s) */ if (dev->cfg.sm > I2C_FREQ_MODE_FAST) { - dev_err(&dev->pdev->dev, "do not support this mode " - "defaulting to std. mode\n"); + dev_err(&dev->pdev->dev, + "do not support this mode defaulting to std. mode\n"); brcr2 = i2c_clk/(100000 * 2) & 0xffff; writel((brcr1 | brcr2), dev->virtbase + I2C_BRCR); writel(I2C_FREQ_MODE_STANDARD << 4, @@ -423,7 +424,7 @@ static int read_i2c(struct nmk_i2c_dev *dev) if (timeout < 0) { dev_err(&dev->pdev->dev, - "wait_for_completion_timeout" + "wait_for_completion_timeout " "returned %d waiting for event\n", timeout); status = timeout; } @@ -556,8 +557,8 @@ static int nmk_i2c_xfer_one(struct nmk_i2c_dev *dev, u16 flags) if (((i2c_sr >> 2) & 0x3) == 0x3) { /* get the abort cause */ cause = (i2c_sr >> 4) & 0x7; - dev_err(&dev->pdev->dev, "%s\n", cause - >= ARRAY_SIZE(abort_causes) ? + dev_err(&dev->pdev->dev, "%s\n", + cause >= ARRAY_SIZE(abort_causes) ? "unknown reason" : abort_causes[cause]); } @@ -582,13 +583,13 @@ static int nmk_i2c_xfer_one(struct nmk_i2c_dev *dev, u16 flags) * * NOTE: * READ TRANSFER : We impose a restriction of the first message to be the - * index message for any read transaction. - * - a no index is coded as '0', - * - 2byte big endian index is coded as '3' - * !!! msg[0].buf holds the actual index. - * This is compatible with generic messages of smbus emulator - * that send a one byte index. - * eg. a I2C transation to read 2 bytes from index 0 + * index message for any read transaction. + * - a no index is coded as '0', + * - 2byte big endian index is coded as '3' + * !!! msg[0].buf holds the actual index. + * This is compatible with generic messages of smbus emulator + * that send a one byte index. + * eg. a I2C transation to read 2 bytes from index 0 * idx = 0; * msg[0].addr = client->addr; * msg[0].flags = 0x0; @@ -644,8 +645,8 @@ static int nmk_i2c_xfer(struct i2c_adapter *i2c_adap, for (i = 0; i < num_msgs; i++) { if (unlikely(msgs[i].flags & I2C_M_TEN)) { - dev_err(&dev->pdev->dev, "10 bit addressing" - "not supported\n"); + dev_err(&dev->pdev->dev, + "10 bit addressing not supported\n"); status = -EINVAL; goto out; @@ -789,8 +790,9 @@ static irqreturn_t i2c_irq_handler(int irq, void *arg) if (dev->cli.count) { dev->result = -EIO; - dev_err(&dev->pdev->dev, "%lu bytes still remain to be" - "xfered\n", dev->cli.count); + dev_err(&dev->pdev->dev, + "%lu bytes still remain to be xfered\n", + dev->cli.count); (void) init_hw(dev); } complete(&dev->xfer_complete); @@ -923,7 +925,7 @@ static int __devinit nmk_i2c_probe(struct platform_device *pdev) } if (request_mem_region(res->start, resource_size(res), - DRIVER_NAME "I/O region") == NULL) { + DRIVER_NAME "I/O region") == NULL) { ret = -EBUSY; goto err_no_region; } @@ -980,8 +982,9 @@ static int __devinit nmk_i2c_probe(struct platform_device *pdev) i2c_set_adapdata(adap, dev); - dev_info(&pdev->dev, "initialize %s on virtual " - "base %p\n", adap->name, dev->virtbase); + dev_info(&pdev->dev, + "initialize %s on virtual base %p\n", + adap->name, dev->virtbase); ret = i2c_add_numbered_adapter(adap); if (ret) { -- cgit v1.2.3 From 4fd81eb2d64295ab038a3ea9d44e0eac85a6648c Mon Sep 17 00:00:00 2001 From: Thomas Abraham Date: Tue, 13 Sep 2011 09:46:04 +0530 Subject: i2c-s3c2410: Keep a copy of platform data and use it The platform data is copied into driver's private data and the copy is used for all access to the platform data. This simpifies the addition of device tree support for the i2c-s3c2410 driver. Cc: Ben Dooks Signed-off-by: Thomas Abraham Acked-by: Grant Likely Signed-off-by: Ben Dooks --- drivers/i2c/busses/i2c-s3c2410.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c index f84a63c6dd97..266dd83a3ec2 100644 --- a/drivers/i2c/busses/i2c-s3c2410.c +++ b/drivers/i2c/busses/i2c-s3c2410.c @@ -78,6 +78,7 @@ struct s3c24xx_i2c { struct resource *ioarea; struct i2c_adapter adap; + struct s3c2410_platform_i2c *pdata; #ifdef CONFIG_CPU_FREQ struct notifier_block freq_transition; #endif @@ -625,7 +626,7 @@ static int s3c24xx_i2c_calcdivisor(unsigned long clkin, unsigned int wanted, static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got) { - struct s3c2410_platform_i2c *pdata = i2c->dev->platform_data; + struct s3c2410_platform_i2c *pdata = i2c->pdata; unsigned long clkin = clk_get_rate(i2c->clk); unsigned int divs, div1; unsigned long target_frequency; @@ -754,7 +755,7 @@ static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c) /* get the plafrom data */ - pdata = i2c->dev->platform_data; + pdata = i2c->pdata; /* inititalise the gpio */ @@ -793,7 +794,7 @@ static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c) static int s3c24xx_i2c_probe(struct platform_device *pdev) { struct s3c24xx_i2c *i2c; - struct s3c2410_platform_i2c *pdata; + struct s3c2410_platform_i2c *pdata = NULL; struct resource *res; int ret; @@ -809,6 +810,15 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev) return -ENOMEM; } + i2c->pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + if (!i2c->pdata) { + ret = -ENOMEM; + goto err_noclk; + } + + if (pdata) + memcpy(i2c->pdata, pdata, sizeof(*pdata)); + strlcpy(i2c->adap.name, "s3c2410-i2c", sizeof(i2c->adap.name)); i2c->adap.owner = THIS_MODULE; i2c->adap.algo = &s3c24xx_i2c_algorithm; @@ -903,7 +913,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev) * being bus 0. */ - i2c->adap.nr = pdata->bus_num; + i2c->adap.nr = i2c->pdata->bus_num; ret = i2c_add_numbered_adapter(&i2c->adap); if (ret < 0) { -- cgit v1.2.3 From 5a5f50802f5a31b9e15de8df40d5621af970a560 Mon Sep 17 00:00:00 2001 From: Thomas Abraham Date: Tue, 13 Sep 2011 09:46:05 +0530 Subject: i2c-s3c2410: Add device tree support Add device tree probe support for Samsung's s3c2410 i2c driver. Cc: Ben Dooks Signed-off-by: Thomas Abraham Acked-by: Grant Likely Signed-off-by: Ben Dooks --- .../devicetree/bindings/i2c/samsung-i2c.txt | 39 ++++++++ drivers/i2c/busses/i2c-s3c2410.c | 110 ++++++++++++++++++++- 2 files changed, 145 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/i2c/samsung-i2c.txt (limited to 'drivers/i2c') diff --git a/Documentation/devicetree/bindings/i2c/samsung-i2c.txt b/Documentation/devicetree/bindings/i2c/samsung-i2c.txt new file mode 100644 index 000000000000..38832c712919 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/samsung-i2c.txt @@ -0,0 +1,39 @@ +* Samsung's I2C controller + +The Samsung's I2C controller is used to interface with I2C devices. + +Required properties: + - compatible: value should be either of the following. + (a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c. + (b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c. + - reg: physical base address of the controller and length of memory mapped + region. + - interrupts: interrupt number to the cpu. + - samsung,i2c-sda-delay: Delay (in ns) applied to data line (SDA) edges. + - gpios: The order of the gpios should be the following: . + The gpio specifier depends on the gpio controller. + +Optional properties: + - samsung,i2c-slave-addr: Slave address in multi-master enviroment. If not + specified, default value is 0. + - samsung,i2c-max-bus-freq: Desired frequency in Hz of the bus. If not + specified, the default value in Hz is 100000. + +Example: + + i2c@13870000 { + compatible = "samsung,s3c2440-i2c"; + reg = <0x13870000 0x100>; + interrupts = <345>; + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <100000>; + gpios = <&gpd1 2 0 /* SDA */ + &gpd1 3 0 /* SCL */>; + #address-cells = <1>; + #size-cells = <0>; + + wm8994@1a { + compatible = "wlf,wm8994"; + reg = <0x1a>; + }; + }; diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c index 266dd83a3ec2..9c00ad1f50a2 100644 --- a/drivers/i2c/busses/i2c-s3c2410.c +++ b/drivers/i2c/busses/i2c-s3c2410.c @@ -35,6 +35,8 @@ #include #include #include +#include +#include #include @@ -79,6 +81,7 @@ struct s3c24xx_i2c { struct i2c_adapter adap; struct s3c2410_platform_i2c *pdata; + int gpios[2]; #ifdef CONFIG_CPU_FREQ struct notifier_block freq_transition; #endif @@ -96,6 +99,12 @@ static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c) struct platform_device *pdev = to_platform_device(i2c->dev); enum s3c24xx_i2c_type type; +#ifdef CONFIG_OF + if (i2c->dev->of_node) + return of_device_is_compatible(i2c->dev->of_node, + "samsung,s3c2440-i2c"); +#endif + type = platform_get_device_id(pdev)->driver_data; return type == TYPE_S3C2440; } @@ -742,6 +751,49 @@ static inline void s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c) } #endif +#ifdef CONFIG_OF +static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c) +{ + int idx, gpio, ret; + + for (idx = 0; idx < 2; idx++) { + gpio = of_get_gpio(i2c->dev->of_node, idx); + if (!gpio_is_valid(gpio)) { + dev_err(i2c->dev, "invalid gpio[%d]: %d\n", idx, gpio); + goto free_gpio; + } + + ret = gpio_request(gpio, "i2c-bus"); + if (ret) { + dev_err(i2c->dev, "gpio [%d] request failed\n", gpio); + goto free_gpio; + } + } + return 0; + +free_gpio: + while (--idx >= 0) + gpio_free(i2c->gpios[idx]); + return -EINVAL; +} + +static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c) +{ + unsigned int idx; + for (idx = 0; idx < 2; idx++) + gpio_free(i2c->gpios[idx]); +} +#else +static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c) +{ + return -EINVAL; +} + +static void s3c24xx_i2c_dt_gpio_free(struct s3c24xx_i2c *i2c) +{ +} +#endif + /* s3c24xx_i2c_init * * initialise the controller, set the IO lines and frequency @@ -761,6 +813,9 @@ static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c) if (pdata->cfg_gpio) pdata->cfg_gpio(to_platform_device(i2c->dev)); + else + if (s3c24xx_i2c_parse_dt_gpio(i2c)) + return -EINVAL; /* write slave address */ @@ -786,6 +841,34 @@ static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c) return 0; } +#ifdef CONFIG_OF +/* s3c24xx_i2c_parse_dt + * + * Parse the device tree node and retreive the platform data. +*/ + +static void +s3c24xx_i2c_parse_dt(struct device_node *np, struct s3c24xx_i2c *i2c) +{ + struct s3c2410_platform_i2c *pdata = i2c->pdata; + + if (!np) + return; + + pdata->bus_num = -1; /* i2c bus number is dynamically assigned */ + of_property_read_u32(np, "samsung,i2c-sda-delay", &pdata->sda_delay); + of_property_read_u32(np, "samsung,i2c-slave-addr", &pdata->slave_addr); + of_property_read_u32(np, "samsung,i2c-max-bus-freq", + (u32 *)&pdata->frequency); +} +#else +static void +s3c24xx_i2c_parse_dt(struct device_node *np, struct s3c24xx_i2c *i2c) +{ + return; +} +#endif + /* s3c24xx_i2c_probe * * called by the bus driver when a suitable device is found @@ -798,10 +881,12 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev) struct resource *res; int ret; - pdata = pdev->dev.platform_data; - if (!pdata) { - dev_err(&pdev->dev, "no platform data\n"); - return -EINVAL; + if (!pdev->dev.of_node) { + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "no platform data\n"); + return -EINVAL; + } } i2c = kzalloc(sizeof(struct s3c24xx_i2c), GFP_KERNEL); @@ -818,6 +903,8 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev) if (pdata) memcpy(i2c->pdata, pdata, sizeof(*pdata)); + else + s3c24xx_i2c_parse_dt(pdev->dev.of_node, i2c); strlcpy(i2c->adap.name, "s3c2410-i2c", sizeof(i2c->adap.name)); i2c->adap.owner = THIS_MODULE; @@ -914,6 +1001,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev) */ i2c->adap.nr = i2c->pdata->bus_num; + i2c->adap.dev.of_node = pdev->dev.of_node; ret = i2c_add_numbered_adapter(&i2c->adap); if (ret < 0) { @@ -921,6 +1009,7 @@ static int s3c24xx_i2c_probe(struct platform_device *pdev) goto err_cpufreq; } + of_i2c_register_devices(&i2c->adap); platform_set_drvdata(pdev, i2c); dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev)); @@ -969,6 +1058,7 @@ static int s3c24xx_i2c_remove(struct platform_device *pdev) iounmap(i2c->regs); release_resource(i2c->ioarea); + s3c24xx_i2c_dt_gpio_free(i2c); kfree(i2c->ioarea); kfree(i2c); @@ -1022,6 +1112,17 @@ static struct platform_device_id s3c24xx_driver_ids[] = { }; MODULE_DEVICE_TABLE(platform, s3c24xx_driver_ids); +#ifdef CONFIG_OF +static const struct of_device_id s3c24xx_i2c_match[] = { + { .compatible = "samsung,s3c2410-i2c" }, + { .compatible = "samsung,s3c2440-i2c" }, + {}, +}; +MODULE_DEVICE_TABLE(of, s3c24xx_i2c_match); +#else +#define s3c24xx_i2c_match NULL +#endif + static struct platform_driver s3c24xx_i2c_driver = { .probe = s3c24xx_i2c_probe, .remove = s3c24xx_i2c_remove, @@ -1030,6 +1131,7 @@ static struct platform_driver s3c24xx_i2c_driver = { .owner = THIS_MODULE, .name = "s3c-i2c", .pm = S3C24XX_DEV_PM_OPS, + .of_match_table = s3c24xx_i2c_match, }, }; -- cgit v1.2.3 From 9519282a02e74f0bf780eb371a3160824c23965a Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Sun, 30 Oct 2011 13:47:24 +0100 Subject: i2c: I2C_ELEKTOR should depend on HAS_IOPORT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On m68k, I get: drivers/i2c/busses/i2c-elektor.c: In function ‘pcf_isa_init’: drivers/i2c/busses/i2c-elektor.c:153: error: implicit declaration of function ‘ioport_map’ drivers/i2c/busses/i2c-elektor.c:153: warning: assignment makes pointer from integer without a cast drivers/i2c/busses/i2c-elektor.c: In function ‘elektor_probe’: drivers/i2c/busses/i2c-elektor.c:287: error: implicit declaration of function ‘ioport_unmap’ Since commit 82ed223c264def2b15ee4bec2e8c3048092ceb5f ("iomap: make IOPORT/PCI mapping functions conditional"), ioport_map() is only available on platforms that set HAS_IOPORT. Signed-off-by: Geert Uytterhoeven Signed-off-by: Jean Delvare --- drivers/i2c/busses/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 646068e5100b..d1fc5cf9aa4d 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -789,7 +789,7 @@ config I2C_ACORN config I2C_ELEKTOR tristate "Elektor ISA card" - depends on ISA && BROKEN_ON_SMP + depends on ISA && HAS_IOPORT && BROKEN_ON_SMP select I2C_ALGOPCF help This supports the PCF8584 ISA bus I2C adapter. Say Y if you own -- cgit v1.2.3 From 6fcf84a2c0d5f51a457555d76e037cf3cc85bc7a Mon Sep 17 00:00:00 2001 From: Harvey Yang Date: Sun, 30 Oct 2011 13:47:25 +0100 Subject: i2c/scx200_acb: Fix section mismatch warning in scx200_pci_drv WARNING: drivers/i2c/busses/built-in.o(.data+0x47c8): Section mismatch in reference from the variable scx200_pci_drv to the function .devinit.text:scx200_probe() The variable scx200_pci_drv references the function __devinit scx200_probe() If the reference is valid then annotate the variable with __init* or __refdata (see linux/init.h) or name the variable: *driver, *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console Signed-off-by: Harvey Yang Signed-off-by: Jean Delvare --- drivers/i2c/busses/scx200_acb.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/scx200_acb.c b/drivers/i2c/busses/scx200_acb.c index 986e5f62debe..91e349c884c5 100644 --- a/drivers/i2c/busses/scx200_acb.c +++ b/drivers/i2c/busses/scx200_acb.c @@ -550,7 +550,7 @@ static int __devexit scx200_remove(struct platform_device *pdev) return 0; } -static struct platform_driver scx200_pci_drv = { +static struct platform_driver scx200_pci_driver = { .driver = { .name = "cs5535-smb", .owner = THIS_MODULE, @@ -593,14 +593,14 @@ static int __init scx200_acb_init(void) return 0; /* No ISA devices; register the platform driver for PCI-based devices */ - return platform_driver_register(&scx200_pci_drv); + return platform_driver_register(&scx200_pci_driver); } static void __exit scx200_acb_cleanup(void) { struct scx200_acb_iface *iface; - platform_driver_unregister(&scx200_pci_drv); + platform_driver_unregister(&scx200_pci_driver); mutex_lock(&scx200_acb_list_mutex); while ((iface = scx200_acb_list) != NULL) { -- cgit v1.2.3 From 1bddab7f7d5b61f17b0bbd669f60818d553620be Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Sun, 30 Oct 2011 13:47:25 +0100 Subject: i2c-algo-bit: Let user test buses without failing Always failing to register I2C buses when the line testing fails is a little harsh. While such a failure is definitely a bug in the driver that exposes the affected I2C bus, things may still work fine if the missing initialization steps are done later, before the I2C bus is used. So it seems a better debugging tool to just report the test failure by default. I introduce bit_test=2 if anyone really misses the original behavior of bit_test=1. Signed-off-by: Jean Delvare Reviewed-by: Alex Deucher --- drivers/i2c/algos/i2c-algo-bit.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/algos/i2c-algo-bit.c b/drivers/i2c/algos/i2c-algo-bit.c index d6d58684712b..66bebfc81c22 100644 --- a/drivers/i2c/algos/i2c-algo-bit.c +++ b/drivers/i2c/algos/i2c-algo-bit.c @@ -47,8 +47,8 @@ /* ----- global variables --------------------------------------------- */ static int bit_test; /* see if the line-setting functions work */ -module_param(bit_test, bool, 0); -MODULE_PARM_DESC(bit_test, "Test the lines of the bus to see if it is stuck"); +module_param(bit_test, int, S_IRUGO); +MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck"); #ifdef DEBUG static int i2c_debug = 1; @@ -624,7 +624,7 @@ static int __i2c_bit_add_bus(struct i2c_adapter *adap, if (bit_test) { ret = test_bus(adap); - if (ret < 0) + if (bit_test >= 2 && ret < 0) return -ENODEV; } -- cgit v1.2.3 From f6beb67d8e77454200acc3755344944bd946cded Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Sun, 30 Oct 2011 13:47:25 +0100 Subject: i2c-algo-bit: Be verbose on bus testing failure If bus testing fails due to the bus being seen as busy, it might be helpful for developers to know which line is unexpectedly low. Signed-off-by: Jean Delvare Reviewed-by: Alex Deucher --- drivers/i2c/algos/i2c-algo-bit.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/algos/i2c-algo-bit.c b/drivers/i2c/algos/i2c-algo-bit.c index 66bebfc81c22..c20530a98ca3 100644 --- a/drivers/i2c/algos/i2c-algo-bit.c +++ b/drivers/i2c/algos/i2c-algo-bit.c @@ -250,7 +250,9 @@ static int test_bus(struct i2c_adapter *i2c_adap) sda = getsda(adap); scl = (adap->getscl == NULL) ? 1 : getscl(adap); if (!scl || !sda) { - printk(KERN_WARNING "%s: bus seems to be busy\n", name); + printk(KERN_WARNING + "%s: bus seems to be busy (scl=%d, sda=%d)\n", + name, scl, sda); goto bailout; } -- cgit v1.2.3 From abc01b2718ee1d26e83c4c62c4b79806b3240ac7 Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Sun, 30 Oct 2011 13:47:25 +0100 Subject: i2c-algo-bit: Return standard fault codes Adjust i2c-algo-bit to return fault codes compliant with Documentation/i2c/fault-codes, rather than the undocumented and vague -EREMOTEIO. Signed-off-by: Jean Delvare --- drivers/i2c/algos/i2c-algo-bit.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/algos/i2c-algo-bit.c b/drivers/i2c/algos/i2c-algo-bit.c index c20530a98ca3..85584a547c25 100644 --- a/drivers/i2c/algos/i2c-algo-bit.c +++ b/drivers/i2c/algos/i2c-algo-bit.c @@ -443,7 +443,7 @@ static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) acknak(i2c_adap, 0); dev_err(&i2c_adap->dev, "readbytes: invalid " "block length (%d)\n", inval); - return -EREMOTEIO; + return -EPROTO; } /* The original count value accounts for the extra bytes, that is, either 1 for a regular transaction, @@ -472,7 +472,7 @@ static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) * reads, writes as well as 10bit-addresses. * returns: * 0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set - * -x an error occurred (like: -EREMOTEIO if the device did not answer, or + * -x an error occurred (like: -ENXIO if the device did not answer, or * -ETIMEDOUT, for example if the lines are stuck...) */ static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) @@ -495,14 +495,14 @@ static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) if ((ret != 1) && !nak_ok) { dev_err(&i2c_adap->dev, "died at extended address code\n"); - return -EREMOTEIO; + return -ENXIO; } /* the remaining 8 bit address */ ret = i2c_outb(i2c_adap, msg->addr & 0x7f); if ((ret != 1) && !nak_ok) { /* the chip did not ack / xmission error occurred */ dev_err(&i2c_adap->dev, "died at 2nd address code\n"); - return -EREMOTEIO; + return -ENXIO; } if (flags & I2C_M_RD) { bit_dbg(3, &i2c_adap->dev, "emitting repeated " @@ -514,7 +514,7 @@ static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg) if ((ret != 1) && !nak_ok) { dev_err(&i2c_adap->dev, "died at repeated address code\n"); - return -EREMOTEIO; + return -EIO; } } } else { /* normal 7bit address */ @@ -572,7 +572,7 @@ static int bit_xfer(struct i2c_adapter *i2c_adap, ret, ret == 1 ? "" : "s"); if (ret < pmsg->len) { if (ret >= 0) - ret = -EREMOTEIO; + ret = -EIO; goto bailout; } } else { @@ -583,7 +583,7 @@ static int bit_xfer(struct i2c_adapter *i2c_adap, ret, ret == 1 ? "" : "s"); if (ret < pmsg->len) { if (ret >= 0) - ret = -EREMOTEIO; + ret = -EIO; goto bailout; } } -- cgit v1.2.3 From 4403988afc0a92b8faf59b46f51d25fafaf0e63d Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Sun, 30 Oct 2011 13:47:25 +0100 Subject: i2c-algo-pca: Return standard fault codes Adjust i2c-algo-pca to return fault codes compliant with Documentation/i2c/fault-codes, rather than the undocumented and vague -EREMOTEIO. Signed-off-by: Jean Delvare Cc: Wolfram Sang --- drivers/i2c/algos/i2c-algo-pca.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/algos/i2c-algo-pca.c b/drivers/i2c/algos/i2c-algo-pca.c index 4ca9cf9cde73..beb9ffe2564b 100644 --- a/drivers/i2c/algos/i2c-algo-pca.c +++ b/drivers/i2c/algos/i2c-algo-pca.c @@ -196,7 +196,7 @@ static int pca_xfer(struct i2c_adapter *i2c_adap, } else { dev_dbg(&i2c_adap->dev, "bus is not idle. status is " "%#04x\n", state); - return -EAGAIN; + return -EBUSY; } } @@ -224,7 +224,7 @@ static int pca_xfer(struct i2c_adapter *i2c_adap, } curmsg = 0; - ret = -EREMOTEIO; + ret = -EIO; while (curmsg < num) { state = pca_status(adap); @@ -259,6 +259,7 @@ static int pca_xfer(struct i2c_adapter *i2c_adap, case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */ DEB2("NOT ACK received after SLA+W\n"); pca_stop(adap); + ret = -ENXIO; goto out; case 0x40: /* SLA+R has been transmitted; ACK has been received */ @@ -283,6 +284,7 @@ static int pca_xfer(struct i2c_adapter *i2c_adap, case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */ DEB2("NOT ACK received after SLA+R\n"); pca_stop(adap); + ret = -ENXIO; goto out; case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */ -- cgit v1.2.3 From 345df5126e5cf46c8ddf2ec491f1d6e17e29e645 Mon Sep 17 00:00:00 2001 From: Paul Gortmaker Date: Fri, 27 May 2011 10:46:24 -0400 Subject: i2c: add export.h to i2c-boardinfo.c for EXPORT_SYMBOL With module.h being implicitly everywhere via device.h, the absence of explicitly including something for EXPORT_SYMBOL went unnoticed. Since we are heading to fix things up and clean module.h from the device.h file, we need to explicitly include these files now. Signed-off-by: Paul Gortmaker --- drivers/i2c/i2c-boardinfo.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/i2c') diff --git a/drivers/i2c/i2c-boardinfo.c b/drivers/i2c/i2c-boardinfo.c index 3ca2e012e789..10274ffb66d7 100644 --- a/drivers/i2c/i2c-boardinfo.c +++ b/drivers/i2c/i2c-boardinfo.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include "i2c-core.h" -- cgit v1.2.3 From 93cf5d75b9d0b703ca8f4f8f98303ad77ab20d26 Mon Sep 17 00:00:00 2001 From: Paul Gortmaker Date: Fri, 29 Jul 2011 21:14:30 -0700 Subject: i2c: Add module.h to modular files prev. implicitly getting it These files use interfaces from linux/module.h, so they must include that file to avoid build errors when the implicit presence of module.h is removed. [with i2c-pxa-pci.c fix from Randy Dunlap ] Signed-off-by: Paul Gortmaker --- drivers/i2c/busses/i2c-pxa-pci.c | 1 + drivers/i2c/busses/i2c-sh7760.c | 1 + drivers/i2c/busses/i2c-tegra.c | 1 + 3 files changed, 3 insertions(+) (limited to 'drivers/i2c') diff --git a/drivers/i2c/busses/i2c-pxa-pci.c b/drivers/i2c/busses/i2c-pxa-pci.c index b73da6cd6f91..632e088760a3 100644 --- a/drivers/i2c/busses/i2c-pxa-pci.c +++ b/drivers/i2c/busses/i2c-pxa-pci.c @@ -3,6 +3,7 @@ * It does not support slave mode, the register slightly moved. This PCI * device provides three bars, every contains a single I2C controller. */ +#include #include #include #include diff --git a/drivers/i2c/busses/i2c-sh7760.c b/drivers/i2c/busses/i2c-sh7760.c index 3cad8fecc3d3..4cd0a1d44129 100644 --- a/drivers/i2c/busses/i2c-sh7760.c +++ b/drivers/i2c/busses/i2c-sh7760.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 3c94c4a81a55..b402435e9259 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -27,6 +27,7 @@ #include #include #include +#include #include -- cgit v1.2.3