path: root/arch/powerpc/mm/hash_low_64.S
diff options
authorPaul Mackerras <>2007-08-03 19:16:11 +1000
committerPaul Mackerras <>2007-08-03 19:16:11 +1000
commit430404ed9c2f202ca9d3c8072699b2b0279e4dfe (patch)
treed9e8d70d3daf2f04e7dc76b2d774964bae060804 /arch/powerpc/mm/hash_low_64.S
parentc0f7c6cb5dbb6d90e0334e62376dbc6ac3d1d315 (diff)
[POWERPC] Fix special PTE code for secondary hash bucket
The code for mapping special 4k pages on kernels using a 64kB base page size was missing the code for doing the RPN (real page number) manipulation when inserting the hardware PTE in the secondary hash bucket. It needs the same code as has already been added to the code that inserts the HPTE in the primary hash bucket. This adds it. Spotted by Ben Herrenschmidt. Signed-off-by: Paul Mackerras <>
Diffstat (limited to 'arch/powerpc/mm/hash_low_64.S')
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/powerpc/mm/hash_low_64.S b/arch/powerpc/mm/hash_low_64.S
index 4762ff7c14df..35eabfb50723 100644
--- a/arch/powerpc/mm/hash_low_64.S
+++ b/arch/powerpc/mm/hash_low_64.S
@@ -472,10 +472,12 @@ _GLOBAL(htab_call_hpte_insert1)
/* Now try secondary slot */
/* real page number in r5, PTE RPN value + index */
- rldicl r5,r31,64-PTE_RPN_SHIFT,PTE_RPN_SHIFT
+ andis. r0,r31,_PAGE_4K_PFN@h
+ srdi r5,r31,PTE_RPN_SHIFT
+ bne- 3f
add r5,r5,r25
- sldi r5,r5,HW_PAGE_SHIFT
+3: sldi r5,r5,HW_PAGE_SHIFT
/* Calculate secondary group hash */
andc r0,r27,r28