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authorLinus Walleij <linus.walleij@linaro.org>2016-11-01 10:22:53 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-11-26 09:56:54 +0100
commit50e6cd2feff75eedcfaa0a23be6f08fe8410aab0 (patch)
tree7b2a41f590c9bc7497590a7156d7ecf6940b18cc /drivers
parente015527c6fbdf9778853c91a0307aadc83be80eb (diff)
mfd: stmpe: Fix RESET regression on STMPE2401
commit f40584200bc4af7aa4399635b9ac213c62a13ae7 upstream. Since commit c4dd1ba355aae2bc3d1213da6c66c53e3c31e028 ("mfd: stmpe: Add reset support for all STMPE variant") we're resetting the STMPE expanders before use. This caused a regression on the STMP2401 on the Nomadik NHK8815: stmpe-i2c 0-0043: stmpe2401 detected, chip id: 0x101 nmk-i2c 101f8000.i2c0: write to slave 0x43 timed out nmk-i2c 101f8000.i2c0: no ack received after address transmission stmpe-i2c 0-0044: stmpe2401 detected, chip id: 0x101 nmk-i2c 101f8000.i2c0: write to slave 0x44 timed out nmk-i2c 101f8000.i2c0: no ack received after address transmission It turns out that we start to poll for the reset bit to go low again too quickly: the STMPE2401 is not yet online and ready to be asked for the status of the RESET bit. By introducing a 10ms delay before starting to hammer the register for information, we get back to normal: stmpe-i2c 0-0043: stmpe2401 detected, chip id: 0x101 stmpe-i2c 0-0044: stmpe2401 detected, chip id: 0x101 Cc: Amelie Delaunay <amelie.delaunay@st.com> Fixes: c4dd1ba355aa ("mfd: stmpe: Add reset support for all STMPE variant") Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mfd/stmpe.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mfd/stmpe.c b/drivers/mfd/stmpe.c
index 94c7cc02fdab..00dd7ff70e01 100644
--- a/drivers/mfd/stmpe.c
+++ b/drivers/mfd/stmpe.c
@@ -761,6 +761,8 @@ static int stmpe1801_reset(struct stmpe *stmpe)
if (ret < 0)
return ret;
+ msleep(10);
+
timeout = jiffies + msecs_to_jiffies(100);
while (time_before(jiffies, timeout)) {
ret = __stmpe_reg_read(stmpe, STMPE1801_REG_SYS_CTRL);