path: root/arch/sh/kernel/cpu/init.c
AgeCommit message (Expand)Author
2012-03-28Disintegrate asm/system.h for SHDavid Howells
2010-10-26sh: Expose physical addressing mode through cpuinfo.Paul Mundt
2010-04-21sh: __cpuinit annotate the CPU init path.Paul Mundt
2010-04-21sh: Tidy CPU probing and fixup section annotations.Paul Mundt
2010-02-17sh: Setup boot CPU VBR early to enable early page faults.Paul Mundt
2010-01-26sh: Mass ctrl_in/outX to __raw_read/writeX conversion.Paul Mundt
2010-01-21sh: Kill off the special uncached section and fixmap.Paul Mundt
2010-01-13Merge branches 'sh/xstate', 'sh/hw-breakpoints' and 'sh/stable-updates'Paul Mundt
2010-01-13sh: Move over to dynamically allocated FPU context.Paul Mundt
2010-01-05sh: Kill off dead UBC headers.Paul Mundt
2009-12-04sh: Make associative cache writes fatal on all SH-4A parts.Paul Mundt
2009-11-24sh: Minor optimisations to FPU handlingStuart Menefy
2009-10-16sh: Kill off legacy UBC wakeup cruft.Paul Mundt
2009-08-19Merge branch 'master' into sh/cachetlbPaul Mundt
2009-08-15sh: rework nommu for generic cache.c use.Paul Mundt
2009-08-15sh: delay slot future proofing via EXPMASK on SH-4A parts.Paul Mundt
2009-06-02sh: add weak l2_cache_init function.Kuninori Morimoto
2008-12-22sh: Move arch_get_unmapped_area() in to arch/sh/mm/mmap.c.Paul Mundt
2008-03-06sh: Fix up section mismatches.Paul Mundt
2008-01-28sh: Encode L1/L2 cache shape in auxvt.Paul Mundt
2008-01-28sh: Preparation for uncached jumps through PMB.Stuart Menefy
2008-01-28sh: Disable initial cache flush on SH-5.Paul Mundt
2008-01-28sh: Don't reference UBC code in CPU init on sh64.Paul Mundt
2007-09-21sh: Bring SMP support back from the dead.Paul Mundt
2007-09-21sh: Support explicit L1 cache disabling.Paul Mundt
2007-06-11sh: Tidy up dependencies for SH-2 build.Paul Mundt
2007-05-07sh: speculative execution support for SH7780.Paul Mundt
2007-03-12sh: Fix SH-3 cache entry_mask and way_size calculation.Paul Mundt
2007-02-13sh: Fixup cpu_data references for the non-boot CPUs.Paul Mundt
2007-02-13sh: Use a per-cpu ASID cache.Paul Mundt
2006-12-06sh: Add support for SH7206 and SH7619 CPU subtypes.Yoshinori Sato
2006-09-27sh: Calculate shm alignment at runtime.Paul Mundt
2006-09-27sh: Optimized cache handling for SH-4/SH-4A caches.Richard Curnow
2006-03-31[PATCH] Don't pass boot parameters to argv_init[]OGAWA Hirofumi
2005-04-16Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds